KR20230130646A - Multi-output switched-mode power supply for multi-cell-in-series battery charging - Google Patents

Abstract

A multi-output switched mode power supply coupled to a multi-cell-in-series battery, such as charging a 2-cell-in-series (2S) battery using a dual-output 3-level buck converter coupled thereto. Techniques and apparatus for converting power using (SMPS), or using a multi-input SMPS circuit that receives power from a multi-cell-in-series battery. One exemplary power supply circuit generally includes a switched mode power supply circuit having an input node and an output node, a battery comprising multiple cells connected in series, and a charge pump circuit having a first terminal and a second terminal to generate charge. a second terminal of the pump circuit being coupled to a battery, a first switch coupled between an output node of the switched mode power supply circuit and a first terminal of the charge pump circuit, and a switched mode power supply circuit. and a second switch coupled between the output node and the second terminal of the charge pump circuit.

Description

Multi-output switched mode power supply for multi-cell-in-series battery charging

Cross-reference to related application(s)

This application claims the benefit and priority of U.S. Provisional Application No. 63/139,257, filed on January 19, 2021, under the title “Multi-Output Switched-Mode Power Supply for Multi-Cell-in-Series Battery Charging” , claims priority to U.S. Application No. 17/448,306, filed September 21, 2021, entitled “Multi-Output Switched-Mode Power Supply for Multi-Cell-in-Series Battery Charging,” which are fully described below. are expressly incorporated herein by reference in their entirety, as incorporated herein and for all applicable purposes.

Technology field

Certain aspects of the disclosure relate generally to electronic circuits, and more particularly to multi-output switched-mode circuits coupled to a multi-cell-in-series battery. ) relates to methods and devices for converting power using a power supply unit (SMPS).

A voltage regulator ideally provides a constant direct current (DC) output voltage regardless of changes in load current or input voltage. Voltage regulators may be classified as linear regulators or switching regulators. Although linear regulators tend to be relatively compact, many applications may benefit from the increased efficiency of switching regulators. A linear regulator may be implemented by, for example, a low-dropout (LDO) regulator. A switching regulator (also known as a “switching converter” or “switcher”) is a switched mode power supply (SMPS), for example, a buck converter, boost converter, buck-boost converter, or charge pump. It may be implemented.

For example, a buck converter is typically a type of SMPS that includes: (1) a high-side switch coupled between the relatively higher voltage rail and the switching node, (2) a relatively lower voltage rail coupled between the switching node and the switching node. (3) a low-side switch coupled between the voltage rails, and (3) an inductor coupled between the switching node and the load (e.g., represented by a shunt capacitive element). The high and low switches are typically implemented with transistors, but the low switch may alternatively be implemented with a diode.

A charge pump is a type of SMPS that typically includes at least one switching device to control the coupling of the supply voltage across the load through a capacitor. In a voltage doubler (also referred to as a “multiply-by-two (X2) charge pump”), for example, the capacitor of the charge pump circuit is initially connected across the supply, making the capacitor It can also be charged from the supply voltage. The charge pump circuit may then be reconfigured to connect a capacitor in series with the supply and load, doubling the voltage across the load. This two-stage cycle is repeated at the switching frequency for the charge pump. Charge pumps may be used to multiply or divide voltages by integer or fractional quantities, depending on the circuit topology.

Power management integrated circuits (power management ICs or PMICs) are used to manage the power regime of the host system and may include and/or control one or more voltage regulators (e.g., buck converters or charge pumps). there is. PMIC may be used in battery-operated devices such as mobile phones, tablets, laptops, wearables, etc. to control the flow and direction of power within the devices. The PMIC may perform various functions for the device, such as DC-DC conversion (e.g., using a voltage regulator as described above), battery charging, power source selection, voltage scaling, power sequencing, etc.

Each of the systems, methods and devices of this disclosure has several aspects, no single aspect of which is solely responsible for its desirable properties. Without limiting the scope of the disclosure as expressed by the claims that follow, some features are briefly discussed below. After considering this discussion, and especially after reading the section titled “Detailed Description,” you will understand how the features of the disclosure provide the advantages described herein.

Certain aspects of the present disclosure generally provide a multi-output switched converter coupled to a multi-cell-in-series (2S) battery, such as a dual-output 3-level buck converter coupled to a 2-cell-in-series (2S) battery. Mode power supply (SMPS) circuitry. Such a circuit may alternatively function inversely as a multi-input SMPS circuit receiving power from a multi-cell-in-series battery, such as a 2S battery coupled to a dual-input 2-level boost converter.

Certain aspects of the present disclosure relate to power supply circuitry. The power supply circuit generally includes a switched mode power supply circuit having an input node and an output node, a battery including multiple cells connected in series, and a charge pump circuit having a first terminal and a second terminal. 2 terminal is coupled to the charge pump circuit, the first switch coupled between the output node of the switched mode power supply circuit and the first terminal of the charge pump circuit, and the output node of the switched mode power supply circuit and the charge. and a second switch coupled between the second terminal of the pump circuit.

Certain aspects of the present disclosure provide a power management integrated circuit (PMIC) that includes at least a portion of the power supply circuitry described above.

Certain aspects of the present disclosure provide a battery charging circuit that includes the power supply circuit described above.

Certain aspects of the present disclosure relate to power supply circuitry. The power supply circuit generally includes a switched mode power supply circuit having an input node and an output node, a charge pump circuit having a first terminal and a second terminal, and a connection between the output node of the switched mode power supply circuit and the first terminal of the charge pump circuit. a first switch coupled to and a second switch coupled between the output node of the switched mode power supply circuit and the second terminal of the charge pump circuit.

Certain aspects of the present disclosure relate to a method of supplying power. The method generally includes operating a switched mode power supply circuit, and via a first switch coupled between a first node of the switched mode power supply circuit and a first terminal of the charge pump circuit or via a switched mode power supply circuit. and selectively routing current through a second switch coupled between the first node of and the second terminal of the charge pump circuit.

To the accomplishment of the foregoing and related objectives, one or more aspects include features fully described below and particularly pointed out in the claims. The following description and accompanying drawings set forth in detail certain example features of one or more aspects. However, these features represent only a few of the various ways in which the principles of the various aspects may be employed.

In such a manner that the above-described features of the disclosure may be understood in detail, a more detailed description of the briefly summarized above may be made with reference to the aspects, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only certain typical aspects of the present disclosure and, therefore, should not be considered to limit the scope of the present disclosure, as the description may permit other equally effective embodiments. do.
1 is a block diagram of an example device including a power management system including a switched mode power supply (SMPS) circuit and a battery charging circuit in which aspects of the present disclosure may be practiced.
2A is a block diagram of an example power supply circuit with a single-output SMPS and charge pump for charging a 2-cell-in-series (2S) battery.
2B and 2C are block diagrams of an example power supply circuit with a dual-output SMPS and a charge pump for charging a 2S battery illustrating different power paths, in accordance with certain aspects of the present disclosure.
2D and 2E are block diagrams of the example power supply circuit of FIGS. 2B and 2C operating inversely as a dual-input SMPS receiving power from a 2S battery with different power paths, in accordance with certain aspects of the present disclosure. admit.
3 is an example graph of normalized current ripple versus duty cycle for a 2-level buck converter and for a 3-level buck converter.
4 is a flow diagram of example operations for providing power, in accordance with certain aspects of the present disclosure.
To facilitate understanding, like reference numerals have been used, where possible, to designate like elements that are common to the drawings. It is contemplated that elements disclosed in one aspect may be advantageously utilized in other aspects without specific recitation.

Certain aspects of the present disclosure are directed to a multi-cell-in-series (2S) battery coupled to a multi-cell-in-series battery, such as charging a 2-cell-in-series (2S) battery using a dual-output 3-level buck converter coupled thereto. -Provides techniques and devices for converting power using an output switched mode power supply (SMPS). Such power supply circuitry could alternatively function inversely as a multi-input SMPS circuit receiving power from a multi-cell-in-series battery, such as a dual-input 2-level boost converter to charge other devices from a 2S battery. It may be possible.

Various aspects of the present disclosure are more fully described below with reference to the accompanying drawings. However, the present disclosure may be implemented in many different forms and should not be construed as limited to any particular structure or function presented throughout the disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art will recognize that the scope of the disclosure extends to any aspect of the disclosure disclosed herein, whether implemented independently of or in combination with any other aspect of the disclosure. You will recognize that it is intended to cover. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. Additionally, the scope of the present disclosure is intended to cover such devices or methods practiced using structures and functions in addition to or other than the various aspects of the present disclosure described herein. . It should be understood that any aspect of the disclosure disclosed herein may be implemented by one or more elements of a claim.

The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

As used herein, the term "connected to" in various tenses of the verb "connect" means that element A is directly connected to element B or that other elements may be connected between elements A and B (i.e. Element A may be indirectly connected to element B. For electrical components, the term "connected to" also means herein that a wire, trace, or other electrically conductive material is electrically connected to elements A and B (and any components electrically connected between them). It can also be used to mean used to connect.

Exemplary Device

It should be understood that aspects of the present disclosure may be used in a variety of applications. Although the disclosure is not limited in this respect, circuits disclosed herein may include power supplies, battery charging circuits, or power management circuits in communication systems, video codecs, audio equipment such as music players and microphones, television, camera equipment, etc. and test equipment such as an oscilloscope. Communication systems intended to be included within the scope of this disclosure include, by way of example only, cellular radiotelephone communication systems, satellite communication systems, two-way wireless communication systems, one-way pagers, two-way pagers, personal communication systems (PCS) , personal digital assistants (PDAs), etc.

1 illustrates an example device 100 in which aspects of the present disclosure may be implemented. Device 100 may be a battery-operated device, such as a cellular phone, PDA, handheld device, wireless device, laptop computer, tablet, smartphone, wearable device, etc.

Device 100 may include a processor 104 that controls the operation of device 100. Processor 104 may also be referred to as a central processing unit (CPU). Memory 106, which may include both read only memory (ROM) and random access memory (RAM), provides instructions and data to processor 104. Portions of memory 106 may also include non-volatile random access memory (NVRAM). Processor 104 typically performs logical and arithmetic operations based on program instructions stored within memory 106.

In certain aspects, device 100 may also include a housing 108 that may include a transmitter 110 and a receiver 112 to allow transmission and reception of data between device 100 and a remote location. It may be possible. For certain aspects, transmitter 110 and receiver 112 may be combined into transceiver 114. One or more antennas 116 may be attached to or otherwise coupled to housing 108 and electrically connected to transceiver 114 . Device 100 may also include multiple transmitters, multiple receivers, and/or multiple transceivers (not shown).

Device 100 may also include a signal detector 118 that may be used in an effort to detect and quantify the level of signals received by transceiver 114. Signal detector 118 may detect such signal parameters as total energy, energy per subcarrier per symbol, and power spectral density, among others. Device 100 may also include a digital signal processor (DSP) 120 for use in processing signals.

Device 100 further includes a battery 122 that may be used to power various components of device 100 (e.g., when another power source such as a wall adapter or wireless power charger is not available). It may also be included. Battery 122 may include a single cell, or multiple cells connected in series. Device 100 may also include a power management system 123 to manage power from battery 122, wall adapter, and/or wireless power charger to various components of device 100. Power management system 123 may perform various functions for the device, such as DC-DC conversion, battery charging, power source selection, voltage scaling, power sequencing, etc. In certain aspects, power management system 123 may include a power management integrated circuit (power management IC or PMIC) 124, and one or more power supply circuits, such as a battery charger 125 that may be controlled by the PMIC. It may be possible. For certain aspects, at least a portion of one or more power supply circuits may be integrated into PMIC 124. PMIC 124 and/or one or more power supply circuits may include at least a portion of a switched mode power supply (SMPS) circuit, which may include a buck converter, buck-boost converter, 3-level buck converter, or 2-multiply ( It may be implemented by any of a variety of suitable SMPS circuit topologies, such as a charge pump, such as a 3-multiply (X2) or 3-multiply (X3) charge pump.

The various components of device 100 may be coupled together by bus system 126, which may include a power bus, control signal bus, and/or status signal bus in addition to a data bus.

Exemplary Multi-Cell-in-Series Battery Charging Schemes

Battery charging systems (e.g., battery charger 125 of FIG. 1) are trending toward higher charging currents, leading to a need for more efficient converters that can operate over a wider battery voltage range. . To reduce thermal problems and/or conserve power, it may be desirable to operate such battery charging systems at higher efficiency.

In one example parallel charging solution, the master charger is implemented based on a buck converter topology. The master charger may be capable of charging a battery (e.g., battery 122) and provide power on its own or may be paralleled with one or more slave chargers. Each of the slave chargers is configured in a switched mode power supply (SMPS) topology using a switched capacitor converter (e.g., a divide-by-two (Div2) charge pump) or an inductor (e.g., a buck converter). It may be implemented. Charge pump converters may provide a more efficient alternative to buck converters.

Compared to charging a single cell (1S) battery, charging a two-cell-in-series (2S) battery stores twice the power in the battery at the same charging current, thereby providing twice the charging rate. do. A power supply system for charging a 2S battery may include, for example, a buck converter followed by a boost converter, or a buck converter followed by a charge pump capable of multiplying the voltage by 2 (X2). The X2 charge pump may also be capable of dividing by 2 (Div2) when discharging a 2S battery in the opposite direction (i.e., in reverse). Accordingly, a battery charging circuit with this 2-multiply and 2-divide charge pumping capability may be referred to as an “X2/D2” circuit.

2A is an illustration with a single-output SMPS 210 and a charge pump 214 (e.g., an X2/D2 charge pump) for charging a multi-cell battery 230 (e.g., a 2S battery). This is a block diagram of the power supply circuit 200. Although charge pump 214 is generally described herein as an example of an X2/D2 charge pump, it should be understood that the charge pump may be implemented in other configurations, such as an X3/D3 charge pump. The power source for charge pump 214 is a first power supply node 213 (labeled “V _BAT1” ), which may come from SMPS 210 (e.g., in a power management circuit such as PMIC 124). ) or from a second power supply node 215 (labeled “V _BAT2” ), which may come from a battery 230. As illustrated in FIG. 2A , battery 230 can be connected to a wall adapter or other power cable (e.g., universal serial bus (USB) adapter 201) connected through port 202, or wireless power transceiver 204. ) from one of multiple potential power sources, such as a wireless power charger (not shown) with an exemplary power supply range of 5 to 20 V inductively coupled to the wireless power loop 205 connected to V _BAT2 = 6 to It can also be charged to have 9V. For example, the USB source can be a USB standard downstream port, a charging downstream port, or a dedicated charging port (SDP/CDP/DCP), or 5V to USB Type-C, Quick Charge (QC) 2.0/3.0/4.0 to 9 It may be possible to supply a voltage (V _USB ) of 15 to 20 V to 12 V, or to a USB Power Delivery (PD) adapter. A wireless (WLS) source in transmit mode (Tx) can operate at a voltage (V) of, for example, 5 V in the Qi Baseline Power Profile (BPP), 15 V in the Qi Extended Power Profile (EPP), or 20 V in other modes. _WLS ) can also be supplied.

SMPS 210 may include any of a variety of suitable switching converters, such as a 2-level buck converter or a 3-level buck converter. To implement a three-level buck converter topology, as shown in FIG. 2A, SMPS 210 includes a first transistor (Q1), a second transistor (Q2), a third transistor (Q3), and a fourth transistor (Q4). ), a flying capacitive element (C _FLY ), an inductive element (L1), and a shunt capacitive element (C _OUT ). Transistor Q2 may be coupled to transistor Q1 via a first node (labeled "CFH" for the flying capacitor high node), and transistor Q3 may be coupled to transistor Q1 via a second node (labeled "CFH" for the voltage switching node). may be coupled to transistor Q2 via a third node (labeled “CFL” for flying capacitor low node), and transistor Q4 may be coupled to transistor Q3 via a third node (labeled “CFL” for flying capacitor low node). It could be. For certain aspects, transistors Q1-Q4 may be implemented as n-type metal oxide semiconductor (NMOS) transistors, as illustrated in FIG. 2A. In this case, the drain of transistor Q2 may be coupled to the source of transistor Q1, the drain of transistor Q3 may be coupled to the source of transistor Q2, and the drain of transistor Q4 may be coupled to the source of transistor Q2. It may be coupled to the source of transistor Q3. The source of transistor Q4 may be coupled to a reference potential node (eg, electrical ground) for power supply circuit 200. A flying capacitive element (C _FLY ) may have a first terminal coupled to a first node and a second terminal coupled to a third node. Inductive element L1 may have a first terminal coupled to a second node and a second terminal coupled to an output voltage node (labeled “V _PH1” ).

Certain aspects may include an optional transistor (labeled “QBAT1”) disposed between the V _PH1 node and the first power supply node (V _BAT1 ). Transistor QBAT1 may be implemented by an NMOS transistor, as shown, and may serve to control current flow and/or protect one or more elements in power supply circuit 200.

Control logic (not shown, but may be integrated into the PMIC for certain aspects) may control the operation of the power supply circuit 200. For example _, the control logic _may be configured to drive transistors (Q1- The operation of Q4) can also be controlled. The outputs of gate drivers 206 are coupled to individual gates of transistors Q1-Q4. During operation of the power supply circuit 200, the control logic may cycle through four different phases, which may differ depending on whether the duty cycle is below or above 50%.

The operation of a 3-level buck converter with a duty cycle of less than 50% is first described. In the first phase (referred to as the “charge phase”), transistors Q1 and Q3 are activated and transistors Q2 and Q4 are deactivated, charging the flying capacitive element (C _FLY ) and inductive element ( Energize L1). In the second phase (referred to as the “maintenance phase”), transistor Q1 is deactivated and transistor Q4 is activated, so that the VSW node is connected to the reference potential node and the flying capacitive element (C _FLY ) is disconnected. (e.g. one of the C _FLY terminals is floating) and the inductive element (L1) is de-energized. In the third phase (referred to as the “discharge phase”), transistors Q2 and Q4 are activated and transistor Q3 is deactivated, discharging the flying capacitive element (C _FLY ) and inductive element (L1). Energizing. In the fourth phase (also referred to as the “maintenance phase”), transistor Q3 is activated and transistor Q2 is deactivated, so that the flying capacitive element (C _FLY ) is disconnected and the inductive element (L1) is Energizing is released.

The operation of a three-level buck converter with a duty cycle greater than 50% is similar in the first and third phases with identical transistor configurations. However, in the second phase following the first phase (referred to as the “maintenance phase”), transistor Q3 is disabled and transistor Q2 is enabled, such that the VSW node is connected to the input voltage node (“ labeled "MID"), the flying capacitive element (C _FLY ) is disconnected and the inductive element (L1) is energized. Similarly, in the fourth phase (also referred to as the “maintenance phase”), transistor Q1 is activated and transistor Q4 is deactivated, so that the flying capacitive element (C _FLY ) is disconnected and the inductive element ( L1) is energized.

During battery charging, SMPS 210 may convert an input voltage ranging from 5 to 20V power at the input node, for example, in the range of 3 to 4.5V at the SMPS output node (labeled “V _PH1” ). there is. Charge pump 214 may then multiply this voltage to a range of 6 to 9V (for the X2/D2 charge pump) to charge battery 230. During battery discharge (e.g., when there is no external power adapter or wireless power input available, such as when battery 122 is powering device 100), SMPS 210 may be disabled and charge Pump 214 may operate in Div2 mode to provide V _PH1 = 3 to 4.5 V for system loads (labeled “VPH1 loads”). For certain aspects, SMPS 210 also operates in reverse as a (two-level) boost converter to direct power from battery 230 to USB port 202 and/or wireless power loop 205 in reverse charge mode. ) (for example, supplying 5V to V _USB in USB OTG (On-the-Go) or supplying 10V to V _WLS for reverse WLS charging).

This power supply circuit architecture in FIG. 2A can be configured for 1S battery charging (e.g., without or disabling charge pump 214) or for 2S battery charging (e.g., using or disabling the Enabled) provides flexibility. Compared to a 2-level buck converter, implementing SMPS 210 as a 3-level buck converter halves the amplitude of the switching node (labeled “VSW”) and doubles the effective switching frequency, which results in a smaller inductance. allows the use of an inductor, thus providing lower DC resistance (DCR) and higher efficiency. This architecture provides good efficiency with input voltages (at the MID node) of 5 to 9 V for an output voltage (V _PH1 ) of 3 to 4.5 V (at or near 50% duty cycle), but It may have lower efficiency with input voltages of 20V. For example, with an input voltage of 15 to 20 V at the MID node and an output voltage at the V _PH1 node of 4 to 4.5 V, a 3-level buck converter may operate with a 20-30% duty ratio, which is (50 Compared to % duty cycle, this results in higher inductor current ripple and lower efficiency (as shown in graph 300 of FIG. 3). Additionally, there may be a 1 to 2% efficiency loss through charge pump 214 when operating in X2 mode.

For certain aspects, the optional parallel charger 216 (e.g., a Div2 charge pump) may in certain cases (e.g., with input voltages of 15 to 20 V) connect the USB input node at V _USB (e.g., USB_IN") or a wireless power input node at V _WLS (labeled WLS_IN") may be enabled to provide power to a second power supply node 215 at V _BAT2 . However, for some cases, the efficiency may be unacceptably low when such parallel charger 216 is not present.

For these reasons, the efficiency of charging a multi-cell-in-series battery with the power supply circuit 200 of Figure 2A may not be as ideal as possible. Accordingly, certain aspects of the present disclosure provide techniques and apparatus for charging multi-cell-in-series batteries with greater efficiency.

FIG. 2B is a block diagram of an example power supply circuit 250 with a dual-output SMPS 260 and charge pump 214 for charging battery 230. Power supply circuit 250 adds two switches (which may be implemented by transistors QPH1 and QPH2 as shown) to power supply circuit 200 of Figure 2A. One path through the first switch (e.g., through transistor QPH1) provides the first output of dual-output SMPS 260, similar to the output of SMPS 210 in FIG. 2A. Another path through the second switch (e.g., through transistor QPH2) provides the second output of SMPS 260, which connects output node 270 to second power supply node 215 with V _BAT2 . (labeled “V _OUT” ) can be optionally connected to bypass the charge pump 214.

If V _MID < V _BAT2 (e.g., with 5V USB or WLS BPP Tx), the first switch (transistor QPH1) is closed and the second switch (transistor QPH2) is open. In this case, SMPS 260 is operated in forward mode to increase the input voltage (V _MID ) at the V _PH1 node and to a lower voltage (V _BAT1 ) at the first power supply node 213 (e.g., 3 to 4.5 V). ) _, and _the charge pump 214 is operated in double it Therefore, in this case, current flows from the input node to the output node 270, through the first switch (transistor QPH1) and charge pump 214, to charge battery 230, as illustrated in FIG. 2B. flows to the first path 272.

(e.g., with QC2/3/4, USB PD, or WLS EPP/HPP Tx) If V _MID > V _BAT2 , the first switch (transistor (QPH1)) is open, and the second switch (transistor (QPH2) is open. )) is closed, supplying power from SMPS 260 to battery 230 in the other forward mode (e.g., V _BAT2 = 6 to 9V), effectively bypassing charge pump 214. Accordingly, in this scenario as shown in FIG. 2C, current flows from the input node to the output node 270 and through the second switch (transistor QPH2) to the second path 274 to charge the battery 230. ) flows. In this case, instead of charging battery 230, charge pump 214 may operate in a divide mode (e.g., D2 mode) to power system loads (e.g., V _PH1 = 3 to 4.5V).

The power supply circuit 250 of FIG. 2B can achieve significantly higher efficiency than the power supply circuit 200 of FIG. 2A with higher input voltages. This means that the SMPS 260 can be operated at a high duty ratio close to 1.0 (e.g., V _MID = 9V and V _OUT = 8 to 9V at the inductor) or at a duty ratio of 0.5 (e.g., V _MID = 15 to 20V and V _OUT = 8 to 9V), both of which result in low inductor current ripple and therefore low AC losses (as shown in graph 300 of FIG. 3). Moreover, in the case of FIG. 2C where the first switch is open and the second switch is closed, the charge pump 214 is effectively bypassed, so there is no 1 to 2% efficiency loss through the charge pump when charging the battery.

Moreover, SMPS 260 is capable of operating in reverse mode as a dual-input (2-level) boost converter. For example, as illustrated in FIG. 2D , current can be routed from battery 230 via third path 276 through a second switch (e.g., transistor QPH2), such that the second The voltage V _BAT2 at the power supply node 215 is connected to the SMPS 260 to supply the MID node for reverse charging of devices connected to the USB port 202 or inductively coupled to the wireless power loop 205. ) can be boosted by . For example, voltage V _BAT2 may be boosted to V _WLS = 10V for reverse WLS charging. Alternatively, as illustrated in FIG. 2E , current can be routed from battery 230 via fourth path 278 through a first switch (e.g., transistor QPH1), such that first The voltage (V _BAT1 ) at power supply node 213 may be boosted by SMPS 260 to supply the MID node for reverse charging of devices. For example, voltage V _BAT1 may be boosted to V _USB = 5V for reverse charging of USB devices (e.g., according to USB OTG). When boosting V _BAT2 through a second switch, the efficiency may be greater than when boosting V _BAT1 through a first switch, depending on the conversion ratios (and associated inductor current ripple) of the examples provided herein.

As shown, the example power supply circuit 250 is capable of charging a 2S battery, but the scope of the present disclosure is for batteries with more than two cells (e.g., 3-cell-in-series (3S ), 4-cell-in-series (4S) batteries, or n -cell-in-series (where n is an integer greater than 1). Moreover, although the power supply circuit 250 has a charge pump 214 and a dual-output SMPS 260 between two different outputs (e.g., between V _BAT1 and V _BAT2 ), the scope of the present disclosure is not limited to Multi-output SMPS (e.g., 3-output SMPS for 3S batteries) with multiple switches to select between different outputs (e.g., V _BAT1 , V _BAT2 , and V _BAT3 for 3S batteries) , and a charge pump between each pair of outputs (e.g., a X1.5/D1.5 charge pump between V _BAT2 and V _BAT3 for a 3S battery).

Example Operations

4 is a flow diagram of example operations 400 for applying power, in accordance with certain aspects of the present disclosure. Operations 400 may be performed by a power supply circuit (e.g., power supply circuit 250 of FIGS. 2B-2E).

Operations 400 may begin, at block 402, by operating a switched mode power supply circuit (e.g., SMPS 260). At block 404, the power supply circuit connects a first node (e.g., output node 270) of the switched mode power supply circuit and a first terminal (e.g., first power supply) of a charge pump circuit (e.g., charge pump 214). via a first switch (e.g., transistor QPH1) coupled between the first node of the switched mode power supply circuit and the second terminal of the charge pump circuit (e.g., the second power supply circuit) Current may be selectively routed through a second switch (eg, transistor QPH2) coupled between supply node 215.

According to certain aspects, operations 400 may further involve charging a battery (e.g., battery 230), at optional block 406. In this case, operating at block 402 may include operating the switched mode power supply circuit in forward mode. A battery may include multiple cells connected in series. A battery may be coupled to the second switch and to the second terminal of the charge pump circuit.

According to certain aspects, when the input voltage (e.g., V _MID ) at a second node (e.g., MID node) of the switched mode power supply circuit is less than the battery voltage of the battery (e.g., V _BAT2 ), in block 404, the optional Routing involves closing a first switch and opening a second switch. When the input voltage at the second node of the switched mode power supply circuit is less than the battery voltage of the battery, operations 400 cause the charge pump circuit to pump a 2-multiply charge from the first terminal to the second terminal of the charge pump circuit. It may further include operating as a pump.

According to certain aspects, when the input voltage at the second node (e.g., MID node) of the switched mode power supply circuit is greater than the battery voltage of the battery (e.g., V _BAT2 ), selectively routing in block 404 may cause the first It involves opening a switch and closing a second switch. When the input voltage at the second node of the switched mode power supply circuit is greater than the battery voltage of the battery, operations 400 cause the charge pump circuit to pump a 2-divisible charge from the second terminal of the charge pump circuit to the first terminal. It may further include operating as a pump.

According to certain aspects, operations 400 may include a port designated for a wired connection and coupled to a switched mode power supply circuitry (e.g., USB port 202), or a wireless connection coupled to a switched mode power supply circuitry. It may further involve receiving power to charge the battery through at least one of the power transceivers (e.g., wireless power transceiver 204).

According to certain aspects, operating in block 402 involves operating the switched mode power supply circuit in a reverse mode, and selectively routing in block 404 involves routing from the charge pump circuit through the first switch to the switched mode power supply circuit. It involves closing a first switch and opening a second switch to route the current. For certain aspects, operations 400 further include operating the charge pump circuit as a 2-divisible charge pump from a second terminal to a first terminal of the charge pump circuit. For certain aspects, operations 400 further involve receiving power from a battery (e.g., battery 230). In this case, the battery may include multiple cells connected in series. A battery may be coupled to the second switch and to the second terminal of the charge pump circuit.

According to certain aspects, operating at block 402 involves operating the switched mode power supply circuit in a reverse mode, and selectively routing at block 404 involves directing current from the battery to the switched mode power supply circuit through the second switch. Routing involves opening a first switch and closing a second switch. In this case, the battery may include multiple cells connected in series. A battery may be coupled to the second switch and to the second terminal of the charge pump circuit.

Exemplary Aspects

In addition to the various aspects described above, certain combinations of aspects are within the scope of this disclosure, some of which are detailed below.

Aspect 1: The power supply circuit includes a switched mode power supply circuit having an input node and an output node; a charge pump circuit having a first terminal and a second terminal; a first switch coupled between an output node of the switched mode power supply circuit and a first terminal of the charge pump circuit; and a second switch coupled between the output node of the switched mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 2: The power supply circuit of aspect 1 further includes a battery comprising multiple cells connected in series, wherein a second terminal of the charge pump circuit is coupled to the battery.

Aspect 3: The power supply circuit of aspect 2, wherein when the input voltage at the input node is less than the battery voltage of the battery, the first switch is configured to close and the second switch is configured to open.

Aspect 4: The power supply circuit of Aspect 3, wherein the charge pump circuit comprises a 2-multiply charge pump from a first terminal to a second terminal of the charge pump circuit when the input voltage at the input node is less than the battery voltage of the battery. It is composed as.

Aspect 5: The power supply circuit of aspect 2, wherein when the input voltage at the input node is greater than the battery voltage of the battery, the first switch is configured to open and the second switch is configured to close.

Aspect 6: The power supply circuit of Aspect 5, wherein the charge pump circuit comprises a 2-divisible charge pump from the second terminal of the charge pump circuit to the first terminal when the input voltage at the input node is greater than the battery voltage of the battery. It is composed as.

Aspect 7: The power supply circuit of any of the preceding aspects, wherein the power supply circuit is configured to operate in a reverse mode, wherein the first switch is configured to be closed and the second switch is configured to be open.

Aspect 8: The power supply circuit of any one of aspects 1 to 6, wherein the power supply circuit is configured to operate in a reverse mode, and in the reverse mode, the first switch is configured to be open and the second switch is configured to be closed. .

Aspect 9: The power supply circuit of any of the preceding aspects, wherein the first switch and the second switch include n-type metal oxide semiconductor (NMOS) transistors.

Aspect 10: The power supply circuit of any of the preceding aspects, wherein the switched mode power supply circuit comprises: a first transistor coupled to an input node; a second transistor coupled to the first transistor through a first node; a third transistor coupled to the second transistor through a second node; a fourth transistor coupled to the third transistor through a third node; a capacitive element having a first terminal coupled to a first node and a second terminal coupled to a third node; and an inductive element having a first terminal coupled to a second node and a second terminal coupled to an output node of the switched mode power supply circuit.

Aspect 11: The power supply circuit of aspect 10, wherein the first, second, third, and fourth transistors include n-type metal oxide semiconductor (NMOS) transistors.

Aspect 12: The power supply circuit of any of the preceding aspects further comprises a parallel charger coupled between the input node of the switched mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 13: A power management integrated circuit (PMIC) comprising at least a portion of the power supply circuitry of any preceding aspect.

Aspect 14: A method of providing power, comprising operating a switched mode power supply circuit; and via a first switch coupled between a first node of the switched mode power supply circuit and a first terminal of the charge pump circuit or between a first node of the switched mode power supply circuit and a second terminal of the charge pump circuit. and selectively routing current through a second switch.

Aspect 15: The method of aspect 14 further includes charging a battery, wherein operating includes operating a switched mode power supply circuit in a forward mode, and the battery has multiple cells connected in series. and the battery is coupled to the second switch and to the second terminal of the charge pump circuit.

Aspect 16: The method of aspect 15, wherein when the input voltage at the second node of the switched mode power supply circuit is less than the battery voltage of the battery, the selectively routing step includes closing the first switch and opening the second switch. Includes steps.

Clause 17: The method of aspect 16, wherein when the input voltage at the second node of the switched mode power supply circuit is less than the battery voltage of the battery, the charge pump circuit is coupled from a first terminal to a second terminal of the charge pump circuit. It further includes operating as a two-multiplier charge pump.

Aspect 18: The method of aspect 15, wherein when the input voltage at the second node of the switched mode power supply circuit is greater than the battery voltage of the battery, selectively routing comprises opening the first switch and closing the second switch. Includes steps.

Clause 19: The method of aspect 18, wherein when the input voltage at the second node of the switched mode power supply circuit is greater than the battery voltage of the battery, the charge pump circuit is coupled from the second terminal to the first terminal of the charge pump circuit. 2-It further includes operating as an antacid charge pump.

Aspect 20: The method of any of Aspects 15-19, comprising: a port designated for a wired connection and coupled to a switched mode power supply circuit; or receiving power to charge the battery through at least one of a wireless power transceiver coupled to the switched mode power supply circuit.

Aspect 21: The method of any one of Aspects 14-20, wherein operating includes operating the switched mode power supply circuit in a reverse mode, and selectively routing the first switch from the charge pump circuit. closing the first switch and opening the second switch to route current to the switched mode power supply circuit through.

Aspect 22: The method of any of Aspects 14-21 further comprising operating the charge pump circuit as a 2-divisible charge pump from a second terminal of the charge pump circuit to a first terminal.

Aspect 23: The method of any one of Aspects 14 through 22, wherein the battery includes multiple cells connected in series; The battery is coupled to the second switch and to the second terminal of the charge pump circuit.

Aspect 24: The method of aspect 14, wherein operating comprises operating the switched mode power supply circuit in a reverse mode; The selectively routing step includes opening the first switch and closing the second switch to route current from the battery through the second switch to the switched mode power supply circuit; A battery includes multiple cells connected in series; The battery is coupled to the second switch and to the second terminal of the charge pump circuit.

Aspect 25: A battery charging circuit comprising at least a portion of the power supply circuit of any one of Aspects 1 to 12.

The various operations of the methods described above may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and/or software component(s) and/or module(s), including but not limited to a circuit, an application-specific integrated circuit (ASIC), or a processor. In general, where there are operations illustrated in the figures, those operations may have corresponding counterpart means-plus-function components with similar numbering.

As used herein, the term “deciding” encompasses a wide variety of actions. For example, “determining” means calculating, computing, processing, deriving, examining, retrieving (e.g., retrieving in a table, database, or other data structure). ), confirmation, etc. Additionally, “determining” may include receiving (e.g., receiving information), accessing (e.g., accessing data in memory), and the like. Additionally, “deciding” can also include resolving, choosing, electing, establishing, etc.

As used herein, a phrase referring to “at least one of” a list of items refers to any combination of those items, including single members. As an example, “at least one of a, b, or c” means a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination of multiples of the same element (e.g., a-a, a-a-a, a-a-b , a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c or any other ordering of a, b, and c).

Methods disclosed herein include one or more steps or actions to achieve the described method. The method steps and/or actions may be interchanged with each other without departing from the scope of the claims. That is, if a specific order of steps or actions is not specified, the order of specific steps and/or actions and/or their use may be modified without departing from the scope of the claims.

It should be understood that the claims are not limited to the exact structures and components illustrated above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claims.

Claims (24)

As a power supply circuit,
a switched mode power supply circuit having an input node and an output node;
a charge pump circuit having a first terminal and a second terminal;
a first switch coupled between the output node of the switched mode power supply circuit and the first terminal of the charge pump circuit; and
A power supply circuit comprising a second switch coupled between the output node of the switched mode power supply circuit and the second terminal of the charge pump circuit. According to claim 1,
Further comprising a battery including multiple cells connected in series,
and the second terminal of the charge pump circuit is coupled to the battery. According to claim 2,
When the input voltage at the input node is less than the battery voltage of the battery, the first switch is configured to close and the second switch is configured to open. According to claim 3,
wherein the charge pump circuit is configured as a two-multiply charge pump from the first terminal to the second terminal of the charge pump circuit when the input voltage at the input node is less than the battery voltage of the battery, Power supply circuit. According to claim 2,
When the input voltage at the input node is greater than the battery voltage of the battery, the first switch is configured to open and the second switch is configured to close. According to claim 5,
wherein the charge pump circuit is configured as a 2-divisible charge pump from the second terminal to the first terminal of the charge pump circuit when the input voltage at the input node is greater than the battery voltage of the battery, Power supply circuit. According to claim 1,
The power supply circuit is configured to operate in a reverse mode, wherein the first switch is configured to be closed and the second switch is configured to be open. According to claim 1,
The power supply circuit is configured to operate in a reverse mode, wherein the first switch is configured to be open and the second switch is configured to be closed. According to claim 1,
wherein the first switch and the second switch include n-type metal oxide semiconductor (NMOS) transistors. According to claim 1,
The switched mode power supply circuit,
a first transistor coupled to the input node;
a second transistor coupled to the first transistor through a first node;
a third transistor coupled to the second transistor through a second node;
a fourth transistor coupled to the third transistor through a third node;
a capacitive element having a first terminal coupled to the first node and a second terminal coupled to the third node; and
A power supply circuit comprising an inductive element having a first terminal coupled to the second node and a second terminal coupled to the output node of the switched mode power supply circuit. According to claim 10,
The first, second, third, and fourth transistors include n-type metal oxide semiconductor (NMOS) transistors. According to claim 1,
A power supply circuit further comprising a parallel charger coupled between the input node of the switched mode power supply circuit and the second terminal of the charge pump circuit. A power management integrated circuit (PMIC) comprising at least a portion of the power supply circuitry of claim 1. As a method of supplying power,
operating a switched mode power supply circuit; and
Via a first switch coupled between a first node of the switched mode power supply circuit and a first terminal of the charge pump circuit or between the first node of the switched mode power supply circuit and a second terminal of the charge pump circuit. A method of providing power, comprising selectively routing current through a second switch coupled to. According to claim 14,
Further comprising charging the battery,
The operating step includes operating the switched mode power supply circuit in a forward mode, wherein the battery includes multiple cells connected in series, the battery connected to the second switch and the charge pump circuit. A method of supplying power, coupled to the second terminal. According to claim 15,
When the input voltage at the second node of the switched mode power supply circuit is less than the battery voltage of the battery, the selectively routing step includes closing the first switch and opening the second switch. How to provide power. According to claim 16,
When the input voltage at the second node of the switched mode power supply circuit is less than the battery voltage of the battery, the charge pump circuit is connected from the first terminal to the second terminal of the charge pump circuit. -A method of supplying power, further comprising operating as a multiplier charge pump. According to claim 15,
When the input voltage at the second node of the switched mode power supply circuit is greater than the battery voltage of the battery, the selectively routing step includes opening the first switch and closing the second switch. How to provide power. According to claim 18,
When the input voltage at the second node of the switched mode power supply circuit is greater than the battery voltage of the battery, the charge pump circuit -A method of supplying power, further comprising operating as an antacid charge pump. According to claim 15,
a port designated for a wired connection and coupled to the switched mode power supply circuit; or
A wireless power transceiver coupled to the switched mode power supply circuit.
A method of supplying power, further comprising receiving power for charging the battery through at least one of the following. According to claim 14,
The operating step includes operating the switched mode power supply circuit in a reverse mode;
wherein the selectively routing step includes closing the first switch and opening the second switch to route the current from the charge pump circuit through the first switch to the switched mode power supply circuit. How to provide power. According to claim 21,
operating the charge pump circuit as a 2-divisible charge pump from the second terminal of the charge pump circuit to the first terminal. According to claim 21,
Further comprising receiving power from a battery,
The battery includes multiple cells connected in series;
wherein the battery is coupled to the second switch and to the second terminal of the charge pump circuit. According to claim 14,
The operating step includes operating the switched mode power supply circuit in a reverse mode;
The selectively routing step includes opening the first switch and closing the second switch to route the current from a battery through the second switch to the switched mode power supply circuit;
The battery includes multiple cells connected in series;
wherein the battery is coupled to the second switch and to the second terminal of the charge pump circuit.