CN116711199A

CN116711199A - Multi-output switch mode power supply for multi-cell series battery charging

Info

Publication number: CN116711199A
Application number: CN202280008763.3A
Authority: CN
Inventors: C·昆; 郭国勇
Original assignee: Qualcomm Inc
Current assignee: Qualcomm Inc
Priority date: 2021-01-19
Filing date: 2022-01-13
Publication date: 2023-09-05

Abstract

Methods and apparatus for converting power using a multi-output Switched Mode Power Supply (SMPS) coupled to a multi-cell series battery, such as charging a dual-cell series (2S) battery using a dual-output three-level buck converter coupled thereto, or using a multi-input SMPS circuit receiving power from a multi-cell series battery. One example power supply circuit generally includes: a switch mode power supply circuit having an input node and an output node; a battery including a plurality of cells connected in series; a charge pump circuit having a first terminal and a second terminal, the second terminal of the charge pump circuit being coupled to the battery; a first switch coupled between an output node of the switch mode power supply circuit and a first terminal of the charge pump circuit; and a second switch coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Description

Multi-output switch mode power supply for multi-cell series battery charging

Cross-reference to related application(s)

The present application claims priority from U.S. application Ser. No. 17/448,306, entitled "Multi-Output switch-Mode Power Supply for Multi-Cell-in-Series Battery Charging (Multi-Output switch-mode Power for Multi-Cell series Battery charging)" filed on month 21 of 2021, which claims the benefit and priority from U.S. provisional application Ser. No. 63/139,257, entitled "Multi-Output switch-Mode Power Supply for Multi-Cell-in-Series Battery Charging (Multi-Output switch-mode Power for Multi-Cell series Battery charging)" filed on month 19 of 2021, which is expressly incorporated herein in its entirety as if fully set forth below, and for all applicable purposes.

Technical Field

Certain aspects of the present disclosure generally relate to electronic circuits, and more particularly, to methods and apparatus for converting power using a multi-output Switched Mode Power Supply (SMPS) coupled to a multi-cell series battery.

Background

The voltage regulator is desirably capable of providing a constant Direct Current (DC) output voltage regardless of load current or input voltage variations. Voltage regulators may be classified as linear regulators or switching regulators. While linear regulators tend to be relatively compact, many applications may benefit from increased efficiency of the switching regulator. For example, the linear regulator may be implemented by a Low Dropout (LDO) regulator. A switching regulator (also referred to as a "switching converter" or "switch") may be implemented by, for example, a Switched Mode Power Supply (SMPS), such as a buck converter, a boost converter, a buck-boost converter, or a charge pump.

For example, buck converters are SMPS, generally comprising: (1) a high-side switch coupled between the relatively high voltage rail and the switch node, (2) a low-side switch coupled between the switch node and the relatively low voltage rail, and (3) an inductor coupled between the switch node and a load (e.g., represented by a shunt capacitive element). The high side switch and the low side switch are typically implemented with transistors, although the low side switch may alternatively be implemented with diodes.

A charge pump is a type of SMPS, typically comprising at least one switching device for controlling the connection of a supply voltage across a load through a capacitor. For example, in a voltage doubler (also referred to as a "double voltage (X2) charge pump"), a capacitor of a charge pump circuit may initially be connected across a supply, charging the capacitor to a supply voltage. The charge pump circuit may then be reconfigured to connect the capacitor in series with the supply and the load, doubling the voltage across the load. The two-stage cycle repeats at the switching frequency of the charge pump. Depending on the circuit topology, a charge pump may be used to multiply or divide the voltage by an integer or fractional number.

A power management integrated circuit (power management IC or PMIC) is used to manage the power scheme of the host system and may include and/or control one or more voltage regulators (e.g., boost converters or charge pumps). PMIC may be used for battery operated devices such as mobile phones, tablet computers, laptop computers, wearable devices, etc. to control the flow and direction of power in the device. The PMIC may perform various functions of the device such as DC-to-DC conversion (e.g., using the voltage regulator described above), battery charging, power supply selection, voltage scaling, power sequencing, and the like.

Disclosure of Invention

The systems, methods, and devices of the present disclosure each have multiple aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of the present disclosure as expressed by the claims which follow, some features will now be discussed briefly. After considering this discussion, and particularly after reading the section entitled "detailed description of certain embodiments" one will understand how the features of this disclosure provide the advantages described herein.

Certain aspects of the present disclosure generally relate to a multi-output Switch Mode Power Supply (SMPS) circuit coupled to a multi-cell series battery, such as a dual-output three-level buck converter coupled to a two-cell series (2S) battery. Alternatively, such a circuit may be used in reverse as a multi-input SMPS circuit that receives power from a multi-cell series battery (such as a 2S battery coupled to a dual-input two-level boost converter).

Certain aspects of the present disclosure relate to a power supply circuit. The power supply circuit generally includes: a switch mode power supply circuit having an input node and an output node; a battery including a plurality of cells connected in series; a charge pump circuit having a first terminal and a second terminal, the second terminal of the charge pump circuit being coupled to the battery; a first switch coupled between an output node of the switch mode power supply circuit and a first terminal of the charge pump circuit; and a second switch coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Certain aspects of the present disclosure provide a Power Management Integrated Circuit (PMIC) comprising at least a portion of the power supply circuit described above.

Certain aspects of the present disclosure provide a battery charging circuit comprising the above power supply circuit.

Certain aspects of the present disclosure relate to a power supply circuit. The power supply circuit generally includes: a switch mode power supply circuit having an input node and an output node; a charge pump circuit having a first terminal and a second terminal; a first switch coupled between an output node of the switch mode power supply circuit and a first terminal of the charge pump circuit; and a second switch coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Certain aspects of the present disclosure relate to a power supply method. The method generally includes: operating a switch mode power supply circuit; and selectively routing current through a first switch coupled between the first node of the switch-mode power supply circuit and the first terminal of the charge pump circuit or through a second switch coupled between the first node of the switch-mode power supply circuit and the second terminal of the charge pump circuit.

To the accomplishment of the foregoing and related ends, one or more aspects comprise the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, however, of but a few of the various ways in which the principles of various aspects may be employed.

Drawings

So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to various aspects, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only certain typical aspects of this disclosure and are therefore not to be considered limiting of its scope, for the description may admit to other equally effective aspects.

Fig. 1 is a block diagram of an example device including a power management system that includes a Switch Mode Power Supply (SMPS) circuit and a battery charging circuit in which aspects of the present disclosure may be practiced.

Fig. 2A is a block diagram of an example power supply circuit with a single output SMPS and a charge pump for charging a dual cell serial (2S) battery.

Fig. 2B and 2C are block diagrams of example power supply circuits with dual output SMPS and charge pump for charging a 2S battery, illustrating different power paths, according to certain aspects of the present disclosure.

Fig. 2D and 2E are block diagrams of the example power supply circuit of fig. 2B and 2C operating in reverse as a dual input SMPS to receive power from a 2S battery using different power paths, in accordance with certain aspects of the present disclosure.

Fig. 3 is an example plot of normalized current ripple versus duty cycle for a two-level buck converter and a three-level buck converter.

Fig. 4 is a flowchart of example operations for powering in accordance with certain aspects of the present disclosure.

To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one aspect may be beneficially utilized on other aspects without specific recitation.

Detailed Description

Certain aspects of the present disclosure provide techniques and apparatus for converting power using a multi-output Switched Mode Power Supply (SMPS) coupled to a multi-cell series battery, such as charging a two-cell series (2S) battery using a dual-output three-level buck converter coupled to the two-cell series (2S) battery. Alternatively, such a power supply circuit may operate in reverse as a multi-input SMPS circuit receiving power from a multi-cell series battery, such as a dual input two-level boost converter charging another device from a 2S battery.

Various aspects of the disclosure are described more fully hereinafter with reference to the accompanying drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of the disclosure is intended to cover any aspect of the disclosure disclosed herein, whether implemented independently of or in combination with any other aspect of the disclosure. For example, any number of the aspects set forth herein may be used to implement or practice the method. In addition, the scope of the present disclosure is intended to cover such an apparatus or method as may be practiced with other structure, functionality, or structure and functionality in addition to or other than the aspects of the present disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein may be implemented by one or more elements of the claims.

The word "exemplary" is used herein to mean "serving as an example, instance, or illustration. Any aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects.

As used herein, the term "connected with …" in various tenses of the verb "connected" may mean that element a is directly connected to element B, or that other elements may be connected between elements a and B (i.e., element a is indirectly connected to element B). In the case of electrical components, the term "connected to …" may also be used herein to refer to wires, traces, or other conductive materials being used to electrically connect elements a and B (and any components electrically connected therebetween).

Example apparatus

It should be understood that various aspects of the present disclosure may be used in a variety of applications. Although the present disclosure is not limited in this respect, the circuits disclosed herein may be used in any of a variety of suitable apparatuses, such as in a power supply, battery charging circuit, or power management circuit for communication systems, video codecs, audio equipment (such as music players and microphones), televisions, camera equipment, and test equipment (such as oscilloscopes). Communication systems intended to be included within the scope of the present disclosure include, by way of example only, cellular radiotelephone communication systems, satellite communication systems, two-way radio communication systems, one-way pagers, two-way pagers, personal Communication Systems (PCS), personal Digital Assistants (PDAs), and the like.

FIG. 1 illustrates an example device 100 in which various aspects of the present disclosure may be implemented. Device 100 may be a battery-operated device such as a cellular telephone, PDA, handheld device, wireless device, laptop computer, tablet computer, smart phone, wearable device, etc.

The device 100 may include a processor 104 that controls the operation of the device 100. The processor 104 may also be referred to as a Central Processing Unit (CPU). Memory 106, which may include Read Only Memory (ROM) and Random Access Memory (RAM), provides instructions and data to processor 104. A portion of the memory 106 may also include non-volatile random access memory (NVRAM). The processor 104 typically performs logical and arithmetic operations based on program instructions stored within the memory 106.

In certain aspects, the device 100 may also include a housing 108, which housing 108 may include a transmitter 110 and a receiver 112 to allow data to be transmitted and received between the device 100 and a remote location. For certain aspects, the transmitter 110 and the receiver 112 may be combined into a transceiver 114. One or more antennas 116 may be attached or otherwise coupled to the housing 108 and electrically coupled to the transceiver 114. The device 100 may also include (not shown) multiple transmitters, multiple receivers, and/or multiple transceivers.

The device 100 may also include a signal detector 118, the signal detector 118 may be used to attempt to detect and quantify the level of signals received by the transceiver 114. The signal detector 118 may detect signal parameters such as total energy, energy per symbol per subcarrier, and power spectral density. The device 100 may also include a Digital Signal Processor (DSP) 120 for use in processing signals.

The device 100 may also include a battery 122, which battery 122 may be used to power the various components of the device 100 (e.g., when another power source (such as a wall adapter or wireless power charger) is not available). The battery 122 may include a single unit or a plurality of units connected in series. The device 100 may also include a power management system 123 for managing power from the battery 122, wall adapter, and/or wireless power charger to various components of the device 100. The power management system 123 may perform various functions of the device such as DC-to-DC conversion, battery charging, power supply selection, voltage scaling, power sequencing, and the like. In certain aspects, the power management system 124 may include a power management integrated circuit (power management IC or PMIC) 124 and one or more power supply circuits, such as a battery charger 125, which may be controlled by the PMIC. For certain aspects, at least a portion of one or more power supply circuits may be integrated in the PMIC 124. The PMIC 124 and/or the one or more power supply circuits may include at least a portion of a Switch Mode Power Supply (SMPS) circuit, which may be implemented by any of a variety of suitable SMPS circuit topologies, such as a buck converter, buck-boost converter, three-level buck converter, or a charge pump, such as a two-fold voltage (X2) or three-fold voltage (X3) charge pump.

The various components of device 100 may be coupled together by a bus system 126, which bus system 126 may include a power bus, a control signal bus, and/or a status signal bus in addition to a data bus.

Example Multi-cell series Battery charging scheme

Battery charging systems (e.g., battery charger 125 of fig. 1) tend to higher charging currents, which leads to a desire for higher efficiency converters that can operate over a wider range of battery voltages. To reduce thermal problems and/or save power, it may be desirable to operate such battery charging systems with greater efficiency.

In one example parallel charging solution, the main charger is implemented based on a buck converter topology. The master charger can charge a battery (e.g., battery 122) and provide power itself, or may be in parallel with one or more slave chargers. For example, each of the slave chargers may be implemented as a switched capacitor converter (e.g., a two-divided voltage (Div 2) charge pump) or a Switched Mode Power Supply (SMPS) topology using inductors (e.g., a buck converter). The charge pump converter may provide a more efficient alternative to the buck converter.

Charging a dual cell series (2S) battery can store twice the power in the battery at the same charging current as a single cell (1S) battery charge, thereby providing a double charging rate. The power supply system for charging the 2S battery may include, for example, a buck converter following a boost converter, or a buck converter following a charge pump capable of doubling the voltage (X2). The X2 charge pump may also be capable of two-divided voltage (Div 2) when discharging the 2S battery in the opposite direction (i.e., reverse). Thus, a battery charging circuit with such a two-voltage and two-voltage charge pump capability may be referred to as an "X2/D2" circuit.

Fig. 2A is a block diagram of an example power supply circuit 200 having a single output SMPS 210 and a charge pump 214 (e.g., an X2/D2 charge pump) for charging a multi-cell battery 230 (e.g., a 2S battery). Although the charge pump 214 is generally described herein with an example of an X2/D2 charge pump, it is to be understood that the charge pump may be implemented with other configurations, such as an X3/D3 charge pump. The power supply of the charge pump 214 may come from a first power supply node 213 (labeled "V _BAT1 ") that may be from the SMPS 210 (e.g., in a power management circuit such as PMIC 124), or from the second power supply node 215 (labeled" V _BAT2 ") which may be from battery 230. As illustrated in fig. 2A, the battery 230 may be powered from one of a plurality of potential power sourcesCharged to have V _BAT2 =6 to 9V, such as a wall adapter or other power cable (e.g., universal Serial Bus (USB) adapter 201) connected via port 202 or a wireless power charger (not shown) having an example power range of 5 to 20V, inductively coupled to a wireless power loop 205 connected to wireless power transceiver 204. For example, the USB source may supply a voltage V of 5V using a USB standard downstream port, a charging downstream port or a dedicated charging port (SDP/CDP/DCP) or USB Type C (USB Type-C) _USB A voltage V of 9V to 12V is supplied by Quick Charge (QC) 2.0/3.0/4.0 _USB Or supplying a voltage V of 15 to 20V using a USB Power Delivery (PD) adapter _USB . For example, a Wireless (WLS) source in transmit mode (Tx) may supply a voltage V of 5V using a Qi Baseline Power Profile (BPP) _WLS Supplying a voltage V of 15V using Qi spread power distribution (EPP) _WLS Or supply voltage V of 20V by other modes _WLS 。

SMPS 210 may include any of a variety of suitable switching converters, such as a two-level buck converter or a three-level buck converter. To implement a three-level buck converter topology, as shown in FIG. 2A, SMPS 210 may include a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, and a flying capacitor element C _FLY Inductance element L1 and shunt capacitance element C _OUT . Transistor Q2 may be coupled to transistor Q1 via a first node (labeled "CFH" for flying capacitor high node), transistor Q3 may be coupled to transistor Q2 via a second node (labeled "VSW" for voltage switch node), and transistor Q4 may be coupled to transistor Q3 via a third node (labeled "CFL" for flying capacitor low node). For certain aspects, transistors Q1-Q4 may be implemented as n-type metal oxide semiconductor (NMOS) transistors, as illustrated in fig. 2A. In this case, the drain of transistor Q2 may be coupled to the source of transistor Q1, the drain of transistor Q3 may be coupled to the source of transistor Q2, and the drain of transistor Q4 may be coupled to the source of transistor Q3. The source of transistor Q4 may be coupled to a reference potential node of power circuit 200 (e.g., electrically grounded). Flying capacitor element C _FLY There may be a first terminal coupled to the first node and a second terminal coupled to the third node. Inductive element L1 may have a first terminal coupled to the second node and a second terminal coupled to the output voltage node (labeled "V _PH1 ") second terminal.

Certain aspects may include being disposed at V _PH1 Node and first supply node (V _BAT1 ) An optional transistor therebetween (labeled "QBAT 1"). Transistor QBAT1 may be implemented by an NMOS transistor, as shown, and may be used to control current and/or protect one or more elements in power supply circuit 200.

Control logic (not shown, but for some aspects may be integrated in the PMIC) may control the operation of the power supply circuit 200. For example, the control logic may be via to the corresponding gate driver 206 ₁ To 206 ₄ An input output signal (collectively referred to as "gate driver 206") controls the operation of transistors Q1 to Q4. The output of gate driver 206 is coupled to the respective gates of transistors Q1 through Q4. During operation of the power circuit 200, the control logic may cycle through four different phases, which may differ depending on whether the duty cycle is less than 50% or greater than 50%.

Operation of the three-level buck converter with a duty cycle of less than 50% will first be described. In a first phase (referred to as the "charging phase"), transistors Q1 and Q3 are activated and transistors Q2 and Q4 are deactivated to provide a capacitor element C _FLY Charging and energizing the inductive element L1. In the second phase (referred to as the "hold phase"), transistor Q1 is disabled and transistor Q4 is activated such that the VSW node is connected to the reference potential node, flying capacitor element C _FLY Is disconnected (e.g. C _FLY One C of the terminals _FLY The terminal is floating) and the inductive element L1 is powered down. In a third phase (referred to as the "discharge phase"), transistors Q2 and Q4 are activated and transistor Q3 is deactivated to provide a feedback signal to flying capacitor C _FLY Discharging and energizing the inductive element L1. In the fourth phase (also referred to as the "hold phase"), transistor Q3 is activated and transistor Q2 is deactivated, causing a flying capacitorElement C _FLY Is turned off and the inductance element L1 is powered off.

The three-level buck converter with a duty cycle greater than 50% operates similarly in the first and third phases, with the same transistor configuration. However, in a second phase (referred to as the "hold phase") after the first phase, transistor Q3 is disabled and transistor Q2 is activated such that the VSW node is coupled to the input voltage node of SMPS 210 (labeled "MID"), flying capacitor element C _FLY Is turned off and the inductance element L1 is energized. Similarly, in the fourth phase (also referred to as the "hold phase"), transistor Q1 is activated and transistor Q4 is deactivated, such that flying capacitor element C _FLY Is turned off and the inductance element L1 is energized.

During battery charging, SMPS 210 may convert an input voltage of 5 to 20V power at an input node to a range of 3 to 4.5V, for example, at an SMPS output node (labeled "V _PH1 "). The charge pump 214 may then double this voltage to a range of 6 to 9V (for an X2/D2 charge pump) to charge the battery 230. During battery discharge (e.g., when no external power adapter or wireless power input is available, such as when battery 122 is powering device 100), SMPS 210 may be disabled and charge pump 214 may operate in Div2 mode to provide V to the system load (labeled "VPH1 load") _PH1 =3 to 4.5V. For certain aspects, SMPS 210 may also operate in reverse as a (two-level) boost converter to supply power from battery 230 to USB port 202 and/or wireless power loop 205 in reverse charging mode (e.g., to V in portable (OTG) USB) _USB Supplying 5V or V to _WLS 10V is supplied for reverse WLS charging).

Such a power circuit architecture in fig. 2A provides flexibility for either 1S battery charging (e.g., without using or disabling charge pump 214) or 2S battery charging (e.g., with or enabling X2/D2 charge pump). Implementing SMPS 210 as a three-level buck converter halves the amplitude of the switching node (labeled "VSW") and doubles the effective switching frequency, as compared to a two-level buck converter, which allows the use of an inductor with a smaller inductance, and thus provides for For lower DC resistance (DCR) and higher efficiency. For an output voltage V of 3 to 4.5V (duty cycle 50% or close to 50%) _PH1 This architecture provides good efficiency with an input voltage of 5 to 9V (at the MID node), but may have lower efficiency with an input voltage of 15 to 20V. For example, the input voltage at the MID node is 15 to 20V and at V _PH1 With an output voltage at the node of 4 to 4.5V, the three-level buck converter may operate at a duty cycle of 20 to 30%, which results in higher inductor current ripple (as shown in graph 300 of fig. 3, compared to a 50% duty cycle) and lower efficiency. There may also be a 1% to 2% efficiency loss through the charge pump 214 when operating in the X2 mode.

For certain aspects, in certain cases (e.g., where the input voltage is 15 to 20V), an optional parallel charger 216 (e.g., div2 charge pump) may be enabled to supply power from V _USB USB input node at (labeled "USB_IN") or V _WLS A wireless power input node (labeled "WLS IN") at the node V _BAT2 A second power supply node 215 at which power is provided. However, for some situations, the efficiency may be unacceptably low when such a parallel charger 216 is not present.

For these reasons, the efficiency of charging a multi-cell series battery using the power circuit 200 of fig. 2A may not be as ideal as possible. Accordingly, certain aspects of the present disclosure provide techniques and apparatus for charging a multi-cell series battery with greater efficiency.

Fig. 2B is a block diagram of an example power supply circuit 250 with a dual output SMPS 260 and a charge pump 214 for charging a battery 230. The power circuit 250 adds two switches (which may be implemented by transistors QPH1 and QPH2, as depicted) to the power circuit 200 of FIG. 2A. A first output of the dual output SMPS 260 is provided through one path of the first switch (e.g., through transistor QPH 1), which is similar to the output of the SMPS 210 of fig. 2A. The SMPS 260 may selectively couple the output node 270 (labeled "V" by providing a second output of the SMPS 260 through another path of the second switch (e.g., through transistor QPH 2) _OUT ") is connected toWith V shape _BAT2 Thereby bypassing the charge pump 214.

When V is _MID <V _BAT2 When (e.g., using 5V USB or WLS BPP Tx), the first switch (transistor QPH 1) is closed and the second switch (transistor QP H2) is open. In this case, the SMPS 260 operates in a forward mode to operate at V _PH1 The input voltage V will be at node and first supply node 213 _MID Down-conversion to lower voltage V _BAT1 (e.g., 3 to 4.5V), and the charge pump 214 operates in the X2 mode to supply a voltage V at the second power supply node 215 _BAT2 Doubling to higher voltage V _BAT2 (e.g., 6 to 9V). Thus, in this case, current flows in a first path 272 from the input node to the output node 270, charging the battery 230 through the first switch (transistor QPH 1) and the charge pump 214, as illustrated in fig. 2B.

When V is _MID >V _BAT2 When (e.g., using QC2/3/4, USB PD or WLS EPP/HPP Tx), the first switch (transistor QPH 1) is open and the second switch (transistor QPH 2) is closed to power the battery 230 from the SMPS 260 (e.g., V) in another forward mode _BAT2 =6 to 9V), effectively bypassing the charge pump 214. Thus, in this scenario depicted in fig. 2C, current flows in a second path 274 from the input node to the output node 270 and the battery 230 is charged through a second switch (transistor QPH 2). In this case, instead of charging the battery 230, the charge pump 214 may operate in a division mode (e.g., D2 mode) to supply power to the system load (e.g., V _PH1 =3 to 4.5V).

The power circuit 250 of fig. 2B may achieve significantly higher efficiency than the power circuit 200 of fig. 2A with a higher input voltage. This is because SMPS 260 can operate at a high duty cycle of approximately 1.0 (e.g., V at the inductor _MID =9v and V _OUT =8 to 9V) or at a duty cycle of 0.5 (e.g., V _MID =15 to 20V and V _OUT =8 to 9V) both of which result in low inductor current ripple (as shown in graph 300 of fig. 3) and thus low AC losses. In addition, when the first switch is opened and the second switch is closedIn the case of fig. 2C, the charge pump 214 is effectively bypassed such that there is no 1% to 2% efficiency loss through the charge pump when charging the battery.

Also, the SMPS 260 may operate in a reverse mode as a dual input (two level) boost converter. For example, as illustrated in fig. 2D, current may be routed from the battery 230 via a third path 276 through a second switch (e.g., transistor QPH 2) such that the voltage V at the second power supply node 215 _BAT2 May be boosted by SMPS 260 to supply the MID node for reverse charging of devices connected to USB port 202 or inductively coupled to wireless power loop 205. For example, voltage V _BAT2 Can be boosted to V _WLS =10v for reverse WLS charging. Alternatively, as illustrated in fig. 2E, current may be routed from the battery 230 via a fourth path 278 through a first switch (e.g., transistor QPH 1) such that the voltage V at the first power supply node 213 _BAT1 The boost may be provided by SMPS 260 to supply MID nodes for reverse charging of the device. For example, voltage V _BAT1 Can be boosted to V _USB =5v for reverse charging of USB devices (e.g. according to USB OTG). When boosting V by second switch _BAT 2, according to the example conversion ratios (and associated inductor current ripple) provided herein, the efficiency may be greater than the boost V by the first switch _BAT1 Efficiency at that time.

As shown, the example power circuit 250 is capable of charging a 2S battery, although it is understood that the scope of the present disclosure includes batteries having more than two cells (e.g., a three cell series (3S), a four cell series (4S) battery, or an n cell series, where n is an integer greater than 1). Further, although the power supply circuit 250 has a voltage between two different outputs (e.g., at V _BAT1 And V is equal to _BAT2 Between) a dual output SMPS 260 having a charge pump 214, it is understood that the scope of the present disclosure includes a multi-output SMPS (e.g., a three-output SMPS for a 3S battery) having a plurality of switches for selecting between different outputs (e.g., V for a 3S battery) _BAT1 、V _BAT2 And V _BAT3 ) And a charge pump between each pair of outputs (e.g., at V for a 3S battery _BAT2 And V is equal to _BAT3 X1.5/D1.5 charge pump in between).

Example operations

Fig. 4 is a flowchart of example operations 400 for supplying power in accordance with certain aspects of the present disclosure. The operations 400 may be performed by a power circuit (e.g., the power circuit 250 of fig. 2B-2E).

The operation 400 may begin at block 402 by operating a switch mode power supply circuit (e.g., SMPS 260). At block 404, the power supply circuit may selectively route current through a first switch (e.g., transistor QPH 1) coupled between a first node (e.g., output node 270) of the switch-mode power supply circuit and a first terminal (e.g., coupled to first power supply node 213) of the charge pump circuit (e.g., charge pump 214) or through a second switch (e.g., transistor QPH 2) coupled between the first node of the switch-mode power supply circuit and a second terminal (e.g., coupled to second power supply node 215) of the charge pump circuit.

According to certain aspects, operation 400 may also involve charging a battery (e.g., battery 230) at optional block 406. In this case, the operation at block 402 may include operating the switch mode power supply circuit in a forward mode. The battery may include a plurality of cells connected in series. The battery may be coupled to the second switch and the second terminal of the charge pump circuit.

According to certain aspects, when the input voltage (e.g., V) at the second node (e.g., MID node) of the switch-mode power supply circuit _MID ) Less than the battery voltage (e.g., V _BAT2 ) When the selective routing in block 404 involves closing a first switch and opening a second switch. In such a case where the input voltage at the second node of the switch mode power supply circuit is less than the battery voltage of the battery, operation 400 may further include operating the charge pump circuit as a 2-by-2 charge pump from the first terminal to the second terminal of the charge pump circuit.

According to certain aspects, when the input voltage at the second node (e.g., MID node) of the switch mode power supply circuit is greater than the battery voltage (e.g., V _BAT2 ) At this time, the selection in block 404Selectively routing involves opening a first switch and closing a second switch. In such a case where the input voltage at the second node of the switch mode power supply circuit is greater than the battery voltage of the battery, operation 400 may further include operating the charge pump circuit as a divide-by-2 charge pump from the second terminal to the first terminal of the charge pump circuit.

According to certain aspects, operation 400 may also involve receiving power to charge the battery via at least one of: a port (e.g., USB port 202) designated for wired connection and coupled to a switch mode power supply circuit; or a wireless power transceiver (e.g., wireless power transceiver 204) coupled to the switch mode power supply circuit.

According to certain aspects, the operation at block 402 involves operating the switch-mode power supply circuit in a reverse mode, and the selective routing at block 404 involves closing the first switch and opening the second switch to route current from the charge pump circuit to the switch-mode power supply circuit through the first switch. For certain aspects, operation 400 further comprises operating the charge pump circuit as a two-voltage charge pump from the second terminal to the first terminal of the charge pump circuit. For certain aspects, operation 400 also involves receiving power from a battery (e.g., battery 230). In this case, the battery may include a plurality of cells connected in series. The battery may be coupled to the second switch and the second terminal of the charge pump circuit.

According to certain aspects, the operation at block 402 involves operating the switch-mode power supply circuit in a reverse mode, and the selective routing at block 404 involves opening the first switch and closing the second switch to route current from the battery through the second switch to the switch-mode power supply circuit. In this case, the battery may include a plurality of cells connected in series. The battery may be coupled to the second switch and the second terminal of the charge pump circuit.

Example aspects

In addition to the various aspects described above, specific combinations of aspects are also within the scope of the present disclosure, some of which are detailed below:

aspect 1: a power supply circuit, comprising: a switch mode power supply circuit having an input node and an output node; a charge pump circuit having a first terminal and a second terminal; a first switch coupled between an output node of the switch mode power supply circuit and a first terminal of the charge pump circuit; and a second switch coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 2: the power supply circuit according to aspect 1, further comprising: a battery comprising a plurality of cells connected in series, wherein a second terminal of the charge pump circuit is coupled to the battery.

Aspect 3: the power supply circuit according to aspect 2, wherein the first switch is configured to be closed and the second switch is configured to be opened when the input voltage at the input node is less than the battery voltage of the battery.

Aspect 4: the power supply circuit according to aspect 3, wherein the charge pump circuit is configured as a double voltage charge pump from the first terminal to the second terminal of the charge pump circuit when the input voltage at the input node is less than the battery voltage of the battery.

Aspect 5: the power supply circuit according to aspect 2, wherein the first switch is configured to be open and the second switch is configured to be closed when the input voltage at the input node is greater than the battery voltage of the battery.

Aspect 6: the power supply circuit of aspect 5, wherein the charge pump circuit is configured to divide the voltage of the charge pump from the second terminal to the first terminal of the charge pump circuit when the input voltage at the input node is greater than the battery voltage of the battery.

Aspect 7: the power supply circuit according to any one of the preceding aspects, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode the first switch is configured to be closed and the second switch is configured to be open.

Aspect 8: the power supply circuit according to any one of aspects 1 to 6, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode the first switch is configured to be open and the second switch is configured to be closed.

Aspect 9: the power supply circuit according to any one of the preceding aspects, wherein the first switch and the second switch comprise n-type metal oxide semiconductor (NMOS) transistors.

Aspect 10: the power supply circuit according to any one of the preceding aspects, wherein the switch mode power supply circuit comprises: a first transistor coupled to the input node; a second transistor coupled to the first transistor via a first node; a third transistor coupled to the second transistor via a second node; a fourth transistor coupled to the third transistor via a third node; a capacitive element having a first terminal coupled to the first node and a second terminal coupled to the second terminal of the third node; and an inductive element having a first terminal coupled to the second node and a second terminal coupled to the output node of the switch mode power supply circuit.

Aspect 11: the power supply circuit according to aspect 10, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor include n-type metal oxide semiconductor (NMOS) transistors.

Aspect 12: the power supply circuit according to any one of the preceding aspects, further comprising: a parallel charger is coupled between the input node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 13: a Power Management Integrated Circuit (PMIC) comprising at least a portion of the power supply circuit of any of the preceding aspects.

Aspect 14: a method of supplying power, comprising: operating a switch mode power supply circuit; and selectively routing current through a first switch coupled between the first node of the switch-mode power supply circuit and the first terminal of the charge pump circuit or through a second switch coupled between the first node of the switch-mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 15: the method according to aspect 14, further comprising: charging a battery, wherein the operation comprises operating the switch mode power supply circuit in a forward mode, wherein the battery comprises a plurality of cells connected in series, and wherein the battery is coupled to the second switch and to the second terminal of the charge pump circuit.

Aspect 16: the method of aspect 15, wherein selectively routing includes closing the first switch and opening the second switch when the input voltage at the second node of the switch-mode power supply circuit is less than the battery voltage of the battery.

Aspect 17: the method according to aspect 16, further comprising: when the input voltage at the second node of the switch mode power supply circuit is less than the battery voltage of the battery, the charge pump circuit is operated as a voltage doubler charge pump from the first terminal to the second terminal of the charge pump circuit.

Aspect 18: the method of aspect 15, wherein selectively routing includes opening the first switch and closing the second switch when the input voltage at the second node of the switch-mode power supply circuit is greater than the battery voltage of the battery.

Aspect 19: the method according to aspect 18, further comprising: when the input voltage at the second node of the switch mode power supply circuit is greater than the battery voltage of the battery, the charge pump circuit is operated as a two-voltage charge pump from the second terminal to the first terminal of the charge pump circuit.

Aspect 20: the method according to any one of aspects 15 to 19, further comprising: receiving power to charge the battery via at least one of: a port designated for wired connection and coupled to a switch mode power supply circuit; or a wireless power transceiver coupled to the switch mode power supply circuit.

Aspect 21: the method according to any one of aspects 14 to 20, wherein: the operation includes operating the switch mode power supply circuit in a reverse mode; and selectively routing includes closing the first switch and opening the second switch to route current from the charge pump circuit to the switch-mode power supply circuit through the first switch.

Aspect 22: the method according to any one of aspects 14 to 21, further comprising: the charge pump circuit is operated as a two-voltage charge pump from the second terminal to the first terminal of the charge pump circuit.

Aspect 23: the method according to any one of aspects 14 to 22e, the battery comprising a plurality of cells connected in series; and the battery is coupled to the second switch and to the second terminal of the charge pump circuit.

Aspect 24: the method according to aspect 14, wherein: the operation includes operating the switch mode power supply circuit in a reverse mode; selectively routing includes opening the first switch and closing the second switch to route current from the battery through the second switch to the switch-mode power supply circuit; the battery includes a plurality of cells connected in series; and the battery is coupled to the second switch and to the second terminal of the charge pump circuit.

Aspect 25: a battery charging circuit comprising at least a portion of the power supply circuit of any one of aspects 1 to 12.

The various operations of the above-described methods may be performed by any suitable component capable of performing the corresponding functions. The component may include various hardware and/or software component(s) and/or module(s) including, but not limited to, a circuit, an Application Specific Integrated Circuit (ASIC), or a processor. Generally, where there are operations illustrated in the figures, these operations may have corresponding parts plus functional components, which have similar numbering.

As used herein, the term "determining" encompasses a variety of actions. For example, "determining" may include computing, calculating, processing, deriving, investigating, looking up (e.g., looking up in a table, a database or another data structure), ascertaining and the like. Also, "determining" may include receiving (e.g., receiving information), accessing (e.g., accessing data in memory), and so forth. Also, "determining" may include parsing, selecting, choosing, establishing, and the like.

As used herein, a phrase referring to "at least one" in a list of items refers to any combination of these items, including individual members. As an example, "at least one of: a. b or c "is intended to cover a, b, c, a-b, a-c, b-c, and a-b-c as well as any combination of a plurality of identical elements (e.g., a-a-b, a-a-c, a-b-b, a-c-c, b-b-b, b-b-c, c-c, and c-c-c, or any other ordering of a, b, and c).

The methods disclosed herein comprise one or more steps or actions for achieving the described method. Method steps and/or actions may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and/or use of specific steps and/or actions may be modified without departing from the scope of the claims.

It is to be understood that the claims are not limited to the precise arrangements and instrumentalities shown above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. A power supply circuit, comprising:

a switch mode power supply circuit having an input node and an output node;

a charge pump circuit having a first terminal and a second terminal;

a first switch coupled between the output node of the switch mode power supply circuit and the first terminal of the charge pump circuit; and

a second switch is coupled between the output node of the switch-mode power supply circuit and the second terminal of the charge pump circuit.

2. The power supply circuit of claim 1, further comprising: a battery comprising a plurality of cells connected in series, wherein the second terminal of the charge pump circuit is coupled to the battery.

3. The power supply circuit of claim 2, wherein the first switch is configured to be closed and the second switch is configured to be open when an input voltage at the input node is less than a battery voltage of the battery.

4. The power supply circuit of claim 3, wherein the charge pump circuit is configured as a double voltage charge pump from the first terminal to the second terminal of the charge pump circuit when the input voltage at the input node is less than the battery voltage of the battery.

5. The power supply circuit of claim 2, wherein the first switch is configured to open and the second switch is configured to close when an input voltage at the input node is greater than a battery voltage of the battery.

6. The power supply circuit of claim 5, wherein when the input voltage at the input node is greater than the battery voltage of the battery, the charge pump circuit is configured as a two-voltage charge pump from the second terminal to the first terminal of the charge pump circuit.

7. The power supply circuit of claim 1, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode the first switch is configured to be closed and the second switch is configured to be open.

8. The power supply circuit of claim 1, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode the first switch is configured to be open and the second switch is configured to be closed.

9. The power supply circuit of claim 1, wherein the first switch and the second switch comprise n-type metal oxide semiconductor (NMOS) transistors.

10. The power supply circuit of claim 1, wherein the switch mode power supply circuit comprises:

a first transistor coupled to the input node;

a second transistor coupled to the first transistor via a first node;

a third transistor coupled to the second transistor via a second node;

a fourth transistor coupled to the third transistor via a third node;

a capacitive element having a first terminal and a second terminal, the first terminal coupled to the first node and the second terminal coupled to the third node; and

an inductive element having a first terminal and a second terminal, the first terminal coupled to the second node and the second terminal coupled to the output node of the switch-mode power supply circuit.

11. The power supply circuit of claim 10, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor comprise n-type metal oxide semiconductor (NMOS) transistors.

12. The power supply circuit of claim 1, further comprising: a parallel charger coupled between the input node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

13. A Power Management Integrated Circuit (PMIC) comprising at least a portion of the power supply circuit of claim 1.

14. A method of supplying power, comprising:

operating a switch mode power supply circuit; and

the method includes selectively routing current through a first switch coupled between a first node of the switch-mode power supply circuit and a first terminal of a charge pump circuit or through a second switch coupled between the first node of the switch-mode power supply circuit and a second terminal of the charge pump circuit.

15. The method of claim 14, further comprising: charging a battery, wherein the operating comprises operating the switch mode power supply circuit in a forward mode, wherein the battery comprises a plurality of cells connected in series, and wherein the battery is coupled to the second switch and the second terminal of the charge pump circuit.

16. The method of claim 15, wherein the selectively routing includes closing the first switch and opening the second switch when an input voltage at a second node of the switch-mode power supply circuit is less than a battery voltage of the battery.

17. The method of claim 16, further comprising: the charge pump circuit is operated as a double voltage charge pump from the first terminal to the second terminal of the charge pump circuit when the input voltage at the second node of the switch mode power supply circuit is less than the battery voltage of the battery.

18. The method of claim 15, wherein the selectively routing includes opening the first switch and closing the second switch when an input voltage at a second node of the switch-mode power supply circuit is greater than a battery voltage of the battery.

19. The method of claim 18, further comprising: the charge pump circuit is operated as a two-voltage charge pump from the second terminal to the first terminal of the charge pump circuit when the input voltage at the second node of the switch-mode power supply circuit is greater than the battery voltage of the battery.

20. The method of claim 15, further comprising: receiving power to charge the battery via at least one of:

a port designated for wired connection and coupled to the switch mode power supply circuit; or alternatively

A wireless power transceiver is coupled to the switch mode power supply circuit.

21. The method according to claim 14, wherein:

the operations include: operating the switch mode power supply circuit in a reverse mode; and is also provided with

The selectively routing includes: the first switch is closed and the second switch is opened to route the current from the charge pump circuit to the switch mode power supply circuit through the first switch.

22. The method of claim 21, further comprising: the charge pump circuit is operated as a two-voltage charge pump from the second terminal to the first terminal of the charge pump circuit.

23. The method of claim 21, further comprising: receiving power from a battery, wherein:

the battery includes a plurality of cells connected in series; and is also provided with

The battery is coupled to the second switch and the second terminal of the charge pump circuit.

24. The method according to claim 14, wherein:

the operations include: operating the switch mode power supply circuit in a reverse mode;

the selectively routing includes: opening the first switch and closing the second switch to route the current from the battery through the second switch to the switch-mode power supply circuit;