TW202241035A - Power converter and motor module - Google Patents

Power converter and motor module Download PDF

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Publication number
TW202241035A
TW202241035A TW111111500A TW111111500A TW202241035A TW 202241035 A TW202241035 A TW 202241035A TW 111111500 A TW111111500 A TW 111111500A TW 111111500 A TW111111500 A TW 111111500A TW 202241035 A TW202241035 A TW 202241035A
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Taiwan
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fixed period
phase
degrees
electrical angle
semiconductor switching
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TW111111500A
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Chinese (zh)
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佐藤恒司
福村友博
片岡耕太郎
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日商日本電產股份有限公司
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Publication of TW202241035A publication Critical patent/TW202241035A/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Ac-Ac Conversion (AREA)

Abstract

This power converter converts DC power into AC power of n phases. The power converter comprises: n-number of output terminals; a first power supply terminal; a second power supply terminal; and n-number of serial bodies. During one period of AC outputs of the n phases, at least one phase of the AC outputs has a protective operation mode having at least one of a first on-fixed period during which a first semiconductor switching element is set to ON in a fixed manner and a second on-fixed period during which a second semiconductor switching element set to ON in a fixed manner. In the protective operation mode, in at least one of the n phases, the first on-fixed period is different from that of one of the other phases, or the second on-fixed period is different from that of one of the other phases.

Description

電力轉換器及馬達模組Power Converter and Motor Module

本發明關於電力轉換器及馬達模組。The invention relates to a power converter and a motor module.

已知對三相的馬達進行驅動的馬達控制裝置(例如專利文獻1)。在專利文獻1所記載的馬達控制裝置中,通過將三相電壓的各相電壓固定為2π/3或π/3以抑制開關元件的溫度上升。A motor control device that drives a three-phase motor is known (for example, Patent Document 1). In the motor control device described in Patent Document 1, the temperature rise of the switching element is suppressed by fixing each phase voltage of the three-phase voltage to 2π/3 or π/3.

現有技術文獻 專利文獻1:日本專利特開2005-229714號公報。 prior art literature Patent Document 1: Japanese Patent Laid-Open No. 2005-229714.

發明所要解決的技術問題 然而,在專利文獻1所記載的馬達控制裝置中,只能均勻地抑制高側的開關元件的溫度上升、或者均勻地抑制低側的開關元件的溫度上升,或者均勻地抑制所有的開關元件的溫度上升。因此,無法保護特定相的特定的半導體開關元件。 本發明是鑒於上述技術問題而完成的,其目的在於提供一種電力轉換器及馬達模組,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器的升溫並提高可靠性。 The technical problem to be solved by the invention However, in the motor control device described in Patent Document 1, only the temperature rise of the switching elements on the high side can be suppressed uniformly, the temperature rise of the switching elements on the low side can be suppressed uniformly, or the temperature rise of all the switching elements can be suppressed uniformly. The temperature rises. Therefore, a specific semiconductor switching element of a specific phase cannot be protected. The present invention was made in view of the above-mentioned technical problems, and an object thereof is to provide a power converter and a motor module capable of suppressing the heat generation of a first semiconductor switching element of a certain phase and a second semiconductor switching element of a certain phase at the same time, thereby suppressing power consumption. heats up the converter and improves reliability.

解決技術問題所採用的技術方案 本發明的例示性的電力轉換器將直流電轉換為n相的交流電。所述電力轉換器包括n個輸出端子、第一電源端子、第二電源端子和n個串聯體。所述n個輸出端子輸出n相的輸出電壓和n相的輸出電流。在所述第一電源端子施加有第一電壓。在所述第二電源端子施加有比所述第一電壓低的第二電壓。所述n個串聯體串聯連接有兩個半導體開關元件。n是交流輸出的相數,其是3以上的奇數。所述n個串聯體相互並聯連接。所述n個串聯體各自的一端連接於所述第一電源端子。所述n個串聯體各自的另一端連接於所述第二電源端子。所述n個串聯體分別具有第一半導體開關元件和第二半導體開關元件。所述第一半導體開關元件連接於所述第一電源端子。所述第二半導體開關元件連接於所述第二電源端子。所述第一半導體開關元件和所述第二半導體開關元件在連接點處連接。所述n個串聯體各自的所述連接點連接於所述n個輸出端子。所述第一半導體開關元件以比所述交流輸出的頻率高的頻率在接通和斷開之間切換。所述第二半導體開關元件以比所述交流輸出的頻率高的頻率在接通和斷開之間切換。在n相的交流輸出的一個週期期間內,所述交流輸出中的至少一相具有保護動作模式,所述保護動作模式具有第一接通固定期間和第二接通固定期間中的至少一方,在所述第一接通固定期間內,所述第一半導體開關元件固定為接通,在所述第二接通固定期間內,所述第二半導體開關元件固定為接通。在所述保護動作模式下,在n相中的至少一相中,所述第一接通固定期間與其他任一相的所述第一接通固定期間不同,或者所述第二接通固定期間與其他任一相的所述第二接通固定期間不同。 本發明的例示性的馬達模組包括上述所記載的電力轉換器和馬達。在所述馬達輸入有所述電力轉換器的輸出。 Technical solutions adopted to solve technical problems An exemplary power converter of the present invention converts direct current to n-phase alternating current. The power converter includes n output terminals, a first power supply terminal, a second power supply terminal and n series bodies. The n output terminals output n-phase output voltages and n-phase output currents. A first voltage is applied to the first power supply terminal. A second voltage lower than the first voltage is applied to the second power supply terminal. The n series bodies are connected in series with two semiconductor switching elements. n is the number of phases of the AC output, which is an odd number of 3 or more. The n serial bodies are connected in parallel with each other. One end of each of the n series bodies is connected to the first power supply terminal. The other end of each of the n serial bodies is connected to the second power supply terminal. The n series bodies each have a first semiconductor switching element and a second semiconductor switching element. The first semiconductor switching element is connected to the first power supply terminal. The second semiconductor switching element is connected to the second power supply terminal. The first semiconductor switching element and the second semiconductor switching element are connected at a connection point. The respective connection points of the n serial bodies are connected to the n output terminals. The first semiconductor switching element is switched between on and off at a frequency higher than that of the AC output. The second semiconductor switching element is switched between on and off at a frequency higher than that of the AC output. During one period of the AC output of n phases, at least one phase of the AC output has a protection operation mode, and the protection operation mode has at least one of a first fixed period of on and a second fixed period of on, During the first fixed on period, the first semiconductor switching element is kept on, and during the second fixed period of on, the second semiconductor switching element is kept on. In the protection action mode, in at least one of the n phases, the first on-fixed period is different from the first on-fixed period of any other phase, or the second on-fixed period The period is different from the second on-fixed period of any other phase. An exemplary motor module of the present invention includes the power converter and the motor described above. The output of the power converter is input to the motor.

發明效果 根據例示性的本發明,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器的升溫並提高可靠性。 Invention effect According to the exemplary invention, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, it is possible to suppress the temperature rise of the power converter and improve reliability.

以下,參照附圖對本發明的實施方式進行說明。另外,對圖中相同或相當的部分標注相同的參考符號,不再重複說明。Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same reference symbols are assigned to the same or corresponding parts in the drawings, and the description thereof will not be repeated.

參照圖1及圖2對本發明實施方式的馬達模組200進行說明。圖1是本發明實施方式的馬達模組200的方塊圖。圖2是示出逆變器部110的電路圖。A motor module 200 according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2 . FIG. 1 is a block diagram of a motor module 200 according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing the inverter unit 110 .

如圖1所示,馬達模組200包括馬達驅動電路100及三相馬達M。三相馬達M由馬達驅動電路100驅動。三相馬達M例如是無刷直流馬達。三相馬達M具有U相、V相及W相。馬達驅動電路100的輸出被輸入至三相馬達M。另外,馬達驅動電路100相當於“電力轉換器”的一例。As shown in FIG. 1 , the motor module 200 includes a motor driving circuit 100 and a three-phase motor M. As shown in FIG. The three-phase motor M is driven by a motor drive circuit 100 . The three-phase motor M is, for example, a brushless DC motor. The three-phase motor M has a U-phase, a V-phase, and a W-phase. The output of the motor drive circuit 100 is input to the three-phase motor M. As shown in FIG. In addition, the motor drive circuit 100 corresponds to an example of a "power converter".

馬達驅動電路100對三相馬達M的驅動進行控制。馬達驅動電路100包括逆變器部110及信號生成部120。The motor drive circuit 100 controls the drive of the three-phase motor M. As shown in FIG. The motor drive circuit 100 includes an inverter unit 110 and a signal generation unit 120 .

馬達驅動電路100將直流電轉換為n相的交流電。n是交流輸出的相數,其是3以上的整數。在本實施方式中,馬達驅動電路100將直流電轉換為三相交流電。馬達驅動電路100包括n個輸出端子102。在本實施方式中,馬達驅動電路100包括三個輸出端子102。三個輸出端子102包括輸出端子102u、輸出端子102v及輸出端子102w。n個輸出端子102輸出n相的輸出電壓和n相的輸出電流。在本實施方式中,三個輸出端子102向三相馬達M輸出三相的輸出電壓和三相的輸出電流。詳細地,輸出端子102u向三相馬達M輸出U相的輸出電壓Vu和U相的輸出電流Iu。輸出端子102v向三相馬達M輸出V相的輸出電壓Vv和V相的輸出電流Iv。輸出端子102w向三相馬達M輸出W相的輸出電壓Vw和W相的輸出電流Iw。The motor drive circuit 100 converts DC power into n-phase AC power. n is the number of phases of the AC output, which is an integer of 3 or more. In this embodiment, the motor drive circuit 100 converts direct current into three-phase alternating current. The motor drive circuit 100 includes n output terminals 102 . In this embodiment, the motor drive circuit 100 includes three output terminals 102 . The three output terminals 102 include an output terminal 102u, an output terminal 102v, and an output terminal 102w. The n output terminals 102 output n-phase output voltages and n-phase output currents. In the present embodiment, the three output terminals 102 output three-phase output voltages and three-phase output currents to the three-phase motor M. FIG. In detail, the output terminal 102u outputs the U-phase output voltage Vu and the U-phase output current Iu to the three-phase motor M. The output terminal 102v outputs a V-phase output voltage Vv and a V-phase output current Iv to the three-phase motor M. The output terminal 102w outputs a W-phase output voltage Vw and a W-phase output current Iw to the three-phase motor M. FIG.

如圖2所示,馬達驅動電路100包括第一電源端子P、第二電源端子N、電容器C、n個串聯體112和六個溫度感測器20。在本實施方式中,馬達驅動電路100包括第一電源端子P、第二電源端子N、電容器C、三個串聯體112和六個溫度感測器20。更詳細地,在本實施方式中,馬達驅動電路100包括逆變器部110,逆變器部110包括第一電源端子P、第二電源端子N、電容器C、三個串聯體112和六個溫度感測器20。逆變器部110還包括直流電壓源B。另外,直流電壓源B也可以處於逆變器部110的外部。As shown in FIG. 2 , the motor driving circuit 100 includes a first power supply terminal P, a second power supply terminal N, a capacitor C, n series bodies 112 and six temperature sensors 20 . In this embodiment, the motor drive circuit 100 includes a first power supply terminal P, a second power supply terminal N, a capacitor C, three series bodies 112 and six temperature sensors 20 . In more detail, in this embodiment, the motor drive circuit 100 includes an inverter unit 110, and the inverter unit 110 includes a first power supply terminal P, a second power supply terminal N, a capacitor C, three series bodies 112 and six temperature sensor 20. The inverter unit 110 also includes a DC voltage source B. In addition, the DC voltage source B may be located outside the inverter unit 110 .

對第一電源端子P施加第一電壓V1。第一輸入端子P連接於直流電壓源B。The first voltage V1 is applied to the first power supply terminal P. The first input terminal P is connected to a DC voltage source B.

對第二電源端子N施加第二電壓V2。第二電源端子N連接於直流電壓源B。第二電壓V2比第一電壓V1低。The second voltage V2 is applied to the second power supply terminal N. The second power supply terminal N is connected to the DC voltage source B. The second voltage V2 is lower than the first voltage V1.

電容器C連接於第一電源端子P與第二電源端子N之間。The capacitor C is connected between the first power supply terminal P and the second power supply terminal N.

在三個串聯體112串聯連接有兩個半導體開關元件。半導體開關元件例如是IGBT(絕緣柵雙極型電晶體)。另外,半導體開關元件也可以是場效應電晶體等其它電晶體。三個串聯體112包括串聯體112u、串聯體112v及串聯體112w。三個串聯體112相互並聯連接。三個串聯體112各自的一端連接於第一電源端子P。三個串聯體112各自的另一端連接於第二電源端子N。在這些半導體開關元件,分別以第一電源端子P側(紙面上側)為陰極,以第二電源端子N側(紙面下側)為陽極,並聯連接有整流元件D。在將場效應晶體管用作半導體開關元件的情況下,也可以將寄生二極體用作上述整流元件。Two semiconductor switching elements are connected in series to the three series bodies 112 . The semiconductor switching element is, for example, an IGBT (Insulated Gate Bipolar Transistor). In addition, the semiconductor switching elements may also be other transistors such as field effect transistors. The three series bodies 112 include a series body 112u, a series body 112v and a series body 112w. The three serial bodies 112 are connected in parallel with each other. One end of each of the three series bodies 112 is connected to the first power supply terminal P. As shown in FIG. The other end of each of the three series bodies 112 is connected to the second power supply terminal N. As shown in FIG. To these semiconductor switching elements, a rectifying element D is connected in parallel with the first power terminal P side (upper side in the drawing) as a cathode and the second power supply terminal N side (lower side in the drawing) as an anode. In the case of using a field effect transistor as a semiconductor switching element, a parasitic diode may also be used as the above-mentioned rectifying element.

三個串聯體112各自具有第一半導體開關元件及第二半導體開關元件。詳細地,串聯體112u具有第一半導體開關元件Up及第二半導體開關元件Un。串聯體112v具有第一半導體開關元件Vp及第二半導體開關元件Vn。串聯體112w具有第一半導體開關元件Wp及第二半導體開關元件Wn。Each of the three series bodies 112 has a first semiconductor switching element and a second semiconductor switching element. In detail, the series body 112u has a first semiconductor switch element Up and a second semiconductor switch element Un. The series body 112v has a first semiconductor switching element Vp and a second semiconductor switching element Vn. The series body 112w has a first semiconductor switching element Wp and a second semiconductor switching element Wn.

第一半導體開關元件Up、第一半導體開關元件Vp及第一半導體開關元件Wp連接於第一電源端子P。換言之,第一半導體開關元件Up、第一半導體開關元件Vp及第一半導體開關元件Wp是高電壓側的半導體開關元件。The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are connected to the first power supply terminal P. As shown in FIG. In other words, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are semiconductor switching elements on the high voltage side.

第二半導體開關元件Un、第二半導體開關元件Vn及第二半導體開關元件Wn連接於第二電源端子N。換言之,第二半導體開關元件Un、第二半導體開關元件Vn及第二半導體開關元件Wn是低電壓側的半導體開關元件。The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are connected to the second power supply terminal N. In other words, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are semiconductor switching elements on the low voltage side.

第一半導體開關元件和第二半導體開關元件在連接點114處連接。詳細地,第一半導體開關元件Up和第二半導體開關元件Un在連接點114u處連接。第一半導體開關元件Vp和第二半導體開關元件Vn在連接點114v處連接。第一半導體開關元件Wp和第二半導體開關元件Wn在連接點114w處連接。The first semiconductor switching element and the second semiconductor switching element are connected at a connection point 114 . In detail, the first semiconductor switching element Up and the second semiconductor switching element Un are connected at the connection point 114u. The first semiconductor switching element Vp and the second semiconductor switching element Vn are connected at a connection point 114v. The first semiconductor switching element Wp and the second semiconductor switching element Wn are connected at a connection point 114w.

三個串聯體112各自的連接點114與三個輸出端子102連接。詳細地,串聯體112u的連接點114u連接於輸出端子102u。串聯體112v的連接點114v連接於輸出端子102v。串聯體112w的連接點114w連接於輸出端子102w。The respective connection points 114 of the three series bodies 112 are connected to the three output terminals 102 . In detail, the connection point 114u of the series body 112u is connected to the output terminal 102u. The connection point 114v of the series body 112v is connected to the output terminal 102v. The connection point 114w of the series body 112w is connected to the output terminal 102w.

對第一半導體開關元件Up、第一半導體開關元件Vp及第一半導體開關元件Wp輸入PWM信號。PWM信號由信號生成部120輸出。以下,在本說明書中,有時將輸入至第一半導體開關元件Up的PWM信號記載為“UpPWM信號”。而且,有時將輸入至第一半導體開關元件Vp的PWM信號記載為“VpPWM信號”。有時將輸入至第一半導體開關元件Wp的PWM信號記載為“WpPWM信號”。第一半導體開關元件Up、第一半導體開關元件Vp及第一半導體開關元件Wp以比交流輸出的頻率高的頻率在接通和斷開之間切換。例如,第一半導體開關元件Up、第一半導體開關元件Vp及第一半導體開關元件Wp分別在UpPWM信號、VpPWM信號、WpPWM信號為高(HIGH)電平的情況下變成接通。另一方面,第一半導體開關元件Up、第一半導體開關元件Vp及第一半導體開關元件Wp分別在UpPWM信號、VpPWM信號、WpPWM信號為低(LOW)電平的情況下變成斷開。A PWM signal is input to the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp. The PWM signal is output from the signal generator 120 . Hereinafter, in this specification, the PWM signal input to the first semiconductor switching element Up may be described as "UpPWM signal". In addition, the PWM signal input to the first semiconductor switching element Vp may be described as "VpPWM signal". The PWM signal input to the first semiconductor switching element Wp may be described as "WpPWM signal". The first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are switched between on and off at a frequency higher than that of the AC output. For example, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned on when the UpPWM signal, the VpPWM signal, and the WpPWM signal are at HIGH level, respectively. On the other hand, the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned off when the UpPWM signal, the VpPWM signal, and the WpPWM signal are at a low (LOW) level, respectively.

對第二半導體開關元件Un、第二半導體開關元件Vn及第二半導體開關元件Wn輸入PWM信號。PWM信號由信號生成部120輸出。以下,在本說明書中,有時將輸入至第二半導體開關元件Un的PWM信號記載為“UnPWM信號”。而且,有時將輸入至第二半導體開關元件Vn的PWM信號記載為“VnPWM信號”。有時將輸入至第二半導體開關元件Wn的PWM信號記載為“WnPWM信號”。第二半導體開關元件Un、第二半導體開關元件Vn及第二半導體開關元件Wn以比交流輸出的頻率高的頻率在接通和斷開之間切換。例如,第二半導體開關元件Un、第二半導體開關元件Vn及第二半導體開關元件Wn分別在UnPWM信號、VnPWM信號、WnPWM信號為高電平的情況下變成接通。另一方面,第二半導體開關元件Un、第二半導體開關元件Vn及第二半導體開關元件Wn分別在UnPWM信號、VnPWM信號、WnPWM信號為低電平的情況下變成斷開。A PWM signal is input to the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn. The PWM signal is output from the signal generator 120 . Hereinafter, in this specification, the PWM signal input to the 2nd semiconductor switching element Un may be described as "UnPWM signal". In addition, the PWM signal input to the second semiconductor switching element Vn may be described as "VnPWM signal". The PWM signal input to the second semiconductor switching element Wn is sometimes described as "WnPWM signal". The second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are switched between on and off at a frequency higher than that of the AC output. For example, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned on when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at a high level, respectively. On the other hand, the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned off when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at low level, respectively.

如圖1所示,信號生成部120具有載波生成部122、電壓指令值生成部124和比較部126。信號生成部120是由像CPU(Central Processing Unit:中央處理器)那樣的處理器及ASIC(Application Specific Integrated Circuit:專用積體電路)等構成的硬體電路。而且,信號生成部120的處理器通過執行存儲於存儲裝置的電腦程式,作為載波生成部122、電壓指令值生成部124及比較部126發揮作用。As shown in FIG. 1 , the signal generation unit 120 has a carrier generation unit 122 , a voltage command value generation unit 124 , and a comparison unit 126 . The signal generation unit 120 is a hardware circuit composed of a processor such as a CPU (Central Processing Unit: central processing unit), an ASIC (Application Specific Integrated Circuit: dedicated integrated circuit), and the like. Furthermore, the processor of the signal generation unit 120 functions as the carrier wave generation unit 122 , the voltage command value generation unit 124 , and the comparison unit 126 by executing the computer program stored in the storage device.

信號生成部120對逆變器部110進行控制。具體地,信號生成部120通過生成PWM信號並將PWM信號輸出,對逆變器部110進行控制。更具體地,信號生成部120生成分別輸入至三個串聯體112的PWM信號。The signal generation unit 120 controls the inverter unit 110 . Specifically, the signal generation unit 120 controls the inverter unit 110 by generating a PWM signal and outputting the PWM signal. More specifically, the signal generation unit 120 generates PWM signals to be input to the three serial bodies 112 respectively.

載波生成部122生成載波信號。載波信號例如是三角波。另外,載波信號也可以是鋸齒波。The carrier generation unit 122 generates a carrier signal. The carrier signal is, for example, a triangle wave. In addition, the carrier signal can also be a sawtooth wave.

電壓指令值生成部124生成電壓指令值。電壓指令值相當於從馬達驅動電路100輸出的電壓值。即電壓指令值生成部124生成與輸出電壓Vu、輸出電壓Vv及輸出電壓Vw相應的電壓值,作為電壓指令值。The voltage command value generator 124 generates a voltage command value. The voltage command value corresponds to the voltage value output from the motor drive circuit 100 . That is, the voltage command value generating unit 124 generates voltage values corresponding to the output voltage Vu, the output voltage Vv, and the output voltage Vw as voltage command values.

比較部126通過對載波信號和電壓指令值進行比較,以生成PWM信號。The comparing unit 126 generates a PWM signal by comparing the carrier signal and the voltage command value.

六個溫度感測器20包括溫度感測器21u、溫度感測器21v、溫度感測器21w、溫度感測器22u、溫度感測器22v和溫度感測器22w。六個溫度感測器20配置於半導體開關元件附近。六個溫度感測器20對半導體開關元件的溫度進行檢測。詳細地,溫度感測器21u配置於第一半導體開關元件Up附近。溫度感測器21u對第一半導體開關元件Up的溫度進行檢測。溫度感測器21v配置於第一半導體開關元件Vp附近。溫度感測器21v對第一半導體開關元件Vp的溫度進行檢測。溫度感測器21w配置於第一半導體開關元件Wp附近。溫度感測器21w對第一半導體開關元件Wp的溫度進行檢測。溫度感測器22u配置於第二半導體開關元件Un附近。溫度感測器22u對第二半導體開關元件Un的溫度進行檢測。溫度感測器22v配置於第二半導體開關元件Vn附近。溫度感測器22v對第二半導體開關元件Vn的溫度進行檢測。溫度感測器22w配置於第二半導體開關元件Wn附近。溫度感測器22w對第二半導體開關元件Wn的溫度進行檢測。The six temperature sensors 20 include a temperature sensor 21u, a temperature sensor 21v, a temperature sensor 21w, a temperature sensor 22u, a temperature sensor 22v, and a temperature sensor 22w. Six temperature sensors 20 are disposed near the semiconductor switching elements. Six temperature sensors 20 detect the temperature of the semiconductor switching elements. In detail, the temperature sensor 21u is disposed near the first semiconductor switching element Up. The temperature sensor 21u detects the temperature of the first semiconductor switching element Up. The temperature sensor 21v is disposed near the first semiconductor switching element Vp. The temperature sensor 21v detects the temperature of the first semiconductor switching element Vp. The temperature sensor 21w is disposed near the first semiconductor switching element Wp. The temperature sensor 21w detects the temperature of the first semiconductor switching element Wp. The temperature sensor 22u is disposed near the second semiconductor switching element Un. The temperature sensor 22u detects the temperature of the second semiconductor switching element Un. The temperature sensor 22v is disposed near the second semiconductor switching element Vn. The temperature sensor 22v detects the temperature of the second semiconductor switching element Vn. The temperature sensor 22w is disposed near the second semiconductor switching element Wn. The temperature sensor 22w detects the temperature of the second semiconductor switching element Wn.

接著,參照圖3A及圖3B對輸出電壓進行說明。圖3A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖3B是表示開關損失的圖。作為對三相全部進行開關動作的三相調製時的每個開關元件的開關損失設為1的情況下的相對值,示出了各元件的開關損失。圖3A表示本發明實施方式的輸出電壓Vu、輸出電壓Vv和輸出電壓Vw的波形例1。Next, the output voltage will be described with reference to FIGS. 3A and 3B . FIG. 3A is a graph showing an output voltage Vu, an output voltage Vv, and an output voltage Vw. FIG. 3B is a graph showing switching loss. The switching loss of each element is shown as a relative value when the switching loss per switching element is set to 1 in the case of three-phase modulation in which all three phases are switched. FIG. 3A shows waveform example 1 of output voltage Vu, output voltage Vv, and output voltage Vw according to the embodiment of the present invention.

在圖3A中,以實線表示輸出電壓Vu,以虛線表示輸出電壓Vv,以點劃線表示輸出電壓Vw。圖3A的縱軸表示用輸入電壓V1-V2標準化了的電壓值,各相的輸出電壓取0~1範圍內的值。輸出電壓0是輸出電壓與V2實質一致的狀態,輸出電壓1是輸出電壓與V1實質一致的狀態。而且,該值也表示各相的第一半導體開關元件的接通時間相對於PWM週期的比率即占空值。在對第二半導體開關元件進行開關動作的情況下,從1減去縱軸的值而得的是第二半導體開關元件的接通時間相對於PWM週期的比率。在對第一半導體開關元件和第二半導體開關元件雙方進行開關動作的情況下,在設置適當的死區時間以防止兩者同時接通的基礎上,互補地進行開關動作。圖3A的橫軸表示馬達的電氣旋轉角度,單位是度。In FIG. 3A , the output voltage Vu is indicated by a solid line, the output voltage Vv is indicated by a dotted line, and the output voltage Vw is indicated by a dotted line. The vertical axis of FIG. 3A represents the voltage value normalized by the input voltage V1-V2, and the output voltage of each phase takes the value within the range of 0-1. The output voltage 0 is a state where the output voltage substantially matches V2, and the output voltage 1 is a state where the output voltage substantially matches V1. Furthermore, this value also represents the ratio of the ON time of the first semiconductor switching element of each phase to the PWM period, that is, the duty value. When the switching operation of the second semiconductor switching element is performed, the ratio of the on-time of the second semiconductor switching element to the PWM cycle is obtained by subtracting the value on the vertical axis from 1. When switching both the first semiconductor switching element and the second semiconductor switching element, an appropriate dead time is provided to prevent both from being turned on at the same time, and the switching operation is performed complementary. The horizontal axis of FIG. 3A represents the electrical rotation angle of the motor, and the unit is degree.

參照圖3A對本發明實施方式的輸出電壓Vu、輸出電壓Vv和輸出電壓Vw的波形例1進行說明。Waveform example 1 of the output voltage Vu, the output voltage Vv, and the output voltage Vw according to the embodiment of the present invention will be described with reference to FIG. 3A .

如圖3A所示,波形例1呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例1呈如下波形,即在電角度為30度~電角度為150度內,任一相的輸出固定為1。此外,呈如下波形,即在電角度為0度~電角度為30度及電角度為150度~電角度為360度內,任一相的輸出固定為0。在本說明書中,有時將任一相的輸出固定為1的期間記載為“高側接通應用期間T3”。此外,在本說明書中,有時將任一相的輸出固定為0的期間記載為“低側接通應用期間T4”。在波形例1中,電角度為30度~電角度為150度是高側接通應用期間T3。此外,在波形例1中,電角度為0度~電角度為30度及電角度為150度~電角度為360度是低側接通應用期間T4。優選地,輸出電壓Vu、輸出電壓Vv和輸出電壓Vw的兩相的差分為正弦波。因此,能輸出正弦波以作為輸出端子間電壓。其結果是,例如在驅動馬達的情況下能實現雜訊和轉矩不均少的動作。例如,通過從各具有2π/n的相位差的正弦波中減去共同的偏置波形,能獲得各相的輸出電壓波形,從而能將上述各相的輸出電壓波形設為電壓指令值。As shown in Figure 3A, waveform example 1 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 1 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 30 degrees to 150 degrees. In addition, the waveform is such that the output of any one phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 30 degrees and an electrical angle of 150 degrees to an electrical angle of 360 degrees. In this specification, the period during which the output of any one phase is fixed to 1 may be described as "high-side ON application period T3". In addition, in this specification, the period in which the output of any one phase is fixed to 0 may be described as "low-side ON application period T4". In waveform example 1, the high side ON application period T3 is the electrical angle from 30 degrees to 150 degrees. In addition, in waveform example 1, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 30 degrees and the electrical angle of 150 degrees to the electrical angle of 360 degrees. Preferably, the two-phase difference between the output voltage Vu, the output voltage Vv and the output voltage Vw is a sine wave. Therefore, a sine wave can be output as a voltage between output terminals. As a result, for example, when driving a motor, an operation with less noise and less uneven torque can be realized. For example, by subtracting a common bias waveform from sine waves each having a phase difference of 2π/n, the output voltage waveform of each phase can be obtained, and the output voltage waveform of each phase can be set as a voltage command value.

如圖3A所示,在n相的交流輸出的一個週期的期間內,交流輸出中的至少一相具有第一接通固定期間T1和第二接通固定期間T2。第一接通固定期間T1是第一半導體開關元件固定為接通的期間。第二接通固定期間T2是第二半導體開關元件固定為接通的期間。As shown in FIG. 3A , during one cycle of the n-phase AC output, at least one phase of the AC output has a first on-fixed period T1 and a second on-fixed period T2 . The first on-fixed period T1 is a period in which the first semiconductor switching element is kept on. The second on-fixed period T2 is a period in which the second semiconductor switching element is kept on.

在波形例1中,第一接通固定期間T1包括第一接通固定期間T1u。第一接通固定期間T1u是第一半導體開關元件Up固定為接通的期間。在波形例1中,電角度為30度~電角度為150度是第一接通固定期間T1u。In waveform example 1, the first on-fixed period T1 includes the first on-fixed period T1u. The first on-fixed period T1u is a period in which the first semiconductor switching element Up is kept on. In waveform example 1, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees.

第一接通固定期間T1表示n相中的僅一相的第一半導體開關元件為接通固定,在n相中的其他相的全部中,第一半導體開關元件和第二半導體開關元件中的至少一方進行開關動作的期間。在波形例1中,在第一接通固定期間T1u中,三相中的僅U相的第一半導體開關元件Up為接通固定,三相中的V相的第一半導體開關元件Vp和第二半導體開關元件Vn中的至少一方和W相的第一半導體開關元件Wp和第二半導體開關元件Wn中的至少一方進行開關動作。The first on-fixed period T1 indicates that only the first semiconductor switching element of one of the n phases is on-fixed, and in all the other phases of the n phases, the first semiconductor switching element and the second semiconductor switching element The period during which at least one side performs switching operations. In waveform example 1, in the first on-fixed period T1u, only the first semiconductor switching element Up of the U-phase among the three phases is on-fixed, and the first semiconductor switching element Vp and the first semiconductor switching element of the V-phase among the three phases are constant. At least one of the two semiconductor switching elements Vn and at least one of the W-phase first semiconductor switching element Wp and the second semiconductor switching element Wn perform a switching operation.

在波形例1中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例1中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例1中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例1中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 1, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 1, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 1, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 1, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

第二接通固定期間T2表示n相中的僅一相的第二半導體開關元件為接通固定,在n相中的其他相的全部中,第一半導體開關元件和第二半導體開關元件中的至少一方進行開關動作的期間。在波形例1中,在第二接通固定期間T2u中,三相中的僅U相的第二半導體開關元件Un為接通固定,三相中的V相的第一半導體開關元件Vp和第二半導體開關元件Vn中的至少一方以及W相的第一半導體開關元件Wp和第二半導體開關元件Wn中的至少一方進行開關動作。在波形例1中,在第二接通固定期間T2v中,三相中的僅V相的第二半導體開關元件Vn為接通固定,三相中的U相的第一半導體開關元件Up和第二半導體開關元件Un中的至少一方以及W相的第一半導體開關元件Wp和第二半導體開關元件Wn中的至少一方進行開關動作。在波形例1中,在第二接通固定期間T2w中,三相中的僅W相的第二半導體開關元件Wn為接通固定,三相中的U相的第一半導體開關元件Up和第二半導體開關元件Un中的至少一方以及V相的第一半導體開關元件Vp和第二半導體開關元件Vn中的至少一方進行開關動作。The second on-fixed period T2 indicates that only the second semiconductor switching element of one of the n phases is on-fixed, and in all the other phases of the n phases, the first semiconductor switching element and the second semiconductor switching element The period during which at least one side performs switching operations. In waveform example 1, only the second semiconductor switching element Un of the U-phase among the three phases is on-fixed during the second on-fixed period T2u, and the first semiconductor switching element Vp and the first semiconductor switching element Vp of the V-phase among the three phases are constant. At least one of the two semiconductor switching elements Vn and at least one of the W-phase first semiconductor switching element Wp and the second semiconductor switching element Wn perform a switching operation. In waveform example 1, only the second semiconductor switching element Vn of the V-phase among the three phases is on-fixed during the second on-fixed period T2v, and the first semiconductor switching element Up and the first semiconductor switching element Up of the U-phase among the three phases are constant. At least one of the two semiconductor switching elements Un and at least one of the W-phase first semiconductor switching element Wp and the second semiconductor switching element Wn perform a switching operation. In waveform example 1, in the second on-fixed period T2w, only the second semiconductor switching element Wn of the W-phase among the three phases is on-fixed, and the first semiconductor switching element Up and the first semiconductor switching element of the U-phase of the three phases are up and At least one of the two semiconductor switching elements Un and at least one of the V-phase first semiconductor switching element Vp and the second semiconductor switching element Vn perform a switching operation.

交流輸出的一個週期分割為多個期間,多個期間分別是任一相的第一接通固定期間或任一相的第二接通固定期間。詳細地,在波形例1中,電角度為0度~電角度為30度是第二接通固定期間T2v。在波形例1中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例1中,電角度為150度~電角度為210度是第二接通固定期間T2w。在波形例1中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例1中,電角度為330度~電角度為360度是第二接通固定期間T2v。因此,由於使一相的開關動作始終停止,從而能實現高效的升溫抑制,逆變器的可靠性得到提高。One cycle of the AC output is divided into a plurality of periods, and the plurality of periods are respectively the first fixed-on period of any phase or the second fixed-on period of any phase. In detail, in the waveform example 1, the electrical angle of 0 degrees to the electrical angle of 30 degrees is the second on-fixed period T2v. In waveform example 1, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 1, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In waveform example 1, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 1, the electrical angle of 330° to 360° is the second on-fixed period T2v. Therefore, since the switching operation of one phase is always stopped, efficient temperature rise suppression can be realized, and the reliability of the inverter can be improved.

馬達驅動電路100具有保護動作模式。保護動作模式具有第一接通固定期間T1和第二接通固定期間T2中的至少一方。在保護動作模式下,在n相中的至少一相中,第一接通固定期間T1與其他任一相的第一接通固定期間T1不同,或者第二接通固定期間T2與其他任一相的第二接通固定期間T2不同。其他任一相不具有第一接通固定期間T1和第二接通固定期間T2的情況也包含於此。The motor drive circuit 100 has a protection operation mode. The protection operation mode has at least one of the first on-fixed period T1 and the second on-fixed period T2. In the protection action mode, in at least one of the n phases, the first on-fixed period T1 is different from that of any other phase, or the second on-fixed period T2 is different from that of any other phase. The second on-fixed periods T2 of the phases are different. The case where any other phase does not have the first on-fixed period T1 and the second on-fixed period T2 is also included here.

在波形例1中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例1中,第一接通固定期間T1u為120度,與此相對,沒有第一接通固定期間T1v及第一接通固定期間T1w。即,在波形例1中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖3B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 1, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 1, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are absent. That is, in waveform example 1, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 3B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例1中,在三相中的U相中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例1中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為60度。即,在波形例1中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖3B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 1, in the U phase of the three phases, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 1, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 60 degrees. That is, in waveform example 1, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 3B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖1~圖3B說明的那樣,在波形例1中,在保護動作模式下,在n相中的至少一相中,第一接通固定期間T1與其他相的第一接通固定期間T1不同。因此,能抑制具有比其他相的第一接通固定期間T1長的第一接通固定期間的相的第一半導體開關元件的發熱。此外,在n相中的至少一相中,第二接通固定期間T2與其他相的第二接通固定期間T2不同。因此,能抑制具有比其他相的第二接通固定期間T2長的第二接通固定期間的相的第二半導體開關元件的發熱。此外,尤其在波形例1中,在至少一相中,第一接通固定期間T1與其他相的第一接通固定期間T1不同,且在至少一相中,第二接通固定期間T2與其他相的第二接通固定期間T2不同。因此,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。例如,某相的第一半導體開關元件和某相的第二半導體開關元件因附近存在發熱部件或者配置於散熱效率差的位置等原因容易因開關動作引起溫度上升的情況下,通過利用波形例1的手法抑制上述兩個元件的開關發熱,能防止上述兩個元件過度地溫度上升,從而能提高電力轉換器(逆變器)的可靠性。在波形例1中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 1 to 3B , in waveform example 1, in the protection operation mode, in at least one phase of the n phases, the first on-fixed period T1 is equal to the first on-off period of the other phases. The fixed period T1 is different. Therefore, heat generation of the first semiconductor switching element of the phase having the first fixed on period longer than the first fixed on period T1 of the other phase can be suppressed. Also, in at least one of the n phases, the second on-fixed period T2 is different from the second on-fixed period T2 of the other phases. Therefore, heat generation of the second semiconductor switching element of the phase having the second fixed on period longer than the second fixed on period T2 of the other phase can be suppressed. In addition, especially in waveform example 1, in at least one phase, the first on-fixed period T1 is different from the first on-fixed period T1 of other phases, and in at least one phase, the second on-fixed period T2 is different from that of other phases. The second on-fixed period T2 of the other phases is different. Therefore, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, it is possible to suppress the temperature rise of the power converter (inverter) and improve reliability. For example, when the temperature of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase are likely to rise due to switching operations due to the presence of heat-generating parts nearby or the location with poor heat dissipation efficiency, etc., by using waveform example 1 The method of suppressing the switching heat generation of the above two elements can prevent the above two elements from excessive temperature rise, thereby improving the reliability of the power converter (inverter). In waveform example 1, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例1中,如圖3B所示,通過設置V相的第二接通固定期間T2v和W相的第二接通固定期間T2w,也能同時抑制V相的第二半導體開關元件Vn和W相的第二半導體開關元件Wn的發熱。因此,在處於U相的溫度最容易上升,接著其他相的第二半導體開關元件的溫度容易上升的環境的情況下,防止這些元件的過熱並提高可靠性。In addition, in waveform example 1, as shown in FIG. 3B , by setting the second on-fixed period T2v of the V-phase and the second on-fixed period T2w of the W-phase, the second semiconductor switching element of the V-phase can also be suppressed at the same time. Vn and heat generation of the second semiconductor switching element Wn of the W phase. Therefore, in an environment where the temperature of the U-phase is most likely to rise, and then the temperature of the second semiconductor switching elements of other phases is likely to rise, overheating of these elements is prevented and reliability is improved.

此外,任一相的第一接通固定期間比其他相的第一接通固定期間長,且任一相的第二接通固定期間比其他相的第二接通固定期間長。因此,在因冷卻水路的問題等使特定相的溫度變成問題的情況下,能抑制該相的發熱,從而逆變器的可靠性得到提高。或者,在發生急停(stall)且電流連續地流過某相的第一半導體開關元件和另一相的第二半導體開關元件而使溫度上升的情況下,通過在退出急停並開始動作時進行上述動作,能抑制急停下溫度上升後的半導體開關元件的發熱,從而能使溫度迅速地下降,因此,逆變器的可靠性得到提高。Also, the first on-fixed period of any phase is longer than the first on-fixed period of the other phases, and the second on-fixed period of any phase is longer than the second on-fixed period of the other phases. Therefore, when the temperature of a specific phase becomes a problem due to a problem of the cooling water channel or the like, heat generation of the phase can be suppressed, thereby improving the reliability of the inverter. Alternatively, when a sudden stop (stall) occurs and the current continuously flows through the first semiconductor switching element of a certain phase and the second semiconductor switching element of another phase to increase the temperature, by exiting the sudden stop and starting the operation By performing the above operation, the heat generation of the semiconductor switching element after the sudden stop temperature rise can be suppressed, and the temperature can be rapidly lowered, thereby improving the reliability of the inverter.

參照圖4~圖15B對本發明實施方式的波形例作進一步說明。圖4是表示波形例與開關損失的關係的表。在圖4中,UH表示U相的第一半導體開關元件Up的開關損失。UL表示U相的第二半導體開關元件Un的開關損失。VH表示V相的第一半導體開關元件Vp的開關損失。VL表示V相的第二半導體開關元件Vn的開關損失。WH表示W相的第一半導體開關元件Wp的開關損失。WL表示W相的第二半導體開關元件Wn的開關損失。The waveform examples of the embodiment of the present invention will be further described with reference to FIGS. 4 to 15B . FIG. 4 is a table showing the relationship between waveform examples and switching loss. In FIG. 4 , UH represents the switching loss of the U-phase first semiconductor switching element Up. UL represents the switching loss of the U-phase second semiconductor switching element Un. VH represents the switching loss of the V-phase first semiconductor switching element Vp. VL represents the switching loss of the V-phase second semiconductor switching element Vn. WH represents the switching loss of the first semiconductor switching element Wp of the W phase. WL represents the switching loss of the W-phase second semiconductor switching element Wn.

如圖4所示,在波形例1~波形例12中,UH為0.13,UL為0.13,即在波形例1~波形例12中是U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的開關損失少的波形例。也就是說,波形例1~波形例12是能保護U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的波形例。在本說明書中,有時將能保護某相(例如U相)的第一半導體開關元件(例如Up)以及同一相的第二半導體開關元件(例如Un)的波形記載為UH_UL保護波形。As shown in Figure 4, in waveform examples 1 to 12, UH is 0.13, and UL is 0.13, that is, in waveform examples 1 to 12, the first semiconductor switching element Up of the U phase and the second semiconductor switching element of the U phase An example of a waveform with a small switching loss of the semiconductor switching element Un. That is, waveform examples 1 to 12 are examples of waveforms capable of protecting the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un. In this specification, a waveform capable of protecting a first semiconductor switching element (eg Up) of a certain phase (eg U phase) and a second semiconductor switching element (eg Un) of the same phase may be described as a UH_UL protection waveform.

參照圖5A及圖5B對波形例2進行說明。圖5A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖5B是表示開關損失的圖。Waveform example 2 will be described with reference to FIGS. 5A and 5B . FIG. 5A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 5B is a graph showing switching loss.

如圖5A所示,波形例2呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例2呈如下波形,即在電角度為0度~電角度為180度內,任一相的輸出固定為1。此外,波形例2呈如下波形,即在電角度為180度~電角度為360度內,任一相的輸出固定為0。在波形例2中,電角度為0度~電角度為180度是高側接通應用期間T3。此外,在波形例2中,電角度為180度~電角度為360度是低側接通應用期間T4。As shown in Figure 5A, waveform example 2 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 2 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 0 degrees to an electrical angle of 180 degrees. In addition, the waveform example 2 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 180 degrees to an electrical angle of 360 degrees. In waveform example 2, the high-side ON application period T3 is the electrical angle from 0° to 180°. In addition, in waveform example 2, the low-side ON application period T4 is from an electrical angle of 180 degrees to an electrical angle of 360 degrees.

在波形例2中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例2中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例2中,電角度為150度~電角度為180度是第一接通固定期間T1v。在波形例2中,電角度為0度~電角度為30度是第一接通固定期間T1w。In waveform example 2, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 2, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 2, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 180 degrees. In waveform example 2, the electrical angle of 0° to 30° is the first on-fixed period T1w.

在波形例2中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例2中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例2中,電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例2中,電角度為180度~電角度為210度是第二接通固定期間T2w。In waveform example 2, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 2, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In the waveform example 2, the second on-fixed period T2v is from an electrical angle of 330 degrees to an electrical angle of 360 degrees. In waveform example 2, the second on-fixed period T2w is from an electrical angle of 180 degrees to an electrical angle of 210 degrees.

在波形例2中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例2中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為30度。即,在波形例2中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖5B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 2, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 2, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 30 degrees. That is, in waveform example 2, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 5B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例2中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例2中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為30度。即,在波形例2中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖5B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 2, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 2, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 30 degrees. That is, in waveform example 2, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 5B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖5A及圖5B說明的那樣,在波形例2中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例2中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 5A and 5B , in waveform example 2, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 2, heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例2中,如圖5B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。另外,波形例2能由發熱的抑制效果更高的後述的波形例9(圖12)代替。Furthermore, in waveform example 2, as shown in FIG. 5B , the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn. In addition, waveform example 2 can be replaced by waveform example 9 ( FIG. 12 ), which will be described later, which has a higher effect of suppressing heat generation.

參照圖6A及圖6B對波形例3進行說明。圖6A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖6B是表示開關損失的圖。Waveform example 3 will be described with reference to FIGS. 6A and 6B . FIG. 6A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 6B is a graph showing switching loss.

如圖6A所示,波形例3呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例3呈如下波形,即在電角度為0度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例3呈如下波形,即在電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例3中,電角度為0度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例3中,電角度為210度~電角度為330度是低側接通應用期間T4。As shown in Figure 6A, waveform example 3 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 3 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 0° to an electrical angle of 210° and an electrical angle of 330° to 360°. In addition, the waveform example 3 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 3, the high side ON application period T3 is the electrical angle from 0° to 210° and the electrical angle from 330° to 360°. In addition, in waveform example 3, the low-side ON application period T4 is from an electrical angle of 210 degrees to an electrical angle of 330 degrees.

在波形例3中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例3中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例3中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例3中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 3, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 3, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 3, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In the waveform example 3, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the first ON fixed period T1w.

在波形例3中,第二接通固定期間T2包括第二接通固定期間T2u。在波形例3中,電角度為210度~電角度為330度是第二接通固定期間T2u。In waveform example 3, the second on-fixed period T2 includes a second on-fixed period T2u. In waveform example 3, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees.

在波形例3中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例3中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為60度。即,在波形例3中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖6B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In the waveform example 3, in the U phase among the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 3, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 60 degrees. That is, in waveform example 3, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 6B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例3中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例3中,第二接通固定期間T2u為120度,與此相對,沒有第二接通固定期間T2v及第二接通固定期間T2w。即,在波形例3中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖6B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 3, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 3, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are absent. That is, in waveform example 3, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 6B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖6A及圖6B說明的那樣,在波形例3中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例3中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 6A and 6B , in waveform example 3, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 3, heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例3中,如圖6B所示,還能同時抑制V相的第一半導體開關元件Vp和W相的第一半導體開關元件Wp的發熱。In addition, in waveform example 3, as shown in FIG. 6B , heat generation of the V-phase first semiconductor switching element Vp and the W-phase first semiconductor switching element Wp can be simultaneously suppressed.

參照圖7A及圖7B對波形例4進行說明。圖7A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖7B是表示開關損失的圖。Waveform example 4 will be described with reference to FIGS. 7A and 7B . FIG. 7A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 7B is a graph showing switching loss.

如圖7A所示,波形例4呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例4呈如下波形,即在電角度為30度~電角度為180度內,任一相的輸出固定為1。此外,波形例4呈如下波形,即在電角度為0度~電角度為30度及電角度為180度~電角度為360度內,任一相的輸出固定為0。在波形例4中,電角度為30度~電角度為180度是高側接通應用期間T3。此外,在波形例4中,電角度為0度~電角度為30度及電角度為180度~電角度為360度是低側接通應用期間T4。As shown in Figure 7A, waveform example 4 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 4 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 30 degrees to 180 degrees. In addition, waveform example 4 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 30 degrees and an electrical angle of 180 degrees to an electrical angle of 360 degrees. In the waveform example 4, the high-side ON application period T3 is from an electrical angle of 30 degrees to an electrical angle of 180 degrees. In addition, in waveform example 4, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 30 degrees and the electrical angle of 180 degrees to the electrical angle of 360 degrees.

在波形例4中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例4中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例4中,電角度為150度~電角度為180度是第一接通固定期間T1v。In waveform example 4, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 4, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In the waveform example 4, the electrical angle of 150° to 180° is the first on-fixed period T1v.

在波形例4中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例4中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例4中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例4中,電角度為180度~電角度為210度是第二接通固定期間T2w。In waveform example 4, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 4, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 4, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 4, the second on-fixed period T2w is from an electrical angle of 180 degrees to an electrical angle of 210 degrees.

在波形例4中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例4中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v為30度,沒有第一接通固定期間T1w。即,在波形例4中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖7B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 4, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 4, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v is 30 degrees, and there is no first on-fixed period T1w. That is, in waveform example 4, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 7B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例4中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例4中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為60度,第二接通固定期間T2w為30度。即,在波形例4中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖7B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 4, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 4, the second on-fixed period T2u is 120 degrees, while the second on-fixed period T2v is 60 degrees, and the second on-fixed period T2w is 30 degrees. That is, in waveform example 4, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 7B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖7A及圖7B說明的那樣,在波形例4中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例4中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 7A and 7B , in waveform example 4, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 4, heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例4中,如圖7B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第二半導體開關元件Wn的發熱。另外,波形例4能由發熱的抑制效果更高的後述的波形例6(圖9)代替。In addition, in waveform example 4, as shown in FIG. 7B , heat generation of the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed. In addition, waveform example 4 can be replaced by waveform example 6 ( FIG. 9 ), which will be described later, which has a higher effect of suppressing heat generation.

參照圖8A及圖8B對波形例5進行說明。圖8A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖8B是表示開關損失的圖。Waveform Example 5 will be described with reference to FIGS. 8A and 8B . FIG. 8A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 8B is a graph showing switching loss.

如圖8A所示,波形例5呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例5呈如下波形,即在電角度為30度~電角度為210度內,任一相的輸出固定為1。此外,波形例5呈如下波形,即在電角度為0度~電角度為30度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例5中,電角度為30度~電角度為210度是高側接通應用期間T3。此外,在波形例5中,電角度為0度~電角度為30度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in Figure 8A, waveform example 5 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 5 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 30 degrees to 210 degrees. In addition, waveform example 5 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0° to an electrical angle of 30° and an electrical angle of 210° to 360°. In waveform example 5, the high-side ON application period T3 is from an electrical angle of 30 degrees to an electrical angle of 210 degrees. In addition, in the waveform example 5, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 30 degrees and the electrical angle of 210 degrees to the electrical angle of 360 degrees.

在波形例5中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例5中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例5中,電角度為150度~電角度為210度是第一接通固定期間T1v。In waveform example 5, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 5, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 5, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例5中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例5中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例5中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 5, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 5, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In the waveform example 5, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例5中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例5中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v為60度,沒有第一接通固定期間T1w。即,在波形例5中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖8B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 5, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in the waveform example 5, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v is 60 degrees and there is no first on-fixed period T1w. That is, in waveform example 5, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 8B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例5中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例5中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為60度,沒有第二接通固定期間T2w。即,在波形例5中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖8B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 5, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 5, the second fixed ON period T2u is 120 degrees, whereas the second fixed ON period T2v is 60 degrees, and there is no second fixed ON period T2w. That is, in waveform example 5, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 8B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖8A及圖8B說明的那樣,在波形例5中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例5中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 8A and 8B , in waveform example 5, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 5, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例5中,如圖8B所示,還能同時抑制V相的第一半導體開關元件Vp和V相的第二半導體開關元件Vn的發熱。In addition, in waveform example 5, as shown in FIG. 8B , heat generation of the V-phase first semiconductor switching element Vp and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

參照圖9A及圖9B對波形例6進行說明。圖9A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖9B是表示開關損失的圖。Waveform Example 6 will be described with reference to FIGS. 9A and 9B . FIG. 9A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 9B is a graph showing switching loss.

如圖9A所示,波形例6呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例6呈如下波形,即在電角度為30度~電角度為150度及電角度為180度~電角度為210度內,任一相的輸出固定為1。此外,波形例6呈如下波形,即在電角度為0度~電角度為30度、電角度為150度~電角度為180度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例6中,電角度為30度~電角度為150度及電角度為180度~電角度為210度是高側接通應用期間T3。此外,在波形例6中,電角度為0度~電角度為30度、電角度為150度~電角度為180度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in Figure 9A, waveform example 6 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 6 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 30 degrees to 150 degrees and an electrical angle of 180 degrees to 210 degrees. In addition, Waveform Example 6 is a waveform in which any The phase output is fixed at 0. In waveform example 6, the high-side ON application period T3 is an electrical angle of 30 degrees to an electrical angle of 150 degrees and an electrical angle of 180 degrees to an electrical angle of 210 degrees. In addition, in waveform example 6, the electrical angle of 0° to 30°, the electrical angle of 150° to 180°, and the electrical angle of 210° to 360° are low-side ON application periods. T4.

在波形例6中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例6中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例6中,電角度為180度~電角度為210度是第一接通固定期間T1v。In waveform example 6, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 6, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 6, the first on-fixed period T1v is from an electrical angle of 180 degrees to an electrical angle of 210 degrees.

在波形例6中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例6中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例6中,電角度為330度~電角度為360度及電角度為0度~電角度為30度是第二接通固定期間T2v。在波形例6中,電角度為150度~電角度為180度是第二接通固定期間T2w。In waveform example 6, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 6, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 6, the second on-fixed period T2v is the electrical angle of 330 degrees to the electrical angle of 360 degrees and the electrical angle of 0 degrees to the electrical angle of 30 degrees. In waveform example 6, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 180 degrees.

在波形例6中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例6中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v為30度,沒有第一接通固定期間T1w。即,在波形例6中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖9B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 6, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 6, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v is 30 degrees, and there is no first on-fixed period T1w. That is, in waveform example 6, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 9B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例6中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例6中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為60度,第二接通固定期間T2w為30度。即,在波形例6中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖9B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 6, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 6, the second fixed ON period T2u is 120 degrees, whereas the second fixed ON period T2v is 60 degrees, and the second fixed ON period T2w is 30 degrees. That is, in waveform example 6, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 9B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖9A及圖9B說明的那樣,在波形例6中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例6中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 9A and 9B , in waveform example 6, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 6, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例6中,如圖9B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 6, as shown in FIG. 9B , heat generation of the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖10A及圖10B對波形例7進行說明。圖10A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖10B是表示開關損失的圖。Waveform example 7 will be described with reference to FIGS. 10A and 10B . FIG. 10A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 10B is a graph showing switching loss.

如圖10A所示,波形例7呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例7呈如下波形,即在電角度為0度~電角度為150度及電角度為180度~電角度為210度內,任一相的輸出固定為1。此外,波形例7呈如下波形,即在電角度為150度~電角度為180度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例7中,電角度為0度~電角度為150度及電角度為180度~電角度為210度是高側接通應用期間T3。此外,在波形例7中,電角度為150度~電角度為180度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in Figure 10A, waveform example 7 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 7 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 0° to an electrical angle of 150° and an electrical angle of 180° to 210°. In addition, waveform example 7 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 150° to 180° and an electrical angle of 210° to 360°. In waveform example 7, the high-side ON application period T3 is the electrical angle of 0 degrees to the electrical angle of 150 degrees and the electrical angle of 180 degrees to the electrical angle of 210 degrees. In addition, in the waveform example 7, the low-side ON application period T4 is the electrical angle of 150 degrees to the electrical angle of 180 degrees and the electrical angle of 210 degrees to the electrical angle of 360 degrees.

在波形例7中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例7中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例7中,電角度為180度~電角度為210度是第一接通固定期間T1v。在波形例7中,電角度為0度~電角度為30度是第一接通固定期間T1w。In waveform example 7, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 7, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In the waveform example 7, the first on-fixed period T1v is from an electrical angle of 180 degrees to an electrical angle of 210 degrees. In waveform example 7, the electrical angle of 0° to 30° is the first on-fixed period T1w.

在波形例7中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例7中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例7中,電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例7中,電角度為150度~電角度為180度是第二接通固定期間T2w。In waveform example 7, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 7, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In the waveform example 7, the second on-fixed period T2v is from an electrical angle of 330 degrees to an electrical angle of 360 degrees. In waveform example 7, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 180 degrees.

在波形例7中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例7中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為30度。即,在波形例7中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖10B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 7, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 7, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 30 degrees. That is, in waveform example 7, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 10B , the switching loss of the U-phase first semiconductor switching element Up (H (high side)) is smaller than that of the V-phase and W-phase.

在波形例7中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例7中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為30度。即,在波形例7中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖10B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 7, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 7, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 30 degrees. That is, in waveform example 7, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 10B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖10A及圖10B說明的那樣,在波形例7中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例7中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 10A and 10B , in waveform example 7, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 7, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例7中,如圖10B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。另外,波形例7能由發熱的抑制效果更高的後述的波形例9(圖12)代替。In addition, in waveform example 7, as shown in FIG. 10B , the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn. In addition, waveform example 7 can be replaced by waveform example 9 ( FIG. 12 ), which will be described later, which has a higher effect of suppressing heat generation.

參照圖11A及圖11B對波形例8進行說明。圖11A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖11B是表示開關損失的圖。Waveform example 8 will be described with reference to FIGS. 11A and 11B . FIG. 11A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 11B is a graph showing switching loss.

如圖11A所示,波形例8呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例8呈如下波形,即在電角度為0度~電角度為150度、電角度為180度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例8呈如下波形,即在電角度為150度~電角度為180度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例8中,電角度為0度~電角度為150度、電角度為180度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例8中,電角度為150度~電角度為180度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in Figure 11A, waveform example 8 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 8 has the following waveforms, that is, within the electrical angle of 0 degrees to 150 degrees, the electrical angle of 180 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees, any The output of one phase is fixed at 1. In addition, waveform example 8 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 150° to 180° and an electrical angle of 210° to 330°. In waveform example 8, the high-side ON application period T3 is the electrical angle of 0° to 150°, the electrical angle of 180° to 210°, and the electrical angle of 330° to 360°. In addition, in the waveform example 8, the low-side ON application period T4 is the electrical angle of 150 degrees to the electrical angle of 180 degrees and the electrical angle of 210 degrees to the electrical angle of 330 degrees.

在波形例8中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例8中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例8中,電角度為180度~電角度為210度是第一接通固定期間T1v。在波形例8中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 8, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 8, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In the waveform example 8, the first on-fixed period T1v is from an electrical angle of 180 degrees to an electrical angle of 210 degrees. In the waveform example 8, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the first on-fixed periods T1w.

在波形例8中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2w。在波形例8中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例8中,電角度為150度~電角度為180度是第二接通固定期間T2w。In waveform example 8, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2w. In waveform example 8, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In the waveform example 8, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 180 degrees.

在波形例8中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例8中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v為30度,第一接通固定期間T1w為60度。即,在波形例8中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖11B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 8, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 8, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v is 30 degrees, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 8, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 11B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例8中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例8中,第二接通固定期間T2u為120度,與此相對,沒有第二接通固定期間T2v,第二接通固定期間T2w為30度。即,在波形例8中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖11B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 8, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. In detail, in the waveform example 8, the second on-fixed period T2u is 120 degrees, but there is no second on-fixed period T2v, and the second on-fixed period T2w is 30 degrees. That is, in waveform example 8, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 11B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖11A及圖11B說明的那樣,在波形例8中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例8中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 11A and 11B , in waveform example 8, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 8, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例8中,如圖11B所示,還能同時抑制V相的第一半導體開關元件Vp、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 8, as shown in FIG. 11B , heat generation of the V-phase first semiconductor switching element Vp, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖12A及圖12B對波形例9進行說明。圖12A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖12B是表示開關損失的圖。Waveform Example 9 will be described with reference to FIGS. 12A and 12B . FIG. 12A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 12B is a graph showing switching loss.

如圖12A所示,波形例9呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例9呈如下波形,即在電角度為30度~電角度為150度、電角度為180度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例9呈如下波形,即在電角度為0度~電角度為30度、電角度為150度~電角度為180度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例9中,電角度為30度~電角度為150度、電角度為180度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例9中,電角度為0度~電角度為30度、電角度為150度~電角度為180度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in Figure 12A, waveform example 9 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, the waveform example 9 has the following waveforms, that is, any electrical angle within the electrical angle of 30 degrees to 150 degrees, the electrical angle of 180 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees. The output of one phase is fixed at 1. In addition, Waveform Example 9 shows a waveform in which any The phase output is fixed at 0. In waveform example 9, the high-side ON application period T3 is the electrical angle of 30 degrees to 150 degrees, the electrical angle of 180 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees. In addition, in waveform example 9, the electrical angle of 0° to 30°, the electrical angle of 150° to 180°, and the electrical angle of 210° to 330° are low-side ON application periods. T4.

在波形例9中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例9中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例9中,電角度為180度~電角度為210度是第一接通固定期間T1v。在波形例9中,電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 9, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 9, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In the waveform example 9, the electrical angle of 180° to 210° is the first on-fixed period T1v. In the waveform example 9, the first on-fixed period T1w is from an electrical angle of 330 degrees to an electrical angle of 360 degrees.

在波形例9中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例9中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例9中,電角度為0度~電角度為30度是第二接通固定期間T2v。在波形例9中,電角度為150度~電角度為180度是第二接通固定期間T2w。In waveform example 9, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 9, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 9, the electrical angle of 0° to 30° is the second on-fixed period T2v. In the waveform example 9, the electrical angle of 150° to 180° is the second on-fixed period T2w.

在波形例9中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例9中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為30度。即,在波形例9中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖12B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 9, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 9, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 30 degrees. That is, in waveform example 9, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 12B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例9中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例9中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為30度。即,在波形例9中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖12B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 9, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. In detail, in waveform example 9, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 30 degrees. That is, in waveform example 9, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 12B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖12A及圖12B說明的那樣,在波形例9中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例9中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 12A and 12B , in waveform example 9, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 9, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例9中,如圖12B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 9, as shown in FIG. 12B , the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖13A及圖13B對波形例10進行說明。圖13A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖3B是表示開關損失的圖。Waveform example 10 will be described with reference to FIGS. 13A and 13B . FIG. 13A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 3B is a graph showing switching loss.

如圖13A所示,波形例10呈如下波形,根據電角度即某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例10呈如下波形,即在電角度為0度~電角度為150度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例10呈如下波形,即在電角度為150度~電角度為330度內,任一相的輸出固定為0。在波形例10中,電角度為0度~電角度為150度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例10中,在電角度為150度~電角度為330度是低側接通應用期間T4。As shown in FIG. 13A , waveform example 10 is the following waveform. According to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0. In detail, waveform example 10 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 0° to an electrical angle of 150° and an electrical angle of 330° to 360°. In addition, waveform example 10 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 150 degrees to an electrical angle of 330 degrees. In waveform example 10, the high-side ON application period T3 is the electrical angle of 0 degrees to the electrical angle of 150 degrees and the electrical angle of 330 degrees to the electrical angle of 360 degrees. In addition, in waveform example 10, the low-side ON application period T4 is between an electrical angle of 150 degrees and an electrical angle of 330 degrees.

在波形例10中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1w。在波形例10中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例10中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 10, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1w. In waveform example 10, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 10, an electrical angle of 0 degrees to an electrical angle of 30 degrees and an electrical angle of 330 degrees to an electrical angle of 360 degrees are the first on-fixed period T1w.

在波形例10中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2w。在波形例10中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例10中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 10, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2w. In waveform example 10, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 10, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例10中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例10中,第一接通固定期間T1u為120度,與此相對,沒有第一接通固定期間T1v,第一接通固定期間T1w為60度。即,在波形例10中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖13B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 10, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 10, the first on-fixed period T1u is 120 degrees, but there is no first on-fixed period T1v, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 10, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 13B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例10中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例10中,第二接通固定期間T2u為120度,與此相對,沒有第二接通固定期間T2v,第二接通固定期間T2w為60度。即,在波形例10中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖13B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 10, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. In detail, in the waveform example 10, the second on-fixed period T2u is 120 degrees, but there is no second on-fixed period T2v, and the second on-fixed period T2w is 60 degrees. That is, in waveform example 10, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 13B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖13A及圖13B說明的那樣,在波形例10中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例10中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 13A and 13B , in waveform example 10, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 10, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be suppressed at the same time.

此外,在波形例10中,如圖13B所示,能同時抑制W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 10, as shown in FIG. 13B , heat generation of the W-phase first semiconductor switching element Wp and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖14A及圖14B對波形例11進行說明。圖14A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖14B是表示開關損失的圖。Waveform example 11 will be described with reference to FIGS. 14A and 14B . FIG. 14A is a graph showing the output voltage Vu, the output voltage Vv, and the output voltage Vw. FIG. 14B is a graph showing switching loss.

如圖14A所示,波形例11呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例11呈如下波形,即在電角度為30度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例11呈如下波形,即在電角度為0度~電角度為30度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例11中,電角度為30度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例11中,電角度為0度~電角度為30度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in Figure 14A, waveform example 11 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 11 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 30° to 210° and an electrical angle of 330° to 360°. In addition, waveform example 11 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 30 degrees and an electrical angle of 210 degrees to 330 degrees. In waveform example 11, the high-side ON application period T3 is an electrical angle of 30 degrees to an electrical angle of 210 degrees and an electrical angle of 330 degrees to an electrical angle of 360 degrees. In addition, in waveform example 11, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 30 degrees and the electrical angle of 210 degrees to the electrical angle of 330 degrees.

在波形例11中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例11中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例11中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例11中,電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 11, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 11, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 11, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In waveform example 11, the first on-fixed period T1w is from an electrical angle of 330 degrees to an electrical angle of 360 degrees.

在波形例11中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例11中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例11中,電角度為0度~電角度為30度是第二接通固定期間T2v。In waveform example 11, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 11, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 11, the electrical angle of 0° to 30° is the second on-fixed period T2v.

在波形例11中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例11中,第一接通固定期間T1u為120度,與此相對,第一接通固定期間T1v為60度,第一接通固定期間T1w為30度。即,在波形例11中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖14B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 11, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 11, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v is 60 degrees, and the first on-fixed period T1w is 30 degrees. That is, in waveform example 11, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 14B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例11中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例11中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為30度,沒有第二接通固定期間T2w。即,在波形例11中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖14B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 11, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 11, the second fixed ON period T2u is 120 degrees, whereas the second fixed ON period T2v is 30 degrees, and there is no second fixed ON period T2w. That is, in waveform example 11, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 14B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖14A及圖14B說明的那樣,在波形例11中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例11中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 14A and 14B , in waveform example 11, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 11, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例11中,如圖14B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp的發熱。Furthermore, in waveform example 11, as shown in FIG. 14B , heat generation of the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, and the W-phase first semiconductor switching element Wp can be simultaneously suppressed.

參照圖15A及圖15B對波形例12進行說明。圖15A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖15B是表示開關損失的圖。Waveform example 12 will be described with reference to FIGS. 15A and 15B . FIG. 15A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 15B is a graph showing switching loss.

如圖15A所示,波形例12呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例12呈如下波形,即在電角度為30度~電角度為150度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例12呈如下波形,即在電角度為0度~電角度為30度及電角度為150度~電角度為330度內,任一相的輸出固定為0。在波形例12中,電角度為30度~電角度為150度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例12中,電角度為0度~電角度為30度及電角度為150度~電角度為330度是低側接通應用期間T4。As shown in Figure 15A, waveform example 12 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 12 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 30° to 150° and an electrical angle of 330° to 360°. In addition, waveform example 12 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0° to an electrical angle of 30° and an electrical angle of 150° to 330°. In waveform example 12, the high-side ON application period T3 is an electrical angle of 30 degrees to an electrical angle of 150 degrees and an electrical angle of 330 degrees to an electrical angle of 360 degrees. In addition, in the waveform example 12, the low-side ON application period T4 is the electrical angle of 0° to the electrical angle of 30° and the electrical angle of 150° to the electrical angle of 330°.

在波形例12中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1w。在波形例12中,電角度為30度~電角度為150度是第一接通固定期間T1u。在波形例12中,電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 12, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1w. In waveform example 12, the first on-fixed period T1u is from an electrical angle of 30 degrees to an electrical angle of 150 degrees. In waveform example 12, the first on-fixed period T1w is from an electrical angle of 330 degrees to an electrical angle of 360 degrees.

在波形例12中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例12中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例12中,電角度為0度~電角度為30度是第二接通固定期間T2v。在波形例12中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 12, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 12, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 12, the electrical angle of 0° to 30° is the second on-fixed period T2v. In waveform example 12, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例12中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例12中,第一接通固定期間T1u為120度,與此相對,沒有第一接通固定期間T1v,第一接通固定期間T1w為30度。即,在波形例12中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖15B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 12, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 12, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v is not provided and the first on-fixed period T1w is 30 degrees. That is, in waveform example 12, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 15B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例12中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例12中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為30度,第二接通固定期間T2w為60度。即,在波形例12中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖15B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 12, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 12, the second fixed ON period T2u is 120 degrees, whereas the second fixed ON period T2v is 30 degrees, and the second fixed ON period T2w is 60 degrees. That is, in waveform example 12, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 15B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖15A及圖15B說明的那樣,在波形例12中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例12中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 15A and 15B , in the waveform example 12, similarly to the waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 12, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例12中,如圖15B所示,還能同時抑制V相的第二半導體開關元件Vn、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 12, as shown in FIG. 15B , heat generation of the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖16對使U相的固定期間變化的情況下的開關損失進行說明。圖16是表示開關損失的圖。The switching loss when the fixed period of the U phase is changed will be described with reference to FIG. 16 . FIG. 16 is a graph showing switching loss.

如圖16所示,在U相中,在將高側的第一接通固定期間T1u設為電角度為30度~電角度為150度、將低側的第二接通固定期間T2u設為電角度為210度~電角度為330度的情況下,開關損失為0.13。也就是說,在U相中,在將高側的第一接通固定期間T1u設為120度,低側的第二接通固定期間T2u設為120度的情況下,開關損失為0.13。As shown in FIG. 16 , in the U phase, the high-side first on-fixed period T1u is set to an electrical angle of 30 degrees to 150 degrees, and the low-side second on-fixed period T2u is set to When the electrical angle is 210 degrees to 330 degrees, the switching loss is 0.13. That is, in the U phase, when the high-side first constant ON period T1u is set to 120 degrees and the low-side second constant ON period T2u is set to 120 degrees, the switching loss is 0.13.

在U相中,在將高側的第一接通固定期間T1u設為電角度為40度~電角度為140度,低側的第二接通固定期間T2u設為電角度為220度~電角度為330度的情況下,開關損失為0.22。也就是說,在U相中,在將高側的第一接通固定期間T1u設為120度,低側的第二接通固定期間T2u設為100度的情況下,開關損失為0.22。In the U phase, the high-side first constant ON period T1u is set at an electrical angle of 40 degrees to 140 degrees, and the low-side second constant ON period T2u is set at an electrical angle of 220 degrees to 140 degrees. When the angle is 330 degrees, the switching loss is 0.22. That is, in the U phase, when the high-side first on-fixed period T1u is 120 degrees and the low-side second on-fixed period T2u is 100 degrees, the switching loss is 0.22.

在U相中,在將高側的第一接通固定期間T1u設為電角度為50度~電角度為130度,低側的第二接通固定期間T2u設為電角度為230度~電角度為310度的情況下,開關損失為0.35。也就是說,在U相中,在將高側的第一接通固定期間T1u設為80度,低側的第二接通固定期間T2u設為100度的情況下,開關損失為0.22。In the U phase, the high-side first constant ON period T1u is set at an electrical angle of 50 degrees to 130 degrees, and the low-side second constant ON period T2u is set at an electrical angle of 230 degrees to 130 degrees. When the angle is 310 degrees, the switching loss is 0.35. That is, in the U phase, when the high-side first constant ON period T1u is 80 degrees and the low-side second ON constant period T2u is 100 degrees, the switching loss is 0.22.

在U相中,在將高側的第一接通固定期間T1u設為電角度為50度~電角度為130度、低側的第二接通固定期間T2u設為電角度為230度~電角度為310度的情況下,開關損失為0.35。也就是說,在U相中,在將高側的第一接通固定期間T1u設為80度,低側的第二接通固定期間T2u設為80度的情況下,開關損失為0.35。In the U phase, the high-side first constant ON period T1u is set at an electrical angle of 50 degrees to 130 degrees, and the low-side second constant ON period T2u is set at an electrical angle of 230 degrees to electrical angles. When the angle is 310 degrees, the switching loss is 0.35. That is, in the U phase, when the high-side first on-fixed period T1u is set to 80 degrees and the low-side second on-fixed period T2u is set to 80 degrees, the switching loss is 0.35.

在U相中,在將高側的第一接通固定期間T1u設為電角度為60度~電角度為120度、低側的第二接通固定期間T2u設為電角度為240度~電角度為300度的情況下,開關損失為0.50。也就是說,在U相中,在將高側的第一接通固定期間T1u設為60度,低側的第二接通固定期間T2u設為60度的情況下,開關損失為0.50。In the U phase, the high-side first constant ON period T1u is set at an electrical angle of 60 degrees to 120 degrees, and the low-side second constant ON period T2u is set at an electrical angle of 240 degrees to 120 degrees. In the case of an angle of 300 degrees, the switching loss is 0.50. That is, in the U phase, when the high-side first on-fixed period T1u is 60 degrees and the low-side second on-fixed period T2u is 60 degrees, the switching loss is 0.50.

以上,如參照圖16說明的那樣,優選第一接通固定期間T1u及第二接通固定期間T2u均比π/3(60度)長且為2π/3(120度)以下。更優選地,比4π/9(80度)長且為2π/3(120度)以下。As described above with reference to FIG. 16 , it is preferable that both the first on-fixed period T1u and the second on-fixed period T2u are longer than π/3 (60 degrees) and not more than 2π/3 (120 degrees). More preferably, it is longer than 4π/9 (80 degrees) and 2π/3 (120 degrees) or less.

接著,參照圖17對UH_UL保護波形的切換作進一步說明。圖17是用於說明UH_UL保護波形的切換的圖。Next, the switching of the UH_UL guard waveform will be further described with reference to FIG. 17 . FIG. 17 is a diagram for explaining switching of UH_UL guard waveforms.

在圖17中,輸出電壓的波形及開關損失從左依次相當於(c)波形例3(圖6A及圖6B)、(i)波形例9(圖12A及圖12B)、(a)波形例1(圖3A及圖3B)。In Fig. 17, the output voltage waveform and switching loss correspond to (c) Waveform Example 3 (Fig. 6A and Fig. 6B), (i) Waveform Example 9 (Fig. 12A and Fig. 12B), (a) Waveform Example 1 (Figure 3A and Figure 3B).

左邊的圖所示的(c)波形例3是將第一接通固定期間T1v及第一接通固定期間T1w延長後的波形例。也就是說,是重視高側的發熱抑制的波形例。(c) Waveform example 3 shown in the figure on the left is a waveform example obtained by extending the first on-fixed period T1v and the first on-fixed period T1w. In other words, it is an example of a waveform in which suppression of heat generation on the high side is emphasized.

中央的圖所示的(i)波形例3是使第一接通固定期間T1v、第一接通固定期間T1w、第二接通固定期間T2v及第二接通固定期間T2w均等的波形例。也就是說,是使除了第一接通固定期間T1u、第二接通固定期間T2u以外的部分均等的波形例。(i) Waveform example 3 shown in the center figure is a waveform example in which the first on-fixed period T1v, the first on-fixed period T1w, the second on-fixed period T2v, and the second on-fixed period T2w are equalized. That is, it is an example of a waveform in which portions other than the first fixed ON period T1u and the second fixed ON period T2u are equalized.

右邊的圖所示的(a)波形例1是將第二接通固定期間T2v及第二接通固定期間T2w延長後的波形例。也就是說,是重視低側的發熱抑制的波形例。(a) Waveform example 1 shown in the figure on the right is a waveform example obtained by extending the second on-fixed period T2v and the second on-fixed period T2w. In other words, it is an example of a waveform in which suppression of heat generation on the low side is emphasized.

隨著切換到左邊的圖,第一接通固定期間T1v及第一接通固定期間T1w變長。因此,隨著切換到左邊的圖,V相的第一半導體開關元件Vp(高側)及W相的第一半導體開關元件Wp(高側)的開關損失減少。As the diagram shifts to the left, the first on-fixed period T1v and the first on-fixed period T1w become longer. Therefore, the switching loss of the V-phase first semiconductor switching element Vp (high side) and the W-phase first semiconductor switching element Wp (high side) decreases as the diagram shifts to the left.

另一方面,隨著切換到右邊的圖,第二接通固定期間T2v及第二接通固定期間T2w變長。因此,隨著切換到左邊的圖,V相的第二半導體開關元件Vn(低側)及W相的第二半導體開關元件Wn(低側)的開關損失減少。On the other hand, the second on-fixed period T2v and the second on-fixed period T2w become longer as the graph shifts to the right. Therefore, the switching loss of the V-phase second semiconductor switching element Vn (low side) and the W-phase second semiconductor switching element Wn (low side) decreases as the diagram shifts to the left.

接著,參照圖16對UH_UL保護波形的切換作進一步說明。圖16是用於說明UH_UL保護波形的切換的圖。Next, the switching of the UH_UL guard waveform will be further described with reference to FIG. 16 . FIG. 16 is a diagram for explaining switching of UH_UL guard waveforms.

在圖16中,輸出電壓的波形及開關損失從左依次相當於(e)波形例5(圖8A及圖8B)、(i)波形例9(圖12A及圖12B)、(j)波形例10(圖13A及圖13B)。In Fig. 16, the waveform and switching loss of the output voltage correspond to (e) waveform example 5 (Fig. 8A and 8B), (i) waveform example 9 (Fig. 12A and Fig. 12B), and (j) waveform example from the left. 10 (Figures 13A and 13B).

左邊的圖所示的(e)波形例5是將第一接通固定期間T1v及第二接通固定期間T2v延長後的波形例。也就是說,是重視V相的波形例。(e) Waveform Example 5 shown in the left figure is an example of a waveform obtained by extending the first on-fixed period T1v and the second on-fixed period T2v. In other words, it is an example of a waveform in which V-phase is emphasized.

中央的圖所示的(i)波形例9是使第一接通固定期間T1v、第一接通固定期間T1w、第二接通固定期間T2v及第二接通固定期間T2w均等的波形例。也就是說,是使除了第一接通固定期間T1u、第二接通固定期間T2u以外的部分均等的波形例。(i) Waveform example 9 shown in the center figure is a waveform example in which the first fixed ON period T1v, the first fixed ON period T1w, the second fixed ON period T2v, and the second fixed ON period T2w are equalized. That is, it is an example of a waveform in which portions other than the first fixed ON period T1u and the second fixed ON period T2u are equalized.

右邊的圖所示的(j)波形例10是將第一接通固定期間T1w及第二接通固定期間T2w延長後的波形例。也就是說,是重視W相的波形例。(j) Waveform example 10 shown in the figure on the right is a waveform example obtained by extending the first on-fixed period T1w and the second on-fixed period T2w. In other words, it is an example of a waveform in which the W phase is emphasized.

隨著切換到左邊的圖,第一接通固定期間T1v及第二接通固定期間T2v變長。因此,隨著切換到左邊的圖,V相的第一半導體開關元件Vp(高側)及V相的第二半導體開關元件Vn(低側)的開關損失減少。As the diagram shifts to the left, the first on-fixed period T1v and the second on-fixed period T2v become longer. Therefore, the switching loss of the V-phase first semiconductor switching element Vp (high side) and the V-phase second semiconductor switching element Vn (low side) decreases as the diagram shifts to the left.

另一方面,隨著切換到右邊的圖,第一接通固定期間T1w及第二接通固定期間T2w變長。因此,隨著切換到右邊的圖,W相的第一半導體開關元件Wp(高側)及W相的第二半導體開關元件Wn(低側)的開關損失減少。On the other hand, the first on-fixed period T1w and the second on-fixed period T2w become longer as the graph shifts to the right. Therefore, the switching loss of the W-phase first semiconductor switching element Wp (high side) and the W-phase second semiconductor switching element Wn (low side) decreases as the diagram shifts to the right.

接著,參照圖19對UH_UL保護波形的切換作進一步說明。圖19是表示開關損失的圖。Next, the switching of the UH_UL guard waveform will be further described with reference to FIG. 19 . FIG. 19 is a graph showing switching loss.

如圖19所示,在(f)波形例6(圖9A)、(h)波形例8(圖11A)、(k)波形例11(圖14A)及(l)波形例12(圖15A)中,第一半導體開關元件Up(UH)的開關損失及第二半導體開關元件Un(UL)的開關損失為0.13。As shown in Figure 19, in (f) Waveform Example 6 (Figure 9A), (h) Waveform Example 8 (Figure 11A), (k) Waveform Example 11 (Figure 14A) and (l) Waveform Example 12 (Figure 15A) Among them, the switching loss of the first semiconductor switching element Up (UH) and the switching loss of the second semiconductor switching element Un (UL) are 0.13.

在(f)波形例6中,除了第一半導體開關元件Up(UH)及第二半導體開關元件Un(UL)以外,還能使第二半導體開關元件Vn(VL)的開關損失減少為0.57。In waveform example 6 (f), in addition to the first semiconductor switching element Up (UH) and the second semiconductor switching element Un (UL), the switching loss of the second semiconductor switching element Vn (VL) can be reduced to 0.57.

在(h)波形例8中,除了第一半導體開關元件Up(UH)及第二半導體開關元件Un(UL)以外,還能使第一半導體開關元件Wp(WH)的開關損失減少為0.57。In waveform example 8 (h), in addition to the first semiconductor switching element Up (UH) and the second semiconductor switching element Un (UL), the switching loss of the first semiconductor switching element Wp (WH) can be reduced to 0.57.

在(k)波形例11中,除了第一半導體開關元件Up(UH)及第二半導體開關元件Un(UL)以外,還能使第一半導體開關元件Vp(VH)的開關損失減少為0.57。In (k) waveform example 11, in addition to the first semiconductor switching element Up (UH) and the second semiconductor switching element Un (UL), the switching loss of the first semiconductor switching element Vp (VH) can be reduced to 0.57.

在(l)波形例12中,除了第一半導體開關元件Up(UH)及第二半導體開關元件Un(UL)以外,還能使第二半導體開關元件Wn(WL)的開關損失減少為0.57。In (1) waveform example 12, in addition to the first semiconductor switching element Up (UH) and the second semiconductor switching element Un (UL), the switching loss of the second semiconductor switching element Wn (WL) can be reduced to 0.57.

參照圖20對UH_UL保護波形的切換作進一步說明。圖20是用於說明UH_UL保護波形的切換的圖。The switching of the UH_UL protection waveform will be further described with reference to FIG. 20 . FIG. 20 is a diagram for explaining switching of UH_UL guard waveforms.

圖20所示的波形圖相當於(i)波形例9(圖12A)。The waveform diagram shown in FIG. 20 corresponds to (i) waveform example 9 (FIG. 12A).

(a)波形例1(圖3A)相當於相對於(i)波形例9延長了第二接通固定期間T2v及第二接通固定期間T2w後的波形。因此,V相的第二半導體開關元件Vn(VL)及W相的第二半導體開關元件Wn(WL)的開關損失減少。(a) Waveform example 1 ( FIG. 3A ) corresponds to a waveform obtained by extending the second on-fixed period T2 v and the second on-fixed period T2 w from (i) waveform example 9 . Therefore, the switching loss of the V-phase second semiconductor switching element Vn (VL) and the W-phase second semiconductor switching element Wn (WL) is reduced.

(c)波形例3(圖6A)相當於相對於(i)波形例9延長了第一接通固定期間T1v及第一接通固定期間T1w後的波形。因此,V相的第一半導體開關元件Vp(VH)及W相的第一半導體開關元件Wp(WH)的開關損失減少。(c) Waveform example 3 ( FIG. 6A ) corresponds to a waveform obtained by extending the first on-fixed period T1v and the first on-fixed period T1w from (i) waveform example 9 . Therefore, the switching loss of the V-phase first semiconductor switching element Vp (VH) and the W-phase first semiconductor switching element Wp (WH) is reduced.

(e)波形例5(圖8A)相當於相對於(i)波形例9延長了第一接通固定期間T1v及第二接通固定期間T2v後的波形。因此,V相的第一半導體開關元件Vp(VH)及V相的第二半導體開關元件Vn(VL)的開關損失減少。(e) Waveform Example 5 ( FIG. 8A ) corresponds to a waveform obtained by extending the first on-fixed period T1v and the second on-fixed period T2v from (i) waveform example 9 . Therefore, the switching loss of the V-phase first semiconductor switching element Vp (VH) and the V-phase second semiconductor switching element Vn (VL) is reduced.

(j)波形例10(圖13A)相當於相對於(i)波形例9延長了第一接通固定期間T1w及第二接通固定期間T2w後的波形。因此,W相的第一半導體開關元件Wp(WH)及W相的第二半導體開關元件Wn(WL)的開關損失減少。(j) Waveform example 10 ( FIG. 13A ) corresponds to a waveform obtained by extending the first on-fixed period T1 w and the second on-fixed period T2 w from (i) waveform example 9 . Therefore, the switching loss of the W-phase first semiconductor switching element Wp (WH) and the W-phase second semiconductor switching element Wn (WL) is reduced.

(f)波形例6(圖9A)相當於相對於(i)波形例9延長了第二接通固定期間T2v後的波形。因此,V相的第二半導體開關元件Vn(VL)的開關損失減少。(f) Waveform Example 6 ( FIG. 9A ) corresponds to a waveform obtained by extending the second on-fixed period T2 v from (i) Waveform Example 9 . Therefore, the switching loss of the V-phase second semiconductor switching element Vn(VL) is reduced.

(h)波形例8(圖11A)相當於相對於(i)波形例9延長了第一接通固定期間T1w後的波形。因此,W相的第一半導體開關元件Wp(WH)的開關損失減少。(h) Waveform example 8 ( FIG. 11A ) corresponds to a waveform obtained by extending the first ON fixed period T1w from (i) Waveform example 9 . Therefore, the switching loss of the first semiconductor switching element Wp (WH) of the W phase is reduced.

(k)波形例11(圖14A)相當於相對於(i)波形例9延長了第一接通固定期間T1v後的波形。因此,V相的第一半導體開關元件Vp(VH)的開關損失減少。(k) Waveform example 11 ( FIG. 14A ) corresponds to a waveform obtained by extending the first on-fixed period T1v from (i) Waveform example 9 . Therefore, the switching loss of the V-phase first semiconductor switching element Vp(VH) is reduced.

(l)波形例12(圖15A)相當於相對於(i)波形例9延長了第二接通固定期間T2w後的波形。因此,W相的第二半導體開關元件Wn(WL)的開關損失減少。(1) Waveform Example 12 ( FIG. 15A ) corresponds to a waveform obtained by extending the second on-fixed period T2w from (i) Waveform Example 9 . Therefore, the switching loss of the W-phase second semiconductor switching element Wn (WL) is reduced.

參照圖21對保護波形的切換方法進行說明。圖21是表示保護波形的切換方法的流程圖。A method of switching guard waveforms will be described with reference to FIG. 21 . FIG. 21 is a flowchart showing a method of switching guard waveforms.

步驟S102:信號生成部120獲取各臂(半導體開關元件)的溫度T_UH、溫度T_UL、溫度T_VH、溫度T_VL、溫度T_WH和溫度T_WL。溫度T_UH表示第一半導體開關元件Up的溫度。溫度T_UL表示第二半導體開關元件Un的溫度。溫度T_VH表示第一半導體開關元件Vp的溫度。溫度T_VL表示第二半導體開關元件Vn的溫度。溫度T_WH表示第一半導體開關元件Wp的溫度。溫度T_WL表示第二半導體開關元件Wn的溫度。Step S102: The signal generator 120 acquires the temperature T_UH, temperature T_UL, temperature T_VH, temperature T_VL, temperature T_WH, and temperature T_WL of each arm (semiconductor switching element). The temperature T_UH represents the temperature of the first semiconductor switching element Up. The temperature T_UL represents the temperature of the second semiconductor switching element Un. The temperature T_VH represents the temperature of the first semiconductor switching element Vp. The temperature T_VL represents the temperature of the second semiconductor switching element Vn. The temperature T_WH represents the temperature of the first semiconductor switching element Wp. The temperature T_WL represents the temperature of the second semiconductor switching element Wn.

而且,信號生成部120將獲取的溫度T_UH、溫度T_UL、溫度T_VH、溫度T_VL、溫度T_WH、溫度T_WL以溫度從高到低的順序設為T_1、T_2、T_3、T_4、T_5及T_6。處理進入步驟S104。Furthermore, the signal generator 120 sets the acquired temperatures T_UH, T_UL, T_VH, T_VL, T_WH, and T_WL as T_1, T_2, T_3, T_4, T_5, and T_6 in descending order of temperature. The process proceeds to step S104.

步驟S104:信號生成部120判斷最高溫度的上臂(第一半導體開關元件)和最高溫度的下臂(第二半導體開關元件)是否同相。在信號生成部120判斷為最高溫度的上臂(第一半導體開關元件)和最高溫度的下臂(第二半導體開關元件)並非同相的情況下(步驟S104:否),處理進入步驟S108。在信號生成部120判斷為最高溫度的上臂(第一半導體開關元件)和最高溫度的下臂(第二半導體開關元件)同相的情況下(步驟S104:是),處理進入步驟S106。Step S104: The signal generator 120 judges whether the upper arm with the highest temperature (the first semiconductor switching element) and the lower arm with the highest temperature (the second semiconductor switching element) are in phase. When the signal generator 120 determines that the highest temperature upper arm (first semiconductor switching element) and the highest temperature lower arm (second semiconductor switching element) are not in phase (step S104 : NO), the process proceeds to step S108 . When the signal generator 120 determines that the highest temperature upper arm (first semiconductor switching element) and the highest temperature lower arm (second semiconductor switching element) are in phase (step S104 : Yes), the process proceeds to step S106 .

步驟S106:信號生成部120以抑制X相上下層的溫度上升的方式進行調製。X相例如是U相、V相或W相。處理結束。參照圖22~圖24在後文中敘述步驟S106的詳細處理。Step S106: The signal generator 120 modulates to suppress the temperature rise of the X-phase upper and lower layers. The X-phase is, for example, a U-phase, a V-phase, or a W-phase. Processing is complete. The detailed processing of step S106 will be described later with reference to FIGS. 22 to 24 .

步驟S108:信號生成部120以抑制X相上層和Y相下層的溫度上升的方式進行調製。Y相例如是U相、V相或W相。處理結束。參照圖47~圖49在後文中敘述步驟S108的詳細處理。Step S108: The signal generator 120 modulates to suppress the temperature rise of the X-phase upper layer and the Y-phase lower layer. The Y phase is, for example, a U phase, a V phase, or a W phase. Processing is complete. The detailed processing of step S108 will be described later with reference to FIGS. 47 to 49 .

參照圖22至圖24對圖21所示的步驟S106的詳細處理進行說明。即,對以抑制X相上下層的溫度上升的方式進行調製時的處理進行說明。圖22是表示保護波形的切換方法的流程圖。圖23及圖24是表示保護波形的切換方法的圖。另外,圖22~圖24表示使用U相以作為X相的例子時的保護波形的切換方法。The detailed processing of step S106 shown in FIG. 21 will be described with reference to FIGS. 22 to 24 . That is, the processing at the time of modulation to suppress the temperature rise of the X-phase upper and lower layers will be described. FIG. 22 is a flowchart showing a method of switching guard waveforms. 23 and 24 are diagrams showing a method of switching guard waveforms. In addition, FIGS. 22 to 24 show how to switch guard waveforms when the U phase is used as an example of the X phase.

步驟S202:信號生成部120判斷溫度T_3~T_6是否為閾值T_Thr1以下。在信號生成部120判斷為溫度T_3~T_6並非閾值T_Thr1以下的情況下(步驟S202:否),處理進入步驟S206。在信號生成部120判斷為溫度T_3~T_6是閾值T_Thr1以下的情況下(步驟S202:是),處理進入步驟S204。Step S202: The signal generator 120 judges whether the temperatures T_3-T_6 are below the threshold T_Thr1. When the signal generator 120 determines that the temperatures T_3 to T_6 are not equal to or less than the threshold value T_Thr1 (step S202 : NO), the process proceeds to step S206 . When the signal generator 120 determines that the temperatures T_3 to T_6 are equal to or less than the threshold value T_Thr1 (step S202: Yes), the process proceeds to step S204.

步驟S204:信號生成部120以四個保護方式進行調製。詳細地,信號生成部120以(i)波形例9進行調製。處理結束。Step S204: The signal generator 120 performs modulation in four protection modes. In detail, the signal generator 120 performs modulation with (i) waveform example 9. Processing is complete.

步驟S206:信號生成部120判斷溫度T_5~T_6是否為閾值T_Thr2以下。在信號生成部120判斷為溫度T_5~T_6並非閾值T_Thr2以下的情況下(步驟S206:否),處理進入步驟S210。在信號生成部120判斷為溫度T_5~T_6是閾值T_Thr2以下的情況下(步驟S206:是),處理進入步驟S208。Step S206: The signal generator 120 judges whether the temperatures T_5-T_6 are below the threshold T_Thr2. When the signal generator 120 determines that the temperatures T_5 to T_6 are not equal to or less than the threshold value T_Thr2 (step S206 : NO), the process proceeds to step S210 . When the signal generator 120 determines that the temperatures T_5 to T_6 are equal to or less than the threshold value T_Thr2 (step S206: Yes), the process proceeds to step S208.

步驟S208:信號生成部120以三個保護方式與四個保護方式的中間進行調製。參照圖23在後文中敘述以三個保護方式與四個保護方式的中間進行調製。處理結束。Step S208: The signal generator 120 performs modulation in the middle of the three protection modes and the four protection modes. Modulation between the three protection schemes and the four protection schemes will be described later with reference to FIG. 23 . Processing is complete.

步驟S210:信號生成部120判斷溫度T_3~T_5是否為閾值T_Thr3以下。在信號生成部120判斷為溫度T_3~T_5並非閾值T_Thr3以下的情況下(步驟S210:否),處理進入步驟S214。在信號生成部120判斷為溫度T_3~T_5是閾值T_Thr3以下的情況下(步驟S210:是),處理進入步驟S212。Step S210: The signal generator 120 determines whether the temperatures T_3-T_5 are below the threshold T_Thr3. When the signal generator 120 determines that the temperatures T_3 to T_5 are not equal to or less than the threshold value T_Thr3 (step S210 : NO), the process proceeds to step S214 . When the signal generating unit 120 determines that the temperatures T_3 to T_5 are equal to or less than the threshold value T_Thr3 (step S210: Yes), the process proceeds to step S212.

步驟S212:信號生成部120以三個保護方式進行調製。詳細地,信號生成部120以能保護(k)波形例11、(f)波形例6、(h)波形例8、(l)波形例12中的溫度為T_3、T_4、T_5的臂(半導體開關元件)的方式進行調製。處理結束。Step S212: The signal generator 120 performs modulation in three protection modes. Specifically, the signal generator 120 can protect the arms (semiconductor Modulation by means of switching elements). Processing is complete.

步驟S214:信號生成部120判斷溫度T_4~T_5是否為閾值T_Thr4以下。在信號生成部120判斷為溫度T_4~T_5並非閾值T_Thr4以下的情況下(步驟S214:否),處理進入步驟S218。在信號生成部120判斷為溫度T_4~T_5是閾值T_Thr4以下的情況下(步驟S214:是),處理進入步驟S216。Step S214: The signal generator 120 judges whether the temperatures T_4-T_5 are below the threshold T_Thr4. When the signal generator 120 determines that the temperatures T_4 to T_5 are not equal to or less than the threshold value T_Thr4 (step S214: NO), the process proceeds to step S218. When the signal generating unit 120 determines that the temperatures T_4 to T_5 are equal to or less than the threshold value T_Thr4 (step S214: Yes), the process proceeds to step S216.

步驟S216:信號生成部120以兩個保護方式與三個保護方式的中間進行調製。參照圖24在後文中敘述以兩個保護方式與三個保護方式的中間進行調製。處理結束。Step S216: The signal generator 120 performs modulation in the middle of the two protection modes and the three protection modes. Modulation between the two protection schemes and the three protection schemes will be described later with reference to FIG. 24 . Processing is complete.

步驟S218:信號生成部120以兩個保護方式進行調製。詳細地,信號生成部120以能保護(a)波形例1、(c)波形例3、(e)波形例5、(f)波形例6、(i)波形例9及(j)波形例10中的溫度為T_3、T_4的臂(半導體開關元件)的方式進行調製。處理結束。Step S218: The signal generator 120 performs modulation in two protection modes. In detail, the signal generator 120 can protect (a) waveform example 1, (c) waveform example 3, (e) waveform example 5, (f) waveform example 6, (i) waveform example 9, and (j) waveform example The temperature in 10 is modulated by means of arms (semiconductor switching elements) of T_3 and T_4. Processing is complete.

接著,參照圖23對圖22所示的步驟S208的詳細處理進行說明。即,對以三個保護方式與四個保護方式的中間進行調製時的處理進行說明。Next, the detailed processing of step S208 shown in FIG. 22 will be described with reference to FIG. 23 . That is, the processing when modulation is performed between the three protection schemes and the four protection schemes will be described.

信號生成部120對除了UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度高的前三臂(半導體開關元件)的位置進行判斷。以下,在圖23的說明中,有時將除了“UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度高的前三臂(半導體開關元件)簡單記載為“前三臂”。另外,前三臂的溫度的順序是任意的。例如,前三臂的溫度的順序既可以是VH(第一半導體開關元件Vp)、VL(第二半導體開關元件Vn)及WH(第一半導體開關元件Wp)的順序,也可以是VH(第一半導體開關元件Vp)、WH(第一半導體開關元件Wp)及VL(第二半導體開關元件Vn)的順序。以下,對於同樣的記載,同樣前三臂的溫度的順序也是任意的。The signal generation unit 120 determines the positions of the first three arms (semiconductor switching elements) with high temperatures other than UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un). Hereinafter, in the description of FIG. 23 , the first three arms (semiconductor switching elements) with high temperatures other than “UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un) are sometimes simply described as “ In addition, the temperature sequence of the first three arms is arbitrary. For example, the temperature sequence of the first three arms can be VH (the first semiconductor switching element Vp), VL (the second semiconductor switching element Vn) and The order of WH (first semiconductor switching element Wp) may also be the order of VH (first semiconductor switching element Vp), WH (first semiconductor switching element Wp) and VL (second semiconductor switching element Vn). Hereinafter, for In the same record, the order of the temperatures of the first three arms is also arbitrary.

在信號生成部120判斷為前三臂是VH(第一半導體開關元件Vp)、VL(第二半導體開關元件Vn)及WH(第一半導體開關元件Wp)的情況下,在(k)波形例11中,信號生成部120以將150度~150+30×(T_Thr2-(T_5-T_6))/T_Thr2度應用於第一接通固定期間,將330度~330+30×(T_Thr2-(T_5-T_6))/T_Thr2度應用於第二接通固定期間的方式進行調製。When the signal generator 120 determines that the first three arms are VH (first semiconductor switching element Vp), VL (second semiconductor switching element Vn), and WH (first semiconductor switching element Wp), in (k) waveform example In 11, the signal generating unit 120 applies 150 degrees to 150+30×(T_Thr2-(T_5-T_6))/T_Thr2 degrees to the first on-fixed period, and applies 330 degrees to 330+30×(T_Thr2-(T_5-T_6)) /T_Thr2 degrees is applied to the second fixed-on period for modulation.

在信號生成部120判斷為前三臂是VH(第一半導體開關元件Vp)、VL(第二半導體開關元件Vn)及WL(第二半導體開關元件Wn)的情況下,信號生成部120以(f)波形例6進行調製。When the signal generating unit 120 determines that the first three arms are VH (first semiconductor switching element Vp), VL (second semiconductor switching element Vn), and WL (second semiconductor switching element Wn), the signal generating unit 120 uses ( f) Waveform example 6 for modulation.

在信號生成部120判斷為前三臂是VH(第一半導體開關元件Vp)、VL(第二半導體開關元件Vn)及WH(第一半導體開關元件Wp)的情況下,在(h)波形例8中,信號生成部120以將0度~0+30×(T_Thr2-(T_5-T_6))/T_Thr2度應用於第一接通固定期間,將330度~330+30×(T_Thr2-(T_5-T_6))/T_Thr2應用於第二接通固定期間的方式進行調製。When the signal generator 120 judges that the first three arms are VH (first semiconductor switching element Vp), VL (second semiconductor switching element Vn), and WH (first semiconductor switching element Wp), in (h) waveform example In 8, the signal generating unit 120 applies 0 degrees to 0+30×(T_Thr2−(T_5−T_6))/T_Thr2 degrees to the first on-fixed period, and applies 330 degrees to 330+30×(T_Thr2−(T_5−T_6)) /T_Thr2 is applied to the second fixed-on period for modulation.

在信號生成部120判斷為前三臂是VH(第一半導體開關元件Vp)、VL(第二半導體開關元件Vn)及WL(第二半導體開關元件Wn)的情況下,在(l)波形例12中,信號生成部120以將180度~180+30×(T_Thr2-(T_5-T_6))/T_Thr2度應用於第一接通固定期間,將330度~330+30×(T_Thr2-(T_5-T_6))/T_Thr2度應用於第二接通固定期間的方式進行調製。When the signal generator 120 judges that the first three arms are VH (first semiconductor switching element Vp), VL (second semiconductor switching element Vn), and WL (second semiconductor switching element Wn), in (1) waveform example In 12, the signal generating unit 120 applies 180 degrees to 180+30×(T_Thr2-(T_5-T_6))/T_Thr2 degrees to the first on-fixed period, and applies 330 degrees to 330+30×(T_Thr2-(T_5-T_6)) /T_Thr2 degrees is applied to the second fixed-on period for modulation.

接著,參照圖24對圖22所示的步驟S216的詳細處理進行說明。即,對以兩個保護方式與三個保護方式的中間進行調製時的處理進行說明。Next, detailed processing of step S216 shown in FIG. 22 will be described with reference to FIG. 24 . That is, the processing when modulation is performed between the two protection schemes and the three protection schemes will be described.

信號生成部120對除了UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度高的前兩臂(半導體開關元件)的位置進行判斷。以下,在圖24的說明中,有時將“除了UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度高的前兩臂(半導體開關元件)”簡單記載為“前兩臂”。另外,前兩臂的溫度的順序是任意的。例如,前兩臂的溫度的順序既可以是VL(第二半導體開關元件Vn)及WL(第二半導體開關元件Wn)的順序,也可以是WL(第二半導體開關元件Wn)及VL(第二半導體開關元件Vn)的順序。以下,對於同樣的記載,同樣前三臂的溫度的順序也是任意的。The signal generation unit 120 determines the positions of the two front arms (semiconductor switching elements) with high temperatures other than UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un). Hereinafter, in the description of FIG. 24 , "the front two arms (semiconductor switching elements) with high temperatures other than UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un)" may be simply described as "Front arms". In addition, the order of the temperatures of the first two arms is arbitrary. For example, the order of the temperatures of the first two arms may be the order of VL (the second semiconductor switching element Vn) and WL (the second semiconductor switching element Wn), or it may be the order of WL (the second semiconductor switching element Wn) and VL (the second semiconductor switching element Wn). Two semiconductor switching elements Vn) in sequence. Hereinafter, for the same description, the order of the temperatures of the first three arms is also arbitrary.

而且,信號生成部120對除了UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度第三高的臂(半導體開關元件)的位置進行判斷。以下,在圖24的說明中,有時將除了“UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度第三高的臂(半導體開關元件)”簡單記載為“溫度第三高的臂”。Furthermore, the signal generator 120 determines the position of the arm (semiconductor switching element) having the third highest temperature other than UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un). Hereinafter, in the description of FIG. 24 , the arm (semiconductor switching element) with the third highest temperature other than UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un) may be simply described as "The third warmest arm".

在信號生成部120判斷為前兩臂的位置是VL(第二半導體開關元件Vn)及WL(第二半導體開關元件Vn)、且溫度第三高的臂是VH(第一半導體開關元件Vp)的情況下,在(a)波形例1中,信號形成部120以將180度~180+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第一接通固定期間的方式進行調製。處理結束。The signal generator 120 determines that the positions of the first two arms are VL (second semiconductor switching element Vn) and WL (second semiconductor switching element Vn), and the arm with the third highest temperature is VH (first semiconductor switching element Vp). In the case of (a) waveform example 1, the signal forming unit 120 modulates so that 180° to 180+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the first constant ON period. Processing is complete.

在信號生成部120判斷為前兩臂的位置是VL(第二半導體開關元件Vn)及WL(第二半導體開關元件Vn)、且溫度第三高的臂是WH(第一半導體開關元件Wp)的情況下,在(a)波形例1中,信號生成部120以將330度~330+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第一接通固定期間的方式進行調製。處理結束。The signal generator 120 judges that the positions of the first two arms are VL (second semiconductor switching element Vn) and WL (second semiconductor switching element Vn), and the arm with the third highest temperature is WH (first semiconductor switching element Wp). In the case of (a) waveform example 1, the signal generation unit 120 modulates so that 330° to 330+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the first ON constant period. Processing is complete.

在信號生成部120判斷為前兩臂的位置是VH(第一半導體開關元件Vp)及WH(第一半導體開關元件Wp)、且溫度第三高的臂是VL(第二半導體開關元件Vn)的情況下,在(c)波形例3中,信號形成部120以將0度~0+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第二接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are VH (first semiconductor switching element Vp) and WH (first semiconductor switching element Wp), and the arm with the third highest temperature is VL (second semiconductor switching element Vn). In the case of (c) waveform example 3, the signal forming unit 120 modulates so that 0° to 0+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the second ON constant period.

在信號生成部120判斷為前兩臂的位置是VH(第一半導體開關元件Vp)及WH(第一半導體開關元件Wp)、且溫度第三高的臂是WL(第二半導體開關元件Wn)的情況下,在(c)波形例3中,信號形成部120以將150度~150+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第二接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are VH (first semiconductor switching element Vp) and WH (first semiconductor switching element Wp), and the arm with the third highest temperature is WL (second semiconductor switching element Wn). In the case of (c) waveform example 3, the signal forming unit 120 modulates so as to apply 150° to 150+30×(T_Thr4−(T_4−T_5))/T_Thr4° for the second on-fixed period.

在信號生成部120判斷為前兩臂的位置是VH(第一半導體開關元件Vp)及VL(第二半導體開關元件Vn)、且溫度第三高的臂是WH(第一半導體開關元件Wp)的情況下,在(e)波形例5中,信號形成部120以將330度~330+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第一接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are VH (first semiconductor switching element Vp) and VL (second semiconductor switching element Vn), and the arm with the third highest temperature is WH (first semiconductor switching element Wp). In the case of (e) waveform example 5, the signal forming unit 120 modulates so as to apply 330° to 330+30×(T_Thr4−(T_4−T_5))/T_Thr4° to the first constant ON period.

在信號生成部120判斷為前兩臂的位置是VH(第一半導體開關元件Vp)及VL(第二半導體開關元件Vn)、且溫度第三高的臂是WH(第二半導體開關元件Wn)的情況下,在(e)波形例5中,信號形成部120以將150度~150+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第二接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are VH (first semiconductor switching element Vp) and VL (second semiconductor switching element Vn), and the arm with the third highest temperature is WH (second semiconductor switching element Wn). In the case of (e) waveform example 5, the signal forming unit 120 modulates so that 150° to 150+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the second ON constant period.

在信號生成部120判斷為前兩臂的位置是VH(第一半導體開關元件Vp)及WL(第二半導體開關元件Wn)、且溫度第三高的臂是WH(第一半導體開關元件Wp)的情況下,在(f)波形例6中,信號形成部120以將330度~330+60×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第一接通固定期間的方式進行調製。然而,在上限超過360度D度的情況下,在(f)波形例6中應用第一接通固定期間的區間設為0度~D度以及330度~360度。The signal generator 120 determines that the positions of the first two arms are VH (first semiconductor switching element Vp) and WL (second semiconductor switching element Wn), and the arm with the third highest temperature is WH (first semiconductor switching element Wp). In the case of (f) waveform example 6, the signal forming unit 120 modulates so as to apply 330° to 330+60×(T_Thr4−(T_4−T_5))/T_Thr4° to the first constant ON period. However, when the upper limit exceeds 360 degrees D degrees, in (f) waveform example 6, the intervals to which the first ON fixed period is applied are 0 degrees to D degrees and 330 degrees to 360 degrees.

在信號生成部120判斷為前兩臂的位置是VH(第一半導體開關元件Vp)及WL(第二半導體開關元件Wn)、且溫度第三高的臂是VL(第二半導體開關元件Vn)的情況下,信號形成部120以(f)波形例6進行調製。處理結束。The signal generator 120 determines that the positions of the first two arms are VH (first semiconductor switching element Vp) and WL (second semiconductor switching element Wn), and the arm with the third highest temperature is VL (second semiconductor switching element Vn). In the case of , the signal forming unit 120 performs modulation with waveform example 6 (f). Processing is complete.

在信號生成部120判斷為前兩臂的位置是VL(第二半導體開關元件Vn)及WH(第一半導體開關元件Wp)、且溫度第三高的臂是WL(第二半導體開關元件Wn)的情況下,在(i)波形例9中,信號生成部120以將180度~180+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第二接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are VL (second semiconductor switching element Vn) and WH (first semiconductor switching element Wp), and the arm with the third highest temperature is WL (second semiconductor switching element Wn). In the case of (i) waveform example 9, the signal generation unit 120 modulates so that 180° to 180+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the second on-fixed period.

在信號生成部120判斷為前兩臂的位置是VL(第二半導體開關元件Vn)及WH(第一半導體開關元件Wp)、且溫度第三高的臂是VH(第一半導體開關元件Vp)的情況下,在(i)波形例9中,信號形成部120以將150度~150+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第一接通固定期間的方式進行調製。The signal generator 120 judges that the positions of the first two arms are VL (second semiconductor switching element Vn) and WH (first semiconductor switching element Wp), and the arm with the third highest temperature is VH (first semiconductor switching element Vp). In the case of (i) waveform example 9, the signal forming unit 120 modulates so that 150° to 150+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the first constant ON period.

在信號生成部120判斷為前兩臂的位置是WH(第一半導體開關元件Wp)及WL(第二半導體開關元件Wn)、且溫度第三高的臂是VL(第二半導體開關元件Vn)的情況下,在(j)波形例10中,信號生成部120以將0度~0+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第二接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are WH (first semiconductor switching element Wp) and WL (second semiconductor switching element Wn), and the arm with the third highest temperature is VL (second semiconductor switching element Vn). In the case of (j) waveform example 10, the signal generation unit 120 modulates so that 0° to 0+30×(T_Thr4−(T_4−T_5))/T_Thr4° is applied to the second ON constant period.

在信號生成部120判斷為前兩臂的位置是WH(第一半導體開關元件Wp)及WL(第二半導體開關元件Wn)、且溫度第三高的臂是VH(第一半導體開關元件Vp)的情況下,在(j)波形例10中,信號形成部120以將180度~180+30×(T_Thr4-(T_4-T_5))/T_Thr4度應用於第一接通固定期間的方式進行調製。The signal generator 120 determines that the positions of the first two arms are WH (first semiconductor switching element Wp) and WL (second semiconductor switching element Wn), and the arm with the third highest temperature is VH (first semiconductor switching element Vp). In the case of (j) waveform example 10, the signal forming unit 120 modulates so as to apply 180° to 180+30×(T_Thr4−(T_4−T_5))/T_Thr4° to the first constant ON period.

以上,如參照圖21~圖24說明的那樣,保護動作模式包括第一選擇保護動作模式,在第一選擇保護動作模式下,對一相的第一半導體開關元件和第二半導體開關元件進行保護,第一選擇保護動作模式包括多個k個保護動作模式,在所述多個k個保護動作模式下,對一相以外的相的第一半導體開關元件和第二半導體開關元件中的、k個(k是2n-3以下的自然數)第一半導體開關元件或第二半導體開關元件進行保護。基於溫度資訊進行k個保護動作模式的選擇。因此,在特定相的溫度因冷卻水路的問題等變成問題的情況下,在特定相的溫度變成問題的情況下,通過最大限度地抑制特定一相的第一半導體開關元件和第二半導體開關元件的升溫,同時對其他半導體開關元件的根據溫度狀況所需的半導體開關元件的升溫也進行抑制,以提高逆變器的可靠性。As described above with reference to FIGS. 21 to 24 , the protection operation mode includes the first selection protection operation mode, and in the first selection protection operation mode, the first semiconductor switching element and the second semiconductor switching element of one phase are protected. , the first selective protection action mode includes a plurality of k protection action modes, and in the plurality of k protection action modes, for the first semiconductor switching element and the second semiconductor switching element of a phase other than one phase, k (k is a natural number below 2n-3) first semiconductor switching elements or second semiconductor switching elements for protection. The k protection action modes are selected based on the temperature information. Therefore, in the case where the temperature of a specific phase becomes a problem due to a problem of a cooling water channel, etc., by maximally suppressing the first semiconductor switching element and the second semiconductor switching element of a specific one phase At the same time, the temperature rise of other semiconductor switching elements required by the temperature conditions is also suppressed to improve the reliability of the inverter.

參照圖25~圖42B對本發明實施方式的波形例作進一步說明。圖25是表示波形例與開關損失的關係的表。在圖25中,UH表示U相的第一半導體開關元件Up的開關損失。UL表示U相的第二半導體開關元件Un的開關損失。VH表示V相的第一半導體開關元件Vp的開關損失。VL表示V相的第二半導體開關元件Vn的開關損失。WH表示W相的第一半導體開關元件Wp的開關損失。WL表示W相的第二半導體開關元件Wn的開關損失。Waveform examples according to the embodiment of the present invention will be further described with reference to FIGS. 25 to 42B. FIG. 25 is a table showing the relationship between waveform examples and switching loss. In FIG. 25 , UH represents the switching loss of the U-phase first semiconductor switching element Up. UL represents the switching loss of the U-phase second semiconductor switching element Un. VH represents the switching loss of the V-phase first semiconductor switching element Vp. VL represents the switching loss of the V-phase second semiconductor switching element Vn. WH represents the switching loss of the first semiconductor switching element Wp of the W phase. WL represents the switching loss of the W-phase second semiconductor switching element Wn.

如圖25所示,在波形例13~波形例29中,UH為0.32,VL為0.32,即在波形例13~波形例29是U相的第一半導體開關元件Up及V相的第二半導體開關元件Vn的開關損失少的波形例。也就是說,波形例13~波形例29是能保護U相的第一半導體開關元件Up及V相的第二半導體開關元件Vn的波形例。在本說明書中,有時將能保護某相(例如U相)的第一半導體開關元件(例如Up)以及另一相(例如V相)的第二半導體開關元件(例如Vn)的波形記載為UH_VL保護波形。上述波形例相當於前者的第一接通固定期間與後者的第二接通固定期間連續的情況。As shown in Fig. 25, in waveform example 13 to waveform example 29, UH is 0.32 and VL is 0.32, that is, in waveform example 13 to waveform example 29, the U-phase first semiconductor switching element Up and the V-phase second semiconductor An example of a waveform with little switching loss of the switching element Vn. That is, waveform examples 13 to 29 are waveform examples capable of protecting the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn. In this specification, the waveforms that can protect the first semiconductor switching element (such as Up) of a certain phase (such as U phase) and the second semiconductor switching element (such as Vn) of another phase (such as V phase) are described as UH_VL protection waveform. The above waveform example corresponds to the case where the former first on-fixed period and the latter second on-fixed period are continuous.

參照圖26A及圖26B對波形例13進行說明。圖26A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖26B是表示開關損失的圖。Waveform Example 13 will be described with reference to FIGS. 26A and 26B . FIG. 26A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 26B is a graph showing switching loss.

如圖26A所示,波形例13呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例13呈如下波形,即在電角度為60度~電角度為150度內,任一相的輸出固定為1。此外,波形例13呈如下波形,即在電角度為0度~電角度為60度及電角度為150度~電角度為360度內,任一相的輸出固定為0。在波形例13中,電角度為60度~電角度為150度是高側接通應用期間T3。此外,在波形例13中,電角度為0度~電角度為60度及電角度為150度~電角度為360度是低側接通應用期間T4。As shown in Figure 26A, waveform example 13 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 13 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 60 degrees to 150 degrees. In addition, waveform example 13 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 60 degrees and an electrical angle of 150 degrees to 360 degrees. In waveform example 13, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In addition, in waveform example 13, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 150 degrees to the electrical angle of 360 degrees.

在波形例13中,第一接通固定期間T1包括第一接通固定期間T1u。在波形例13中,電角度為60度~電角度為150度是第一接通固定期間T1u。In waveform example 13, the first on-fixed period T1 includes the first on-fixed period T1u. In waveform example 13, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees.

在波形例13中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例13中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例13中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例13中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 13, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 13, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 13, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 13, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例13中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例13中,第一接通固定期間T1u為120度,與此相對,沒有第一接通固定期間T1v及第一接通固定期間T1w。即,在波形例13中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖26B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 13, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 13, the first on-fixed period T1u is 120 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are absent. That is, in waveform example 13, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 26B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例13中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例13中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為120度,第二接通固定期間T2w為60度。即,在波形例13中,第二接通固定區間T2v比第二接通固定期間T2w長。因此,如圖26B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比W相小。In waveform example 13, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 13, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 120 degrees, and the second fixed ON period T2w is 60 degrees. That is, in waveform example 13, the second on-fixed period T2v is longer than the second on-fixed period T2w. Therefore, as shown in FIG. 26B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the W phase.

以上,如參照圖26A及圖26B說明的那樣,在波形例13中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例13中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 26A and 26B , in the waveform example 13, similarly to the waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 13, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例13中,如圖26B所示,還能同時抑制U相的第二半導體開關元件Un和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 13, as shown in FIG. 26B , heat generation of the U-phase second semiconductor switching element Un and the W-phase second semiconductor switching element Wn can also be suppressed at the same time.

參照圖27A及圖27B對波形例14進行說明。圖27A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖27B是表示開關損失的圖。Waveform example 14 will be described with reference to FIGS. 27A and 27B . FIG. 27A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 27B is a graph showing switching loss.

如圖27A所示,波形例14呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例14呈如下波形,即在電角度為60度~電角度為180度的範圍內,任一相的輸出固定為1。此外,波形例14呈如下波形,即在電角度為0度~電角度為60度及電角度為180度~電角度為360度內,任一相的輸出固定為0。在波形例14中,電角度為60度~電角度為180度是高側接通應用期間T3。此外,在波形例14中,電角度為0度~電角度為60度及電角度為180度~電角度為360度是低側接通應用期間T4。As shown in Figure 27A, waveform example 14 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 14 is a waveform in which the output of any phase is fixed at 1 within the range of an electrical angle of 60 degrees to an electrical angle of 180 degrees. In addition, waveform example 14 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 60 degrees and an electrical angle of 180 degrees to 360 degrees. In waveform example 14, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 180 degrees. In addition, in waveform example 14, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 180 degrees to the electrical angle of 360 degrees.

在波形例14中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例14中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例14中,電角度為150度~電角度為180度是第一接通固定期間T1v。In waveform example 14, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 14, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 14, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 180 degrees.

在波形例14中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例14中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例14中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例14中,電角度為180度~電角度為210度是第二接通固定期間T2w。In waveform example 14, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 14, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 14, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 14, the second on-fixed period T2w is from an electrical angle of 180 degrees to an electrical angle of 210 degrees.

在波形例14中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例14中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為30度,沒有第一接通固定期間T1w。即,在波形例14中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖27B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 14, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 14, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 30 degrees and there is no first on-fixed period T1w. That is, in waveform example 14, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 27B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例14中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例14中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為120度,第二接通固定期間T2w為30度。即,在波形例14中,第二接通固定區間T2v比第二接通固定期間T2w長。因此,如圖27B所示,V相的第二半導體開關元件Un(L(低側))的開關損失比W相小。In waveform example 14, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 14, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 120 degrees, and the second fixed ON period T2w is 30 degrees. That is, in waveform example 14, the second on-fixed period T2v is longer than the second on-fixed period T2w. Therefore, as shown in FIG. 27B , the switching loss of the second semiconductor switching element Un (L (low side)) of the V phase is smaller than that of the W phase.

以上,如參照圖27A及圖27B說明的那樣,在波形例14中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例14中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 27A and 27B , in waveform example 14, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 14, the heat generation of the first semiconductor switching element Up of the U-phase and the second semiconductor switching element Vn of the V-phase can be suppressed at the same time.

此外,在波形例14中,如圖27B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第二半導體開關元件Wn的發熱。Furthermore, in waveform example 14, as shown in FIG. 27B , heat generation of the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, and the W-phase second semiconductor switching element Wn can also be suppressed simultaneously.

參照圖28A及圖28B對波形例15進行說明。圖28A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖28B是表示開關損失的圖。Waveform Example 15 will be described with reference to FIGS. 28A and 28B . FIG. 28A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 28B is a graph showing switching loss.

如圖28A所示,波形例15呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例15呈如下波形,即在電角度為60度~電角度為210度內,任一相的輸出固定為1。此外,波形例15呈如下波形,即在電角度為0度~電角度為60度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例15中,電角度為60度~電角度為210度是高側接通應用期間T3。此外,在波形例15中,電角度為0度~電角度為60度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in Figure 28A, waveform example 15 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 15 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60 degrees to 210 degrees. In addition, waveform example 15 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 60 degrees and an electrical angle of 210 degrees to 360 degrees. In waveform example 15, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 210 degrees. In addition, in waveform example 15, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 210 degrees to the electrical angle of 360 degrees.

在波形例15中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例15中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例15中,電角度為150度~電角度為210度是第一接通固定期間T1v。In waveform example 15, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 15, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 15, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例15中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例15中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例15中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 15, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 15, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 15, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例15中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例15中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為60度,沒有第一接通固定期間T1w。即,在波形例15中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖28B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 15, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 15, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 60 degrees, and there is no first on-fixed period T1w. That is, in waveform example 15, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 28B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例15中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例15中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為120度,沒有第二接通固定期間T2w。即,在波形例15中,第二接通固定區間T2v比第二接通固定期間T2w長。因此,如圖28B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比W相小。In waveform example 15, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 15, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 120 degrees, and there is no second fixed ON period T2w. That is, in waveform example 15, the second on-fixed period T2v is longer than the second on-fixed period T2w. Therefore, as shown in FIG. 28B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the W phase.

以上,如參照圖28A及圖28B說明的那樣,在波形例15中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例15中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 28A and 28B , in waveform example 15, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 15, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例15中,如圖28B所示,還能同時抑制U相的第二半導體開關元件Un和V相的第一半導體開關元件Vp的發熱。In addition, in waveform example 15, as shown in FIG. 28B , heat generation of the U-phase second semiconductor switching element Un and the V-phase first semiconductor switching element Vp can be simultaneously suppressed.

參照圖29A及圖29B對波形例16進行說明。圖29A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖29B是表示開關損失的圖。Waveform Example 16 will be described with reference to FIGS. 29A and 29B . FIG. 29A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 29B is a graph showing switching loss.

如圖29A所示,波形例16呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例16呈如下波形,即在電角度為60度~電角度為240度內,任一相的輸出固定為1。此外,波形例16呈如下波形,即在電角度為0度~電角度為60度及電角度為240度~電角度為360度內,任一相的輸出固定為0。在波形例16中,電角度為60度~電角度為240度是高側接通應用期間T3。此外,在波形例16中,電角度為0度~電角度為60度及電角度為240度~電角度為360度是低側接通應用期間T4。As shown in Figure 29A, waveform example 16 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 16 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60 degrees to 240 degrees. In addition, waveform example 16 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 60 degrees and an electrical angle of 240 degrees to 360 degrees. In waveform example 16, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 240 degrees. In addition, in the waveform example 16, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 240 degrees to the electrical angle of 360 degrees.

在波形例16中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例16中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例16中,電角度為150度~電角度為240度是第一接通固定期間T1v。In waveform example 16, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 16, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 16, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 240 degrees.

在波形例16中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例16中,電角度為240度~電角度為330度是第二接通固定期間T2u。在波形例16中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 16, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 16, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 16, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例16中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1w不同。詳細地,在波形例16中,第一接通固定期間T1u為90度,與此相對,沒有第一接通固定期間T1w。即,在波形例16中,第一接通固定區間T1u比第一接通固定期間T1w長。另外,在波形例16中,第一接通固定期間T1u與第一接通固定期間T1v相等。因此,如圖29B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 16, in the U phase among the three phases, the first on-fixed period T1u is different from the first on-fixed period T1w. In detail, in waveform example 16, the first on-fixed period T1u is 90 degrees, but there is no first on-fixed period T1w. That is, in waveform example 16, the first on-fixed period T1u is longer than the first on-fixed period T1w. In addition, in waveform example 16, the first on-fixed period T1u is equal to the first on-fixed period T1v. Therefore, as shown in FIG. 29B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例16中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例16中,第二接通固定期間T2v為90度,與此相對,沒有第二接通固定期間T2w。即,在波形例16中,第二接通固定區間T2v比第二接通固定期間T2w長。另外,在波形例16中,第二接通固定期間T2u與第二接通固定期間T2v相等。因此,如圖29B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比W相小。In waveform example 16, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. In detail, in waveform example 16, the second on-fixed period T2v is 90 degrees, whereas there is no second on-fixed period T2w. That is, in waveform example 16, the second on-fixed period T2v is longer than the second on-fixed period T2w. In addition, in waveform example 16, the second on-fixed period T2u is equal to the second on-fixed period T2v. Therefore, as shown in FIG. 29B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the W phase.

以上,如參照圖29A及圖29B說明的那樣,在波形例16中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例16中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 29A and 29B , in the waveform example 16, similarly to the waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 16, the heat generation of the first semiconductor switching element Up of the U-phase and the second semiconductor switching element Vn of the V-phase can be suppressed at the same time.

此外,在波形例16中,如圖29B所示,還能同時抑制U相的第二半導體開關元件Un和V相的第一半導體開關元件Vp的發熱。In addition, in waveform example 16, as shown in FIG. 29B , heat generation of the U-phase second semiconductor switching element Un and the V-phase first semiconductor switching element Vp can be simultaneously suppressed.

參照圖30A及圖30B對波形例17進行說明。圖30A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖30B是表示開關損失的圖。Waveform example 17 will be described with reference to FIGS. 30A and 30B . FIG. 30A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 30B is a graph showing switching loss.

如圖30A所示,波形例17呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例17呈如下波形,即在電角度為60度~電角度為270度內,任一相的輸出固定為1。此外,波形例17呈如下波形,即在電角度為0度~電角度為60度及電角度為270度~電角度為360度內,任一相的輸出固定為0。在波形例17中,電角度為60度~電角度為270度是高側接通應用期間T3。此外,在波形例17中,電角度為0度~電角度為60度及電角度為270度~電角度為360度是低側接通應用期間T4。As shown in Figure 30A, waveform example 17 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 17 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60 degrees to 270 degrees. In addition, waveform example 17 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0° to 60° and an electrical angle of 270° to 360°. In waveform example 17, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 270 degrees. In addition, in waveform example 17, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 270 degrees to the electrical angle of 360 degrees.

在波形例17中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例17中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例17中,電角度為150度~電角度為270度是第一接通固定期間T1v。In waveform example 17, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 17, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 17, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 270 degrees.

在波形例17中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例17中,電角度為270度~電角度為330度是第二接通固定期間T2u。在波形例17中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 17, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 17, the second on-fixed period T2u is from an electrical angle of 270 degrees to an electrical angle of 330 degrees. In waveform example 17, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例17中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例17中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為120度,沒有第一接通固定期間T1w。即,在波形例17中,第一接通固定區間T1u比第一接通固定期間T1w長。因此,如圖30B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 17, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 17, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 120 degrees, and there is no first on-fixed period T1w. That is, in waveform example 17, the first on-fixed period T1u is longer than the first on-fixed period T1w. Therefore, as shown in FIG. 30B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例17中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例17中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為60度,沒有第二接通固定期間T2w。即,在波形例17中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖30B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 17, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 17, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 60 degrees, and there is no second fixed ON period T2w. That is, in waveform example 17, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 30B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖30A及圖30B說明的那樣,在波形例17中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例17中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 30A and 30B , in waveform example 17, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 17, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例17中,如圖30B所示,還能同時抑制U相的第二半導體開關元件Un和V相的第一半導體開關元件Vp的發熱。In addition, in waveform example 17, as shown in FIG. 30B , heat generation of the U-phase second semiconductor switching element Un and the V-phase first semiconductor switching element Vp can be simultaneously suppressed.

參照圖31A及圖31B對波形例18進行說明。圖31A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖31B是表示開關損失的圖。Waveform example 18 will be described with reference to FIGS. 31A and 31B . FIG. 31A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 31B is a graph showing switching loss.

如圖31A所示,波形例18呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例18呈如下波形,即在電角度為60度~電角度為300度內,任一相的輸出固定為1。此外,波形例18呈如下波形,即在電角度為0度~電角度為60度及電角度為300度~電角度為360度內,任一相的輸出固定為0。在波形例18中,電角度為60度~電角度為300度是高側接通應用期間T3。此外,在波形例18中,電角度為0度~電角度為60度及電角度為300度~電角度為360度是低側接通應用期間T4。As shown in Figure 31A, waveform example 18 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 18 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60 degrees to 300 degrees. In addition, waveform example 18 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 60 degrees and an electrical angle of 300 degrees to an electrical angle of 360 degrees. In waveform example 18, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 300 degrees. In addition, in the waveform example 18, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 300 degrees to the electrical angle of 360 degrees.

在波形例18中,第一接通固定期間T1包括第一接通固定期間T1u。在波形例18中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例18中,電角度為150度~電角度為270度是第一接通固定期間T1v。在波形例18中,電角度為270度~電角度為300度是第一接通固定期間T1w。In waveform example 18, the first on-fixed period T1 includes the first on-fixed period T1u. In waveform example 18, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 18, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 270 degrees. In waveform example 18, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 300 degrees.

在波形例18中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例18中,電角度為300度~電角度為330度是第二接通固定期間T2u。在波形例18中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 18, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 18, the second on-fixed period T2u is from an electrical angle of 300 degrees to an electrical angle of 330 degrees. In waveform example 18, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例18中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例18中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為120度,第一接通固定期間T1w為30度。即,在波形例18中,第一接通固定區間T1u比第一接通固定期間T1w長。因此,如圖31B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 18, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 18, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 120 degrees, and the first on-fixed period T1w is 30 degrees. That is, in waveform example 18, the first on-fixed period T1u is longer than the first on-fixed period T1w. Therefore, as shown in FIG. 31B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例18中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例18中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為30度,沒有第二接通固定期間T2w。即,在波形例18中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖31B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 18, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 18, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 30 degrees, and there is no second fixed ON period T2w. That is, in waveform example 18, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 31B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖31A及圖31B說明的那樣,在波形例18中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例18中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIG. 31A and FIG. 31B , in waveform example 18, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 18, the heat generation of the first semiconductor switching element Up of the U-phase and the second semiconductor switching element Vn of the V-phase can be suppressed at the same time.

此外,在波形例18中,如圖31B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第一半導體開關元件Wp的發熱。In addition, in waveform example 18, as shown in FIG. 31B , heat generation of the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, and the W-phase first semiconductor switching element Wp can be simultaneously suppressed.

參照圖32A及圖32B對波形例19進行說明。圖32A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖32B是表示開關損失的圖。Waveform example 19 will be described with reference to FIGS. 32A and 32B . FIG. 32A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 32B is a graph showing switching loss.

如圖32A所示,波形例19呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例19呈如下波形,即在電角度為60度~電角度為330度內,任一相的輸出固定為1。此外,波形例19呈如下波形,即在電角度為0度~電角度為60度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例19中,電角度為60度~電角度為330度是高側接通應用期間T3。此外,在波形例19中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in Figure 32A, waveform example 19 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 19 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60 degrees to an electrical angle of 330 degrees. In addition, waveform example 19 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0° to an electrical angle of 60° and an electrical angle of 330° to 360°. In waveform example 19, the high-side ON application period T3 is from an electrical angle of 60 degrees to an electrical angle of 330 degrees. In addition, in waveform example 19, the low-side ON application period T4 is the electrical angle of 0° to 60° and the electrical angle of 330° to 360°.

在波形例19中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例19中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例19中,電角度為150度~電角度為270度是第一接通固定期間T1v。在波形例19中,電角度為270度~電角度為330度是第一接通固定期間T1w。In waveform example 19, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 19, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 19, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 270 degrees. In waveform example 19, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例19中,第二接通固定期間T2包括第二接通固定期間T2v。在波形例19中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 19, the second on-fixed period T2 includes a second on-fixed period T2v. In waveform example 19, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例19中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例19中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為120度,第一接通固定期間T1w為60度。即,在波形例19中,第一接通固定區間T1u比第一接通固定期間T1w長。因此,如圖32B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 19, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 19, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 120 degrees, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 19, the first on-fixed period T1u is longer than the first on-fixed period T1w. Therefore, as shown in FIG. 32B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例19中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例19中,第二接通固定期間T2v為90度,與此相對,沒有第二接通固定期間T2u及第二接通固定期間T2w。即,在波形例19中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖32B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 19, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 19, the second on-fixed period T2v is 90 degrees, whereas the second on-fixed period T2u and the second on-fixed period T2w are absent. That is, in waveform example 19, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 32B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖32A及圖32B說明的那樣,在波形例19中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例19中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 32A and 32B , in waveform example 19, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 19, the heat generation of the first semiconductor switching element Up of the U-phase and the second semiconductor switching element Vn of the V-phase can be suppressed at the same time.

此外,在波形例19中,如圖32B所示,還能同時抑制V相的第一半導體開關元件Vp和W相的第一半導體開關元件Wp的發熱。In addition, in waveform example 19, as shown in FIG. 32B , heat generation of the V-phase first semiconductor switching element Vp and the W-phase first semiconductor switching element Wp can also be suppressed at the same time.

參照圖33A及圖33B對波形例20進行說明。圖33A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖33B是表示開關損失的圖。Waveform example 20 will be described with reference to FIGS. 33A and 33B . FIG. 33A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 33B is a graph showing switching loss.

如圖33A所示,波形例20呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例20呈如下波形,即在電角度為60度~電角度為150度及電角度為300度~電角度為330度內,任一相的輸出固定為1。此外,波形例20呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為300度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例20中,電角度為60度~電角度為150度及電角度為300度~電角度為330度是高側接通應用期間T3。此外,在波形例20中,電角度為0度~電角度為60度、電角度為150度~電角度為300度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in FIG. 33A, waveform example 20 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0. . In detail, waveform example 20 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60° to 150° and an electrical angle of 300° to 330°. In addition, the waveform example 20 is a waveform as follows, that is, within an electrical angle of 0 degrees to an electrical angle of 60 degrees, an electrical angle of 150 degrees to an electrical angle of 300 degrees, and an electrical angle of 330 degrees to an electrical angle of 360 degrees, any The phase output is fixed at 0. In waveform example 20, the high-side ON application period T3 is an electrical angle of 60° to an electrical angle of 150° and an electrical angle of 300° to an electrical angle of 330°. In addition, in waveform example 20, the electrical angle of 0 degrees to 60 degrees, the electrical angle of 150 degrees to 300 degrees, and the electrical angle of 330 degrees to 360 degrees are low-side ON application periods. T4.

在波形例20中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1w。在波形例20中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例20中,電角度為300度~電角度為330度是第一接通固定期間T1w。In waveform example 20, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1w. In waveform example 20, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 20, the first on-fixed period T1w is from an electrical angle of 300 degrees to an electrical angle of 330 degrees.

在波形例20中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例20中,電角度為210度~電角度為300度是第二接通固定期間T2u。在波形例20中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例20中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 20, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 20, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 300 degrees. In the waveform example 20, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 20, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例20中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例20中,第一接通固定期間T1u為90度,與此相對,沒有第一接通固定期間T1v,第一接通固定期間T1w為30度。即,在波形例20中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖33B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 20, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 20, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is absent and the first on-fixed period T1w is 30 degrees. That is, in waveform example 20, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 33B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例20中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例20中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為90度,第二接通固定期間T2w為60度。即,在波形例20中,第二接通固定區間T2v比第二接通固定期間T2w長。因此,如圖33B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比W相小。In waveform example 20, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 20, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 90 degrees, and the second fixed ON period T2w is 60 degrees. That is, in waveform example 20, the second on-fixed period T2v is longer than the second on-fixed period T2w. Therefore, as shown in FIG. 33B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the W phase.

以上,如參照圖33A及圖33B說明的那樣,在波形例20中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例20中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 33A and 33B , in waveform example 20, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 20, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例20中,如圖33B所示,還能同時抑制U相的第二半導體開關元件Un、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 20, as shown in FIG. 33B , heat generation of the U-phase second semiconductor switching element Un, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can also be suppressed simultaneously.

參照圖34A及圖34B對波形例21進行說明。圖34A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖34B是表示開關損失的圖。Waveform example 21 will be described with reference to FIGS. 34A and 34B . FIG. 34A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 34B is a graph showing switching loss.

如圖34A所示,波形例21呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例21呈如下波形,即在電角度為60度~電角度為150度及電角度為270度~電角度為330度內,任一相的輸出固定為1。此外,波形例21呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為270度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例21中,電角度為60度~電角度為150度及電角度為270度~電角度為330度是高側接通應用期間T3。此外,在波形例21中,電角度為0度~電角度為60度、電角度為150度~電角度為270度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in Fig. 34A, waveform example 21 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 21 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60 degrees to 150 degrees and an electrical angle of 270 degrees to 330 degrees. In addition, Waveform Example 21 is a waveform in which any of the electrical angles from 0° to 60° in electrical angle, 150° in electrical angle to 270° in electrical angle, and 330° in electrical angle to 360° in electrical angle The phase output is fixed at 0. In waveform example 21, the high-side ON application period T3 is an electrical angle of 60 degrees to an electrical angle of 150 degrees and an electrical angle of 270 degrees to an electrical angle of 330 degrees. In addition, in waveform example 21, the electrical angle of 0° to 60°, the electrical angle of 150° to 270°, and the electrical angle of 330° to 360° are low-side ON application periods. T4.

在波形例21中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1w。在波形例21中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例21中,電角度為270度~電角度為330度是第一接通固定期間T1w。In waveform example 21, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1w. In waveform example 21, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 21, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例21中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例21中,電角度為210度~電角度為270度是第二接通固定期間T2u。在波形例21中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例21中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 21, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 21, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 270 degrees. In waveform example 21, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 21, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例21中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例21中,第一接通固定期間T1u為90度,與此相對,沒有第一接通固定期間T1v,第一接通固定期間T1w為60度。即,在波形例21中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖34B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 21, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 21, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is absent and the first on-fixed period T1w is 60 degrees. That is, in waveform example 21, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 34B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例21中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例21中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為60度,第二接通固定期間T2w為60度。即,在波形例21中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖34B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 21, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 21, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 60 degrees, and the second fixed ON period T2w is 60 degrees. That is, in waveform example 21, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 34B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖34A及圖34B說明的那樣,在波形例21中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例21中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 34A and 34B , in waveform example 21, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 21, heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例21中,如圖34B所示,還能同時抑制U相的第二半導體開關元件Un、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 21, as shown in FIG. 34B , heat generation of the U-phase second semiconductor switching element Un, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can also be suppressed simultaneously.

參照圖35A及圖35B對波形例22進行說明。圖35A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖35B是表示開關損失的圖。Waveform example 22 will be described with reference to FIGS. 35A and 35B . FIG. 35A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 35B is a graph showing switching loss.

如圖35A所示,波形例22呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例22呈如下波形,即在電角度為60度~電角度為150度及電角度為240度~電角度為330度內,任一相的輸出固定為1。此外,波形例22呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為240度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例22中,電角度為60度~電角度為150度及電角度為240度~電角度為330度是高側接通應用期間T3。此外,在波形例22中,電角度為0度~電角度為60度、電角度為150度~電角度為240度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in FIG. 35A, waveform example 22 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 22 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60° to 150° and an electrical angle of 240° to 330°. In addition, waveform example 22 is a waveform such that any electrical angle is within an electrical angle of 0 degrees to an electrical angle of 60 degrees, an electrical angle of 150 degrees to an electrical angle of 240 degrees, and an electrical angle of 330 degrees to an electrical angle of 360 degrees. The phase output is fixed at 0. In waveform example 22, the high-side ON application period T3 is an electrical angle of 60 degrees to an electrical angle of 150 degrees and an electrical angle of 240 degrees to an electrical angle of 330 degrees. In addition, in waveform example 22, the electrical angle of 0° to 60°, the electrical angle of 150° to 240°, and the electrical angle of 330° to 360° are low-side ON application periods. T4.

在波形例22中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例22中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例22中,電角度為240度~電角度為270度是第一接通固定期間T1v。在波形例22中,電角度為270度~電角度為330度是第一接通固定期間T1w。In waveform example 22, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 22, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 22, an electrical angle of 240° to an electrical angle of 270° is the first on-fixed period T1v. In waveform example 22, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例22中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例22中,電角度為210度~電角度為240度是第二接通固定期間T2u。在波形例22中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例22中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 22, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 22, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 240 degrees. In the waveform example 22, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 22, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例22中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例22中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為30度,第一接通固定期間T1w為60度。即,在波形例22中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖35B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 22, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 22, the first on-fixed period T1u is 90 degrees, while the first on-fixed period T1v is 30 degrees, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 22, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 35B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例22中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例22中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為30度,第二接通固定期間T2w為60度。即,在波形例22中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖35B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 22, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 22, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 30 degrees, and the second fixed ON period T2w is 60 degrees. That is, in waveform example 22, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 35B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖35A及圖35B說明的那樣,在波形例22中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例22中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 35A and 35B , in waveform example 22, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 22, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例22中,如圖35B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 22, as shown in FIG. 35B , the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖36A及圖36B對波形例23進行說明。圖36A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖36B是表示開關損失的圖。Waveform example 23 will be described with reference to FIGS. 36A and 36B . FIG. 36A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 36B is a graph showing switching loss.

如圖36A所示,波形例23呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例23呈如下波形,即在電角度為60度~電角度為150度及電角度為210度~電角度為330度內,任一相的輸出固定為1。此外,波形例23呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例23中,電角度為60度~電角度為150度及電角度為210度~電角度為330度是高側接通應用期間T3。此外,在波形例23中,電角度為0度~電角度為60度、電角度為150度~電角度為210度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in Figure 36A, waveform example 23 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 23 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 60° to 150° and an electrical angle of 210° to 330°. In addition, waveform example 23 is a waveform such that any electrical angle is within the electrical angle of 0° to 60°, the electrical angle of 150° to 210°, and the electrical angle of 330° to 360°. The phase output is fixed at 0. In waveform example 23, the high-side ON application period T3 is an electrical angle of 60 degrees to an electrical angle of 150 degrees and an electrical angle of 210 degrees to an electrical angle of 330 degrees. In addition, in waveform example 23, the electrical angle of 0° to 60°, the electrical angle of 150° to 210°, and the electrical angle of 330° to 360° are low-side ON application periods. T4.

在波形例23中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例23中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例23中,電角度為210度~電角度為270度是第一接通固定期間T1v。在波形例23中,電角度為270度~電角度為330度是第一接通固定期間T1u。In waveform example 23, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 23, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 23, an electrical angle of 210 degrees to an electrical angle of 270 degrees is the first on-fixed period T1v. In waveform example 23, the first on-fixed period T1u is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例23中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例23中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例23中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 23, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 23, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 23, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例23中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例23中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為60度。即,在波形例23中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖36B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 23, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 23, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 60 degrees. That is, in waveform example 23, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 36B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例23中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例23中,第二接通固定期間T2v為90度,與此相對,沒有第二接通固定期間T2u,第二接通固定期間T2w為60度。即,在波形例23中,第二接通固定區間T2v比第二接通固定期間T2w長。因此,如圖36B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 23, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 23, the second on-fixed period T2v is 90 degrees, whereas the second on-fixed period T2u is absent, and the second on-fixed period T2w is 60 degrees. That is, in waveform example 23, the second on-fixed period T2v is longer than the second on-fixed period T2w. Therefore, as shown in FIG. 36B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖36A及圖36B說明的那樣,在波形例23中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例23中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 36A and 36B , in waveform example 23, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 23, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例23中,如圖36B所示,還能同時抑制V相的第一半導體開關元件Vp、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 23, as shown in FIG. 36B , heat generation of the V-phase first semiconductor switching element Vp, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖37A及圖37B對波形例24進行說明。圖37A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖37B是表示開關損失的圖。Waveform example 24 will be described with reference to FIGS. 37A and 37B . FIG. 37A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 37B is a graph showing switching loss.

如圖37A所示,波形例24呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例24呈如下波形,即在電角度為60度~電角度為150度及電角度為180度~電角度為330度內,任一相的輸出固定為1。此外,波形例24呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為180度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例24中,電角度為60度~電角度為150度及電角度為180度~電角度為330度是高側接通應用期間T3。此外,在波形例24中,電角度為0度~電角度為60度、電角度為150度~電角度為180度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in FIG. 37A, waveform example 24 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 24 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 60° to 150° and an electrical angle of 180° to 330°. In addition, the waveform example 24 is a waveform such that any electrical angle is within an electrical angle of 0° to 60°, an electrical angle of 150° to 180°, and an electrical angle of 330° to 360°. The phase output is fixed at 0. In waveform example 24, the high-side ON application period T3 is the electrical angle of 60 degrees to the electrical angle of 150 degrees and the electrical angle of 180 degrees to the electrical angle of 330 degrees. In addition, in waveform example 24, the electrical angle of 0 degrees to 60 degrees, the electrical angle of 150 degrees to 180 degrees, and the electrical angle of 330 degrees to 360 degrees are low-side ON application periods. T4.

在波形例24中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例24中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例24中,電角度為180度~電角度為270度是第一接通固定期間T1v。在波形例24中,電角度為270度~電角度為330度是第一接通固定期間T1w。In waveform example 24, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 24, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 24, the electrical angle of 180° to 270° is the first on-fixed period T1v. In waveform example 24, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例24中,第二接通固定期間T2包括第二接通固定期間T2v和第二接通固定期間T2w。在波形例24中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例24中,電角度為150度~電角度為180度是第二接通固定期間T2w。In waveform example 24, the second on-fixed period T2 includes a second on-fixed period T2v and a second on-fixed period T2w. In the waveform example 24, the electrical angle of 0 degrees to the electrical angle of 60 degrees and the electrical angle of 330 degrees to the electrical angle of 360 degrees are the second on-fixed period T2v. In the waveform example 24, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 180 degrees.

在波形例24中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1w不同。詳細地,在波形例24中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1w為60度。即,在波形例24中,第一接通固定區間T1u比第一接通固定期間T1w長。另外,第一接通固定期間T1u與第一接通固定期間T1v相同。因此,如圖37B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 24, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1w. Specifically, in waveform example 24, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1w is 60 degrees. That is, in waveform example 24, the first on-fixed period T1u is longer than the first on-fixed period T1w. In addition, the first on-fixed period T1u is the same as the first on-fixed period T1v. Therefore, as shown in FIG. 37B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例24中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例24中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2w是30度。即,在波形例24中,第二接通固定區間T2v比第二接通固定期間T2w長。因此,如圖37B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比W相小。In waveform example 24, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 24, the second on-fixed period T2v is 90 degrees, whereas the second on-fixed period T2w is 30 degrees. That is, in waveform example 24, the second on-fixed period T2v is longer than the second on-fixed period T2w. Therefore, as shown in FIG. 37B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the W phase.

以上,如參照圖37A及圖37B說明的那樣,在波形例24中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例24中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 37A and 37B , in waveform example 24, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 24, heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例24中,如圖37B所示,還能同時抑制V相的第一半導體開關元件Vp、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 24, as shown in FIG. 37B , heat generation of the V-phase first semiconductor switching element Vp, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖38A及圖38B對波形例25進行說明。圖38A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖38B是表示開關損失的圖。Waveform Example 25 will be described with reference to FIGS. 38A and 38B . FIG. 38A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 38B is a graph showing switching loss.

如圖38A所示,波形例25呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例25呈如下波形,即在電角度為60度~電角度為150度、電角度為210度~電角度為240度及電角度為270度~電角度為330度內,任一相的輸出固定為1。此外,波形例25呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為210度、電角度為240度~電角度為270度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例25中,電角度為60度~電角度為150度、電角度為210度~電角度為240度及電角度為270度~電角度為330度是高側接通應用期間T3。此外,在波形例25中,電角度為0度~電角度為60度、電角度為150度~電角度為210度、電角度為240度~電角度為270度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in Figure 38A, waveform example 25 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 25 has the following waveforms, that is, within the electrical angle of 60 degrees to 150 degrees, the electrical angle of 210 degrees to 240 degrees, and the electrical angle of 270 degrees to 330 degrees, any The output of one phase is fixed at 1. In addition, the waveform example 25 is a waveform such that the electrical angle is 0° to 60°, the electrical angle is 150° to 210°, the electrical angle is 240° to 270°, and the electrical angle is 270°. The output of any phase is fixed at 0 within the electrical angle of 330 degrees to 360 degrees. In waveform example 25, the high-side ON application period T3 is the electrical angle from 60° to 150°, the electrical angle from 210° to 240°, and the electrical angle from 270° to 330°. In addition, in waveform example 25, the electrical angle ranges from 0° to 60°, the electrical angle ranges from 150° to 210°, the electrical angle ranges from 240° to 270°, and the electrical angle ranges from 330° to An electrical angle of 360 degrees is the low side on application period T4.

在波形例25中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例25中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例25中,電角度為210度~電角度為240度是第一接通固定期間T1v。在波形例25中,電角度為270度~電角度為330度是第一接通固定期間T1w。In waveform example 25, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 25, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 25, the electrical angle of 210° to 240° is the first on-fixed period T1v. In waveform example 25, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例25中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例25中,電角度為240度~電角度為270度是第二接通固定期間T2u。在波形例25中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例25中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 25, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 25, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 270 degrees. In waveform example 25, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 25, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例25中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例25中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為30度,第一接通固定期間T1w為60度。即,在波形例25中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖38B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 25, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 25, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 30 degrees, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 25, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 38B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例25中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例25中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為30度,第二接通固定期間T2w為60度。即,在波形例25中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖38B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 25, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 25, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 30 degrees, and the second fixed ON period T2w is 60 degrees. That is, in waveform example 25, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 38B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖38A及圖38B說明的那樣,在波形例25中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例25中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 38A and 38B , in waveform example 25, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 25, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例25中,如圖38B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 25, as shown in FIG. 38B , the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖39A及圖39B對波形例26進行說明。圖39A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖39B是表示開關損失的圖。Waveform example 26 will be described with reference to FIGS. 39A and 39B . FIG. 39A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 39B is a graph showing switching loss.

如圖39A所示,波形例26呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例26呈如下波形,即在電角度為60度~電角度為150度、電角度為195度~電角度為240度及電角度為285度~電角度為330度內,任一相的輸出固定為1。此外,波形例26呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為195度、電角度為240度~電角度為285度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例26中,電角度為60度~電角度為150度、電角度為195度~電角度為240度及電角度為285度~電角度為330度是高側接通應用期間T3。此外,在波形例26中,電角度為0度~電角度為60度、電角度為150度~電角度為195度、電角度為240度~電角度為285度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in FIG. 39A, waveform example 26 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, the waveform example 26 has the following waveforms, that is, within the electrical angle of 60 degrees to 150 degrees, the electrical angle of 195 degrees to 240 degrees, and the electrical angle of 285 degrees to 330 degrees, any The output of one phase is fixed at 1. In addition, waveform example 26 is a waveform such that the electrical angle is 0° to 60°, the electrical angle is 150° to 195°, the electrical angle is 240° to 285°, and the electrical angle is 285°. The output of any phase is fixed at 0 within the electrical angle of 330 degrees to 360 degrees. In waveform example 26, the high-side ON application period T3 is the electrical angle of 60° to 150°, the electrical angle of 195° to 240°, and the electrical angle of 285° to 330°. In addition, in waveform example 26, the electrical angle ranges from 0° to 60°, the electrical angle ranges from 150° to 195°, the electrical angle ranges from 240° to 285°, and the electrical angle ranges from 330° to An electrical angle of 360 degrees is the low side on application period T4.

在波形例26中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例26中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例26中,電角度為195度~電角度為240度是第一接通固定期間T1v。在波形例26中,電角度為285度~電角度為330度是第一接通固定期間T1w。In waveform example 26, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 26, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 26, the first on-fixed period T1v is from an electrical angle of 195 degrees to an electrical angle of 240 degrees. In waveform example 26, the first on-fixed period T1w is from an electrical angle of 285 degrees to an electrical angle of 330 degrees.

在波形例26中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例26中,電角度為240度~電角度為285度是第二接通固定期間T2u。在波形例26中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例26中,電角度為150度~電角度為195度是第二接通固定期間T2w。In waveform example 26, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 26, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 285 degrees. In waveform example 26, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 26, the electrical angle of 150° to 195° is the second on-fixed period T2w.

在波形例26中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例26中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為45度。即,在波形例26中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖39B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 26, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 26, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 45 degrees. That is, in waveform example 26, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 39B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例26中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例26中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u及第二接通固定期間T2w為45度。即,在波形例26中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖39B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 26, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 26, the second on-fixed period T2v is 90 degrees, whereas the second on-fixed period T2u and the second on-fixed period T2w are 45 degrees. That is, in waveform example 26, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 39B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖39A及圖39B說明的那樣,在波形例26中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例26中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 39A and 39B , in waveform example 26, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 26, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例26中,如圖39B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 26, as shown in FIG. 39B, the second semiconductor switching element Un of the U phase, the first semiconductor switching element Vp of the V phase, the first semiconductor switching element Wp of the W phase, and the W phase The heat generation of the second semiconductor switching element Wn.

參照圖40A及圖40B對波形例27進行說明。圖40A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖40B是表示開關損失的圖。Waveform example 27 will be described with reference to FIGS. 40A and 40B . FIG. 40A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 40B is a graph showing switching loss.

如圖40A所示,波形例27呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例27呈如下波形,即在電角度為60度~電角度為150度、電角度為180度~電角度為240度及電角度為300度~電角度為330度內,任一相的輸出固定為1。此外,波形例27呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為180度、電角度為240度~電角度為300度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例27中,電角度為60度~電角度為150度、電角度為180度~電角度為240度及電角度為300度~電角度為330度是高側接通應用期間T3。此外,在波形例27中,電角度為0度~電角度為60度、電角度為150度~電角度為180度、電角度為240度~電角度為300度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in Figure 40A, waveform example 27 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 27 has the following waveforms, that is, within the electrical angle of 60 degrees to 150 degrees, the electrical angle of 180 degrees to 240 degrees, and the electrical angle of 300 degrees to 330 degrees, any The output of one phase is fixed at 1. In addition, the waveform example 27 has the following waveforms, that is, when the electrical angle is 0 degrees to 60 degrees, the electrical angle is 150 degrees to 180 degrees, the electrical angle is 240 degrees to 300 degrees, and the electrical angle is The output of any phase is fixed at 0 within the electrical angle of 330 degrees to 360 degrees. In waveform example 27, the high-side ON application period T3 is the electrical angle of 60° to 150°, the electrical angle of 180° to 240°, and the electrical angle of 300° to 330°. In addition, in waveform example 27, the electrical angle is 0 to 60 degrees, the electrical angle is 150 to 180 degrees, the electrical angle is 240 to 300 degrees, and the electrical angle is 330 to 330 degrees. An electrical angle of 360 degrees is the low side on application period T4.

在波形例27中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例27中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例27中,電角度為180度~電角度為240度是第一接通固定期間T1v。在波形例27中,電角度為300度~電角度為330度是第一接通固定期間T1w。In waveform example 27, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 27, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 27, the first on-fixed period T1v is from an electrical angle of 180 degrees to an electrical angle of 240 degrees. In waveform example 27, an electrical angle of 300 degrees to an electrical angle of 330 degrees is the first on-fixed period T1w.

在波形例27中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例27中,電角度為240度~電角度為300度是第二接通固定期間T2u。在波形例27中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例27中,電角度為150度~電角度為180度是第二接通固定期間T2w。In waveform example 27, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 27, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 300 degrees. In waveform example 27, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 27, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 180 degrees.

在波形例27中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例27中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為60度,第一接通固定期間T1w為30度。即,在波形例27中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖40B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 27, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 27, the first on-fixed period T1u is 90 degrees, while the first on-fixed period T1v is 60 degrees, and the first on-fixed period T1w is 30 degrees. That is, in waveform example 27, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 40B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例27中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例27中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為60度,第二接通固定期間T2w為30度。即,在波形例27中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖40B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 27, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 27, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 60 degrees, and the second fixed ON period T2w is 30 degrees. That is, in waveform example 27, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 40B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖40A及圖40B說明的那樣,在波形例27中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例27中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 40A and 40B , in waveform example 27, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 27, the heat generation of the first semiconductor switching element Up of the U-phase and the second semiconductor switching element Vn of the V-phase can be suppressed at the same time.

此外,在波形例27中,如圖40B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 27, as shown in FIG. 40B , the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖41A及圖41B對波形例28進行說明。圖41A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖41B是表示開關損失的圖。Waveform example 28 will be described with reference to FIGS. 41A and 41B . FIG. 41A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 41B is a graph showing switching loss.

如圖41A所示,波形例28呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例28呈如下波形,即在電角度為60度~電角度為150度及電角度為210度~電角度為270度內,任一相的輸出固定為1。此外,波形例28呈如下波形,即在電角度為0度~電角度為60度、電角度為150度~電角度為210度及電角度為270度~電角度為360度內,任一相的輸出固定為0。在波形例28中,電角度為60度~電角度為150度及電角度為210度~電角度為270度是高側接通應用期間T3。此外,在波形例28中,電角度為0度~電角度為60度、電角度為150度~電角度為210度及電角度為270度~電角度為360度是低側接通應用期間T4。As shown in Figure 41A, waveform example 28 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 28 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60° to 150° and an electrical angle of 210° to 270°. In addition, the waveform example 28 is a waveform such that any electrical angle is within an electrical angle of 0° to 60°, an electrical angle of 150° to 210°, and an electrical angle of 270° to 360°. The phase output is fixed at 0. In waveform example 28, the high-side ON application period T3 is an electrical angle of 60 degrees to an electrical angle of 150 degrees and an electrical angle of 210 degrees to an electrical angle of 270 degrees. In addition, in waveform example 28, the electrical angle of 0 degrees to 60 degrees, the electrical angle of 150 degrees to 210 degrees, and the electrical angle of 270 degrees to 360 degrees are low-side ON application periods. T4.

在波形例28中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例28中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例28中,電角度為210度~電角度為270度是第一接通固定期間T1v。In waveform example 28, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 28, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 28, the first on-fixed period T1v is from an electrical angle of 210 degrees to an electrical angle of 270 degrees.

在波形例28中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例28中,電角度為270度~電角度為330度是第二接通固定期間T2u。在波形例28中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例28中,電角度為150度~電角度為210度是第二接通固定期間T2w。In waveform example 28, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 28, the second on-fixed period T2u is from an electrical angle of 270 degrees to an electrical angle of 330 degrees. In waveform example 28, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 28, the second on-fixed period T2w is from an electrical angle of 150 degrees to an electrical angle of 210 degrees.

在波形例28中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例28中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為60度,沒有第一接通固定期間T1w。即,在波形例28中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖41B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 28, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 28, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 60 degrees, and there is no first on-fixed period T1w. That is, in waveform example 28, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 41B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例28中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例28中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u及第二接通固定期間T2w為60度。即,在波形例28中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖41B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 28, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 28, the second on-fixed period T2v is 90 degrees, whereas the second on-fixed period T2u and the second on-fixed period T2w are 60 degrees. That is, in waveform example 28, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 41B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖41A及圖41B說明的那樣,在波形例28中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例28中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 41A and 41B , in waveform example 28, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 28, heat generation of the first semiconductor switching element Up of the U-phase and the second semiconductor switching element Vn of the V-phase can be suppressed at the same time.

此外,在波形例28中,如圖41B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 28, as shown in FIG. 41B , heat generation of the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖42A及圖42B對波形例29進行說明。圖42A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖42B是表示開關損失的圖。Waveform example 29 will be described with reference to FIGS. 42A and 42B . FIG. 42A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 42B is a graph showing switching loss.

如圖42A所示,波形例29呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例29呈如下波形,即在電角度為60度~電角度為210度及電角度為270度~電角度為330度內,任一相的輸出固定為1。此外,波形例29呈如下波形,即在電角度為0度~電角度為60度、電角度為210度~電角度為270度及電角度為330度~電角度為360度內,任一相的輸出固定為0。在波形例29中,電角度為60度~電角度為210度及電角度為270度~電角度為330度是高側接通應用期間T3。此外,在波形例29中,電角度為0度~電角度為60度、電角度為210度~電角度為270度及電角度為330度~電角度為360度是低側接通應用期間T4。As shown in FIG. 42A, waveform example 29 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 29 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60° to 210° and an electrical angle of 270° to 330°. In addition, waveform example 29 is a waveform in which any of the electrical angles from 0° to 60°, from 210° to 270°, and from 330° to 360° are The phase output is fixed at 0. In waveform example 29, the high-side-on application period T3 is an electrical angle of 60 degrees to an electrical angle of 210 degrees and an electrical angle of 270 degrees to an electrical angle of 330 degrees. In addition, in waveform example 29, the electrical angle of 0 degrees to 60 degrees, the electrical angle of 210 degrees to 270 degrees, and the electrical angle of 330 degrees to 360 degrees are low-side ON application periods. T4.

在波形例29中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例29中,電角度為60度~電角度為150度是第一接通固定期間T1u。在波形例29中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例29中,電角度為270度~電角度為330度是第一接通固定期間T1w。In waveform example 29, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 29, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 150 degrees. In waveform example 29, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In waveform example 29, the first on-fixed period T1w is from an electrical angle of 270 degrees to an electrical angle of 330 degrees.

在波形例29中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例29中,電角度為210度~電角度為270度是第二接通固定期間T2u。在波形例29中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。In waveform example 29, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 29, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 270 degrees. In waveform example 29, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例29中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例29中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為60度。即,在波形例29中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖42B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 29, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 29, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 60 degrees. That is, in waveform example 29, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 42B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例29中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例29中,第二接通固定期間T2v為90度,與此相對,第二接通固定期間T2u為60度,沒有第二接通固定期間T2w。即,在波形例29中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖42B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相及W相小。In waveform example 29, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 29, the second fixed ON period T2v is 90 degrees, whereas the second fixed ON period T2u is 60 degrees, and there is no second fixed ON period T2w. That is, in waveform example 29, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 42B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖42A及圖42B說明的那樣,在波形例29中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例29中,能同時抑制U相的第一半導體開關元件Up和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 42A and 42B , in waveform example 29, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 29, the heat generation of the U-phase first semiconductor switching element Up and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例29中,如圖42B所示,還能同時抑制U相的第二半導體開關元件Un、V相的第一半導體開關元件Vp、W相的第一半導體開關元件Wp的發熱。In addition, in waveform example 29, as shown in FIG. 42B , heat generation of the U-phase second semiconductor switching element Un, the V-phase first semiconductor switching element Vp, and the W-phase first semiconductor switching element Wp can be simultaneously suppressed.

以上,在參照圖3A、圖3B、圖5A~圖15B及圖26A~圖42B說明的波形例1~波形例29中,第一接通固定期間比其他相的第一接通固定期間長的相的第一接通固定期間及第二接通固定期間比其他相的第二接通固定期間長的相的第二接通固定期間均比π/n長且是2π/n以下。優選是1.5π/n~2π/n。由此,能高效地抑制發熱。另外,下限也可以略微偏離π/n。此外,上限也可以略微偏離2π/n。例如,在波形例1中,第一接通固定期間T1u是2π/n(=120度),第二接通固定期間T2u是2π/n(=120度)。也就是說,在波形例1~波形例29中,第一接通固定期間比其他相的第一接通固定期間長的相的第一接通固定期間及第二接通固定期間比其他相的第二接通固定期間長的相的第二接通固定期間均是2π/n。此外,第一接通固定期間比其他相的第一接通固定期間長的相的第一接通固定期間和第二接通固定期間比其他相的第二接通固定期間長的相的第二接通固定期間相互不連續。因此,在因冷卻水路的問題等使特定相的溫度變成問題的情況下,能抑制該相的發熱,因此,逆變器的可靠性得到提高。或者,在發生急停且電流連續地流過某相的第一半導體開關元件和另一相的第二半導體開關元件而使溫度上升的情況下,通過在退出急停並開始動作時進行上述動作,能抑制急停下溫度上升後的半導體開關元件的發熱,從而能使溫度迅速地下降,因此,逆變器的可靠性得到提高。As mentioned above, in the waveform example 1 to the waveform example 29 described with reference to FIGS. The first on-fixed period and the second on-fixed period of a phase are longer than the second on-fixed periods of other phases, and the second on-fixed period is longer than π/n and 2π/n or less. Preferably, it is 1.5π/n to 2π/n. Accordingly, heat generation can be efficiently suppressed. In addition, the lower limit may deviate slightly from π/n. In addition, the upper limit may deviate slightly from 2π/n. For example, in waveform example 1, the first on-fixed period T1u is 2π/n (=120 degrees), and the second on-fixed period T2u is 2π/n (=120 degrees). That is, in waveform example 1 to waveform example 29, the first fixed on period and the second fixed on period of the phase whose first fixed on period is longer than the first fixed period of other phases are longer than those of other phases. The second on-fixed periods of the phases whose second on-fixed periods are longer are all 2π/n. In addition, the first on-fixed period of the phase whose first on-fixed period is longer than the first on-fixed period of the other phases and the second on-fixed period of the phase are longer than the second on-fixed period of the other phases. The two connected fixed periods are mutually discontinuous. Therefore, when the temperature of a specific phase becomes a problem due to a problem of the cooling water channel or the like, the heat generation of the phase can be suppressed, thereby improving the reliability of the inverter. Alternatively, when an emergency stop occurs and the current continuously flows through the first semiconductor switching element of a certain phase and the second semiconductor switching element of another phase to increase the temperature, by performing the above operation when the emergency stop is exited and the operation is started , can suppress the heat generation of the semiconductor switching element after the sudden stop temperature rise, so that the temperature can be dropped rapidly, so the reliability of the inverter is improved.

在參照圖26A~圖42B說明的波形例13~波形例29中,在n相中的兩相中,一相的第一接通固定期間與另一相的第二接通固定期間相互連續。例如,在波形例13中,在三相中的U相及V相中,U相的第一接通固定期間T1u與V相的第二接通固定期間T2v相互連續。一相的第一接通固定期間和另一相的第二接通固定期間的總計是3π/n。例如,在波形例13中,U相的第一接通固定期間T1u為90度,V相的第二接通固定期間T2v為90度,因此,第一接通固定期間T1u和V相的第二接通固定期間T2v的總計是180度(3π/n)。另外,總計也可以略微偏離3π/n。此外,一相的第一接通固定期間及另一相的第二接通固定期間分別為3π/(2n)。例如,在波形例13中,U相的第一接通固定期間T1u及V相的第二接通固定期間T2v為90度(3π/(2n))。因此,在波形例13~波形例29中,在發生急停且電流連續地流過某相的第一半導體開關元件和另一相的第二半導體開關元件而使溫度上升的情況下,通過在退出急停並開始動作時進行上述動作,能抑制急停下溫度上升後的半導體開關元件的發熱,從而能使溫度迅速地下降,因此,逆變器的可靠性得到提高。In waveform example 13 to waveform example 29 described with reference to FIGS. 26A to 42B , among the n phases, the first on-fixed period of one phase and the second on-fixed period of the other phase are continuous with each other. For example, in waveform example 13, in the U-phase and V-phase among the three phases, the first on-fixed period T1u of the U-phase and the second on-fixed period T2v of the V-phase are continuous with each other. The total of the first on-fixed period of one phase and the second on-fixed period of the other phase is 3π/n. For example, in waveform example 13, the first on-fixed period T1u of U-phase is 90 degrees, and the second on-fixed period T2v of V-phase is 90 degrees. Therefore, the first on-fixed period T1u and the second on-fixed period of V-phase The total of T2v during the two ON fixations is 180 degrees (3π/n). In addition, the sum may deviate slightly from 3π/n. In addition, the first on-fixed period of one phase and the second on-fixed period of the other phase are respectively 3π/(2n). For example, in waveform example 13, the U-phase first on-fixed period T1u and the V-phase second on-fixed period T2v are 90 degrees (3π/(2n)). Therefore, in waveform example 13 to waveform example 29, when an emergency stop occurs and current continuously flows through the first semiconductor switching element of a certain phase and the second semiconductor switching element of another phase to increase the temperature, by Performing the above operation when exiting the emergency stop and starting the operation can suppress the heat generation of the semiconductor switching element after the emergency stop temperature rises, so that the temperature can be dropped rapidly, so the reliability of the inverter is improved.

參照圖43對使U相的固定期間及V相的固定期間變化的情況下的開關損失進行說明。圖43是表示開關損失的圖。The switching loss when the U-phase fixed period and the V-phase fixed period are changed will be described with reference to FIG. 43 . Fig. 43 is a graph showing switching loss.

如圖43所示,在電角度為0度~電角度為60度及電角度為330度~電角度為360度內應用第二接通固定期間,電角度為60度~電角度為150度內應用第一接通固定期間的情況下,第一半導體開關元件Up(UH)的開關損失為0.32。此外,第二半導體開關元件Vn(VL)的開關損失為0.32。此時,高側的固定期間為90度。As shown in Figure 43, the second on-fix period is applied within the electrical angle of 0 degrees to 60 degrees and the electrical angle of 330 degrees to 360 degrees, and the electrical angle is 60 degrees to 150 degrees. When the first constant ON period is applied, the switching loss of the first semiconductor switching element Up (UH) is 0.32. In addition, the switching loss of the second semiconductor switching element Vn(VL) was 0.32. At this time, the fixed period of the high side is 90 degrees.

在電角度為0度~電角度為70度及電角度為330度~電角度為360度內應用第二接通固定期間,電角度為70度~電角度為150度內應用第一接通固定期間的情況下,第一半導體開關元件Up(UH)的開關損失為0.39。此外,第二半導體開關元件Vn(VL)的開關損失為0.25。此時,高側的固定期間為80度。When the electrical angle is 0 degrees to 70 degrees and the electrical angle is 330 degrees to 360 degrees, the second connection is applied during the fixed period, and the electrical angle is 70 degrees to 150 degrees. The first connection is applied In the case of a fixed period, the switching loss of the first semiconductor switching element Up (UH) is 0.39. In addition, the switching loss of the second semiconductor switching element Vn(VL) is 0.25. At this time, the fixed period of the high side is 80 degrees.

在電角度為0度~電角度為80度及電角度為330度~電角度為360度內應用第二接通固定期間,電角度為80度~電角度為150度內應用第一接通固定期間的情況下,第一半導體開關元件Up(UH)的開關損失為0.47。此外,第二半導體開關元件Vn(VL)的開關損失為0.18。此時,高側的固定期間為70度。When the electrical angle is 0 degrees to 80 degrees and the electrical angle is 330 degrees to 360 degrees, the second connection is applied during the fixed period, and the electrical angle is 80 degrees to 150 degrees. The first connection is applied In the case of a fixed period, the switching loss of the first semiconductor switching element Up (UH) is 0.47. In addition, the switching loss of the second semiconductor switching element Vn(VL) is 0.18. At this time, the fixed period of the high side is 70 degrees.

在電角度為0度~電角度為90度及電角度為330度~電角度為360度內應用第二接通固定期間,電角度為90度~電角度為150度內應用第一接通固定期間的情況下,第一半導體開關元件Up(UH)的開關損失為0.56。此外,第二半導體開關元件Vn(VL)的開關損失為0.13。此時,高側的固定期間為60度。When the electrical angle is 0 degrees to 90 degrees and the electrical angle is 330 degrees to 360 degrees, the second connection is applied during the fixed period, and the electrical angle is 90 degrees to 150 degrees. The first connection is applied In the case of a fixed period, the switching loss of the first semiconductor switching element Up (UH) is 0.56. In addition, the switching loss of the second semiconductor switching element Vn(VL) was 0.13. At this time, the fixed period of the high side is 60 degrees.

以上,如參照圖43說明的那樣,優選第一接通固定期間T1u及第二接通固定期間T2u均比π/3(60度)長且為2π/3(120度)以下。更優選地,比7π/18(70度)長且為2π/3(120度)以下。As described above with reference to FIG. 43 , it is preferable that both the first on-fixed period T1u and the second on-fixed period T2u are longer than π/3 (60 degrees) and not more than 2π/3 (120 degrees). More preferably, it is longer than 7π/18 (70 degrees) and 2π/3 (120 degrees) or less.

接著,參照圖44對UH_VL保護波形的切換作進一步說明。圖44是用於說明UH_VL保護波形的切換的圖。Next, switching of the UH_VL protection waveform will be further described with reference to FIG. 44 . FIG. 44 is a diagram for explaining switching of UH_VL protection waveforms.

在圖44中,輸出電壓的波形及開關損失從左依次相當於(n)波形例26(圖39A及圖39B)、(o)波形例27(圖40A及圖40B)、(d)波形例16(圖29A及圖29B)。In Fig. 44, the output voltage waveform and switching loss correspond to (n) waveform example 26 (Fig. 39A and 39B), (o) waveform example 27 (Fig. 40A and Fig. 40B) and (d) waveform example from the left. 16 (Fig. 29A and Fig. 29B).

左邊的圖所示的(n)波形例26是使第一接通固定期間T1v、第一接通固定期間T1w、第二接通固定期間T2u及第二接通固定期間T2w均等的波形例。也就是說,是使除了第一接通固定期間T1u、第二接通固定期間T2v以外的部分均等的波形例。The (n) waveform example 26 shown in the left figure is a waveform example in which the first fixed ON period T1v, the first fixed ON period T1w, the second fixed ON period T2u, and the second fixed ON period T2w are equalized. That is, it is an example of a waveform in which portions other than the first fixed ON period T1u and the second fixed ON period T2v are equalized.

中央的圖所示的(o)波形例27是將第一接通固定期間T1v及第二接通固定期間T2u延長後的波形例。也就是說,是重視U相及V相的波形例。The waveform example 27 (o) shown in the center figure is an example of a waveform obtained by extending the first on-fixed period T1v and the second on-fixed period T2u. That is, it is an example of waveforms in which U-phase and V-phase are emphasized.

右邊的圖所示的(d)波形例16是將第一接通固定期間T1v及第二接通固定期間T2u從(o)波形例27進一步延長後的波形例。也就是說,是重視U相及V相的波形例。(d) waveform example 16 shown in the figure on the right is a waveform example in which the first on-fixed period T1v and the second on-fixed period T2u are further extended from (o) waveform example 27 . That is, it is an example of waveforms in which U-phase and V-phase are emphasized.

隨著切換到右邊的圖,第一接通固定期間T1v及第二接通固定期間T2u變長。因此,隨著切換到右邊的圖,V相的第一半導體開關元件Vp(高側)及U相的第二半導體開關元件Un(低側)的開關損失減少。As the diagram shifts to the right, the first on-fixed period T1v and the second on-fixed period T2u become longer. Therefore, the switching loss of the V-phase first semiconductor switching element Vp (high side) and the U-phase second semiconductor switching element Un (low side) decreases as the diagram shifts to the right.

接著,參照圖45對UH_VL保護波形的切換作進一步說明。圖45是用於說明UH_VL保護波形的切換的圖。Next, switching of the UH_VL protection waveform will be further described with reference to FIG. 45 . FIG. 45 is a diagram for explaining switching of UH_VL protection waveforms.

在圖45中,輸出電壓的波形及開關損失從左依次相當於(n)波形例26(圖39A及圖39B)、(m)波形例25(圖38A及圖38B)。In FIG. 45 , the output voltage waveform and switching loss correspond to (n) waveform example 26 ( FIGS. 39A and 39B ) and (m) waveform example 25 ( FIGS. 38A and 38B ) in order from the left.

左邊的圖所示的(n)波形例26是使第一接通固定期間T1v、第一接通固定期間T1w、第二接通固定期間T2u及第二接通固定期間T2w均等的波形例。也就是說,是使除了第一接通固定期間T1u、第二接通固定期間T2v以外的部分均等的波形例。The (n) waveform example 26 shown in the left figure is a waveform example in which the first fixed ON period T1v, the first fixed ON period T1w, the second fixed ON period T2u, and the second fixed ON period T2w are equalized. That is, it is an example of a waveform in which portions other than the first fixed ON period T1u and the second fixed ON period T2v are equalized.

右邊的圖所示的(m)波形例25是將第一接通固定期間T1w及第二接通固定期間T2w延長後的波形例。也就是說,是重視W相的波形例。The (m) waveform example 25 shown in the figure on the right is a waveform example in which the first on-fixed period T1w and the second on-fixed period T2w are extended. In other words, it is an example of a waveform in which the W phase is emphasized.

隨著切換到右邊的圖,第一接通固定期間T1w及第二接通固定期間T2w變長。因此,隨著切換到右邊的圖,W相的第一半導體開關元件Wp(高側)及W相的第二半導體開關元件Wn(低側)的開關損失減少。As the figure shifts to the right, the first on-fixed period T1w and the second on-fixed period T2w become longer. Therefore, the switching loss of the W-phase first semiconductor switching element Wp (high side) and the W-phase second semiconductor switching element Wn (low side) decreases as the diagram shifts to the right.

接著,參照圖46對UH_VL保護波形的切換作進一步說明。圖46是用於說明UH_VL保護波形的切換的圖。Next, switching of the UH_VL protection waveform will be further described with reference to FIG. 46 . FIG. 46 is a diagram for explaining switching of UH_VL protection waveforms.

在圖46中,輸出電壓的波形及開關損失從左依次相當於(g)波形例19(圖32A及圖32B)、(n)波形例26(圖39A及圖39B)、(a)波形例13(圖26A及圖26B)。In Fig. 46, the output voltage waveform and switching loss correspond to (g) waveform example 19 (Fig. 32A and 32B), (n) waveform example 26 (Fig. 39A and 39B), and (a) waveform example from the left. 13 (Figure 26A and Figure 26B).

左邊的圖所示的(g)波形例19是減少(n)波形例26的第二接通固定期間T2u及第二接通固定期間T2w,並增加第一接通固定期間T1v及第一接通固定期間T1w後的波形例。也就是說,是重視高側的波形例。(g) Waveform Example 19 shown in the left figure is to reduce the second on-fixed period T2u and second on-fixed period T2w of (n) waveform example 26, and increase the first on-fixed period T1v and the first on-fixed period. Waveform example after a fixed period T1w. In other words, it is an example of a waveform in which the high side is emphasized.

中央的圖所示的(n)波形例26是使第一接通固定期間T1v、第一接通固定期間T1w、第二接通固定期間T2v及第二接通固定期間T2w均等的波形例。也就是說,是使除了第一接通固定期間T1u、第二接通固定期間T2u以外的部分均等的波形例。(n) waveform example 26 shown in the center figure is a waveform example in which the first fixed ON period T1v, the first fixed ON period T1w, the second fixed ON period T2v, and the second fixed ON period T2w are equalized. That is, it is an example of a waveform in which portions other than the first fixed ON period T1u and the second fixed ON period T2u are equalized.

右邊的圖所示的(a)波形例13是減少(n)波形例26的第一接通固定期間T1u及第一接通固定期間T1w,並增加第二接通固定期間T2v及第二接通固定期間T2w後的波形例。也就是說,是重視低側的波形例。In the (a) waveform example 13 shown in the right figure, the first on-fixed period T1u and the first on-fixed period T1w of (n) waveform example 26 are reduced, and the second on-fixed period T2v and the second on-fixed period are increased. Waveform example after a fixed period T2w. In other words, it is an example of a waveform in which the low side is emphasized.

參照圖47~圖49對圖21所示的步驟S186的詳細處理進行說明。即,對以抑制X相上層和Y相下層的溫度上升的方式進行調製時的處理進行說明。圖47是表示保護波形的切換方法的流程圖。圖48及圖49是表示保護波形的切換方法的圖。另外,圖47~圖49表示使用U相作為X相的例子、使用V相作為Y相的例子時的保護波形的切換方法。The detailed processing of step S186 shown in FIG. 21 will be described with reference to FIGS. 47 to 49 . That is, the processing at the time of modulation to suppress the temperature rise of the X-phase upper layer and the Y-phase lower layer will be described. Fig. 47 is a flowchart showing a method of switching guard waveforms. 48 and 49 are diagrams showing a method of switching guard waveforms. In addition, FIGS. 47 to 49 show how to switch guard waveforms when the U-phase is used as an example of the X-phase and the V-phase is used as an example of the Y-phase.

步驟S502:信號生成部120判斷溫度T_3~T_6是否為閾值T_Thr5以下。在信號生成部120判斷為溫度T_3~T_6並非閾值T_Thr5以下的情況下(步驟S502:否),處理進入步驟S506。在信號生成部120判斷為溫度T_3~T_6是閾值T_Thr5以下的情況下(步驟S502:是),處理進入步驟S504。Step S502: The signal generator 120 judges whether the temperatures T_3-T_6 are equal to or less than the threshold T_Thr5. When the signal generator 120 determines that the temperatures T_3 to T_6 are not equal to or less than the threshold value T_Thr5 (step S502 : NO), the process proceeds to step S506 . When the signal generator 120 determines that the temperatures T_3 to T_6 are equal to or less than the threshold value T_Thr5 (step S502: Yes), the process proceeds to step S504.

步驟S504:信號生成部120以四個保護方式進行調製。詳細地,信號生成部120以(i)波形例21進行調製。處理結束。Step S504: The signal generator 120 performs modulation in four protection modes. In detail, the signal generator 120 performs modulation with (i) waveform example 21 . Processing is complete.

步驟S506:信號生成部120判斷溫度T_5~T_6是否為閾值T_Thr6以下。在信號生成部120判斷為溫度T_5~T_6並非閾值T_Thr6以下的情況下(步驟S506:否),處理進入步驟S510。在信號生成部120判斷為溫度T_5~T_6是閾值T_Thr6以下的情況下(步驟S506:是),處理進入步驟S508。Step S506: The signal generator 120 judges whether the temperatures T_5-T_6 are below the threshold T_Thr6. When the signal generating unit 120 determines that the temperatures T_5 to T_6 are not equal to or less than the threshold value T_Thr6 (step S506 : NO), the process proceeds to step S510 . When the signal generator 120 determines that the temperatures T_5 to T_6 are equal to or less than the threshold value T_Thr6 (step S506: Yes), the process proceeds to step S508.

步驟S508:信號生成部120以三個保護方式與四個保護方式的中間進行調製。參照圖48在後文中敘述以三個保護方式與四個保護方式的中間進行調製。處理結束。Step S508: The signal generator 120 performs modulation in the middle of the three protection modes and the four protection modes. Modulation between the three protection schemes and the four protection schemes will be described later with reference to FIG. 48 . Processing is complete.

步驟S510:信號生成部120判斷溫度T_3~T_5是否為閾值T_Thr7以下。在信號生成部120判斷為溫度T_3~T_5並非閾值T_Thr7以下的情況下(步驟S510:否),處理進入步驟S514。在信號生成部120判斷為溫度T_3~T_5是閾值T_Thr7以下的情況下(步驟S510:是),處理進入步驟S512。Step S510: The signal generator 120 determines whether the temperatures T_3-T_5 are below the threshold T_Thr7. When the signal generator 120 determines that the temperatures T_3 to T_5 are not equal to or less than the threshold value T_Thr7 (step S510 : NO), the process proceeds to step S514 . When the signal generating unit 120 determines that the temperatures T_3 to T_5 are equal to or less than the threshold value T_Thr7 (step S510: Yes), the process proceeds to step S512.

步驟S512:信號生成部120以三個保護方式進行調製。詳細地,信號生成部120以能保護(i)波形例21、(k)波形例23、(p)波形例28、(q)波形例29中的溫度為T_3、T_4、T_5的臂(半導體開關元件)的方式進行調製。處理結束。Step S512: The signal generator 120 performs modulation in three protection modes. Specifically, the signal generator 120 can protect the arms (semiconductor Modulation by means of switching elements). Processing is complete.

步驟S514:信號生成部120判斷溫度T_4~T_5是否為閾值T_Thr8以下。在信號生成部120判斷為溫度T_4~T_5並非閾值T_Thr8以下的情況下(步驟S514:否),處理進入步驟S518。在信號生成部120判斷為溫度T_4~T_5是閾值T_Thr8以下的情況下(步驟S514:是),處理進入步驟S516。Step S514: The signal generator 120 judges whether the temperatures T_4-T_5 are below the threshold T_Thr8. When the signal generator 120 determines that the temperatures T_4 to T_5 are not equal to or less than the threshold value T_Thr8 (step S514: NO), the process proceeds to step S518. When the signal generator 120 determines that the temperatures T_4 to T_5 are equal to or less than the threshold value T_Thr8 (step S514: Yes), the process proceeds to step S516.

步驟S516:信號生成部120以兩個保護方式與三個保護方式的中間進行調製。參照圖49在後文中敘述以兩個保護方式與三個保護方式的中間進行調製。處理結束。Step S516: The signal generating unit 120 performs modulation between the two protection schemes and the three protection schemes. Modulation between the two protection schemes and the three protection schemes will be described later with reference to FIG. 49 . Processing is complete.

步驟S518:信號生成部120以兩個保護方式進行調製。詳細地,信號生成部120以能保護(a)波形例13、(c)波形例15、(e)波形例17、(g)波形例19、(i)波形例21及(p)波形例28中的溫度為T_3、T_4的臂(半導體開關元件)的方式進行調製。處理結束。Step S518: The signal generator 120 performs modulation in two protection modes. In detail, the signal generator 120 can protect (a) waveform example 13, (c) waveform example 15, (e) waveform example 17, (g) waveform example 19, (i) waveform example 21, and (p) waveform example The temperature in 28 is modulated by means of arms (semiconductor switching elements) of T_3 and T_4. Processing is complete.

接著,參照圖48對圖47所示的步驟S508的詳細處理進行說明。即,對以三個保護方式與四個保護方式的中間進行調製時的處理進行說明。Next, the detailed processing of step S508 shown in FIG. 47 will be described with reference to FIG. 48 . That is, the processing when modulation is performed between the three protection schemes and the four protection schemes will be described.

信號生成部120對除了UH(第一半導體開關元件Up)及VL(第二半導體開關元件Vn)以外的溫度高的前三臂(半導體開關元件)的位置進行判斷。以下,在圖48的說明中,有時將除了“UH(第一半導體開關元件Up)及UL(第二半導體開關元件Un)以外的溫度高的前三臂(半導體開關元件)簡單記載為“前三臂”。另外,前三臂的溫度的順序是任意的。例如,前三臂的溫度的順序既可以是UL(第二半導體開關元件Un)、WH(第一半導體開關元件Wp)及WL(第二半導體開關元件Wn)的順序,也可以是UL(第二半導體開關元件Un)、WL(第二半導體開關元件Wn)及WH(第一半導體開關元件Wp)的順序。以下,對於同樣的記載,同樣前三臂的溫度的順序也是任意的。The signal generation unit 120 determines the positions of the first three arms (semiconductor switching elements) with high temperatures other than UH (first semiconductor switching element Up) and VL (second semiconductor switching element Vn). Hereinafter, in the description of FIG. 48 , the first three arms (semiconductor switching elements) with high temperatures other than “UH (first semiconductor switching element Up) and UL (second semiconductor switching element Un) are sometimes simply described as “ In addition, the order of the temperature of the first three arms is arbitrary. For example, the order of the temperature of the first three arms can be UL (the second semiconductor switching element Un), WH (the first semiconductor switching element Wp) and The order of WL (second semiconductor switching element Wn) may also be the order of UL (second semiconductor switching element Un), WL (second semiconductor switching element Wn) and WH (first semiconductor switching element Wp). Hereinafter, for In the same record, the order of the temperatures of the first three arms is also arbitrary.

在信號生成部120判斷為最高溫度的三臂是UL(第二半導體開關元件Un)、WH(第一半導體開關元件Wp)及WL(第二半導體開關元件Wn)的情況下,在(i)波形例21中,信號生成部120以將195度~195+45×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第一接通固定期間,將270度~270+15×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第二接通固定期間的方式進行調製。When the signal generator 120 determines that the three arms with the highest temperature are UL (second semiconductor switching element Un), WH (first semiconductor switching element Wp), and WL (second semiconductor switching element Wn), in (i) In waveform example 21, the signal generator 120 applies 195 degrees to 195+45×(T_Thr6-(T_5-T_6))/T_Thr6 degrees to the first on-fixed period, and applies 270 degrees to 270+15×(T_Thr6-(T_5-T_6 ))/T_Thr6 degrees are applied to the second fixed-on period for modulation.

在信號生成部120判斷為最高溫度的三臂是VH(第一半導體開關元件Vp)、WH(第一半導體開關元件Wp)及WL(第二半導體開關元件Wn)的情況下,在(k)波形例23中,信號生成部120以將195度~195+15×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第一接通固定期間,將240度~240+45×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第二接通固定期間的方式進行調製。When the signal generator 120 determines that the three arms with the highest temperature are VH (first semiconductor switching element Vp), WH (first semiconductor switching element Wp), and WL (second semiconductor switching element Wn), in (k) In waveform example 23, the signal generation unit 120 applies 195 degrees to 195+15×(T_Thr6-(T_5-T_6))/T_Thr6 degrees to the first ON fixed period, and applies 240 degrees to 240+45×(T_Thr6-(T_5-T_6 ))/T_Thr6 degrees are applied to the second fixed-on period for modulation.

在信號生成部120判斷為最高溫度的三臂是UL(第二半導體開關元件Un)、VH(第一半導體開關元件Vp)及WL(第二半導體開關元件Wn)的情況下,在(p)波形例28中,信號生成部120以將195度~195+15×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第一接通固定期間,將240度~240+45×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第二接通固定期間,將285度~285+45×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第一接通固定期間的方式進行調製。When the signal generator 120 determines that the three arms with the highest temperature are UL (second semiconductor switching element Un), VH (first semiconductor switching element Vp), and WL (second semiconductor switching element Wn), in (p) In waveform example 28, the signal generator 120 applies 195 degrees to 195+15×(T_Thr6-(T_5-T_6))/T_Thr6 degrees to the first on-fixed period, and applies 240 degrees to 240+45×(T_Thr6-(T_5-T_6 )))/T_Thr6 degrees are applied to the second on-on fixed period, and 285-285+45×(T_Thr6-(T_5-T_6))/T_Thr6 degrees are applied to the first on-on fixed period for modulation.

在信號生成部120判斷為最高溫度的三臂是UL(第二半導體開關元件Un)、VH(第一半導體開關元件Vp)及WH(第一半導體開關元件Wp)的情況下,在(q)波形例29中,信號生成部120以將150度~150+45×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第二接通固定期間,將210度~210+30×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第一接通固定期間,將270度~270+15×(T_Thr6-(T_5-T_6))/T_Thr6度應用於第二接通固定期間的方式進行調製。When the signal generator 120 determines that the three arms with the highest temperature are UL (second semiconductor switching element Un), VH (first semiconductor switching element Vp), and WH (first semiconductor switching element Wp), in (q) In waveform example 29, the signal generator 120 applies 150 degrees to 150+45×(T_Thr6-(T_5-T_6))/T_Thr6 degrees to the second on-fixed period, and applies 210 degrees to 210+30×(T_Thr6-(T_5-T_6 )))/T_Thr6 degrees are applied to the first fixed on period, and 270 to 270+15×(T_Thr6−(T_5−T_6))/T_Thr6 degrees are applied to the second fixed on period for modulation.

接著,參照圖49對圖47所示的步驟S516的詳細處理進行說明。即,對以兩個保護方式與三個保護方式的中間進行調製時的處理進行說明。Next, the detailed processing of step S516 shown in FIG. 47 will be described with reference to FIG. 49 . That is, the processing when modulation is performed between the two protection schemes and the three protection schemes will be described.

如圖49所示,在最高溫度的兩臂的位置及兩者的優先度是UL>WL的情況且溫度為T_5的臂是VH的情況下,進行處理1。在處理1中,在(a)波形例13中,信號生成部120以將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。As shown in FIG. 49 , when the positions of the two arms with the highest temperature and the priority of both are UL>WL and the arm at temperature T_5 is VH, process 1 is performed. In process 1, in (a) waveform example 13, the signal generation unit 120 modulates so that 210° to 210+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL>WL的情況且溫度為T_5的臂是WH的情況下,進行處理1。在處理1中,在(a)波形例13中,信號生成部120以將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the positions of the two arms with the highest temperature and the priority of both are UL>WL and the arm whose temperature is T_5 is WH, process 1 is performed. In process 1, in (a) waveform example 13, the signal generation unit 120 modulates so that 270° to 270+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL<WL的情況且溫度為T_5的臂是VH的情況下,進行處理1。在處理1中,在(a)波形例13中,信號生成部120以將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are UL<WL, and the arm whose temperature is T_5 is VH, process 1 is performed. In process 1, in (a) waveform example 13, the signal generation unit 120 modulates so that 210° to 210+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL<WL的情況且溫度為T_5的臂是WH的情況下,進行處理2。在處理2中,在(a)波形例13中,信號生成部120以將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are UL<WL and the arm whose temperature is T_5 is WH, process 2 is performed. In process 2, in (a) waveform example 13, the signal generation unit 120 modulates so that 270° to 270+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL>WH的情況且溫度為T_5的臂是VH的情況下,進行處理3。在處理3中,在(a)波形例13中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度、270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the positions of the two arms with the highest temperature and the priority of both are UL>WH and the arm whose temperature is T_5 is VH, process 3 is performed. In process 3, in (a) waveform example 13, the signal generating unit 120 sets 150 degrees to 150+60×(T_Thr8-(T_4-T_5))/T_Thr8 degrees, 270 degrees to 270+60×(T_Thr8-(T_4-T_5 ))/T_Thr8 degrees are applied to the first fixed period for modulation.

在最高溫度的兩臂的位置及兩者的優先度是UL>WH的情況且溫度為T_5的臂是VL的情況下,進行處理2。在處理2中,在(a)波形例13中,信號生成部120以將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the positions of the two arms with the highest temperature and the priority of both are UL>WH and the arm whose temperature is T_5 is VL, process 2 is performed. In process 2, in (a) waveform example 13, the signal generation unit 120 modulates so that 270° to 270+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL>VH的情況且溫度為T_5的臂是WH的情況下,進行處理4。在處理4中,在(c)波形例15中,信號生成部120以將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the positions of the two arms with the highest temperature and the priority of both are UL>VH and the arm at temperature T_5 is WH, process 4 is performed. In process 4, in (c) waveform example 15, the signal generation unit 120 modulates so that 270° to 270+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL>VH的情況且溫度為T_5的臂是WL的情況下,進行處理5。在處理5中,在(c)波形例15中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間、將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are UL>VH and the arm at temperature T_5 is WL, process 5 is performed. In process 5, in (c) waveform example 15, the signal generator 120 applies 150° to 150+60×(T_Thr8−(T_4−T_5))/T_Thr8° to the second on-fixed period, and applies 210° to 210+60×(T_Thr8−(T_4−T_5))/T_Thr8 degrees is applied to the first fixed period of on for modulation.

在最高溫度的兩臂的位置及兩者的優先度是UL<VH的情況且溫度為T_5的臂是WH的情況下,進行處理6。在處理6中,在(e)波形例17中,信號生成部120以將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間、將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are UL<VH and the arm whose temperature is T_5 is WH, process 6 is performed. In process 6, in (e) waveform example 17, the signal generator 120 applies 210 degrees to 210+60×(T_Thr8-(T_4-T_5))/T_Thr8 degrees to the second on-fixed period, and applies 270 degrees to 270+60×(T_Thr8-(T_4-T_5))/T_Thr8 degrees is applied to the first fixed-on period for modulation.

在最高溫度的兩臂的位置及兩者的優先度是UL<VH的情況且溫度為T_5的臂是WL的情況下,進行處理7。在處理7中,在(e)波形例17中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are UL<VH and the arm whose temperature is T_5 is WL, process 7 is performed. In process 7, in (e) waveform example 17, the signal generation unit 120 modulates so that 150° to 150+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the second on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是VH>WL的情況且溫度為T_5的臂是WL的情況下,進行處理7。在處理7中,在(e)波形例17中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are VH>WL and the arm at temperature T_5 is WL, process 7 is performed. In process 7, in (e) waveform example 17, the signal generation unit 120 modulates so that 150° to 150+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the second on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是VH>WL的情況且溫度為T_5的臂是WH的情況下,進行處理8。在處理8中,在(e)波形例17中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間、將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the positions of the two arms with the highest temperature and the priority of both are VH>WL and the arm at temperature T_5 is WH, process 8 is performed. In process 8, in (e) waveform example 17, the signal generator 120 applies 150 degrees to 150+60×(T_Thr8-(T_4-T_5))/T_Thr8 degrees to the second on-fixed period, and applies 270 degrees to 270+60×(T_Thr8-(T_4-T_5))/T_Thr8 degrees is applied to the first fixed-on period for modulation.

在最高溫度的兩臂的位置及兩者的優先度是VH>WH的情況且溫度為T_5的臂是UL的情況下,進行處理9。在處理9中,在(g)波形例19中,信號生成部120以將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are VH>WH and the arm whose temperature is T_5 is UL, process 9 is performed. In process 9, in (g) waveform example 19, the signal generation unit 120 modulates so that 210° to 210+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the second ON constant period.

在最高溫度的兩臂的位置及兩者的優先度是VH>WH的情況且溫度為T_5的臂是WL的情況下,進行處理10。在處理10中,在(g)波形例19中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are VH>WH and the arm at temperature T_5 is WL, process 10 is performed. In process 10, in (g) waveform example 19, the signal generation unit 120 modulates so that 150° to 150+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the second on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是VH<WH的情況且溫度為T_5的臂是UL的情況下,進行處理9。在處理9中,在(g)波形例19中,信號生成部120以將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are VH<WH and the arm whose temperature is T_5 is UL, process 9 is performed. In process 9, in (g) waveform example 19, the signal generation unit 120 modulates so that 210° to 210+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the second ON constant period.

在最高溫度的兩臂的位置及兩者的優先度是VH<WH的情況且溫度為T_5的臂是WL的情況下,進行處理10。在處理10中,在(g)波形例19中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第二接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are VH<WH and the arm at temperature T_5 is WL, process 10 is performed. In process 10, in (g) waveform example 19, the signal generation unit 120 modulates so that 150° to 150+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the second on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL<WH的情況且溫度為T_5的臂是VH的情況下,進行處理11。在處理11中,在(i)波形例21中,信號生成部120以將150度~150+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are UL<WH and the arm whose temperature is T_5 is VH, process 11 is performed. In process 11, in (i) waveform example 21, the signal generation unit 120 modulates so that 150° to 150+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是UL<WH的情況且溫度為T_5的臂是WL的情況下,進行處理12。在處理12中,信號生成部120以(i)波形例21進行調製。When the position of the two arms with the highest temperature and the priority of both are UL<WH and the arm whose temperature is T_5 is WL, process 12 is performed. In the process 12 , the signal generator 120 performs modulation with (i) waveform example 21 .

在最高溫度的兩臂的位置及兩者的優先度是WH>WL的情況且溫度為T_5的臂是UL的情況下,進行處理12。在處理12中,信號生成部120以(i)波形例21進行調製。When the positions of the two arms with the highest temperature and the priority of both are WH>WL and the arm whose temperature is T_5 is UL, process 12 is performed. In the process 12 , the signal generator 120 performs modulation with (i) waveform example 21 .

在最高溫度的兩臂的位置及兩者的優先度是WH>WL的情況且溫度為T_5的臂是VH的情況下,進行處理13。在處理13中,在(i)波形例21中,信號生成部120以將210度~210+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the positions of the two arms with the highest temperature and the priority of both are WH>WL, and the arm whose temperature is T_5 is VH, process 13 is performed. In process 13, in (i) waveform example 21, the signal generation unit 120 modulates so as to apply 210° to 210+60×(T_Thr8−(T_4−T_5))/T_Thr8° for the first on-fixed period.

在最高溫度的兩臂的位置及兩者的優先度是WH<WL的情況且溫度為T_5的臂是UL的情況下,進行處理12。在處理12中,信號生成部120以(i)波形例21進行調製。When the position of the two arms with the highest temperature and the priority of both are WH<WL and the arm whose temperature is T_5 is UL, process 12 is performed. In the process 12 , the signal generator 120 performs modulation with (i) waveform example 21 .

在最高溫度的兩臂的位置及兩者的優先度是VH<WL的情況且溫度為T_5的臂是UL的情況下,進行處理14。在處理14中,信號生成部120以(p)波形例28進行調製。When the position of the two arms with the highest temperature and the priority of both are VH<WL and the arm whose temperature is T_5 is UL, process 14 is performed. In the process 14 , the signal generator 120 performs modulation with the (p) waveform example 28 .

在最高溫度的兩臂的位置及兩者的優先度是VH<WL的情況且溫度為T_5的臂是WH的情況下,進行處理15。在處理15中,在(p)波形例28中,信號生成部120以將270度~270+60×(T_Thr8-(T_4-T_5))/T_Thr8度應用於第一接通固定期間的方式進行調製。When the position of the two arms with the highest temperature and the priority of both are VH<WL and the arm at temperature T_5 is WH, process 15 is performed. In process 15 , in (p) waveform example 28 , the signal generation unit 120 modulates so that 270°˜270+60×(T_Thr8−(T_4−T_5))/T_Thr8° is applied to the first on-fixed period.

以上,如參照圖47~圖49說明的那樣,保護動作模式包括第二選擇保護動作模式,在所述第二選擇保護動作模式下,對一相的第一半導體開關元件和其他相的第二半導體開關元件進行保護。一相的第一接通固定期間與其他相的第二接通固定期間連續。第二選擇保護動作模式包括多個k個保護動作模式,並基於溫度資訊,進行k個保護動作模式的選擇,在所述多個k個保護動作模式下,對除了一相的第一半導體開關元件及其他相的第二半導體開關元件以外的第一半導體開關元件及第二半導體開關元件中的、k個(k是2n-3以下的自然數)的第一半導體開關元件或第二半導體開關元件進行保護。因此,在發生急停且電流連續地流過某相的第一半導體開關元件和另一相的第二半導體開關元件而使溫度上升的情況下,通過在退出急停並開始動作時進行上述動作,能最大限度地抑制某相的第一半導體開關元件和另一相的第二半導體開關元件的升溫,同時通過對其他半導體開關元件的根據溫度狀況所需的半導體開關元件的升溫也進行抑制,使得逆變器的可靠性得到提高。As described above with reference to FIGS. 47 to 49 , the protection operation mode includes the second selection protection operation mode in which the first semiconductor switching element of one phase and the second semiconductor switching element of the other phase Semiconductor switching elements for protection. The first on-fixed period of one phase is continuous with the second on-fixed period of the other phase. The second selection protection action mode includes a plurality of k protection action modes, and based on the temperature information, k protection action modes are selected, and in the plurality of k protection action modes, the first semiconductor switch except one phase k (k is a natural number equal to or less than 2n-3) of the first semiconductor switching element or the second semiconductor switching element among the first semiconductor switching element and the second semiconductor switching element other than the element and the second semiconductor switching element of the other phase components are protected. Therefore, when an emergency stop occurs and the current continuously flows through the first semiconductor switching element of a certain phase and the second semiconductor switching element of another phase to increase the temperature, by performing the above operation when the emergency stop is exited and the operation is started , the temperature rise of the first semiconductor switching element of a certain phase and the second semiconductor switching element of another phase can be suppressed to the greatest extent, and at the same time, the temperature rise of the semiconductor switching element required by the temperature conditions of other semiconductor switching elements is also suppressed, The reliability of the inverter is improved.

以上,如參照圖1~圖49說明的那樣,馬達驅動電路100具有PWM占空比波形不同的多個動作模式,並且具有在電力轉換中進行所述多個動作模式的切換的功能。多個動作模式中的至少一個是保護動作模式。通過利用動作模式的切換採用所需的最佳動作模式,能高效地抑制電力轉換器(逆變器)的升溫並提高可靠性。As described above with reference to FIGS. 1 to 49 , the motor drive circuit 100 has a plurality of operation modes with different PWM duty waveforms, and has a function of switching the plurality of operation modes during power conversion. At least one of the plurality of operation modes is a protection operation mode. By adopting the optimum operation mode required by switching the operation mode, the temperature rise of the power converter (inverter) can be efficiently suppressed and the reliability can be improved.

保護動作模式具有多個保護動作方式,在所述多個保護動作方式下,在交流輸出的一個週期的期間內,各相所占的第一接通固定期間及第二接通固定期間中的至少一方的比率不同。因此,能對應於各種各樣的保護模式。例如,除了通常模式(一種)以外,還能分別以各相為中心進行保護(多種)。The protection operation mode has a plurality of protection operation modes. In the plurality of protection operation modes, during one cycle of the AC output, the first fixed period of connection and the second fixed period of connection occupied by each phase At least one of the ratios is different. Therefore, it is possible to support various protection modes. For example, in addition to the normal mode (one type), it is also possible to perform protection (multiple types) centering on each phase.

多個保護動作模式及多個保護動作方式的切換是基於第一半導體開關元件和第二半導體開關元件中的至少一方的溫度資訊來進行的。溫度資訊例如是各半導體開關元件的六個溫度感測器20所獲取的溫度。另外,也可以在一部分半導體開關元件的附近配置溫度感測器20,並通過運算推定未配置溫度感測器20的半導體開關元件的溫度。或者,也可以對環境溫度進行監視,並使用設置於馬達驅動電路100的電流感測器及電壓感測器(省略圖示)的值來推定溫度。環境溫度例如是氣溫、基板的溫度及冷卻水的溫度。冷卻水是用於對馬達驅動電路100進行冷卻的液體。通過基於第一半導體開關元件和第二半導體開關元件中的至少一方的溫度資訊進行多個保護動作模式及多個保護動作方式的切換,能選擇性地抑制溫度變高的半導體開關元件的發熱並促進散熱,從而提高電力轉換器的可靠性。Switching between the plurality of protection operation modes and the plurality of protection operation modes is performed based on temperature information of at least one of the first semiconductor switching element and the second semiconductor switching element. The temperature information is, for example, the temperature acquired by the six temperature sensors 20 of each semiconductor switching element. In addition, the temperature sensor 20 may be arranged in the vicinity of some semiconductor switching elements, and the temperature of the semiconductor switching elements where the temperature sensor 20 is not arranged may be estimated by calculation. Alternatively, the ambient temperature may be monitored, and the temperature may be estimated using the values of a current sensor and a voltage sensor (not shown) provided in the motor drive circuit 100 . The ambient temperature is, for example, the air temperature, the temperature of the substrate, and the temperature of cooling water. The cooling water is liquid for cooling the motor drive circuit 100 . By switching between a plurality of protection operation modes and a plurality of protection operation modes based on temperature information of at least one of the first semiconductor switching element and the second semiconductor switching element, it is possible to selectively suppress heat generation of the semiconductor switching element whose temperature becomes higher and Facilitates heat dissipation, thereby increasing the reliability of power converters.

此外,保護動作模式至少具有四種保護動作方式。因此,能對應於各種各樣的保護模式。例如,除了通常模式(一種)以外,還能分別以各相為中心進行保護(多種)。In addition, the protective action mode has at least four protective action modes. Therefore, it is possible to support various protection modes. For example, in addition to the normal mode (one type), it is also possible to perform protection (multiple types) centering on each phase.

參照圖50A~圖66B對其他波形例進行說明。Other waveform examples will be described with reference to FIGS. 50A to 66B .

參照圖50A及圖50B對波形例30進行說明。圖50A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖50B是表示開關損失的圖。Waveform example 30 will be described with reference to FIGS. 50A and 50B . FIG. 50A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 50B is a graph showing switching loss.

如圖50A所示,波形例30呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例30呈如下波形,即在電角度為90度~電角度為210度內,任一相的輸出固定為1。此外,波形例30呈如下波形,即在電角度為0度~電角度為90度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例30中,電角度為90度~電角度為210度是高側接通應用期間T3。此外,在波形例30中,電角度為0度~電角度為90度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in Figure 50A, the waveform example 30 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 30 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 90 degrees to 210 degrees. In addition, the waveform example 30 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 90 degrees and an electrical angle of 210 degrees to an electrical angle of 360 degrees. In waveform example 30, the high-side ON application period T3 is from an electrical angle of 90 degrees to an electrical angle of 210 degrees. In addition, in waveform example 30, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 90 degrees and the electrical angle of 210 degrees to the electrical angle of 360 degrees.

在波形例30中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例30中,電角度為90度~電角度為150度是第一接通固定期間T1u。在波形例30中,電角度為150度~電角度為210度是第一接通固定期間T1v。In the waveform example 30, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 30, the first on-fixed period T1u is from an electrical angle of 90 degrees to an electrical angle of 150 degrees. In waveform example 30, the electrical angle of 150° to 210° is the first on-fixed period T1v.

在波形例30中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例30中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例30中,電角度為0度~電角度為90度及電角度為330度~電角度為360度是第二接通固定期間T2v。In the waveform example 30, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 30, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 30, the electrical angle of 0 degrees to the electrical angle of 90 degrees and the electrical angle of 330 degrees to the electrical angle of 360 degrees are the second on-fixed period T2v.

在波形例30中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1w不同。詳細地,在波形例30中,第一接通固定期間T1u為60度,與此相對,沒有第一接通固定期間T1w。即,在波形例30中,第一接通固定區間T1u比第一接通固定期間T1w長。另外,第一接通固定期間T1v與第一接通固定期間T1u相同。因此,如圖50B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In the waveform example 30, in the U phase among the three phases, the first on-fixed period T1u is different from the first on-fixed period T1w. In detail, in waveform example 30, the first on-fixed period T1u is 60 degrees, whereas there is no first on-fixed period T1w. That is, in the waveform example 30, the first on-fixed period T1u is longer than the first on-fixed period T1w. In addition, the first on-fixed period T1v is the same as the first on-fixed period T1u. Therefore, as shown in FIG. 50B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例30中,第二接通固定期間T2u與第二接通固定期間T2w不同。詳細地,在波形例30中,第二接通固定期間T2u為120度,與此相對,沒有第二接通固定期間T2w。即,在波形例30中,第二接通固定區間T2u比第二接通固定期間T2w長。另外,第二接通固定期間T2v與第二接通固定期間T2u相同。因此,如圖50B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比W相小。In waveform example 30, the second on-fixed period T2u is different from the second on-fixed period T2w. In detail, in waveform example 30, the second on-fixed period T2u is 120 degrees, whereas there is no second on-fixed period T2w. That is, in the waveform example 30, the second on-fixed period T2u is longer than the second on-fixed period T2w. In addition, the second on-fixed period T2v is the same as the second on-fixed period T2u. Therefore, as shown in FIG. 50B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the W phase.

以上,如參照圖50A和圖50B說明的那樣,在波形例30中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例30中,能同時抑制U相的第二半導體開關元件Un和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 50A and 50B , in waveform example 30, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 30, heat generation of the U-phase second semiconductor switching element Un and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例30中,如圖50B所示,還能同時抑制U相的第一半導體開關元件Up和V相的第一半導體開關元件Vp的發熱。In addition, in waveform example 30, as shown in FIG. 50B , heat generation of the U-phase first semiconductor switching element Up and the V-phase first semiconductor switching element Vp can be simultaneously suppressed.

參照圖51A和圖51B對波形例31進行說明。圖51A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖51B是表示開關損失的圖。Waveform example 31 will be described with reference to FIGS. 51A and 51B . FIG. 51A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 51B is a graph showing switching loss.

如圖51A所示,波形例31呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例31呈如下波形,即在電角度為45度~電角度為135度及電角度為180度~電角度為210度內,任一相的輸出固定為1。此外,波形例31呈如下波形,即在電角度為0度~電角度為45度、電角度為135~電角度為180度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例31中,電角度為45度~電角度為135度及電角度為180度~電角度為210度是高側接通應用期間T3。此外,在波形例31中,電角度為0度~電角度為45度、電角度為135度~電角度為180度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in Fig. 51A, the waveform example 31 is as follows, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 31 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 45 degrees to 135 degrees and an electrical angle of 180 degrees to 210 degrees. In addition, the waveform example 31 is a waveform such that any phase is within an electrical angle of 0 degrees to an electrical angle of 45 degrees, an electrical angle of 135 degrees to 180 degrees, and an electrical angle of 210 degrees to 360 degrees. The output is fixed at 0. In the waveform example 31, the high-side ON application period T3 is the electrical angle of 45 degrees to the electrical angle of 135 degrees and the electrical angle of 180 degrees to the electrical angle of 210 degrees. In addition, in waveform example 31, the electrical angle of 0 degrees to 45 degrees, the electrical angle of 135 degrees to 180 degrees, and the electrical angle of 210 degrees to 360 degrees are low-side ON application periods. T4.

在波形例31中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例31中,電角度為45度~電角度為135度是第一接通固定期間T1u。在波形例31中,電角度為180度~電角度為210度是第一接通固定期間T1v。In waveform example 31, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 31, the first on-fixed period T1u is from an electrical angle of 45 degrees to an electrical angle of 135 degrees. In waveform example 31, an electrical angle of 180 degrees to an electrical angle of 210 degrees is the first on-fixed period T1v.

在波形例31中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例31中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例31中,電角度為0度~電角度為45度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例31中,電角度為135度~電角度為180度是第二接通固定期間T2w。In waveform example 31, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 31, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 31, the electrical angle of 0° to 45° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 31, the second on-fixed period T2w is from an electrical angle of 135 degrees to an electrical angle of 180 degrees.

在波形例31中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例31中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為30度。即,在波形例31中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖51B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In the waveform example 31, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 31, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 30 degrees. That is, in waveform example 31, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 51B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例31中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例31中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為75度,第二接通固定期間T2w為45度。即,在波形例31中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖51B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 31, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 31, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v is 75 degrees, and the second on-fixed period T2w is 45 degrees. That is, in waveform example 31, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 51B , the switching loss of the U-phase second semiconductor switching element Un (L (low side)) is smaller than that of the V-phase and W-phase.

以上,如參照圖51A和圖51B說明的那樣,在波形例31中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例31中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 51A and 51B , in waveform example 31, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 31, heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例31中,如圖51B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第二半導體開關元件Wn的發熱。In addition, in the waveform example 31, as shown in FIG. 51B , the heat generation of the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖52A和圖52B對波形例32進行說明。圖52A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖52B是表示開關損失的圖。Waveform example 32 will be described with reference to FIGS. 52A and 52B . FIG. 52A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 52B is a graph showing switching loss.

如圖52A所示,波形例32呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例32呈如下波形,即在電角度為60度~電角度為120度及電角度為150度~電角度為210度內,任一相的輸出固定為1。此外,波形例32呈如下波形,即在電角度為0度~電角度為60度、電角度為120~電角度為150度及電角度為210度~電角度為360度內,任一相的輸出固定為0。在波形例32中,電角度為60度~電角度為120度及電角度為150度~電角度為210度是高側接通應用期間T3。此外,在波形例32中,電角度為0度~電角度為60度、電角度為120度~電角度為150度及電角度為210度~電角度為360度是低側接通應用期間T4。As shown in FIG. 52A, the waveform example 32 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 32 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 60° to 120° and an electrical angle of 150° to 210°. In addition, the waveform example 32 is a waveform such that any phase is within an electrical angle of 0 degrees to an electrical angle of 60 degrees, an electrical angle of 120 degrees to an electrical angle of 150 degrees, and an electrical angle of 210 degrees to an electrical angle of 360 degrees. The output is fixed at 0. In the waveform example 32, the high-side ON application period T3 is the electrical angle of 60 degrees to the electrical angle of 120 degrees and the electrical angle of 150 degrees to the electrical angle of 210 degrees. In addition, in waveform example 32, the electrical angle of 0° to 60°, the electrical angle of 120° to 150°, and the electrical angle of 210° to 360° are low-side ON application periods. T4.

在波形例32中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例32中,電角度為60度~電角度為120度是第一接通固定期間T1u。在波形例32中,電角度為150度~電角度為210度是第一接通固定期間T1v。In the waveform example 32, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 32, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 120 degrees. In waveform example 32, the electrical angle of 150° to 210° is the first on-fixed period T1v.

在波形例32中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例32中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例32中,電角度為0度~電角度為60度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例32中,電角度為120度~電角度為150度是第二接通固定期間T2w。In the waveform example 32, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 32, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In the waveform example 32, the electrical angle of 0° to 60° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In the waveform example 32, the second on-fixed period T2w is from an electrical angle of 120 degrees to an electrical angle of 150 degrees.

在波形例32中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1w不同。詳細地,在波形例32中,第一接通固定期間T1u為60度,與此相對,沒有第一接通固定期間T1w。即,在波形例32中,第一接通固定區間T1u比第一接通固定期間T1w長。另外,第一接通固定期間T1v與第一接通固定期間T1u相同。因此,如圖52B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 32, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1w. In detail, in waveform example 32, the first on-fixed period T1u is 60 degrees, whereas there is no first on-fixed period T1w. That is, in the waveform example 32, the first on-fixed period T1u is longer than the first on-fixed period T1w. In addition, the first on-fixed period T1v is the same as the first on-fixed period T1u. Therefore, as shown in FIG. 52B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例32中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例32中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為90度,第二接通固定期間T2w為30度。即,在波形例32中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖52B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 32, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 32, the second fixed ON period T2u is 120 degrees, whereas the second fixed ON period T2v is 90 degrees, and the second fixed ON period T2w is 30 degrees. That is, in waveform example 32, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 52B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖52A和圖52B說明的那樣,在波形例32中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例32中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 52A and 52B , in waveform example 32, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 32, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例32中,如圖52B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 32, as shown in FIG. 52B , heat generation of the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖53A和圖53B對波形例33進行說明。圖53A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖53B是表示開關損失的圖。Waveform example 33 will be described with reference to FIGS. 53A and 53B . FIG. 53A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 53B is a graph showing switching loss.

如圖53A所示,波形例33呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例33呈如下波形,即在電角度為60度~電角度為120度、電角度為180度~電角度為210度及電角度為330度~電角度為360度的範圍內,任一相的輸出固定為1。此外,波形例33呈如下波形,即在電角度為0度~電角度為60度、電角度為120~電角度為180度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例33中,電角度為60度~電角度為120度、電角度為180度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例33中,電角度為0度~電角度為60度、電角度為120度~電角度為180度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in FIG. 53A, the waveform example 33 is as follows, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0. . In detail, waveform example 33 has the following waveforms, that is, within the range of electrical angles from 60 degrees to 120 degrees, electrical angles from 180 degrees to 210 degrees, and electrical angles from 330 degrees to 360 degrees. , the output of any phase is fixed at 1. In addition, waveform example 33 is a waveform in which any phase is within the electrical angle of 0 degrees to 60 degrees, the electrical angle of 120 degrees to 180 degrees, and the electrical angle of 210 degrees to 330 degrees. The output is fixed at 0. In waveform example 33, the high-side ON application period T3 is the electrical angle of 60° to 120°, the electrical angle of 180° to 210°, and the electrical angle of 330° to 360°. In addition, in waveform example 33, the electrical angle of 0° to 60°, the electrical angle of 120° to 180°, and the electrical angle of 210° to 330° are low-side ON application periods. T4.

在波形例33中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例33中,電角度為60度~電角度為120度是第一接通固定期間T1u。在波形例33中,電角度為180度~電角度為210度是第一接通固定期間T1v。在波形例33中,電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 33, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In the waveform example 33, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 120 degrees. In the waveform example 33, the first on-fixed period T1v is from an electrical angle of 180 degrees to an electrical angle of 210 degrees. In the waveform example 33, the electrical angle of 330 degrees to the electrical angle of 360 degrees is the first on-fixed period T1w.

在波形例33中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例33中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例33中,電角度為0度~電角度為60度是第二接通固定期間T2v。在波形例33中,電角度為120度~電角度為180度是第二接通固定期間T2w。In waveform example 33, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 33, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 33, the second on-fixed period T2v is the electrical angle from 0° to 60°. In waveform example 33, the second on-fixed period T2w is from an electrical angle of 120 degrees to an electrical angle of 180 degrees.

在波形例33中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例33中,第一接通固定期間T1u為60度,與此相對,第一接通固定期間T1v及第一接通固定期間T1w為30度。即,在波形例33中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖53B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 33, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in waveform example 33, the first on-fixed period T1u is 60 degrees, whereas the first on-fixed period T1v and the first on-fixed period T1w are 30 degrees. That is, in waveform example 33, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 53B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例33中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例33中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為60度。即,在波形例33中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖53B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相及W相小。In waveform example 33, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 33, the second on-fixed period T2u is 120 degrees, while the second on-fixed period T2v and the second on-fixed period T2w are 60 degrees. That is, in waveform example 33, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 53B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖53A和圖53B說明的那樣,在波形例33中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例33中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 53A and 53B , in waveform example 33, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 33, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be suppressed at the same time.

此外,在波形例33中,如圖53B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 33, as shown in FIG. 53B , the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖54A及圖54B對波形例34進行說明。圖54A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖54B是表示開關損失的圖。Waveform example 34 will be described with reference to FIGS. 54A and 54B . FIG. 54A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 54B is a graph showing switching loss.

如圖54A所示,波形例34呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例34呈如下波形,即在電角度為75度~電角度為105度及電角度為150度~電角度為240度內,任一相的輸出固定為1。此外,波形例34呈如下波形,即在電角度為0度~電角度為75度、電角度為105~電角度為150度及電角度為240度~電角度為360度內,任一相的輸出固定為0。在波形例34中,電角度為75度~電角度為105度及電角度為150度~電角度為240度是高側接通應用期間T3。此外,在波形例34中,電角度為105度~電角度為150度及電角度為240度~電角度為360度是低側接通應用期間T4。As shown in FIG. 54A, the waveform example 34 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 34 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 75 degrees to 105 degrees and an electrical angle of 150 degrees to 240 degrees. In addition, waveform example 34 is a waveform such that any phase is within the electrical angle of 0 degrees to 75 degrees, the electrical angle of 105 degrees to 150 degrees, and the electrical angle of 240 degrees to 360 degrees. The output is fixed at 0. In waveform example 34, the high-side ON application period T3 is the electrical angle of 75° to 105° and the electrical angle of 150° to 240°. In addition, in waveform example 34, the low-side ON application period T4 is the electrical angle of 105 degrees to the electrical angle of 150 degrees and the electrical angle of 240 degrees to the electrical angle of 360 degrees.

在波形例34中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例34中,電角度為75度~電角度為105度是第一接通固定期間T1u。在波形例34中,電角度為150度~電角度為240度是第一接通固定期間T1v。In the waveform example 34, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 34, the first on-fixed period T1u is from an electrical angle of 75 degrees to an electrical angle of 105 degrees. In waveform example 34, the electrical angle of 150° to 240° is the first on-fixed period T1v.

在波形例34中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例34中,電角度為240度~電角度為330度是第二接通固定期間T2u。在波形例34中,電角度為0度~電角度為75度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例34中,電角度為105度~電角度為150度是第二接通固定期間T2w。In waveform example 34, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 34, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 34, the electrical angle of 0° to 75° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 34, the second on-fixed period T2w is from an electrical angle of 105 degrees to an electrical angle of 150 degrees.

在波形例34中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例34中,第一接通固定期間T1v為90度,與此相對,第一接通固定期間T1u為30度,沒有第一接通固定期間T1w。即,在波形例34中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖54B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In the waveform example 34, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. Specifically, in the waveform example 34, the first on-fixed period T1v is 90 degrees, whereas the first on-fixed period T1u is 30 degrees, and there is no first on-fixed period T1w. That is, in waveform example 34, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 54B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例34中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例34中,第二接通固定期間T2v為105度,與此相對,第二接通固定期間T2u為90度,第二接通固定期間T2w為45度。即,在波形例34中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖54B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相和W相小。In waveform example 34, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 34, the second fixed ON period T2v is 105 degrees, whereas the second fixed ON period T2u is 90 degrees, and the second fixed ON period T2w is 45 degrees. That is, in waveform example 34, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 54B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖54A和圖54B說明的那樣,在波形例34中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例34中,能同時抑制V相的第一半導體開關元件Vp和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 54A and 54B , in waveform example 34, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 34, the heat generation of the V-phase first semiconductor switching element Vp and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例34中,如圖54B所示,還能同時抑制U相的第二半導體開關元件Up、U相的第二半導體開關元Un、W相的第二半導體開關元件Wn的發熱。In addition, in the waveform example 34, as shown in FIG. 54B , the heat generation of the U-phase second semiconductor switching element Up, the U-phase second semiconductor switching element Un, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖55A及圖55B對波形例35進行說明。圖55A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖55B是表示開關損失的圖。Waveform example 35 will be described with reference to FIGS. 55A and 55B . FIG. 55A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 55B is a graph showing switching loss.

如圖55A所示,波形例35呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例35呈如下波形,即在電角度為75度~電角度為105度、電角度為150度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例35呈如下波形,即在電角度為0度~電角度為75度、電角度為105度~電角度為150度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例35中,電角度為75度~電角度為105度、電角度為150度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例35中,電角度為0度~電角度為75度、電角度為105度~電角度為150度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in FIG. 55A, waveform example 35 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, the waveform example 35 has the following waveforms, that is, within the electrical angle of 75 degrees to 105 degrees, the electrical angle of 150 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees, any The output of one phase is fixed at 1. In addition, waveform example 35 is a waveform in which any of the electrical angles from 0° to 75°, from 105° to 150°, and from 210° to 330° are The phase output is fixed at 0. In waveform example 35, the high-side ON application period T3 is the electrical angle of 75 degrees to 105 degrees, the electrical angle of 150 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees. In addition, in waveform example 35, the electrical angle of 0 degrees to 75 degrees, the electrical angle of 105 degrees to 150 degrees, and the electrical angle of 210 degrees to 330 degrees are low-side ON application periods. T4.

在波形例35中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例35中,電角度為75度~電角度為105度是第一接通固定期間T1u。在波形例35中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例35中,電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 35, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 35, the first on-fixed period T1u is from an electrical angle of 75 degrees to an electrical angle of 105 degrees. In waveform example 35, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In waveform example 35, the first on-fixed period T1w is from an electrical angle of 330 degrees to an electrical angle of 360 degrees.

在波形例35中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例35中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例35中,電角度為0度~電角度為75度是第二接通固定期間T2v。在波形例35中,電角度為105度~電角度為150度是第二接通固定期間T2w。In waveform example 35, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 35, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 35, the electrical angle of 0° to 75° is the second on-fixed period T2v. In waveform example 35, the second on-fixed period T2w is from an electrical angle of 105 degrees to an electrical angle of 150 degrees.

在波形例35中,在三相中的U相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例35中,第一接通固定期間T1v為60度,與此相對,第一接通固定期間T1u及第一接通固定期間T1w為30度。即,在波形例35中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖55B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In waveform example 35, in the U phase of the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in waveform example 35, the first on-fixed period T1v is 60 degrees, whereas the first on-fixed period T1u and the first on-fixed period T1w are 30 degrees. That is, in waveform example 35, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 55B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例35中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例35中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為75度,第二接通固定期間T2w為45度。即,在波形例35中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖55B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In waveform example 35, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 35, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v is 75 degrees, and the second on-fixed period T2w is 45 degrees. That is, in waveform example 35, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 55B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖55A和圖55B說明的那樣,在波形例35中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例35中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 55A and 55B , in waveform example 35, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 35, the heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例35中,如圖55B所示,還能同時抑制U相的第一半導體開關元件Up、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 35, as shown in FIG. 55B , the U-phase first semiconductor switching element Up, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖56A和圖56B對波形例36進行說明。圖56A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖56B是表示開關損失的圖。Waveform example 36 will be described with reference to FIGS. 56A and 56B . FIG. 56A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 56B is a graph showing switching loss.

如圖56A所示,波形例36呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例36呈如下波形,即在電角度為150度~電角度為240度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例36呈如下波形,即在電角度為0度~電角度為150度及電角度為240度~電角度為330度內,任一相的輸出固定為0。在波形例36中,電角度為150度~電角度為240度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例36中,電角度為0度~電角度為150度及電角度為240度~電角度為330度是低側接通應用期間T4。As shown in FIG. 56A, waveform example 36 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 36 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 150° to 240° and an electrical angle of 330° to 360°. In addition, the waveform example 36 is a waveform in which the output of any phase is fixed at 0 within an electrical angle of 0 degrees to an electrical angle of 150 degrees and an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 36, the high-side ON application period T3 is the electrical angle of 150° to 240° and the electrical angle of 330° to 360°. In addition, in the waveform example 36, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 150 degrees and the electrical angle of 240 degrees to the electrical angle of 330 degrees.

在波形例36中,第一接通固定期間T1包括第一接通固定期間T1v和第一接通固定期間T1w。在波形例36中,電角度為150度~電角度為240度是第一接通固定期間T1v。在波形例36中,電角度為330度~電角度為360度是第一接通固定期間T1w。In the waveform example 36, the first on-fixed period T1 includes a first on-fixed period T1v and a first on-fixed period T1w. In waveform example 36, the electrical angle of 150° to 240° is the first on-fixed period T1v. In waveform example 36, the first on-fixed period T1w is from an electrical angle of 330 degrees to an electrical angle of 360 degrees.

在波形例36中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例36中,電角度為240度~電角度為330度是第二接通固定期間T2u。在波形例36中,電角度為0度~電角度為90度是第二接通固定期間T2v。在波形例36中,電角度為90度~電角度為150度是第二接通固定期間T2w。In waveform example 36, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 36, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 36, the second on-fixed period T2v is the electrical angle from 0° to 90°. In waveform example 36, the second on-fixed period T2w is from an electrical angle of 90 degrees to an electrical angle of 150 degrees.

在波形例36中,在三相中的V相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例36中,第一接通固定期間T1v為90度,與此相對,沒有第一接通固定期間T1u,第一接通固定期間T1w為30度。即,在波形例36中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖56B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In the waveform example 36, in the V phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in waveform example 36, the first on-fixed period T1v is 90 degrees, whereas the first on-fixed period T1u is absent, and the first on-fixed period T1w is 30 degrees. That is, in waveform example 36, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 56B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例36中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例36中,第二接通固定期間T2u為90度,與此相對,第二接通固定期間T2w為60度。即,在波形例36中,第二接通固定區間T2u比第二接通固定期間T2w長。另外,第二接通固定期間T2v與第二接通固定期間T2u相同。因此,如圖56B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比W相小。In waveform example 36, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 36, the second on-fixed period T2u is 90 degrees, whereas the second on-fixed period T2w is 60 degrees. That is, in waveform example 36, the second on-fixed period T2u is longer than the second on-fixed period T2w. In addition, the second on-fixed period T2v is the same as the second on-fixed period T2u. Therefore, as shown in FIG. 56B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the W phase.

以上,如參照圖56A和圖56B說明的那樣,在波形例36中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例36中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 56A and 56B , in waveform example 36, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 36, the heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例36中,如圖56B所示,還能同時抑制V相的第二半導體開關元件Vn、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in the waveform example 36, as shown in FIG. 56B , the heat generation of the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖57A和圖57B對波形例37進行說明。圖57A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖57B是表示開關損失的圖。Waveform example 37 will be described with reference to FIGS. 57A and 57B . FIG. 57A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 57B is a graph showing switching loss.

如圖57A所示,波形例37呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例37呈如下波形,即在電角度為0度~電角度為30度、電角度為150度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例37呈如下波形,即在電角度為30度~電角度為150度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例37中,電角度為0度~電角度為30度、電角度為150度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例37中,電角度為30度~電角度為150度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in FIG. 57A, waveform example 37 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, the waveform example 37 has the following waveforms, that is, within the electrical angle of 0 degrees to 30 degrees, the electrical angle of 150 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees, any The output of one phase is fixed at 1. In addition, waveform example 37 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 30 degrees to 150 degrees and an electrical angle of 210 degrees to 330 degrees. In waveform example 37, the high-side ON application period T3 is the electrical angle of 0° to 30°, the electrical angle of 150° to 210°, and the electrical angle of 330° to 360°. In addition, in waveform example 37, an electrical angle of 30 degrees to an electrical angle of 150 degrees and an electrical angle of 210 degrees to an electrical angle of 330 degrees are low-side ON application periods T4.

在波形例37中,第一接通固定期間T1包括第一接通固定期間T1v和第一接通固定期間T1w。在波形例37中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例37中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 37, the first on-fixed period T1 includes a first on-fixed period T1v and a first on-fixed period T1w. In waveform example 37, an electrical angle of 150 degrees to an electrical angle of 210 degrees is the first on-fixed period T1v. In the waveform example 37, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the first ON fixed period T1w.

在波形例37中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例37中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例37中,電角度為30度~電角度為90度是第二接通固定期間T2v。在波形例37中,電角度為90度~電角度為150度是第二接通固定期間T2w。In waveform example 37, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 37, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 37, the second on-fixed period T2v is from an electrical angle of 30 degrees to an electrical angle of 90 degrees. In waveform example 37, the electrical angle of 90° to 150° is the second on-fixed period T2w.

在波形例37中,在三相中的U相中,第一接通固定期間T1v與第一接通固定期間T1u不同。詳細地,在波形例37中,第一接通固定期間T1v為60度,與此相對,沒有第一接通固定期間T1u。即,在波形例37中,第一接通固定區間T1v比第一接通固定期間T1u長。另外,第一接通固定期間T1w與第一接通固定期間T1v相同。因此,如圖57B所示,V相的第一半導體開關元件Up(H(高側))的開關損失比U相小。In the waveform example 37, in the U phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u. In detail, in the waveform example 37, the first on-fixed period T1v is 60 degrees, but there is no first on-fixed period T1u. That is, in waveform example 37, the first ON fixed period T1v is longer than the first ON fixed period T1u. In addition, the first on-fixed period T1w is the same as the first on-fixed period T1v. Therefore, as shown in FIG. 57B , the switching loss of the first semiconductor switching element Up (H (high side)) of the V phase is smaller than that of the U phase.

在波形例37中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例37中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為60度。即,在波形例37中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖57B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In waveform example 37, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 37, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 60 degrees. That is, in waveform example 37, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 57B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖57A和圖57B說明的那樣,在波形例37中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例37中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 57A and 57B , in waveform example 37, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 37, the heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例37中,如圖57B所示,還能同時抑制V相的第二半導體開關元件Vn、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in the waveform example 37, as shown in FIG. 57B , the heat generation of the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖58A和圖58B對波形例38進行說明。圖58A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖58B是表示開關損失的圖。Waveform example 38 will be described with reference to FIGS. 58A and 58B . FIG. 58A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 58B is a graph showing switching loss.

如圖58A所示,波形例38呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例38呈如下波形,即在電角度為45度~電角度為135度及電角度為150度~電角度為240度內,任一相的輸出固定為1。此外,波形例38呈如下波形,即在電角度為0度~電角度為45度、電角度為135~電角度為150度及電角度為240度~電角度為360度內,任一相的輸出固定為0。在波形例38中,電角度為45度~電角度為135度及電角度為150度~電角度為240度是高側接通應用期間T3。此外,在波形例38中,電角度為0度~電角度為45度、電角度為135度~電角度為150度及電角度為240度~電角度為360度是低側接通應用期間T4。As shown in FIG. 58A, waveform example 38 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 38 is a waveform in which the output of any phase is fixed at 1 within an electrical angle of 45° to 135° and an electrical angle of 150° to 240°. In addition, waveform example 38 is a waveform in which any phase is within the electrical angle of 0 degrees to 45 degrees, the electrical angle of 135 degrees to 150 degrees, and the electrical angle of 240 degrees to 360 degrees. The output is fixed at 0. In waveform example 38, the high-side-on application period T3 is the electrical angle of 45 degrees to the electrical angle of 135 degrees and the electrical angle of 150 degrees to the electrical angle of 240 degrees. In addition, in waveform example 38, the electrical angle of 0 degrees to 45 degrees, the electrical angle of 135 degrees to 150 degrees, and the electrical angle of 240 degrees to 360 degrees are low-side ON application periods. T4.

在波形例38中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例38中,電角度為45度~電角度為135度是第一接通固定期間T1u。在波形例38中,電角度為150度~電角度為240度是第一接通固定期間T1v。In the waveform example 38, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 38, the first on-fixed period T1u is from an electrical angle of 45° to an electrical angle of 135°. In waveform example 38, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 240 degrees.

在波形例38中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例38中,電角度為240度~電角度為330度是第二接通固定期間T2u。在波形例38中,電角度為0度~電角度為45度及電角度為330度~電角度為360度是第二接通固定期間T2v。在波形例38中,電角度為135度~電角度為150度是第二接通固定期間T2w。In waveform example 38, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 38, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 38, the electrical angle of 0° to 45° and the electrical angle of 330° to 360° are the second on-fixed period T2v. In waveform example 38, the second on-fixed period T2w is from an electrical angle of 135 degrees to an electrical angle of 150 degrees.

在波形例38中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1w不同。詳細地,在波形例38中,第一接通固定期間T1u為90度,與此相對,沒有第一接通固定期間T1w。即,在波形例38中,第一接通固定區間T1u比第一接通固定期間T1w長。另外,第一接通固定期間T1v與第一接通固定期間T1u相同。因此,如圖58B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In the waveform example 38, in the U phase among the three phases, the first on-fixed period T1u is different from the first on-fixed period T1w. In detail, in waveform example 38, the first on-fixed period T1u is 90 degrees, but there is no first on-fixed period T1w. That is, in waveform example 38, the first on-fixed period T1u is longer than the first on-fixed period T1w. In addition, the first on-fixed period T1v is the same as the first on-fixed period T1u. Therefore, as shown in FIG. 58B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the W phase.

在波形例38中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例38中,第二接通固定期間T2u為90度,與此相對,第二接通固定期間T2v為75度,第二接通固定期間T2w為15度。即,在波形例38中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖58B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In waveform example 38, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 38, the second on-fixed period T2u is 90 degrees, while the second on-fixed period T2v is 75 degrees, and the second on-fixed period T2w is 15 degrees. That is, in waveform example 38, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 58B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖58A和圖58B說明的那樣,在波形例38中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例38中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 58A and 58B , in waveform example 38, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 38, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例38中,如圖58B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 38, as shown in FIG. 58B , heat generation of the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖59A及圖59B對波形例39進行說明。圖59A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖59B是表示開關損失的圖。Waveform example 39 will be described with reference to FIGS. 59A and 59B . FIG. 59A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 59B is a graph showing switching loss.

如圖59A所示,波形例39呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例39呈如下波形,即在電角度為45度~電角度為135度、電角度為150度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例39呈如下波形,即在電角度為0度~電角度為45度、電角度為135~電角度為150度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例39中,電角度為45度~電角度為135度、電角度為150度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例39中,電角度為0度~電角度為45度、電角度為135度~電角度為150度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in FIG. 59A, waveform example 39 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 39 has the following waveforms, that is, within the electrical angle of 45 degrees to 135 degrees, the electrical angle of 150 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees, any The output of one phase is fixed at 1. In addition, Waveform Example 39 is a waveform in which any phase is within an electrical angle of 0 degrees to an electrical angle of 45 degrees, an electrical angle of 135 degrees to 150 degrees, and an electrical angle of 210 degrees to 330 degrees. The output is fixed at 0. In waveform example 39, the high-side ON application period T3 is the electrical angle of 45 degrees to 135 degrees, the electrical angle of 150 degrees to 210 degrees, and the electrical angle of 330 degrees to 360 degrees. In addition, in waveform example 39, the electrical angle of 0° to 45°, the electrical angle of 135° to 150°, and the electrical angle of 210° to 330° are low-side ON application periods. T4.

在波形例39中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例39中,電角度為45度~電角度為135度是第一接通固定期間T1u。在波形例39中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例39中,電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 39, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 39, the first on-fixed period T1u is from an electrical angle of 45 degrees to an electrical angle of 135 degrees. In waveform example 39, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In waveform example 39, an electrical angle of 330 degrees to an electrical angle of 360 degrees is the first on-fixed period T1w.

在波形例39中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例39中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例39中,電角度為0度~電角度為45度是第二接通固定期間T2v。在波形例39中,電角度為135度~電角度為150度是第二接通固定期間T2w。In waveform example 39, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 39, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 39, the second on-fixed period T2v is from an electrical angle of 0° to an electrical angle of 45°. In waveform example 39, the second on-fixed period T2w is from an electrical angle of 135 degrees to an electrical angle of 150 degrees.

在波形例39中,在三相中的U相中,第一接通固定期間T1u與第一接通固定期間T1v及第一接通固定期間T1w不同。詳細地,在波形例39中,第一接通固定期間T1u為90度,與此相對,第一接通固定期間T1v為60度,第一接通固定期間T1w為30度。即,在波形例39中,第一接通固定期間T1u比第一接通固定期間T1v及第一接通固定期間T1w長。因此,如圖59B所示,U相的第一半導體開關元件Up(H(高側))的開關損失比V相及W相小。In waveform example 39, in the U phase of the three phases, the first on-fixed period T1u is different from the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 39, the first on-fixed period T1u is 90 degrees, whereas the first on-fixed period T1v is 60 degrees, and the first on-fixed period T1w is 30 degrees. That is, in waveform example 39, the first on-fixed period T1u is longer than the first on-fixed period T1v and the first on-fixed period T1w. Therefore, as shown in FIG. 59B , the switching loss of the first semiconductor switching element Up (H (high side)) of the U phase is smaller than that of the V phase and the W phase.

在波形例39中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例39中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v為45度,第二接通固定期間T2w為15度。即,在波形例39中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖59B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In waveform example 39, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. In detail, in waveform example 39, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v is 45 degrees, and the second on-fixed period T2w is 15 degrees. That is, in waveform example 39, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 59B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖59A和圖59B說明的那樣,在波形例39中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例39中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 59A and 59B , in waveform example 39, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 39, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例39中,如圖59B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 39, as shown in FIG. 59B , the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖60A及圖60B對波形例40進行說明。圖60A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖60B是表示開關損失的圖。Waveform example 40 will be described with reference to FIGS. 60A and 60B . FIG. 60A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 60B is a graph showing switching loss.

如圖60A所示,波形例40呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例40呈如下波形,即在電角度為60度~電角度為120度、電角度為150度~電角度為240度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例40呈如下波形,即在電角度為0度~電角度為60度、電角度為120度~電角度為150度及電角度為240度~電角度為330度內,任一相的輸出固定為0。在波形例40中,電角度為60度~電角度為120度、電角度為150度~電角度為240度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例40中,電角度為0度~電角度為60度、電角度為120度~電角度為150度及電角度為240度~電角度為330度是低側接通應用期間T4。As shown in FIG. 60A, the waveform example 40 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0. . In detail, the waveform example 40 is a waveform as follows, that is, any electrical angle is within an electrical angle of 60 degrees to 120 degrees, an electrical angle of 150 degrees to 240 degrees, and an electrical angle of 330 degrees to 360 degrees. The output of one phase is fixed at 1. In addition, the waveform example 40 is a waveform such that any electrical angle is within an electrical angle of 0 degrees to an electrical angle of 60 degrees, an electrical angle of 120 degrees to an electrical angle of 150 degrees, and an electrical angle of 240 degrees to an electrical angle of 330 degrees. The phase output is fixed at 0. In waveform example 40, the high-side ON application period T3 is the electrical angle of 60° to 120°, the electrical angle of 150° to 240°, and the electrical angle of 330° to 360°. In addition, in waveform example 40, the electrical angle of 0° to 60°, the electrical angle of 120° to 150°, and the electrical angle of 240° to 330° are low-side ON application periods. T4.

在波形例40中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例40中,電角度為60度~電角度為120度是第一接通固定期間T1u。在波形例40中,電角度為150度~電角度為240度是第一接通固定期間T1v。在波形例40中,電角度為330度~電角度為360度是第一接通固定期間T1w。In the waveform example 40, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 40, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 120 degrees. In waveform example 40, the electrical angle of 150° to 240° is the first on-fixed period T1v. In the waveform example 40, the first on-fixed period T1w is from an electrical angle of 330 degrees to an electrical angle of 360 degrees.

在波形例40中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例40中,電角度為240度~電角度為330度是第二接通固定期間T2u。在波形例40中,電角度為0度~電角度為60度是第二接通固定期間T2v。在波形例40中,電角度為120度~電角度為150度是第二接通固定期間T2w。In the waveform example 40, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 40, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 40, the second on-fixed period T2v is the electrical angle from 0° to 60°. In the waveform example 40, the second on-fixed period T2w is from an electrical angle of 120 degrees to an electrical angle of 150 degrees.

在波形例40中,在三相中的V相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例40中,第一接通固定期間T1v為90度,與此相對,第一接通固定期間T1u為60度,第一接通固定期間T1w為30度。即,在波形例40中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖60B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In the waveform example 40, in the V phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in waveform example 40, the first on-fixed period T1v is 90 degrees, whereas the first on-fixed period T1u is 60 degrees, and the first on-fixed period T1w is 30 degrees. That is, in the waveform example 40, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 60B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例40中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例40中,第二接通固定期間T2u為90度,與此相對,第二接通固定期間T2v為60度,以及第二接通固定期間T2w為30度。即,在波形例40中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖60B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In the waveform example 40, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 40, the second on-fixed period T2u is 90 degrees, while the second on-fixed period T2v is 60 degrees and the second on-fixed period T2w is 30 degrees. That is, in waveform example 40, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 60B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖60A和圖60B說明的那樣,在波形例40中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例40中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 60A and 60B , in waveform example 40, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 40, heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例40中,如圖60B所示,還能同時抑制U相的第一半導體開關元件Up、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 40, as shown in FIG. 60B , the U-phase first semiconductor switching element Up, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖61A及圖61B對波形例41進行說明。圖61A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖61B是表示開關損失的圖。Waveform example 41 will be described with reference to FIGS. 61A and 61B . FIG. 61A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 61B is a graph showing switching loss.

如圖61A所示,波形例41呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例41呈如下波形,即在電角度為0度~電角度為30度、電角度為60度~電角度為120度、電角度為150度~電角度為210度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例41呈如下波形,即在電角度為30度~電角度為60度、電角度為120度~電角度為150度及電角度為210度~電角度為330度內,任一相的輸出固定為0。在波形例41中,電角度為0度~電角度為30度、電角度為60度~電角度為120度、電角度為150度~電角度為210度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例41中,電角度為30度~電角度為60度、電角度為120度~電角度為150度及電角度為210度~電角度為330度是低側接通應用期間T4。As shown in FIG. 61A , the waveform example 41 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 41 has the following waveforms, that is, when the electrical angle is 0 degrees to 30 degrees, the electrical angle is 60 degrees to 120 degrees, the electrical angle is 150 degrees to 210 degrees, and the electrical angle is The output of any phase is fixed at 1 within the electrical angle of 330 degrees to 360 degrees. In addition, waveform example 41 is a waveform such that any electrical angle is within an electrical angle of 30 degrees to 60 degrees, an electrical angle of 120 degrees to 150 degrees, and an electrical angle of 210 degrees to 330 degrees. The phase output is fixed at 0. In waveform example 41, the electrical angle is 0 to 30 degrees, the electrical angle is 60 to 120 degrees, the electrical angle is 150 to 210 degrees, and the electrical angle is 330 to 330 degrees. 360 degrees is the high-side ON application period T3. In addition, in waveform example 41, the electrical angle of 30 degrees to 60 degrees, the electrical angle of 120 degrees to 150 degrees, and the electrical angle of 210 degrees to 330 degrees are low-side ON application periods. T4.

在波形例41中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例41中,電角度為60度~電角度為120度是第一接通固定期間T1u。在波形例41中,電角度為150度~電角度為210度是第一接通固定期間T1v。在波形例41中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In the waveform example 41, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 41, the first on-fixed period T1u is from an electrical angle of 60 degrees to an electrical angle of 120 degrees. In waveform example 41, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 210 degrees. In waveform example 41, the electrical angle of 0° to 30° and the electrical angle of 330° to 360° are the first on-fixed periods T1w.

在波形例41中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例41中,電角度為210度~電角度為330度是第二接通固定期間T2u。在波形例41中,電角度為30度~電角度為60度是第二接通固定期間T2v。在波形例41中,電角度為120度~電角度為150度是第二接通固定期間T2w。In the waveform example 41, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 41, the second on-fixed period T2u is from an electrical angle of 210 degrees to an electrical angle of 330 degrees. In waveform example 41, the electrical angle of 30° to 60° is the second on-fixed period T2v. In waveform example 41, the second on-fixed period T2w is from an electrical angle of 120 degrees to an electrical angle of 150 degrees.

在波形例41中,第一接通固定區間T1u與第一接通固定期間T1v和第一接通固定期間T1w相同。詳細地,在波形例41中,第一接通固定期間T1u、第一接通固定期間T1v、第一接通固定期間T1w是60度。In the waveform example 41, the first on-fixed period T1u is the same as the first on-fixed period T1v and the first on-fixed period T1w. In detail, in waveform example 41, the first on-fixed period T1u, the first on-fixed period T1v, and the first on-fixed period T1w are 60 degrees.

在波形例41中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例41中,第二接通固定期間T2u為120度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為30度。即,在波形例41中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖61B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In waveform example 41, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in the waveform example 41, the second on-fixed period T2u is 120 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 30 degrees. That is, in waveform example 41, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 61B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖61A及圖61B說明的那樣,在波形例41中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例41中,能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 61A and 61B , in waveform example 41, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 41, the heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例41中,如圖61B所示,還能同時抑制V相的第一半導體開關元件Vp、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 41, as shown in FIG. 61B , the V-phase first semiconductor switching element Vp, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖62A及圖62B對波形例42進行說明。圖62A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖62B是表示開關損失的圖。Waveform example 42 will be described with reference to FIGS. 62A and 62B . FIG. 62A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 62B is a graph showing switching loss.

如圖62A所示,波形例42呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例42呈如下波形,即在電角度為75度~電角度為105度、電角度為150度~電角度為270度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例42呈如下波形,即在電角度為0度~電角度為75度、電角度為105度~電角度為150度及電角度為270度~電角度為330度內,任一相的輸出固定為0。在波形例42中,電角度為75度~電角度為105度、電角度為150度~電角度為270度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例42中,電角度為0度~電角度為75度、電角度為105度~電角度為150度及電角度為270度~電角度為330度是低側接通應用期間T4。As shown in FIG. 62A, the waveform example 42 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 42 has the following waveforms, that is, within the electrical angle of 75 degrees to 105 degrees, the electrical angle of 150 degrees to 270 degrees, and the electrical angle of 330 degrees to 360 degrees, any The output of one phase is fixed at 1. In addition, the waveform example 42 is a waveform such that any electrical angle is within an electrical angle of 0° to 75°, an electrical angle of 105° to 150°, and an electrical angle of 270° to 330°. The phase output is fixed at 0. In waveform example 42, the high-side ON application period T3 is the electrical angle of 75 degrees to 105 degrees, the electrical angle of 150 degrees to 270 degrees, and the electrical angle of 330 degrees to 360 degrees. In addition, in waveform example 42, the electrical angle of 0° to 75°, the electrical angle of 105° to 150°, and the electrical angle of 270° to 330° are low-side ON application periods. T4.

在波形例42中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例42中,電角度為75度~電角度為105度是第一接通固定期間T1u。在波形例42中,電角度為150度~電角度為270度是第一接通固定期間T1v。在波形例42中,電角度為330度~電角度為360度是第一接通固定期間T1w。In the waveform example 42, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In the waveform example 42, the first on-fixed period T1u is from an electrical angle of 75 degrees to an electrical angle of 105 degrees. In waveform example 42, an electrical angle of 150 degrees to an electrical angle of 270 degrees is the first on-fixed period T1v. In waveform example 42, an electrical angle of 330 degrees to an electrical angle of 360 degrees is the first on-fixed period T1w.

在波形例42中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例42中,電角度為270度~電角度為330度是第二接通固定期間T2u。在波形例42中,電角度為0度~電角度為75度是第二接通固定期間T2v。在波形例42中,電角度為105度~電角度為150度是第二接通固定期間T2w。In the waveform example 42, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In the waveform example 42, the second on-fixed period T2u is from an electrical angle of 270 degrees to an electrical angle of 330 degrees. In waveform example 42, the second on-fixed period T2v is the electrical angle from 0° to 75°. In the waveform example 42, the electrical angle of 105° to 150° is the second on-fixed period T2w.

在波形例42中,在三相中的V相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例42中,第一接通固定期間T1v為120度,與此相對,第一接通固定期間T1u及第一接通固定期間T1w為30度。即,在波形例42中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖62B所示,V相的第一半導體開關元件Up(H(高側))的開關損失比U相及W相小。In the waveform example 42, in the V phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in the waveform example 42, the first on-fixed period T1v is 120 degrees, whereas the first on-fixed period T1u and the first on-fixed period T1w are 30 degrees. That is, in the waveform example 42, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 62B , the switching loss of the V-phase first semiconductor switching element Up (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例42中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例42中,第二接通固定期間T2v為75度,與此相對,第二接通固定期間T2u為60度,第二接通固定期間T2w為45度。即,在波形例42中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖62B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相和W相小。In the waveform example 42, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in the waveform example 42, the second on-fixed period T2v is 75 degrees, while the second on-fixed period T2u is 60 degrees, and the second on-fixed period T2w is 45 degrees. That is, in waveform example 42, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 62B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖62A及圖62B說明的那樣,在波形例42中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例42中,能同時抑制V相的第一半導體開關元件Vp和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 62A and 62B , in waveform example 42, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 42, heat generation of the V-phase first semiconductor switching element Vp and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例42中,如圖62B所示,還能同時抑制U相的第一半導體開關元件Up、U相的第二半導體開關元件Un、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 42, as shown in FIG. 62B , the U-phase first semiconductor switching element Up, the U-phase second semiconductor switching element Un, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖63A及圖63B對波形例43進行說明。圖63A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖63B是表示開關損失的圖。Waveform example 43 will be described with reference to FIGS. 63A and 63B . FIG. 63A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 63B is a graph showing switching loss.

如圖63A所示,波形例43呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例43呈如下波形,即在電角度為0度~電角度為30度、電角度為75度~電角度為105度、電角度為150度~電角度為240度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例43呈如下波形,即在電角度為30度~電角度為75度、電角度為105度~電角度為150度及電角度為240度~電角度為330度內,任一相的輸出固定為0。在波形例43中,電角度為0度~電角度為30度、電角度為75度~電角度為105度、電角度為150度~電角度為240度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例43中,電角度為30度~電角度為75度、電角度為105度~電角度為150度及電角度為240度~電角度為330度是低側接通應用期間T4。As shown in FIG. 63A, waveform example 43 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 43 has the following waveforms, that is, when the electrical angle is 0 degrees to 30 degrees, the electrical angle is 75 degrees to 105 degrees, the electrical angle is 150 degrees to 240 degrees, and the electrical angle is The output of any phase is fixed at 1 within the electrical angle of 330 degrees to 360 degrees. In addition, waveform example 43 is a waveform such that any electrical angle is within an electrical angle of 30 degrees to 75 degrees, an electrical angle of 105 degrees to 150 degrees, and an electrical angle of 240 degrees to 330 degrees. The phase output is fixed at 0. In waveform example 43, the electrical angle is 0 to 30 degrees, the electrical angle is 75 to 105 degrees, the electrical angle is 150 to 240 degrees, and the electrical angle is 330 to 330 degrees. 360 degrees is the high-side ON application period T3. In addition, in waveform example 43, the electrical angle is 30 degrees to 75 degrees, the electrical angle is 105 degrees to 150 degrees, and the electrical angle is 240 degrees to 330 degrees. T4.

在波形例43中,第一接通固定期間T1包括第一接通固定期間T1u、第一接通固定期間T1v和第一接通固定期間T1w。在波形例43中,電角度為75度~電角度為105度是第一接通固定期間T1u。在波形例43中,電角度為150度~電角度為240度是第一接通固定期間T1v。在波形例43中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In waveform example 43, the first on-fixed period T1 includes a first on-fixed period T1u, a first on-fixed period T1v, and a first on-fixed period T1w. In waveform example 43, the first on-fixed period T1u is from an electrical angle of 75 degrees to an electrical angle of 105 degrees. In waveform example 43, the electrical angle of 150° to 240° is the first on-fixed period T1v. In the waveform example 43, the electrical angle of 0 degrees to the electrical angle of 30 degrees and the electrical angle of 330 degrees to the electrical angle of 360 degrees are the first ON fixed period T1w.

在波形例43中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例43中,電角度為240度~電角度為330度是第二接通固定期間T2u。在波形例43中,電角度為30度~電角度為75度是第二接通固定期間T2v。在波形例43中,電角度為105度~電角度為150度是第二接通固定期間T2w。In waveform example 43, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 43, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 330 degrees. In waveform example 43, the second on-fixed period T2v is from an electrical angle of 30 degrees to an electrical angle of 75 degrees. In waveform example 43, the electrical angle of 105° to 150° is the second on-fixed period T2w.

在波形例43中,在三相中的V相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例43中,第一接通固定期間T1v為90度,與此相對,第一接通固定期間T1u為30度,第一接通固定期間T1w為60度。即,在波形例43中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖63B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In the waveform example 43, in the V phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in waveform example 43, the first on-fixed period T1v is 90 degrees, while the first on-fixed period T1u is 30 degrees, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 43, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 63B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例43中,第二接通固定期間T2u與第二接通固定期間T2v及第二接通固定期間T2w不同。詳細地,在波形例43中,第二接通固定期間T2u為90度,與此相對,第二接通固定期間T2v及第二接通固定期間T2w為45度。即,在波形例43中,第二接通固定期間T2u比第二接通固定期間T2v及第二接通固定期間T2w長。因此,如圖63B所示,U相的第二半導體開關元件Un(L(低側))的開關損失比V相和W相小。In waveform example 43, the second on-fixed period T2u is different from the second on-fixed period T2v and the second on-fixed period T2w. Specifically, in waveform example 43, the second on-fixed period T2u is 90 degrees, whereas the second on-fixed period T2v and the second on-fixed period T2w are 45 degrees. That is, in waveform example 43, the second on-fixed period T2u is longer than the second on-fixed period T2v and the second on-fixed period T2w. Therefore, as shown in FIG. 63B , the switching loss of the second semiconductor switching element Un (L (low side)) of the U phase is smaller than that of the V phase and the W phase.

以上,如參照圖63A及圖63B說明的那樣,在波形例43中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例43中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 63A and 63B , in waveform example 43, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In the waveform example 43, heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例43中,如圖63B所示,還能同時抑制U相的第一半導體開關元件Up、V相的第二半導體開關元件Vn、W相的第一半導體開關元件Wp和W相的第二半導體開關元件Wn的發熱。In addition, in waveform example 43, as shown in FIG. 63B , the U-phase first semiconductor switching element Up, the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase The heat generation of the second semiconductor switching element Wn.

參照圖64A及圖64B對波形例44進行說明。圖64A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖64B是表示開關損失的圖。Waveform example 44 will be described with reference to FIGS. 64A and 64B . FIG. 64A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 64B is a graph showing switching loss.

如圖64A所示,波形例44呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例44呈如下波形,即在電角度為0度~電角度為30度、電角度為150度~電角度為270度及電角度為330度~電角度為360度內,任一相的輸出固定為1。此外,波形例44呈如下波形,即在電角度為30度~電角度為150度及電角度為270度~電角度為330度內,任一相的輸出固定為0。在波形例44中,電角度為0度~電角度為30度、電角度為150度~電角度為270度及電角度為330度~電角度為360度是高側接通應用期間T3。此外,在波形例44中,電角度為30度~電角度為150度及電角度為270度~電角度為330度是低側接通應用期間T4。As shown in FIG. 64A, the waveform example 44 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 44 is a waveform as follows, that is, any electrical angle is within an electrical angle of 0 degrees to an electrical angle of 30 degrees, an electrical angle of 150 degrees to an electrical angle of 270 degrees, and an electrical angle of 330 degrees to an electrical angle of 360 degrees. The output of one phase is fixed at 1. In addition, waveform example 44 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 30 degrees to 150 degrees and an electrical angle of 270 degrees to 330 degrees. In waveform example 44, the high-side ON application period T3 is the electrical angle of 0° to 30°, the electrical angle of 150° to 270°, and the electrical angle of 330° to 360°. In addition, in waveform example 44, the low-side ON application period T4 is the electrical angle of 30 degrees to the electrical angle of 150 degrees and the electrical angle of 270 degrees to the electrical angle of 330 degrees.

在波形例44中,第一接通固定期間T1包括第一接通固定期間T1v和第一接通固定期間T1w。在波形例44中,電角度為150度~電角度為270度是第一接通固定期間T1v。在波形例44中,電角度為0度~電角度為30度及電角度為330度~電角度為360度是第一接通固定期間T1w。In the waveform example 44, the first on-fixed period T1 includes a first on-fixed period T1v and a first on-fixed period T1w. In the waveform example 44, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 270 degrees. In the waveform example 44, the electrical angle of 0 degrees to the electrical angle of 30 degrees and the electrical angle of 330 degrees to the electrical angle of 360 degrees are the first ON fixed period T1w.

在波形例44中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例44中,電角度為270度~電角度為330度是第二接通固定期間T2u。在波形例44中,電角度為30度~電角度為90度是第二接通固定期間T2v。在波形例44中,電角度為90度~電角度為150度是第二接通固定期間T2w。In waveform example 44, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 44, the second on-fixed period T2u is from an electrical angle of 270 degrees to an electrical angle of 330 degrees. In the waveform example 44, the electrical angle of 30 degrees to 90 degrees is the second on-fixed period T2v. In waveform example 44, the second on-fixed period T2w is from an electrical angle of 90 degrees to an electrical angle of 150 degrees.

在波形例44中,在三相中的U相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例44中,第一接通固定期間T1v為120度,與此相對,沒有第一接通固定期間T1u,第一接通固定期間T1w為60度。即,在波形例44中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖64B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In the waveform example 44, in the U phase of the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in waveform example 44, the first on-fixed period T1v is 120 degrees, whereas the first on-fixed period T1u is absent, and the first on-fixed period T1w is 60 degrees. That is, in waveform example 44, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 64B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例44中,第二接通固定區間T2u、第二接通固定期間T2v和第二接通固定期間T2w相同。詳細地,在波形例44中,第二接通固定區間T2u、第二接通固定區間T2v、第二接通固定期間T2w為60度。In waveform example 44, the second on-fixed period T2u, the second on-fixed period T2v, and the second on-fixed period T2w are the same. In detail, in waveform example 44, the second on-fixed interval T2u, the second on-fixed interval T2v, and the second on-fixed period T2w are 60 degrees.

以上,如參照圖64A及圖64B說明的那樣,在波形例44中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例44中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 64A and 64B , in waveform example 44, as in waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 44, the heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例44中,如圖64B所示,還能同時抑制V相的第二半導體開關元件Vn、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in the waveform example 44, as shown in FIG. 64B , the heat generation of the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖65A及圖65B對波形例45進行說明。圖65A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖65B是表示開關損失的圖。Waveform example 45 will be described with reference to FIGS. 65A and 65B . FIG. 65A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 65B is a graph showing switching loss.

如圖65A所示,波形例45呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例45呈如下波形,即在電角度為0度~電角度為30度、電角度為150度~電角度為240度及電角度為300度~電角度為360度內,任一相的輸出固定為1。此外,波形例45呈如下波形,即在電角度為30度~電角度為150度、電角度為240度~電角度為300度內,任一相的輸出固定為0。在波形例45中,電角度為0度~電角度為30度、電角度為150度~電角度為240度及電角度為300度~電角度為360度是高側接通應用期間T3。此外,在波形例45中,電角度為30度~電角度為150度及電角度為240度~電角度為300度是低側接通應用期間T4。As shown in Fig. 65A, waveform example 45 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, the waveform example 45 is a waveform as follows, that is, any electrical angle within the electrical angle of 0 degrees to 30 degrees, the electrical angle of 150 degrees to 240 degrees, and the electrical angle of 300 degrees to 360 degrees. The output of one phase is fixed at 1. In addition, waveform example 45 is a waveform in which the output of any one phase is fixed at 0 within an electrical angle of 30 degrees to 150 degrees, and an electrical angle of 240 degrees to 300 degrees. In waveform example 45, the high-side ON application period T3 is the electrical angle of 0° to 30°, the electrical angle of 150° to 240°, and the electrical angle of 300° to 360°. In addition, in waveform example 45, the low-side ON application period T4 is the electrical angle of 30 degrees to the electrical angle of 150 degrees and the electrical angle of 240 degrees to the electrical angle of 300 degrees.

在波形例45中,第一接通固定期間T1包括第一接通固定期間T1v和第一接通固定期間T1w。在波形例45中,電角度為150度~電角度為240度是第一接通固定期間T1v。在波形例45中,電角度為0度~電角度為30度及電角度為300度~電角度為360度是第一接通固定期間T1w。In waveform example 45, the first on-fixed period T1 includes a first on-fixed period T1v and a first on-fixed period T1w. In waveform example 45, the electrical angle of 150° to 240° is the first on-fixed period T1v. In the waveform example 45, the electrical angle of 0° to 30° and the electrical angle of 300° to 360° are the first ON fixed period T1w.

在波形例45中,第二接通固定期間T2包括第二接通固定期間T2u、第二接通固定期間T2v和第二接通固定期間T2w。在波形例45中,電角度為240度~電角度為300度是第二接通固定期間T2u。在波形例45中,電角度為30度~電角度為90度是第二接通固定期間T2v。在波形例45中,電角度為90度~電角度為150度是第二接通固定期間T2w。In waveform example 45, the second on-fixed period T2 includes a second on-fixed period T2u, a second on-fixed period T2v, and a second on-fixed period T2w. In waveform example 45, the second on-fixed period T2u is from an electrical angle of 240 degrees to an electrical angle of 300 degrees. In the waveform example 45, the second on-fixed period T2v is from an electrical angle of 30 degrees to an electrical angle of 90 degrees. In waveform example 45, the second on-fixed period T2w is from an electrical angle of 90 degrees to an electrical angle of 150 degrees.

在波形例45中,在三相中的V相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例45中,第一接通固定期間T1v為90度,與此相對,沒有第一接通固定期間T1u。即,在波形例45中,第一接通固定區間T1v比第一接通固定期間T1u長。另外,第一接通固定期間T1w與第一接通固定期間T1v相同。因此,如圖65B所示,V相的第一半導體開關元件Up(H(高側))的開關損失比W相小。In waveform example 45, in the V phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. Specifically, in waveform example 45, the first on-fixed period T1v is 90 degrees, whereas the first on-fixed period T1u does not exist. That is, in waveform example 45, the first on-fixed period T1v is longer than the first on-fixed period T1u. In addition, the first on-fixed period T1w is the same as the first on-fixed period T1v. Therefore, as shown in FIG. 65B , the switching loss of the first semiconductor switching element Up (H (high side)) of the V phase is smaller than that of the W phase.

在波形例45中,第二接通固定區間T2u、第二接通固定期間T2v和第二接通固定期間T2w相同。詳細地,在波形例45中,第二接通固定區間T2u、第二接通固定區間T2v、第二接通固定期間T2w為60度。In waveform example 45, the second on-fixed period T2u, the second on-fixed period T2v, and the second on-fixed period T2w are the same. In detail, in waveform example 45, the second on-fixed interval T2u, the second on-fixed interval T2v, and the second on-fixed period T2w are 60 degrees.

以上,如參照圖65A及圖65B說明的那樣,在波形例45中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例45中,能同時抑制V相的第一半導體開關元件Vp和U相的第二半導體開關元件Un的發熱。As described above with reference to FIGS. 65A and 65B , in waveform example 45, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 45, the heat generation of the V-phase first semiconductor switching element Vp and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

此外,在波形例45中,如圖65B所示,還能同時抑制V相的第二半導體開關元件Vn、W相的第一半導體開關元Wp、W相的第二半導體開關元件Wn的發熱。In addition, in the waveform example 45, as shown in FIG. 65B , the heat generation of the V-phase second semiconductor switching element Vn, the W-phase first semiconductor switching element Wp, and the W-phase second semiconductor switching element Wn can be simultaneously suppressed.

參照圖66A及圖66B對波形例46進行說明。圖66A是表示輸出電壓Vu、輸出電壓Vv及輸出電壓Vw的圖。圖66B是表示開關損失的圖。Waveform example 46 will be described with reference to FIGS. 66A and 66B . FIG. 66A is a graph showing output voltage Vu, output voltage Vv, and output voltage Vw. FIG. 66B is a graph showing switching loss.

如圖66A所示,波形例46呈如下波形,即根據電角度,某個電角度區間內任一相的輸出電壓固定為1,某另一個電角度區間內任一相的輸出電壓固定為0。詳細地,波形例46呈如下波形,即在電角度為90度~電角度為270度內,任一相的輸出固定為1。此外,波形例46呈如下波形,即在電角度為0度~電角度為90度和電角度為270度~電角度為360度內,任一相的輸出固定為0。在波形例46中,電角度為90度~電角度為270度是高側接通應用期間T3。此外,在波形例46中,電角度為0度~電角度為90度及電角度為270度~電角度為360度是低側接通應用期間T4。As shown in FIG. 66A, the waveform example 46 is the following waveform, that is, according to the electrical angle, the output voltage of any phase in a certain electrical angle interval is fixed at 1, and the output voltage of any phase in another electrical angle interval is fixed at 0 . In detail, waveform example 46 is a waveform in which the output of any one phase is fixed at 1 within an electrical angle of 90 degrees to 270 degrees. In addition, the waveform example 46 is a waveform in which the output of any phase is fixed at 0 within the electrical angle of 0° to 90° and the electrical angle of 270° to 360°. In waveform example 46, the high-side ON application period T3 is from an electrical angle of 90 degrees to an electrical angle of 270 degrees. In addition, in the waveform example 46, the low-side ON application period T4 is the electrical angle of 0 degrees to the electrical angle of 90 degrees and the electrical angle of 270 degrees to the electrical angle of 360 degrees.

在波形例46中,第一接通固定期間T1包括第一接通固定期間T1u和第一接通固定期間T1v。在波形例46中,電角度為90度~電角度為150度是第一接通固定期間T1u。在波形例46中,電角度為150度~電角度為270度是第一接通固定期間T1v。In the waveform example 46, the first on-fixed period T1 includes a first on-fixed period T1u and a first on-fixed period T1v. In waveform example 46, the first on-fixed period T1u is from an electrical angle of 90 degrees to an electrical angle of 150 degrees. In waveform example 46, the first on-fixed period T1v is from an electrical angle of 150 degrees to an electrical angle of 270 degrees.

在波形例46中,第二接通固定期間T2包括第二接通固定期間T2u和第二接通固定期間T2v。在波形例46中,電角度為270度~電角度為330度是第二接通固定期間T2u。在波形例46中,電角度為0度~電角度為90度及電角度為330度~電角度為360度是第二接通固定期間T2v。In the waveform example 46, the second on-fixed period T2 includes a second on-fixed period T2u and a second on-fixed period T2v. In waveform example 46, the second on-fixed period T2u is from an electrical angle of 270 degrees to an electrical angle of 330 degrees. In the waveform example 46, the electrical angle of 0° to 90° and the electrical angle of 330° to 360° are the second on-fixed period T2v.

在波形例46中,在三相中的V相中,第一接通固定期間T1v與第一接通固定期間T1u及第一接通固定期間T1w不同。詳細地,在波形例46中,第一接通固定期間T1v為120度,與此相對,第一接通固定期間T1u為60度,沒有第一接通固定期間T1w。即,在波形例46中,第一接通固定期間T1v比第一接通固定期間T1u及第一接通固定期間T1w長。因此,如圖66B所示,V相的第一半導體開關元件Vp(H(高側))的開關損失比U相及W相小。In waveform example 46, in the V phase among the three phases, the first on-fixed period T1v is different from the first on-fixed period T1u and the first on-fixed period T1w. In detail, in waveform example 46, the first on-fixed period T1v is 120 degrees, whereas the first on-fixed period T1u is 60 degrees, and there is no first on-fixed period T1w. That is, in waveform example 46, the first on-fixed period T1v is longer than the first on-fixed period T1u and the first on-fixed period T1w. Therefore, as shown in FIG. 66B , the switching loss of the V-phase first semiconductor switching element Vp (H (high side)) is smaller than that of the U-phase and W-phase.

在波形例46中,第二接通固定期間T2v與第二接通固定期間T2u及第二接通固定期間T2w不同。詳細地,在波形例46中,第二接通固定期間T2v為120度,與此相對,第二接通固定期間T2u為60度,沒有第二接通固定期間T2w。即,在波形例46中,第二接通固定期間T2v比第二接通固定期間T2u及第二接通固定期間T2w長。因此,如圖66B所示,V相的第二半導體開關元件Vn(L(低側))的開關損失比U相和W相小。In waveform example 46, the second on-fixed period T2v is different from the second on-fixed period T2u and the second on-fixed period T2w. Specifically, in waveform example 46, the second fixed ON period T2v is 120 degrees, whereas the second fixed ON period T2u is 60 degrees, and there is no second fixed ON period T2w. That is, in waveform example 46, the second on-fixed period T2v is longer than the second on-fixed period T2u and the second on-fixed period T2w. Therefore, as shown in FIG. 66B , the switching loss of the second semiconductor switching element Vn (L (low side)) of the V phase is smaller than that of the U phase and the W phase.

以上,如參照圖66A及圖66B說明的那樣,在波形例46中,也與波形例1同樣地,通過同時抑制某相的第一半導體開關元件和某相的第二半導體開關元件的發熱,能抑制電力轉換器(逆變器)的升溫並提高可靠性。在波形例46中,能同時抑制V相的第一半導體開關元件Vp和V相的第二半導體開關元件Vn的發熱。As described above with reference to FIGS. 66A and 66B , in waveform example 46, similarly to waveform example 1, by simultaneously suppressing the heat generation of the first semiconductor switching element of a certain phase and the second semiconductor switching element of a certain phase, It can suppress the temperature rise of the power converter (inverter) and improve the reliability. In waveform example 46, the heat generation of the V-phase first semiconductor switching element Vp and the V-phase second semiconductor switching element Vn can be simultaneously suppressed.

此外,在波形例46中,如圖66B所示,還能同時抑制U相的第一半導體開關元件Up和U相的第二半導體開關元件Un的發熱。In addition, in waveform example 46, as shown in FIG. 66B , heat generation of the U-phase first semiconductor switching element Up and the U-phase second semiconductor switching element Un can be simultaneously suppressed.

以上,參照附圖(圖1~圖66B)對本發明的實施方式進行了說明。但是,本發明不限於上述實施方式,能在不脫離其主旨的範圍內以各種方式實施。為了便於理解,附圖示意性地示出了各結構要素的主體,為了便於製圖,圖示的各結構要素的厚度、長度、個數等與實際不同。此外,上述實施方式所示的各結構要素的材質、形狀、尺寸等為一例而沒有特別限定,能在不實質脫離本發明的效果的範圍內進行各種變更。The embodiments of the present invention have been described above with reference to the drawings ( FIGS. 1 to 66B ). However, the present invention is not limited to the above-described embodiments, and can be implemented in various forms without departing from the gist thereof. For ease of understanding, the drawings schematically show the main body of each structural element, and for the convenience of drawing, the thickness, length, number, etc. of each structural element shown in the illustration are different from the actual ones. In addition, the material, shape, dimension, etc. of each component shown in the said embodiment are an example and are not specifically limited, Various changes can be made in the range which does not substantially deviate from the effect of this invention.

參照圖1~圖66B說明的馬達驅動電路100(電力轉換器)輸出三相的交流輸出,但本發明不限於此。例如,馬達驅動電路100也可以輸出五相以上的交流輸出。例如,馬達驅動電路100也可以輸出五相的交流輸出,由此,驅動五相的馬達M。The motor drive circuit 100 (power converter) described with reference to FIGS. 1 to 66B outputs a three-phase AC output, but the present invention is not limited thereto. For example, the motor drive circuit 100 may output AC outputs of five or more phases. For example, the motor drive circuit 100 may output a five-phase AC output, thereby driving a five-phase motor M.

工業上的可利用性 本發明能理想地應用於電力轉換器及馬達模組。 Industrial availability The invention can be ideally applied to power converters and motor modules.

20,21u,21v,21w,22u,22v,22w:溫度感測器 100:馬達驅動電路(電力轉換器) 102,102u,102v,102w:輸出端子 110:逆變器部 112,112u,112v,112w:串聯體 114,114u,114v,114w:連接點 120:信號生成部 122:載波生成部 124:電壓指令值生成部 126:比較部 200:馬達模組 B:直流電壓源 C:電容器 D:整流元件 M:馬達 N:第二電源端子 P:第一電源端子 T1,T1u,T1v,T1w:第一接通固定期間 T2,T2u,T2v,T2w:第二接通固定期間 T3:高側接通應用期間 T4:低側接通應用期間 Up,Vp,Wp:第一半導體開關元件 Un,Vn,Wn:第二半導體開關元件 V1:第一電壓 V2:第二電壓 Vu,Vv,Vw:輸出電壓 Iu,Iv,Iw:輸出電流 20, 21u, 21v, 21w, 22u, 22v, 22w: temperature sensor 100: Motor drive circuit (power converter) 102, 102u, 102v, 102w: output terminals 110: Inverter Department 112, 112u, 112v, 112w: series body 114, 114u, 114v, 114w: connection points 120: Signal Generation Department 122: Carrier generation unit 124: Voltage command value generator 126: Comparative Department 200:Motor module B: DC voltage source C: Capacitor D: rectifier element M: motor N: Second power supply terminal P: first power terminal T1, T1u, T1v, T1w: first ON fixed period T2, T2u, T2v, T2w: 2nd ON fixed period T3: during high-side ON application T4: during low-side ON application Up, Vp, Wp: first semiconductor switching element Un, Vn, Wn: the second semiconductor switching element V1: first voltage V2: second voltage Vu, Vv, Vw: output voltage Iu, Iv, Iw: output current

圖1是本發明實施方式的馬達模組的方塊圖。 圖2是表示逆變器部的電路圖。 圖3A是表示輸出電壓的圖。 圖3B是表示開關損失的圖。 圖4是表示波形例與開關損失的關係的表。 圖5A是表示輸出電壓的圖。 圖5B是表示開關損失的圖。 圖6A是表示輸出電壓的圖。 圖6B是表示開關損失的圖。 圖7A是表示輸出電壓的圖。 圖7B是表示開關損失的圖。 圖8A是表示輸出電壓的圖。 圖8B是表示開關損失的圖。 圖9A是表示輸出電壓的圖。 圖9B是表示開關損失的圖。 圖10A是表示輸出電壓的圖。 圖10B是表示開關損失的圖。 圖11A是表示輸出電壓的圖。 圖11B是表示開關損失的圖。 圖12A是表示輸出電壓的圖。 圖12B是表示開關損失的圖。 圖13A是表示輸出電壓的圖。 圖13B是表示開關損失的圖。 圖14A是表示輸出電壓的圖。 圖14B是表示開關損失的圖。 圖15A是表示輸出電壓的圖。 圖15B是表示開關損失的圖。 圖16是表示開關損失的圖。 圖17是用於說明UH_UL保護波形的切換的圖。 圖18是用於說明UH_UL保護波形的切換的圖。 圖19是表示開關損失的圖。 圖20是用於說明UH_UL保護波形的切換的圖。 圖21是表示保護波形的切換方法的流程圖。 圖22是表示保護波形的切換方法的流程圖。 圖23是表示保護波形的切換方法的圖。 圖24是表示保護波形的切換方法的圖。 圖25是表示波形例與開關損失的關係的表。 圖26A是表示輸出電壓的圖。 圖26B是表示開關損失的圖。 圖27A是表示輸出電壓的圖。 圖27B是表示開關損失的圖。 圖28A是表示輸出電壓的圖。 圖28B是表示開關損失的圖。 圖29A是表示輸出電壓的圖。 圖29B是表示開關損失的圖。 圖30A是表示輸出電壓的圖。 圖30B是表示開關損失的圖。 圖31A是表示輸出電壓的圖。 圖31B是表示開關損失的圖。 圖32A是表示輸出電壓的圖。 圖32B是表示開關損失的圖。 圖33A是表示輸出電壓的圖。 圖33B是表示開關損失的圖。 圖34A是表示輸出電壓的圖。 圖34B是表示開關損失的圖。 圖35A是表示輸出電壓的圖 圖35B是表示開關損失的圖。 圖36A是表示輸出電壓的圖。 圖36B是表示開關損失的圖。 圖37A是表示輸出電壓的圖。 圖37B是表示開關損失的圖。 圖38A是表示輸出電壓的圖。 圖38B是表示開關損失的圖。 圖39A是表示輸出電壓的圖。 圖39B是表示開關損失的圖。 圖40A是表示輸出電壓的圖。 圖40B是表示開關損失的圖。 圖41A是表示輸出電壓的圖。 圖41B是表示開關損失的圖。 圖42A是表示輸出電壓的圖。 圖42B是表示開關損失的圖。 圖43是表示開關損失的圖。 圖44是用於說明UH_VL保護波形的切換的圖。 圖45是用於說明UH_VL保護波形的切換的圖。 圖46是用於說明UH_VL保護波形的切換的圖。 圖47是表示保護波形的切換方法的流程圖。 圖48是表示保護波形的切換方法的圖。 圖49是表示保護波形的切換方法的圖。 圖50A是表示輸出電壓的圖。 圖50B是表示開關損失的圖。 圖51A是表示輸出電壓的圖。 圖51B是表示開關損失的圖。 圖52A是表示輸出電壓的圖。 圖52B是表示開關損失的圖。 圖53A是表示輸出電壓的圖。 圖53B是表示開關損失的圖。 圖54A是表示輸出電壓的圖。 圖54B是表示開關損失的圖。 圖55A是表示輸出電壓的圖。 圖55B是表示開關損失的圖。 圖56A是表示輸出電壓的圖。 圖56B是表示開關損失的圖。 圖57A是表示輸出電壓的圖。 圖57B是表示開關損失的圖。 圖58A是表示輸出電壓的圖。 圖58B是表示開關損失的圖。 圖59A是表示輸出電壓的圖。 圖59B是表示開關損失的圖。 圖60A是表示輸出電壓的圖。 圖60B是表示開關損失的圖。 圖61A是表示輸出電壓的圖。 圖61B是表示開關損失的圖。 圖62A是表示輸出電壓的圖。 圖62B是表示開關損失的圖。 圖63A是表示輸出電壓的圖。 圖63B是表示開關損失的圖。 圖64A是表示輸出電壓的圖。 圖64B是表示開關損失的圖。 圖65A是表示輸出電壓的圖。 圖65B是表示開關損失的圖。 圖66A是表示輸出電壓的圖。 圖66B是表示開關損失的圖。 FIG. 1 is a block diagram of a motor module according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing an inverter unit. FIG. 3A is a graph showing output voltages. FIG. 3B is a graph showing switching loss. FIG. 4 is a table showing the relationship between waveform examples and switching loss. FIG. 5A is a graph showing output voltages. FIG. 5B is a graph showing switching loss. FIG. 6A is a graph showing output voltages. FIG. 6B is a graph showing switching loss. FIG. 7A is a graph showing output voltages. FIG. 7B is a graph showing switching loss. FIG. 8A is a graph showing output voltages. FIG. 8B is a graph showing switching loss. FIG. 9A is a graph showing output voltages. FIG. 9B is a graph showing switching loss. FIG. 10A is a graph showing output voltages. FIG. 10B is a graph showing switching loss. FIG. 11A is a graph showing output voltages. FIG. 11B is a graph showing switching loss. FIG. 12A is a graph showing output voltages. FIG. 12B is a graph showing switching loss. FIG. 13A is a graph showing output voltages. FIG. 13B is a graph showing switching loss. FIG. 14A is a graph showing output voltages. FIG. 14B is a graph showing switching loss. FIG. 15A is a graph showing output voltages. FIG. 15B is a graph showing switching loss. FIG. 16 is a graph showing switching loss. FIG. 17 is a diagram for explaining switching of UH_UL guard waveforms. FIG. 18 is a diagram for explaining switching of UH_UL guard waveforms. FIG. 19 is a graph showing switching loss. FIG. 20 is a diagram for explaining switching of UH_UL guard waveforms. FIG. 21 is a flowchart showing a method of switching guard waveforms. FIG. 22 is a flowchart showing a method of switching guard waveforms. FIG. 23 is a diagram showing a method of switching guard waveforms. FIG. 24 is a diagram showing a method of switching guard waveforms. FIG. 25 is a table showing the relationship between waveform examples and switching loss. FIG. 26A is a graph showing output voltages. FIG. 26B is a graph showing switching loss. Fig. 27A is a graph showing output voltages. FIG. 27B is a graph showing switching loss. FIG. 28A is a graph showing output voltages. FIG. 28B is a graph showing switching loss. Fig. 29A is a graph showing the output voltage. FIG. 29B is a graph showing switching loss. Fig. 30A is a graph showing the output voltage. FIG. 30B is a graph showing switching loss. FIG. 31A is a graph showing output voltages. FIG. 31B is a graph showing switching loss. Fig. 32A is a graph showing the output voltage. FIG. 32B is a graph showing switching loss. Fig. 33A is a graph showing output voltages. FIG. 33B is a graph showing switching loss. Fig. 34A is a graph showing the output voltage. FIG. 34B is a graph showing switching loss. Figure 35A is a graph showing the output voltage FIG. 35B is a graph showing switching loss. Fig. 36A is a graph showing the output voltage. FIG. 36B is a graph showing switching loss. Fig. 37A is a graph showing the output voltage. FIG. 37B is a graph showing switching loss. Fig. 38A is a graph showing the output voltage. FIG. 38B is a graph showing switching loss. Fig. 39A is a graph showing the output voltage. FIG. 39B is a graph showing switching loss. Fig. 40A is a graph showing the output voltage. FIG. 40B is a graph showing switching loss. Fig. 41A is a graph showing the output voltage. FIG. 41B is a graph showing switching loss. Fig. 42A is a graph showing the output voltage. FIG. 42B is a graph showing switching loss. Fig. 43 is a graph showing switching loss. FIG. 44 is a diagram for explaining switching of UH_VL protection waveforms. FIG. 45 is a diagram for explaining switching of UH_VL protection waveforms. FIG. 46 is a diagram for explaining switching of UH_VL protection waveforms. Fig. 47 is a flowchart showing a method of switching guard waveforms. Fig. 48 is a diagram showing a method of switching guard waveforms. FIG. 49 is a diagram showing a method of switching guard waveforms. FIG. 50A is a graph showing the output voltage. FIG. 50B is a graph showing switching loss. Fig. 51A is a graph showing the output voltage. FIG. 51B is a graph showing switching loss. Fig. 52A is a graph showing the output voltage. FIG. 52B is a graph showing switching loss. Fig. 53A is a graph showing the output voltage. FIG. 53B is a graph showing switching loss. Fig. 54A is a graph showing the output voltage. FIG. 54B is a graph showing switching loss. Fig. 55A is a graph showing the output voltage. FIG. 55B is a graph showing switching loss. Fig. 56A is a graph showing the output voltage. FIG. 56B is a graph showing switching loss. Fig. 57A is a graph showing the output voltage. FIG. 57B is a graph showing switching loss. Fig. 58A is a graph showing the output voltage. FIG. 58B is a graph showing switching loss. Fig. 59A is a graph showing the output voltage. FIG. 59B is a graph showing switching loss. Fig. 60A is a graph showing the output voltage. FIG. 60B is a graph showing switching loss. Fig. 61A is a graph showing the output voltage. FIG. 61B is a graph showing switching loss. Fig. 62A is a graph showing the output voltage. FIG. 62B is a graph showing switching loss. Fig. 63A is a graph showing the output voltage. FIG. 63B is a graph showing switching loss. Fig. 64A is a graph showing the output voltage. FIG. 64B is a graph showing switching loss. Fig. 65A is a graph showing the output voltage. FIG. 65B is a graph showing switching loss. Fig. 66A is a graph showing the output voltage. FIG. 66B is a graph showing switching loss.

100:馬達驅動電路(電力轉換器) 100: Motor drive circuit (power converter)

102,102u,102v,102w:輸出端子 102, 102u, 102v, 102w: output terminals

110:逆變器部 110: Inverter Department

120:信號生成部 120: Signal Generation Department

122:載波生成部 122: Carrier generation unit

124:電壓指令值生成部 124: Voltage command value generator

126:比較部 126: Comparative Department

200:馬達模組 200:Motor module

M:馬達 M: motor

Vu,Vv,Vw:輸出電壓 Vu, Vv, Vw: output voltage

Iu,Iv,Iw:輸出電流 Iu, Iv, Iw: output current

Claims (14)

一種電力轉換器,將直流電轉換為n相的交流電,包括: n個輸出端子,所述n個輸出端子輸出n相的輸出電壓和n相的輸出電流; 第一電源端子,在所述第一電源端子施加有第一電壓; 第二電源端子,在所述第二電源端子施加有比所述第一電壓低的第二電壓;以及 n個串聯體,所述n個串聯體串聯連接有兩個半導體開關元件, n是交流輸出的相數,其是3以上的奇數, 所述n個串聯體相互並聯連接, 所述n個串聯體各自的一端連接於所述第一電源端子,另一端連接於所述第二電源端子, 所述n個串聯體分別具有第一半導體開關元件和第二半導體開關元件, 所述第一半導體開關元件連接於所述第一電源端子, 所述第二半導體開關元件連接於所述第二電源端子, 所述第一半導體開關元件和所述第二半導體開關元件在連接點處連接, 所述n個串聯體各自的所述連接點連接於所述n個輸出端子, 所述第一半導體開關元件以比所述交流輸出的頻率高的頻率在接通和斷開之間切換, 所述第二半導體開關元件以比所述交流輸出的頻率高的頻率在接通和斷開之間切換, 具有保護動作模式,在所述保護動作模式下,在n相的交流輸出的一個週期期間內,所述交流輸出中的至少一相具有第一接通固定期間和第二接通固定期間中的至少一方,在所述第一接通固定期間內,所述第一半導體開關元件固定為接通,在所述第二接通固定期間內,所述第二半導體開關元件固定為接通, 在所述保護動作模式下,在n相中的至少一相中,所述第一接通固定期間與其他任一相的所述第一接通固定期間不同,或者所述第二接通固定期間與其他任一相的所述第二接通固定期間不同。 A power converter that converts direct current to n-phase alternating current, comprising: n output terminals, where the n output terminals output n-phase output voltages and n-phase output currents; a first power terminal, a first voltage is applied to the first power terminal; a second power terminal to which a second voltage lower than the first voltage is applied; and n series bodies, the n series bodies are connected in series with two semiconductor switching elements, n is the phase number of the AC output, which is an odd number of 3 or more, The n serial bodies are connected in parallel with each other, One end of each of the n series bodies is connected to the first power supply terminal, and the other end is connected to the second power supply terminal, The n series bodies respectively have a first semiconductor switching element and a second semiconductor switching element, the first semiconductor switching element is connected to the first power supply terminal, the second semiconductor switching element is connected to the second power supply terminal, the first semiconductor switching element and the second semiconductor switching element are connected at a connection point, The respective connection points of the n serial bodies are connected to the n output terminals, the first semiconductor switching element is switched between on and off at a frequency higher than that of the AC output, the second semiconductor switching element is switched between on and off at a frequency higher than that of the AC output, It has a protection action mode, and in the protection action mode, during one period of the n-phase AC output, at least one phase of the AC output has a period of the first fixed period and the second fixed period. At least one of the first semiconductor switching elements is fixed to be turned on during the first fixed on period, and the second semiconductor switch element is fixed to be turned on during the second fixed period of on, In the protection action mode, in at least one of the n phases, the first on-fixed period is different from the first on-fixed period of any other phase, or the second on-fixed period The period is different from the second on-fixed period of any other phase. 如請求項1所述的電力轉換器,其中, 具有PWM占空比波形不同的多個動作模式,並且具有在電力轉換中進行所述多個動作模式的切換的功能, 所述多個動作模式中的至少一個是所述保護動作模式。 The power converter as claimed in claim 1, wherein, having a plurality of operation modes with different PWM duty ratio waveforms, and having a function of switching the plurality of operation modes during power conversion, At least one of the plurality of operation modes is the protection operation mode. 如請求項2所述的電力轉換器,其中, 所述保護動作模式具有多個保護動作方式, 在所述多個保護動作方式中,在所述交流輸出的一個週期的期間內,各相所占的所述第一接通固定期間及所述第二接通固定期間中的至少一方的比率不同。 The power converter as claimed in claim 2, wherein, The protection action mode has multiple protection action modes, In the plurality of protection operation modes, during one cycle of the AC output, the ratio of each phase to at least one of the first on-fixed period and the second on-fixed period different. 如請求項3所述的電力轉換器,其中, 多個所述保護動作模式及所述多個保護動作方式的切換是基於所述第一半導體開關元件和所述第二半導體開關元件中的至少一方的溫度資訊來進行的。 The power converter as claimed in claim 3, wherein, Switching between the plurality of protection operation modes and the plurality of protection operation modes is performed based on temperature information of at least one of the first semiconductor switching element and the second semiconductor switching element. 如請求項3或4所述的電力轉換器,其中, 所述保護動作模式至少具有四種保護動作方式。 The power converter as claimed in claim 3 or 4, wherein, The protective action mode has at least four protective action modes. 如請求項1至4中任一項所述的電力轉換器,其中, 所述交流輸出的一個週期分割為多個期間, 所述多個期間分別是任一相的所述第一接通固定期間或任一相的所述第二接通固定期間。 The power converter according to any one of claims 1 to 4, wherein, One cycle of the AC output is divided into multiple periods, The plurality of periods are the first on-fixed period of any phase or the second on-fixed period of any phase, respectively. 如請求項1至4中任一項所述的電力轉換器,其中, 任一相的所述第一接通固定期間比其他相的所述第一接通固定期間長,且任一相的所述第二接通固定期間比其他相的所述第二接通固定期間長。 The power converter according to any one of claims 1 to 4, wherein, The first on-fixed period of any phase is longer than the first on-fixed period of other phases, and the second on-fixed period of any phase is longer than the second on-fixed period of other phases The period is long. 如請求項7所述的電力轉換器,其中, 所述第一接通固定期間比其他相的所述第一接通固定期間長的這一相的所述第一接通固定期間及所述第二接通固定期間比其他相的所述第二接通固定期間長的這一相的所述第二接通固定期間均比π/n長且是2π/n以下。 The power converter as claimed in claim 7, wherein, The first on-fixed period and the second on-fixed period of the phase in which the first on-fixed period is longer than the first on-fixed period of the other phase are longer than the first on-fixed period of the other phase The second on-fixed period of the phase with the two longer on-fixed periods is longer than π/n and 2π/n or less. 如請求項8所述的電力轉換器,其中, 所述第一接通固定期間比其他相的所述第一接通固定期間長的這一相的所述第一接通固定期間及所述第二接通固定期間比其他相的所述第二接通固定期間長的這一相的所述第二接通固定期間均是2π/n,所述第一接通固定期間比其他相的所述第一接通固定期間長的這一相的所述第一接通固定期間和所述第二接通固定期間比其他相的所述第二接通固定期間長的這一相的所述第二接通固定期間相互不連續。 The power converter as claimed in claim 8, wherein, The first on-fixed period and the second on-fixed period of the phase in which the first on-fixed period is longer than the first on-fixed period of the other phase are longer than the first on-fixed period of the other phase The second on-fixed period of the phase with the longer on-on fixed period is both 2π/n, and the first on-fixed period is longer than the first on-fixed period of the other phase The first on-fixed period and the second on-fixed period of the phase longer than the second on-fixed period of the other phase are discontinuous with each other. 如請求項1至4、8中任一項所述的電力轉換器,其中, 在n相中的兩相中,一相的所述第一接通固定期間與另一相的所述第二接通固定期間相互連續,所述一相的第一接通固定期間和所述另一相的所述第二接通固定期間的總計是3π/n。 The power converter according to any one of claims 1 to 4, 8, wherein, In two of the n phases, the first on-fixed period of one phase and the second on-fixed period of the other phase are continuous with each other, the first on-fixed period of the one phase and the The total of the second on-fixed periods of the other phase is 3π/n. 如請求項10所述的電力轉換器,其中, 所述一相的所述第一接通固定期間及所述另一相的所述第二接通固定期間分別是3π/(2n)。 The power converter of claim 10, wherein, The first on-fixed period of the one phase and the second on-fixed period of the other phase are 3π/(2n), respectively. 如請求項3、4、8、9中任一項所述的電力轉換器,所述電力轉換器將直流電轉換為n相的交流電,其中, 所述保護動作模式包括第一選擇保護動作模式, 在所述第一選擇保護動作模式下,對一相的所述第一半導體開關元件和所述第二半導體開關元件進行保護, 所述第一選擇保護動作模式包括多個k個保護動作模式,在所述多個k個保護動作模式下,對一相以外的相的所述第一半導體開關元件和所述第二半導體開關元件中的、k個的所述第一半導體開關元件或所述第二半導體開關元件進行保護,其中,k是2n-3以下的自然數, 基於溫度資訊進行所述k個保護動作模式的選擇。 The power converter according to any one of claims 3, 4, 8, and 9, which converts direct current into n-phase alternating current, wherein, The protection action mode includes a first selection protection action mode, In the first selection protection action mode, the first semiconductor switching element and the second semiconductor switching element of one phase are protected, The first selective protection action mode includes a plurality of k protection action modes, and in the plurality of k protection action modes, the first semiconductor switching element and the second semiconductor switch of a phase other than one phase Among the elements, k number of the first semiconductor switching elements or the second semiconductor switching elements are protected, wherein k is a natural number below 2n-3, The selection of the k protection action modes is performed based on the temperature information. 如請求項3、4、8、11中任一項所述的電力轉換器,其中, 所述保護動作模式包括第二選擇保護動作模式, 在所述第二選擇保護動作模式下,對一相的所述第一半導體開關元件和其他相的所述第二半導體開關元件進行保護, 所述一相的所述第一接通固定期間與所述其他相的所述第二接通固定期間連續, 所述第二選擇保護動作模式包括多個k個保護動作模式,在所述多個k個保護動作模式下,對除了所述一相的所述第一半導體開關元件及所述其他相的所述第二半導體開關元件以外的所述第一半導體開關元件及所述第二半導體開關元件中的、k個的所述第一半導體開關元件或所述第二半導體開關元件進行保護,並基於溫度資訊進行所述k個保護動作模式的選擇,其中,k是2n-3以下的自然數。 The power converter according to any one of claims 3, 4, 8, 11, wherein, The protection action mode includes a second selection protection action mode, In the second selection protection action mode, the first semiconductor switching element of one phase and the second semiconductor switching element of other phases are protected, the first on-fixed period of the one phase is continuous with the second on-fixed period of the other phase, The second selective protection action mode includes a plurality of k protection action modes, and in the plurality of k protection action modes, all the first semiconductor switching elements except the one phase and the other phases Among the first semiconductor switching elements and the second semiconductor switching elements other than the second semiconductor switching element, k pieces of the first semiconductor switching elements or the second semiconductor switching elements are protected, and based on the temperature Information is used to select the k protection action modes, wherein k is a natural number below 2n-3. 一種馬達模組,包括: 請求項1至4、8、9、11中任一項所述的電力轉換器;以及 馬達,所述馬達輸入有所述電力轉換器的輸出。 A motor module, comprising: A power converter according to any one of claims 1 to 4, 8, 9, 11; and a motor input with the output of the power converter.
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