TW202240940A - Silica member and led device - Google Patents

Silica member and led device Download PDF

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TW202240940A
TW202240940A TW110147656A TW110147656A TW202240940A TW 202240940 A TW202240940 A TW 202240940A TW 110147656 A TW110147656 A TW 110147656A TW 110147656 A TW110147656 A TW 110147656A TW 202240940 A TW202240940 A TW 202240940A
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layer
silicon oxide
led
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intermediate layer
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TWI799019B (en
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宮本真太郎
拉米什 瓦勒普
小林弘明
横山優
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日商闊斯泰股份有限公司
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Abstract

The present invention relates to a silica member characterized in that the silica member is equipped with a body section comprising a silica glass, the body section is equipped with an other member joining section for another member, the other member joining section is provided with, in order from the body section side, an underlayer, an intermediate layer, and a surface layer formed from Au, the porosity of the underlayer is within the range of 5-10%, the porosity of the intermediate layer is within the range of 4-5%, the thickness of the underlayer is within the range of 20-100 nm, and the thickness of the intermediate layer is within the range of 100-200 nm.

Description

氧化矽構件及LED裝置Silicon oxide components and LED devices

本發明係關於一種氧化矽構件及LED裝置,尤其關於一種適於紫外線LED(Light Emitting Diode,發光二極體)之頂蓋或透鏡等之氧化矽構件及使用該氧化矽構件之LED裝置。The present invention relates to a silicon oxide component and an LED device, in particular to a silicon oxide component suitable for a top cover or a lens of an ultraviolet LED (Light Emitting Diode, light emitting diode) and an LED device using the silicon oxide component.

一直以來,紫外線殺菌廣泛使用水銀燈,但因「關於水銀之水俁條約」生效,自2020年以後,水銀製品之製造及進出口受到限制。因此,作為目前所使用之水銀燈之壽命結束後之替代光源,紫外線LED、尤其是波長280 nm以下之深紫外線LED倍受關注。LED例如係被置於殼體之中,並由玻璃透鏡等密封後再使用。Mercury lamps have been widely used in ultraviolet sterilization for a long time, but due to the entry into force of the "Minamata Treaty on Mercury", since 2020, the manufacture, import and export of mercury products will be restricted. Therefore, ultraviolet LEDs, especially deep ultraviolet LEDs with a wavelength below 280 nm, have attracted much attention as an alternative light source after the life of the mercury lamps currently used is over. For example, the LED is placed in a housing and sealed with a glass lens before use.

例如,於專利文獻1中記載有一種發光模組,其係藉由含有AuSn(金錫)或AgSn(銀錫)等低熔點金屬材料之密封部,將含有氮化鋁等陶瓷之封裝基板與含有石英玻璃之窗構件接合而成。於窗構件之與封裝基板之接合部形成自接合部側起依序積層Ti(鈦)、Cu(銅)、Ni(鎳)、Au(金)而成之多層膜,且對封裝基板之與窗構件之接合部實施了金屬化處理。For example, a light-emitting module is described in Patent Document 1, which uses a sealing part containing a low-melting-point metal material such as AuSn (gold tin) or AgSn (silver tin), and a package substrate containing ceramics such as aluminum nitride and the like. Window components containing quartz glass are bonded. A multilayer film of Ti (titanium), Cu (copper), Ni (nickel), and Au (gold) is formed by laminating layers of Ti (titanium), Cu (copper), Ni (nickel), and Au (gold) sequentially from the joint side on the junction of the window member and the packaging substrate, and the bonding The joints of the window components are metallized.

又,例如於專利文獻2中記載有一種LED裝置,其係利用AuSn焊料將具有透鏡部及凸緣部之氧化矽玻璃製之本體部與氮化鋁製之殼體焊接而成。於與殼體之接合部即凸緣部,利用濕式鍍覆形成厚度0.5 μm之Cu層作為基底層,於其表面,利用濕式鍍覆形成有厚度0.5 μm之Au層,且於殼體之與本體部之接合部,形成有使Ni層及Au層依序成膜所得之殼體金屬化層。 [先前技術文獻] [專利文獻] Also, for example, Patent Document 2 discloses an LED device in which a main body made of vitreous silica having a lens part and a flange part and a case made of aluminum nitride are welded with AuSn solder. On the junction with the housing, that is, the flange, a Cu layer with a thickness of 0.5 μm is formed by wet plating as the base layer, and an Au layer with a thickness of 0.5 μm is formed on the surface by wet plating, and on the housing At the junction with the main body, a shell metallization layer formed by sequentially forming a Ni layer and an Au layer is formed. [Prior Art Literature] [Patent Document]

[專利文獻1]日本專利特開2017-59716號公報 [專利文獻2]日本專利特開2019-46826號公報 [Patent Document 1] Japanese Patent Laid-Open No. 2017-59716 [Patent Document 2] Japanese Patent Laid-Open No. 2019-46826

[發明所欲解決之問題][Problem to be solved by the invention]

然而,於先前技術中存在如下問題:於氧化矽玻璃製之構件與陶瓷製之構件之接合部中,Ti、Cu、Ni、Au等金屬緻密地成膜於氧化矽玻璃製之構件之表面,故而在與陶瓷製之構件接合時會因氧化矽玻璃與金屬之熱膨脹率不同而產生由熱所致之應力。因此,有對氧化矽玻璃產生負載而使構件破損之虞。However, in the prior art, there is a problem that metals such as Ti, Cu, Ni, and Au are densely deposited on the surface of the glass-silicon member at the joint between the glass-silicon-silicon member and the ceramic-made member. Therefore, when bonding with ceramic components, thermal stress will be generated due to the difference in thermal expansion rate between silicon oxide glass and metal. Therefore, there is a possibility that a load is applied to the vitreous silica and the member may be damaged.

本發明係基於此種問題而完成者,目的在於提供一種能夠抑制破損並且良好地進行接合之氧化矽構件及使用該氧化矽構件之LED裝置。 [解決問題之技術手段] The present invention was made based on such a problem, and an object of the present invention is to provide a silicon oxide member capable of suppressing breakage and performing good bonding, and an LED device using the silicon oxide member. [Technical means to solve the problem]

本發明之氧化矽構件具備含有氧化矽玻璃之本體部,上述本體部具有與其他構件之其他構件接合部,於上述其他構件接合部,自本體部之側起依序設置基底層、中間層、及含有Au之表面層,且基底層之空隙率處於5%以上10%以下之範圍內,中間層之空隙率處於4%以上5%以下之範圍內,並且基底層之厚度處於20 nm以上100 nm以下之範圍內,中間層之厚度處於100 nm以上200 nm以下之範圍內。The silicon oxide member of the present invention has a body portion containing vitreous silica, the body portion has another member joining portion with another member, and at the other member joining portion, a base layer, an intermediate layer, and And the surface layer containing Au, and the porosity of the base layer is in the range of 5% to 10%, the porosity of the intermediate layer is in the range of 4% to 5%, and the thickness of the base layer is in the range of 20 nm to 100 nm In the range of not more than 100 nm, the thickness of the intermediate layer is in the range of not less than 100 nm and not more than 200 nm.

本發明之LED裝置具備:LED;基本構件,其支持LED;及本發明之氧化矽構件,其以覆蓋LED之方式與基本構件接合;基本構件具有與氧化矽構件之氧化矽構件接合部,於上述氧化矽構件接合部形成有金屬化層,該金屬化層於表面具有含有Au之第1層,且基本構件之氧化矽構件接合部與氧化矽構件之其他構件接合部藉由含有AuSn焊料之焊料層相接合。 [發明之效果] The LED device of the present invention includes: an LED; a base member that supports the LED; and a silicon oxide member of the present invention that is bonded to the base member in such a way as to cover the LED; The metallized layer having a first layer containing Au on the surface of the silicon oxide component junction is formed, and the silicon oxide component junction of the basic component and other component junctions of the silicon oxide component are formed by solder containing AuSn. The solder layer is bonded. [Effect of Invention]

根據本發明之氧化矽構件,於含有氧化矽玻璃之本體部之其他構件接合部設置基底層、中間層、及含有Au之表面層,且將基底層之空隙率設為5%以上10%以下,將中間層之空隙率設為4%以上5%以下,故而藉由控制空隙率,可緩和本體部與其他構件接合時所產生之應力,抑制本體部之破損,並且將本體部與其他構件牢固地接合,保證氣密性。 又,若將基底層之厚度設為20 nm以上100 nm以下,則可確保密接性並且緩和內部應力。進而,若將中間層之厚度設為100 nm以上200 nm以下,則可保持作為防止焊料之Sn原子擴散之障壁層之效果,並且緩和內部應力。 According to the silicon oxide member of the present invention, a base layer, an intermediate layer, and a surface layer containing Au are provided on the joint portion of the main body containing vitreous silica, and the porosity of the base layer is set to 5% to 10% , the porosity of the intermediate layer is set at 4% to 5%, so by controlling the porosity, the stress generated when the main body part is joined to other components can be eased, the damage of the main body part can be suppressed, and the main body part can be bonded to other components. Securely joined for air tightness. Moreover, if the thickness of the base layer is set to 20 nm or more and 100 nm or less, it is possible to ensure adhesion and relax internal stress. Furthermore, if the thickness of the intermediate layer is set to 100 nm or more and 200 nm or less, the effect as a barrier layer preventing the diffusion of Sn atoms of the solder can be maintained and internal stress can be relaxed.

又,若使基底層之空隙率大於中間層之空隙率,則可減少應力負擔並且提昇基底層與中間層之密接力,從而可更有效地緩和應力並且保證氣密性。Also, if the porosity of the base layer is greater than that of the middle layer, the stress load can be reduced and the adhesion between the base layer and the middle layer can be improved, thereby more effectively relieving stress and ensuring airtightness.

進而,若將表面層之空隙率設為0.1%以上0.5%以下,將表面層之厚度設為150 nm以上500 nm以下,則可抑制內部應力變大,並且藉由焊料將本體部與其他構件牢固地接著。Furthermore, if the porosity of the surface layer is set to 0.1% to 0.5%, and the thickness of the surface layer is set to 150 nm to 500 nm, the increase in internal stress can be suppressed, and the main body and other members can be connected by solder. Follow it firmly.

此外,若使基底層包含Cr(鉻)層及Ti層中之至少1層,則可提昇與含有氧化矽玻璃之本體部之密接性。又,若使中間層包含Ni層及Ti層中之至少1層,則可抑制焊料中所含有之Sn原子滲入至基底層,從而抑制其他構件接合部與基底層之密接力劣化。In addition, if the base layer includes at least one of a Cr (chromium) layer and a Ti layer, the adhesion to the body portion containing vitreous silica can be improved. In addition, if the intermediate layer includes at least one of the Ni layer and the Ti layer, the infiltration of Sn atoms contained in the solder into the base layer can be suppressed, thereby suppressing the deterioration of the adhesion between the junction of other members and the base layer.

此外,又,藉由將由截線法獲得之上述基底層之平均粒徑設為較佳為40 nm以上80 nm以下之範圍內,將由截線法獲得之上述中間層之平均粒徑設為較佳為50 nm以上70 nm以下之範圍內,將由截線法獲得之上述表面層之平均粒徑設為較佳為50 nm以上70 nm以下之範圍內,可出現適度空隙,使楊氏模數下降至特定範圍內,故而各層易變形,可緩和成膜時所產生之內部應力。In addition, by setting the average particle diameter of the above-mentioned base layer obtained by the intercept method within the range of preferably 40 nm to 80 nm, the average particle diameter of the above-mentioned intermediate layer obtained by the intercept method is set to be relatively small. It is preferably in the range of 50 nm to 70 nm, and the average particle size of the above-mentioned surface layer obtained by the intercept method is preferably set in the range of 50 nm to 70 nm, so that moderate voids can appear and the Young's modulus Dropped to a specific range, so each layer is easy to deform, which can ease the internal stress generated during film formation.

根據本發明之LED裝置,使用本發明之氧化矽構件,且於基本構件之氧化矽構件接合部形成金屬化層,該金屬化層於表面具有含有Au之第1層,且藉由含有AuSn焊料之焊料層將基本構件之氧化矽構件接合部與氧化矽構件之其他構件接合部接合,故而可良好地進行接合。According to the LED device of the present invention, the silicon oxide member of the present invention is used, and a metallization layer is formed on the joint portion of the silicon oxide member of the basic member, the metallization layer has a first layer containing Au on the surface, and by containing AuSn solder The solder layer joins the silicon oxide component joints of the base component to other component joints of the silicon oxide component, so good bonding can be performed.

以下,參照圖式對本發明之實施方式詳細地進行說明。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(第1實施方式) 圖1係表示作為第1實施方式之氧化矽構件之LED用透鏡10之構成者,(A)表示剖面構成,(B)表示自下側觀察到之構成。圖2係表示使用LED用透鏡10之LED裝置20之剖面結構者,(A)表示整體構成,(B)將(A)中所示之虛線部分放大表示。 (first embodiment) FIG. 1 shows the structure of a lens 10 for LED as a silicon oxide member of the first embodiment, (A) shows a cross-sectional structure, and (B) shows a structure seen from the lower side. FIG. 2 shows a cross-sectional structure of an LED device 20 using the lens 10 for LEDs. (A) shows the overall structure, and (B) shows an enlarged portion of the dotted line in (A).

該LED用透鏡10具備含有氧化矽玻璃之本體部11。本體部11例如具有半球體狀透鏡部11A、及設置於透鏡部11A之平面側周緣部之凸緣部11B。該LED用透鏡10例如於LED裝置20中使用。This LED lens 10 has a body part 11 made of silica glass. The main body part 11 has, for example, a hemispherical lens part 11A and a flange part 11B provided on the plane-side peripheral edge part of the lens part 11A. This LED lens 10 is used for the LED device 20, for example.

LED裝置20例如具備LED用透鏡10、LED21、及支持LED21之基本構件22,LED用透鏡10係以覆蓋LED21之方式配設於基本構件22。於基本構件22例如設置有供配設LED21之凹部23,且於凹部23之上部例如設置有用以配設LED用透鏡10之階差部24。LED用透鏡10例如配設為凸緣部11B抵接於階差部24,從而將凸緣部11B之底面與階差部24之上表面相接合。即,LED用透鏡10中之凸緣部11B之底面係與作為其他構件之基本構件22之其他構件接合部11C,基本構件22中之階差部24之上表面成為與作為氧化矽構件之LED用透鏡10之氧化矽構件接合部。The LED device 20 includes, for example, a lens 10 for LED, an LED 21 , and a base member 22 supporting the LED 21 , and the lens 10 for an LED is arranged on the base member 22 so as to cover the LED 21 . The base member 22 is provided with, for example, a concave portion 23 for arranging the LED 21 , and a stepped portion 24 for arranging the LED lens 10 is provided, for example, on the top of the concave portion 23 . The lens 10 for LEDs, for example, is disposed so that the flange portion 11B abuts against the step portion 24 so that the bottom surface of the flange portion 11B and the upper surface of the step portion 24 are bonded together. That is, the bottom surface of the flange portion 11B in the lens 10 for LEDs is the joint portion 11C of the other member of the basic member 22 as other members, and the upper surface of the step portion 24 in the basic member 22 becomes the surface of the LED that is a silicon oxide member. The bonding part of the silicon oxide member of the lens 10 is used.

LED用透鏡10之凸緣部11B之底面與基本構件22之階差部24之上表面例如由焊料層25焊接而接合。其目的在於高氣密性地密封。作為焊料層25之材料,較佳為AuSn焊料。又,於階差部24之上表面,較佳為形成有金屬化層26以提昇與焊料之潤濕性。金屬化層26例如較佳為於表面具有含有Au之第1層,且較佳為於第1層與階差部24之間具有Ni層。The bottom surface of the flange portion 11B of the LED lens 10 and the upper surface of the step portion 24 of the base member 22 are bonded by soldering, for example, with a solder layer 25 . Its purpose is to seal with high airtightness. The material of the solder layer 25 is preferably AuSn solder. Moreover, a metallization layer 26 is preferably formed on the upper surface of the step portion 24 to improve wettability with solder. For example, the metallization layer 26 preferably has a first layer containing Au on the surface, and preferably has a Ni layer between the first layer and the step portion 24 .

於LED用透鏡10之凸緣部11B之底面即其他構件接合部11C,自本體部11之側起依序設置有基底層12、中間層13、及含有Au之表面層14。由於氧化矽玻璃不易被焊料潤濕,故而其目的在於將表面金屬化來改善與焊料之相容性。尤其是,Au會與AuSn焊料發生反應而合金化,形成Au 5Sn、AuSn、AuSn 2、AuSn 4等金屬間化合物,故而藉由使表面層14含有Au,可提高與焊料之相容性。再者,於圖1(B)中,對設置有基底層12、中間層13、及表面層14之區域標註點來進行表示。 On the bottom surface of the flange portion 11B of the LED lens 10 , that is, the other member joint portion 11C, a base layer 12 , an intermediate layer 13 , and a surface layer 14 containing Au are provided in order from the side of the body portion 11 . Since silica glass is not easily wetted by solder, its purpose is to metallize the surface to improve compatibility with solder. In particular, Au reacts with AuSn solder and alloys to form intermetallic compounds such as Au 5 Sn, AuSn, AuSn 2 , and AuSn 4 . Therefore, adding Au to the surface layer 14 improves compatibility with solder. In addition, in FIG. 1(B), the area|region where the base layer 12, the intermediate|middle layer 13, and the surface layer 14 are provided is marked and shown with dots.

基底層12係用以提昇與氧化矽玻璃之密接性而抑制剝離者。基底層12例如含有金屬,可由1層構成,亦可由積層之複數層構成。基底層12較佳為包含Cr層及Ti層中之至少1層,例如較佳為由Cr層、Ti層、或積層Cr層及Ti層而成之複數層構成。其原因在於,Cr及Ti可獲得與氧化矽玻璃良好之密接性。The base layer 12 is used to improve the adhesion with the silica glass and suppress peeling. The base layer 12 contains, for example, metal, and may consist of one layer or a plurality of laminated layers. The base layer 12 preferably includes at least one of a Cr layer and a Ti layer, for example, it is preferably composed of a Cr layer, a Ti layer, or a plurality of layers in which a Cr layer and a Ti layer are laminated. The reason for this is that Cr and Ti can obtain good adhesion to silica glass.

中間層13係用以抑制焊料層25中所含有之Sn原子滲入至基底層12,從而抑制其他構件接合部11C與基底層12之密接力劣化者。中間層13例如含有金屬,可由1層構成,亦可由積層之複數層構成。中間層13較佳為包含Ni層及Ti層中之至少1層,例如較佳為由Ni層、Ti層、或積層Ni層及Ti層而成之複數層構成。其原因在於,Ni及Ti之抑制Sn原子滲入至基底層12之效果顯著。The intermediate layer 13 is used to prevent the Sn atoms contained in the solder layer 25 from penetrating into the base layer 12 , thereby suppressing deterioration of the adhesive force between the joint portion 11C of other members and the base layer 12 . The intermediate layer 13 contains metal, for example, and may consist of one layer, or may consist of plural layers laminated|stacked. The intermediate layer 13 preferably includes at least one of a Ni layer and a Ti layer, and is preferably composed of a Ni layer, a Ti layer, or a plurality of layers in which a Ni layer and a Ti layer are laminated, for example. The reason for this is that Ni and Ti have a remarkable effect of suppressing penetration of Sn atoms into the base layer 12 .

基底層12之空隙率較佳為處於5%以上10%以下之範圍內,中間層13之空隙率較佳為處於4%以上5%以下之範圍內。其目的在於,藉由控制空隙率(膜密度),減少因氧化矽玻璃與金屬之熱膨脹率之差異而於本體部11與基本構件22接合時所產生之內部應力。若基底層12之空隙率未達5%,則無法充分緩和應力,本體部11之表面易破損。另一方面,若基底層12之空隙率超過10%,則本體部11與基本構件22之密接力不足,接合時會發生剝離,故而無法保證氣密性,難以獲得良好接著。The porosity of the base layer 12 is preferably in the range of 5% to 10%, and the porosity of the intermediate layer 13 is preferably in the range of 4% to 5%. The purpose is to reduce the internal stress generated when the body part 11 and the base member 22 are bonded due to the difference in thermal expansion coefficient between vitreous silica and metal by controlling the porosity (film density). If the porosity of the base layer 12 is less than 5%, the stress cannot be sufficiently relaxed, and the surface of the main body portion 11 is easily damaged. On the other hand, if the porosity of the base layer 12 exceeds 10%, the adhesion between the main body 11 and the base member 22 will be insufficient, and peeling will occur during bonding. Therefore, airtightness cannot be ensured, and good adhesion cannot be obtained.

又,若中間層13之空隙率未達4%,則無法充分緩和應力,會影響本體部11之破損。若中間層13之空隙率超過5%,則存在因基底層12與中間層13之密接力不足,導致將本體部11與基本構件22接合時基底層12與中間層13之界面剝離之情況。進而,認為於焊接時,焊料之Sn原子易擴散至中間層13及基底層12,促進其他構件接合部11C與基底層12之接合界面之劣化,導致LED裝置20之壽命縮短。In addition, if the porosity of the intermediate layer 13 is less than 4%, the stress cannot be sufficiently relaxed, which may affect the breakage of the main body portion 11 . If the void ratio of the intermediate layer 13 exceeds 5%, the interface between the base layer 12 and the intermediate layer 13 may peel off when the main body 11 and the base member 22 are bonded due to insufficient adhesion between the base layer 12 and the intermediate layer 13. Furthermore, it is considered that during soldering, the Sn atoms of the solder tend to diffuse to the intermediate layer 13 and the base layer 12 , which promotes the deterioration of the joint interface between the joint portion 11C of other components and the base layer 12 , and shortens the life of the LED device 20 .

基底層12之厚度較佳為處於20 nm以上100 nm以下之範圍內。其原因在,若基底層12之厚度未達20 nm,則空隙率較高,故而會因與其他構件接合部11C之密接性不足,導致與基本構件22接合時易剝離。又,其原因在於,若基底層12之厚度超過100 nm,則內部應力變大,本體部11易破損。中間層13之厚度較佳為處於100 nm以上200 nm以下之範圍內。其原因在於,若中間層13之厚度未達100 nm,則作為防止焊料之Sn原子擴散之障壁層之效果下降,若超過200 nm,則內部應力變大,本體部11易破損。又,其原因在於,若中間層13之厚度超過200 nm,則成膜後冷卻時中間層13易收縮而產生龜裂。The thickness of the base layer 12 is preferably in the range of not less than 20 nm and not more than 100 nm. The reason for this is that if the thickness of the base layer 12 is less than 20 nm, the porosity is high, and thus the adhesiveness with the joint portion 11C of other members is insufficient, resulting in easy peeling when joining with the base member 22 . Also, the reason is that when the thickness of the base layer 12 exceeds 100 nm, the internal stress becomes large, and the main body portion 11 is easily damaged. The thickness of the intermediate layer 13 is preferably in the range of not less than 100 nm and not more than 200 nm. The reason is that if the thickness of the intermediate layer 13 is less than 100 nm, the effect of the barrier layer for preventing the diffusion of Sn atoms of the solder is reduced, and if it exceeds 200 nm, the internal stress becomes large, and the main body 11 is easily damaged. The reason for this is that if the thickness of the intermediate layer 13 exceeds 200 nm, the intermediate layer 13 tends to shrink and crack when cooled after film formation.

基底層12之空隙率較佳為大於中間層13之空隙率。其原因在於,藉由增大基底層12之空隙率,可獲得減少對本體部11之應力負擔之效果,藉由使中間層13之空隙率小於基底層12之空隙率,可減少應力負擔並且提昇基底層12與中間層13之密接力,故而可更有效地緩和應力並且保證氣密性。The porosity of the base layer 12 is preferably greater than that of the middle layer 13 . The reason is that by increasing the porosity of the base layer 12, the effect of reducing the stress load on the body portion 11 can be obtained, and by making the porosity of the intermediate layer 13 smaller than that of the base layer 12, the stress load can be reduced and The adhesive force between the base layer 12 and the intermediate layer 13 is improved, so that the stress can be more effectively relieved and the airtightness can be ensured.

表面層14之空隙率較佳為處於0.1%以上0.5%以下之範圍內。其原因在於,可藉由焊料層25,將形成於階差部24之金屬化層26與表面層14更牢固地接著。再者,基底層12、中間層13、及表面層14之空隙率例如可於利用真空蒸鍍法或濺鍍法等進行成膜時,調整壓力或輸入功率來加以控制。The porosity of the surface layer 14 is preferably in the range of not less than 0.1% and not more than 0.5%. The reason is that the metallization layer 26 formed on the step portion 24 and the surface layer 14 can be more firmly bonded by the solder layer 25 . Furthermore, the porosity of the base layer 12 , the intermediate layer 13 , and the surface layer 14 can be controlled by adjusting pressure or input power when forming a film by vacuum evaporation or sputtering, for example.

表面層14之厚度較佳為處於150 nm以上500 nm以下之範圍內。藉由將表面層14之厚度設為150 nm以上,焊接時焊料之Sn原子擴散至表面層14使表面層14整體合金化,藉此可防止表面層14之接合強度下降。其結果,可提高本體部11與基本構件22之接合強度,防止剝離,延長LED裝置20之壽命。藉由將表面層14之厚度設為500 nm以下,可減少內部應力,防止發生斷裂。藉此,可防止如下情況:因上述斷裂部所引起之Sn原子之擴散進展、焊料之濃度下降所引起之熔點上升,導致焊料不易熔化,難以接合。再者,各層之厚度例如可藉由利用FE-SEM(Field Emission Scanning Electron Microscopy,場發射掃描電子顯微鏡)裝置觀察並測定各層之剖面組織而獲得。The thickness of the surface layer 14 is preferably in the range of not less than 150 nm and not more than 500 nm. By setting the thickness of the surface layer 14 to 150 nm or more, the Sn atoms of the solder diffuse into the surface layer 14 during soldering to alloy the surface layer 14 as a whole, thereby preventing the bonding strength of the surface layer 14 from decreasing. As a result, the bonding strength between the main body 11 and the base member 22 can be improved, peeling can be prevented, and the life of the LED device 20 can be extended. By setting the thickness of the surface layer 14 to 500 nm or less, internal stress can be reduced and cracks can be prevented. Thereby, it is possible to prevent the solder from being difficult to melt due to the progress of the diffusion of Sn atoms caused by the fractured portion and the increase of the melting point due to the decrease in the concentration of the solder, making it difficult to join. Furthermore, the thickness of each layer can be obtained, for example, by observing and measuring the cross-sectional structure of each layer with a FE-SEM (Field Emission Scanning Electron Microscopy, Field Emission Scanning Electron Microscopy) device.

又,本發明中之空隙率意指對基底層12、中間層13、或表面層14之上表面進行拍攝並基於所獲得之影像,將空隙部分之總面積除以整體面積所得之二維空隙率。具體而言,例如可藉由如下方法來計算出空隙率,即,利用日立高新技術(股)製造之FE-SEM裝置(S-4800)對基底層12、中間層13、或表面層14之上表面進行拍攝,並使用程式語言Python,利用影像處理模組之OpenCV對所拍攝之影像進行空隙部分之2值化。此時,將影像中對比度大幅變化之部分判斷為氣孔。基底層12或中間層13之上表面例如係藉由蝕刻等去除表面層14及中間層13或表面層14,使基底層12及中間層13露出於表面後進行拍攝。Also, the porosity in the present invention refers to the two-dimensional void obtained by dividing the total area of the void portion by the overall area based on photographing the upper surface of the base layer 12, the intermediate layer 13, or the surface layer 14. Rate. Specifically, for example, the porosity can be calculated by using a FE-SEM device (S-4800) manufactured by Hitachi High-Tech Co., Ltd. to examine the gap between the base layer 12, the intermediate layer 13, or the surface layer 14. The upper surface is photographed, and the program language Python is used, and the image processing module OpenCV is used to binarize the gap part of the captured image. At this time, the portion in the image where the contrast greatly changes is judged as a blowhole. The upper surface of the base layer 12 or the intermediate layer 13 is etched to remove the surface layer 14 and the intermediate layer 13 or the surface layer 14, and the base layer 12 and the intermediate layer 13 are exposed on the surface, and then photographed.

由截線法獲得之基底層12之平均粒徑較佳為處於40 nm以上80 nm以下之範圍內,由截線法獲得之中間層13之平均粒徑較佳為處於50 nm以上70 nm以下之範圍內,由截線法獲得之表面層14之平均粒徑較佳為處於50 nm以上70 nm以下之範圍內。藉由將平均粒徑設為該範圍內,可使各層出現適度空隙,使楊氏模數下降至特定範圍內,故而各層易變形,可緩和成膜時所產生之內部應力。 又,基底層12之楊氏模數較佳為處於構成基底層12之材料塊體之楊氏模數的30%以上70%以下之範圍內,中間層13之楊氏模數較佳為處於構成中間層13之材料塊體之楊氏模數的40%以上80%以下之範圍內,表面層14之楊氏模數較佳為處於20 GPa以上60 GPa以下之範圍內。 The average particle diameter of the base layer 12 obtained by the intercept method is preferably in the range of 40 nm to 80 nm, and the average particle diameter of the intermediate layer 13 obtained by the intercept method is preferably in the range of 50 nm to 70 nm Within the range of , the average particle size of the surface layer 14 obtained by the intercept method is preferably in the range of not less than 50 nm and not more than 70 nm. By setting the average particle size within this range, appropriate voids can appear in each layer, and the Young's modulus can be reduced to a specific range, so that each layer is easily deformed, and the internal stress generated during film formation can be eased. Also, the Young's modulus of the base layer 12 is preferably in the range of 30% to 70% of the Young's modulus of the material block constituting the base layer 12, and the Young's modulus of the intermediate layer 13 is preferably in the range of The Young's modulus of the material block constituting the intermediate layer 13 is within the range of 40% to 80% of the Young's modulus, and the Young's modulus of the surface layer 14 is preferably within the range of 20 GPa to 60 GPa.

再者,於本發明中,由截線法獲得之平均粒徑意指於基底層12、中間層13、或表面層14之上表面觀察到之利用依據ISO13383-1:2012之截線法而測定之平均粒徑。具體而言,例如利用日立高新技術(股)製造之FE-SEM裝置(S-4800)對基底層12、中間層13、或表面層14之上表面進行拍攝,於所拍攝之影像中劃10條直線,對直線上之粒子進行計數,將直線長度除以個數來計算出粒徑。基底層12或中間層13之上表面例如係藉由蝕刻等去除表面層14及中間層13或表面層14,使基底層12及中間層13露出於表面後進行觀察。Furthermore, in the present invention, the average particle diameter obtained by the intercept method means the average particle diameter observed on the surface of the base layer 12, the intermediate layer 13, or the surface layer 14 using the intercept method according to ISO13383-1:2012. Measured average particle size. Specifically, for example, use the FE-SEM device (S-4800) manufactured by Hitachi High-Tech Co., Ltd. to photograph the upper surface of the base layer 12, the middle layer 13, or the surface layer 14, and draw 10 in the image taken. Count the particles on the straight line, and divide the length of the straight line by the number to calculate the particle size. The upper surface of the base layer 12 or the intermediate layer 13 is observed after removing the surface layer 14 and the intermediate layer 13 or the surface layer 14 by etching to expose the base layer 12 and the intermediate layer 13 on the surface.

基底層12、中間層13、或表面層14之楊氏模數例如係使用表面聲波法(依據DIN(德國標準協會)標準50992-1),該表面聲波法係用壓電元件測定向試樣照射脈衝雷射(波長337 nm)而激發之表面聲波,並根據分散曲線來計算楊氏模數。基底層12或中間層13係藉由蝕刻等去除表面層14及中間層13或表面層14,使基底層12及中間層13露出於表面後進行測定。The Young's modulus of the base layer 12, the intermediate layer 13, or the surface layer 14, for example, uses a surface acoustic wave method (according to DIN (German Standards Institute) standard 50992-1), and the surface acoustic wave method uses a piezoelectric element to measure the direction of the sample. Surface acoustic waves excited by irradiating pulsed laser (wavelength 337 nm), and calculate Young's modulus according to the dispersion curve. The base layer 12 or the intermediate layer 13 is measured by removing the surface layer 14 and the intermediate layer 13 or the surface layer 14 by etching etc., and exposing the base layer 12 and the intermediate layer 13 on the surface.

再者,於基底層12或中間層13由複數層構成之情形時,基底層12或中間層13之楊氏模數係針對構成基底層12或中間層13之每一層來進行判斷。即,關於基底層12,較佳為構成基底層12之各層之楊氏模數均處於構成該層之材料塊體之楊氏模數的30%以上70%以下之範圍內,關於中間層13,較佳為構成中間層13之各層之楊氏模數均處於構成該層之材料塊體之楊氏模數的40%以上80%以下之範圍內。Furthermore, when the base layer 12 or the intermediate layer 13 is composed of plural layers, the Young's modulus of the base layer 12 or the intermediate layer 13 is judged for each layer constituting the base layer 12 or the intermediate layer 13 . That is, regarding the base layer 12, it is preferable that the Young's modulus of each layer constituting the base layer 12 is in the range of 30% to 70% of the Young's modulus of the material block constituting the layer, and the intermediate layer 13 Preferably, the Young's modulus of each layer constituting the intermediate layer 13 is in the range of 40% to 80% of the Young's modulus of the material block constituting the layer.

該LED用透鏡10例如可藉由如下方法製造。首先,藉由氧化矽玻璃形成本體部11。例如,利用凝膠注模成型法使氧化矽粉成形,並進行燒結而形成本體部11。繼而,於凸緣部11B之底面之至少一部分即其他構件接合部11C,依序積層基底層12、中間層13、及表面層14。於基底層12、中間層13、及表面層14之成膜中,例如使用真空蒸鍍法或濺鍍法,將壓力適當調整於例如0.5 Pa至3.0 Pa之範圍內,將輸入功率適當調整於例如50 W至200 W之範圍內,藉此調整各層之空隙率。This LED lens 10 can be manufactured by the following method, for example. First, the body part 11 is formed by silicon oxide glass. For example, silicon oxide powder is molded by gel injection molding and sintered to form the main body 11 . Next, base layer 12 , intermediate layer 13 , and surface layer 14 are sequentially laminated on at least a part of the bottom surface of flange portion 11B, that is, other member joint portion 11C. In the film formation of the base layer 12, the intermediate layer 13, and the surface layer 14, for example, use a vacuum evaporation method or a sputtering method, and properly adjust the pressure in the range of, for example, 0.5 Pa to 3.0 Pa, and properly adjust the input power at For example, within the range of 50 W to 200 W, the porosity of each layer can be adjusted accordingly.

又,該LED用透鏡10例如係藉由焊料層25而與基本構件22接合。例如,於基本構件22之形成有金屬化層26之階差部24之上配置帶狀焊料,於其上抵接凸緣部11B之形成有基底層12、中間層13及表面層14之其他構件接合部11C而配設LED用透鏡10,並於無氧環境下進行加熱熔融而焊接。Moreover, the lens 10 for LEDs is bonded to the base member 22 via, for example, a solder layer 25 . For example, a ribbon-shaped solder is placed on the stepped part 24 of the base member 22 on which the metallization layer 26 is formed, and other parts on which the base layer 12, the intermediate layer 13, and the surface layer 14 are formed abut the flange part 11B. The LED lens 10 is disposed in the member joining portion 11C, and is heated and melted in an oxygen-free environment to be welded.

如此,根據本實施方式,於含有氧化矽玻璃之本體部11之其他構件接合部11C設置基底層12、中間層13、及含有Au之表面層14,且將基底層12之空隙率設為5%以上10%以下,將中間層13之空隙率設為4%以上5%以下,故而可緩和本體部11與基本構件22接合時所產生之應力,抑制本體部11之破損,並且將本體部11與基本構件22牢固地接合,保證氣密性。 又,若將基底層12之厚度設為20 nm以上100 nm以下,則可確保密接性並且緩和內部應力。進而,若將中間層13之厚度設為100 nm以上200 nm以下,則可保持作為防止焊料之Sn原子擴散之障壁層之效果,並且緩和內部應力。 Thus, according to this embodiment, the base layer 12, the intermediate layer 13, and the surface layer 14 containing Au are provided on the other member joint portion 11C of the body portion 11 containing vitreous silica, and the porosity of the base layer 12 is set to 5. % to 10%, the void ratio of the intermediate layer 13 is set to 4% to 5%, so the stress generated when the main body part 11 and the basic member 22 are joined can be eased, the damage of the main body part 11 can be suppressed, and the main body part 11 is firmly joined with the basic component 22 to ensure airtightness. Moreover, if the thickness of the base layer 12 is set to 20 nm or more and 100 nm or less, the internal stress can be relaxed while ensuring adhesion. Furthermore, if the thickness of the intermediate layer 13 is set to 100 nm or more and 200 nm or less, the effect as a barrier layer preventing the diffusion of Sn atoms of the solder can be maintained and internal stress can be relaxed.

又,若使基底層12之空隙率大於中間層13之空隙率,則可減少應力負擔並且提昇基底層12與中間層13之密接力,從而可更有效地緩和應力並且保證氣密性。In addition, if the porosity of the base layer 12 is greater than that of the intermediate layer 13, the stress burden can be reduced and the adhesion between the base layer 12 and the intermediate layer 13 can be improved, thereby more effectively relieving stress and ensuring airtightness.

進而,若將表面層14之空隙率設為0.1%以上0.5%以下,將表面層14之厚度設為150 nm以上500 nm以下,則可抑制內部應力變大,並且藉由焊料將本體部11與基本構件22牢固地接著。Furthermore, if the porosity of the surface layer 14 is set to 0.1% to 0.5%, and the thickness of the surface layer 14 is set to be 150 nm to 500 nm, the increase in internal stress can be suppressed, and the main body 11 can be bonded by solder. It is firmly bonded to the base member 22.

此外,若使基底層12包含Cr層及Ti層中之至少1層,則可提昇與含有氧化矽玻璃之本體部11之密接性。又,若使中間層13包含Ni層及Ti層中之至少1層,則可抑制焊料中所含有之Sn原子滲入至基底層12,從而抑制其他構件接合部11C與基底層12之密接力劣化。In addition, if the base layer 12 includes at least one of the Cr layer and the Ti layer, the adhesion to the main body portion 11 containing vitreous silica can be improved. In addition, if the intermediate layer 13 includes at least one layer of the Ni layer and the Ti layer, the infiltration of Sn atoms contained in the solder into the base layer 12 can be suppressed, thereby suppressing the deterioration of the adhesion between the joint portion 11C of other members and the base layer 12. .

此外,又,藉由將由截線法獲得之上述基底層12之平均粒徑設為較佳為40 nm以上80 nm以下之範圍內,將由截線法獲得之上述中間層13之平均粒徑設為較佳為50 nm以上70 nm以下之範圍內,將由截線法獲得之上述表面層14之平均粒徑設為較佳為50 nm以上70 nm以下之範圍內,可出現適度空隙,使楊氏模數下降至特定範圍內,故而各層易變形,可緩和成膜時所產生之內部應力。In addition, by setting the average particle diameter of the above-mentioned base layer 12 obtained by the intercept method within a range of preferably 40 nm to 80 nm, the average particle diameter of the above-mentioned intermediate layer 13 obtained by the intercept method is set to For being preferably in the range of not less than 50 nm and not more than 70 nm, the average particle diameter of the above-mentioned surface layer 14 obtained by the intercept method is set to be preferably in the range of not less than 50 nm and not more than 70 nm, so that moderate voids can appear, so that poplar Since the modulus of the film falls within a specific range, each layer is easily deformed, and the internal stress generated during film formation can be eased.

(第2實施方式) 圖3係表示作為第2實施方式之氧化矽構件之LED用頂蓋30之構成者,(A)表示剖面構成,(B)表示自下側觀察到之構成。該LED用頂蓋30與第1實施方式中說明之LED用透鏡10除了本體部31之形狀不同以外,其他部分具有相同之構成。因此,對相同構成要素標註相同符號,並且對相對應之構成要素標註將十位改成''3''後之符號,省略其詳細說明。 (second embodiment) FIG. 3 shows the structure of the LED top cover 30 which is a silicon oxide member of the second embodiment, (A) shows a cross-sectional structure, and (B) shows a structure seen from the lower side. This LED top cover 30 has the same configuration as that of the LED lens 10 described in the first embodiment except for the shape of the main body 31 . Therefore, the same symbols are attached to the same constituent elements, and symbols in which the tens digit is changed to ''3'' are assigned to the corresponding constituent elements, and detailed descriptions thereof are omitted.

本體部31含有氧化矽玻璃,例如具有一端密封圓筒狀之頂蓋部31A、及設置於頂蓋部31A之開口端部之凸緣部31B。該凸緣部31B係對應於第1實施方式中之凸緣部11B者,與第1實施方式同樣地配設於基本構件22之階差部24,凸緣部31B之底面與階差部24之上表面相接合(參照圖2)。即,於該LED用頂蓋30,凸緣部31B之底面成為與作為其他構件之基本構件22之其他構件接合部31C。於LED用頂蓋30之凸緣部31B之底面即其他構件接合部31C,與第1實施方式同樣地自本體部31之側起依序設置有基底層12、中間層13、及含有Au之表面層14。於圖3(B)中,對設置有基底層12、中間層13、及表面層14之區域標註點來進行表示。The main body part 31 is made of silica glass, and has, for example, a cylindrical top cover part 31A with one end sealed, and a flange part 31B provided at the opening end part of the top cover part 31A. The flange portion 31B corresponds to the flange portion 11B in the first embodiment, and is disposed on the step portion 24 of the base member 22 similarly to the first embodiment, and the bottom surface of the flange portion 31B is in contact with the step portion 24. The upper surface is joined (see Figure 2). That is, in this top cover 30 for LEDs, the bottom surface of the flange part 31B becomes the other member joining part 31C of the basic member 22 which is another member. On the bottom surface of the flange portion 31B of the LED top cover 30 , that is, the other member joint portion 31C, the base layer 12 , the intermediate layer 13 , and the Au-containing layer are sequentially provided from the side of the main body portion 31 in the same manner as in the first embodiment. surface layer14. In FIG. 3(B), the area where the base layer 12 , the intermediate layer 13 , and the surface layer 14 are provided is indicated by marking dots.

該LED用頂蓋30能夠以與第1實施方式中說明之LED用透鏡10相同之方式進行製造,且能夠以相同方式使用。又,可獲得相同效果。 [實施例] This LED top cover 30 can be manufactured in the same manner as the LED lens 10 described in the first embodiment, and can be used in the same manner. Also, the same effect can be obtained. [Example]

(實施例1) 製作如圖1所示之LED用透鏡10。首先,利用凝膠注模成型法使氧化矽粉成形,並進行焙燒而製作具有透鏡直徑ϕ3 mm、透鏡高度1.5 mm之半球體狀透鏡部11A、及凸緣直徑3.5×3.5 mm、凸緣厚度0.5 mm之四邊形凸緣部11B之氧化矽玻璃製之本體部11。繼而,於凸緣部11B之底面依序成膜厚度50 nm之Cr層作為基底層12、厚度150 nm之Ni層作為中間層13、厚度300 nm之Au層作為表面層14。基底層12、中間層13、及表面層14之成膜係利用濺鍍裝置,自1 Pa~3 Pa之範圍內適當設定壓力條件,且自120 W~160 W之範圍內適當設定輸入功率來進行。繼而,將感光性抗蝕劑塗佈於凸緣部11B之底面所成膜之基底層12、中間層13、及表面層14之上,並利用光微影法成形為外徑3.3 mm×3.3 mm、內徑2.7 mm×2.7 mm之框狀圖案。 (Example 1) A lens 10 for LEDs as shown in FIG. 1 was fabricated. First, silicon oxide powder was molded by gel injection molding, and fired to produce a hemispherical lens part 11A with a lens diameter of ϕ3 mm and a lens height of 1.5 mm, and a flange diameter of 3.5×3.5 mm and a flange thickness The body part 11 made of silica glass with a square flange part 11B of 0.5 mm. Then, a Cr layer with a thickness of 50 nm as the base layer 12 , a Ni layer with a thickness of 150 nm as the middle layer 13 , and an Au layer with a thickness of 300 nm as the surface layer 14 were sequentially formed on the bottom surface of the flange portion 11B. The base layer 12, the middle layer 13, and the surface layer 14 are formed by using a sputtering device, and the pressure conditions are appropriately set in the range of 1 Pa to 3 Pa, and the input power is appropriately set in the range of 120 W to 160 W. conduct. Next, a photosensitive resist is coated on the base layer 12, the intermediate layer 13, and the surface layer 14 formed on the bottom surface of the flange portion 11B, and formed into an outer diameter of 3.3 mm×3.3 mm by photolithography. mm, frame pattern with an inner diameter of 2.7 mm×2.7 mm.

對所製作之LED用透鏡10測定基底層12、中間層13、及表面層14之空隙率。測定時,使用日立高新技術(股)製造之FE-SEM裝置(S-4800),以施加電壓5 kV、10萬倍之放大率拍攝各層之表面影像。空隙率(%)係使用程式語言Python,利用影像處理模組之OpenCV對所拍攝之影像進行空隙部分之2值化,將空隙部分之總面積除以整體面積後乘以100而計算出。此時,將對比度大幅變化之部分判斷為氣孔。又,於拍攝中間層13之表面時,於藥液為AURUM-314(關東化學(股)製造)、溫度為常溫、時間為5分鐘之條件下蝕刻表面層14,使中間層13成為最表面後再進行拍攝。於拍攝基底層12之表面時,以上述方式蝕刻去除表面層14後,於藥液為混合酸Cu-02(關東化學(股)製造)、溫度為常溫、時間為10分鐘之條件下蝕刻中間層13,使基底層12成為最表面後再進行拍攝。The porosity of the base layer 12 , the intermediate layer 13 , and the surface layer 14 were measured for the fabricated lens 10 for LED. During the measurement, the FE-SEM device (S-4800) manufactured by Hitachi High-Tech Co., Ltd. was used to take the surface image of each layer with an applied voltage of 5 kV and a magnification of 100,000 times. The porosity (%) is calculated by using the programming language Python, using OpenCV of the image processing module to binarize the voids in the captured image, dividing the total area of the voids by the overall area and multiplying by 100. At this time, the portion where the contrast greatly changed was determined to be a blow hole. Also, when photographing the surface of the intermediate layer 13, the surface layer 14 was etched under the condition that the chemical solution was AURUM-314 (manufactured by Kanto Chemical Co., Ltd.), the temperature was normal temperature, and the time was 5 minutes, so that the intermediate layer 13 became the outermost surface. Shoot later. When photographing the surface of the base layer 12, after removing the surface layer 14 by etching in the above-mentioned manner, the middle layer was etched under the condition that the chemical solution was a mixed acid Cu-02 (manufactured by Kanto Chemical Co., Ltd.), the temperature was normal temperature, and the time was 10 minutes. Layer 13, make the base layer 12 the outermost surface before shooting.

圖4中表示基底層12之(A)SEM影像、(B)處理影像、(C)空隙部分之影像。圖5中表示中間層13之(A)SEM影像、(B)處理影像、(C)空隙部分之影像。圖6中表示表面層14之(A)SEM影像、(B)處理影像、(C)空隙部分之影像。如圖4至圖6所示,確認到於基底層12、中間層13、及表面層14分別存在空隙。又,關於空隙率,基底層12為9.5%,中間層13為4.6%,表面層14為0.2%。FIG. 4 shows (A) SEM image, (B) processed image, and (C) image of void portion of base layer 12 . FIG. 5 shows (A) SEM image, (B) processed image, and (C) image of void portion of intermediate layer 13 . FIG. 6 shows (A) SEM image, (B) processed image, and (C) image of void portion of surface layer 14 . As shown in FIGS. 4 to 6 , it was confirmed that voids existed in the base layer 12 , the intermediate layer 13 , and the surface layer 14 . Also, the void ratio was 9.5% for the base layer 12 , 4.6% for the intermediate layer 13 , and 0.2% for the surface layer 14 .

又,測定由截線法獲得之基底層12、中間層13、及表面層14之平均粒徑。測定時,使用日立高新技術(股)製造之FE-SEM裝置(S-4800)拍攝各層之上表面,並依據ISO13383-1:2012來計算出。其結果,關於由截線法獲得之平均粒徑,基底層12為63 nm,中間層13為58 nm,表面層14為62 nm。Also, the average particle diameters of the base layer 12, the intermediate layer 13, and the surface layer 14 obtained by the intercept method were measured. When measuring, use the FE-SEM device (S-4800) manufactured by Hitachi High-Tech Co., Ltd. to photograph the upper surface of each layer, and calculate according to ISO13383-1:2012. As a result, the average particle diameter obtained by the intercept method was 63 nm for the base layer 12 , 58 nm for the intermediate layer 13 , and 62 nm for the surface layer 14 .

進而,測定基底層12、中間層13、及表面層14之楊氏模數。測定係藉由表面聲波法(依據DIN(德國標準協會)標準50992-1)來進行,該表面聲波法係用壓電元件測定向各層之上表面照射脈衝雷射(波長337 nm)而激發之表面聲波,並根據分散曲線來計算楊氏模數。其結果,基底層12之楊氏模數為構成基底層12之材料即Cr塊體之楊氏模數之50%,中間層13之楊氏模數為構成中間層13之材料即Ni塊體之楊氏模數之60%,表面層14之楊氏模數為40 GPa。Furthermore, the Young's modulus of the base layer 12, the intermediate layer 13, and the surface layer 14 were measured. The measurement is carried out by the surface acoustic wave method (according to DIN (German Standards Institute) standard 50992-1). The surface acoustic wave method uses a piezoelectric element to measure the excitation by irradiating pulsed laser (wavelength 337 nm) to the upper surface of each layer. surface acoustic waves, and calculate Young's modulus from the dispersion curve. As a result, the Young's modulus of the base layer 12 is 50% of the Young's modulus of the bulk Cr which is the material constituting the base layer 12, and the Young's modulus of the intermediate layer 13 is the bulk Ni which is the material constituting the intermediate layer 13. 60% of the Young's modulus, the Young's modulus of the surface layer 14 is 40 GPa.

繼而,準備如圖2所示之氮化鋁製之基本構件22。於基本構件22之階差部24形成有金屬化層26,該金屬化層26於表面具有含有Au之第1層,且於第1層與階差部24之間具有Ni層。其後,將外徑3.2 mm×3.2 mm、內徑2.8 mm×2.8 mm、厚度20 μm之框狀AuSn焊料插入至本體部11之凸緣部11B與基本構件22之階差部24之間,並於溫度300℃、壓力0.5 MPa、30秒之加壓條件下進行接合,獲得LED裝置20。製作10個LED裝置20,結果於全部10個LED裝置20中,LED用透鏡10均未發現破損。又,為了確認LED裝置20之氣密性即本體部11與基本構件22之密接性,進行FLORINERT試驗(通常為粗漏試驗),確認到對於全部10個LED裝置20均未發現洩漏,氣密性得以保持。 再者,上述FLORINERT試驗係依照MIL(military,美軍)標準(MIL-STD-883)中規定之氣密性試驗方法者,且係藉由如下方法來評估上述氣密性,即,於容器中貯存沸點較高且黏性較低之稱作FLORINERT(美國3M公司商標)之氟氯碳化物系液體,將試樣於加熱至125℃之FLORINERT中浸漬1分鐘,觀察有無氣泡洩漏自試樣中產生。 Next, a base member 22 made of aluminum nitride as shown in FIG. 2 is prepared. A metallization layer 26 having a first layer containing Au on the surface and a Ni layer between the first layer and the step portion 24 is formed on the step portion 24 of the base member 22 . Thereafter, a frame-shaped AuSn solder with an outer diameter of 3.2 mm×3.2 mm, an inner diameter of 2.8 mm×2.8 mm, and a thickness of 20 μm was inserted between the flange portion 11B of the main body portion 11 and the step portion 24 of the basic member 22, And bonding was carried out under pressure conditions of a temperature of 300° C., a pressure of 0.5 MPa, and 30 seconds to obtain an LED device 20 . As a result of producing ten LED devices 20 , the lens 10 for LEDs was not damaged in all ten LED devices 20 . In addition, in order to confirm the airtightness of the LED device 20, that is, the tightness of the main body 11 and the basic member 22, a FLORINERT test (usually a gross leak test) was performed, and it was confirmed that no leakage was found for all 10 LED devices 20, and the airtightness Sex is preserved. Furthermore, the above-mentioned FLORINERT test is in accordance with the airtightness test method stipulated in the MIL (military, US military) standard (MIL-STD-883), and the above-mentioned airtightness is evaluated by the following method, that is, in the container Store a chlorofluorocarbon liquid called FLORINERT (trademark of 3M Company in the United States) with a high boiling point and low viscosity. Immerse the sample in FLORINERT heated to 125°C for 1 minute, and observe whether there are bubbles leaking from the sample. produce.

(比較例1) 以與實施例1相同之方式製作本體部11後,利用真空蒸鍍裝置於凸緣部11B之底面依序成膜空隙率0.1%之Cr層作為基底層12、空隙率0.1%之Ni層作為中間層13、空隙率0.05%之Au層作為表面層14,並以與實施例1相同之方式成形為框狀圖案。各層之厚度設為與實施例1相同,並以與實施例1相同之方式測定各層之空隙率。繼而,以與實施例1相同之方式將所製作之LED用透鏡10與氮化鋁製之基本構件22接合,從而製作LED裝置20。製作10個LED裝置20,結果10個中有8個自凸緣部11B之外徑出現龜裂,發現破損。 (comparative example 1) After the body part 11 was produced in the same manner as in Example 1, a Cr layer with a porosity of 0.1% was sequentially formed on the bottom surface of the flange part 11B using a vacuum evaporation device as the base layer 12, and a Ni layer with a porosity of 0.1% as the base layer 12. The middle layer 13 and the Au layer with a porosity of 0.05% were used as the surface layer 14 and formed into a frame pattern in the same manner as in Example 1. The thickness of each layer was set to be the same as in Example 1, and the porosity of each layer was measured in the same manner as in Example 1. Next, the manufactured LED lens 10 was bonded to the base member 22 made of aluminum nitride in the same manner as in Example 1 to manufacture the LED device 20 . Ten LED devices 20 were manufactured, and cracks appeared in 8 out of 10 from the outer diameter of the flange part 11B, and damage was found.

(比較例2) 以與實施例1相同之方式製作本體部11後,使用濺鍍裝置於凸緣部11B之底面,以與實施例1相同之厚度依序成膜Cr層作為基底層12、Ni層作為中間層13、Au層作為表面層14,並以與實施例1相同之方式成形為框狀圖案。此時,藉由增加濺鍍裝置之壓力並且降低輸出,提高各層之空隙率。以與實施例1相同之方式測定各層之空隙率,結果基底層12為25%,中間層13為25%,表面層14為5%。繼而,以與實施例1相同之方式將所製作之LED用透鏡10與氮化鋁製之基本構件22接合,從而製作LED裝置20。製作10個LED裝置20,結果於全部10個LED裝置20中,LED用透鏡10均未發現破損。又,藉由FLORINERT試驗確認LED裝置20之氣密性即本體部11與基本構件22之密接性,結果10個中有6個發現洩漏。用手拉拽發現洩漏之LED裝置20,結果LED用透鏡10與基本構件22容易剝離。又,對剩餘4個LED裝置20亦進行使用試驗,結果於使用過程中LED用透鏡10自基本構件22剝離。即,可知接合狀態較差。 (comparative example 2) After producing the main body 11 in the same manner as in Example 1, use a sputtering device to sequentially form a Cr layer as the base layer 12 and a Ni layer as the intermediate layer with the same thickness as in Example 1 on the bottom surface of the flange 11B. 13. The Au layer is used as the surface layer 14, and is formed into a frame pattern in the same manner as in Example 1. At this time, by increasing the pressure of the sputtering device and reducing the output, the porosity of each layer is increased. The porosity of each layer was measured in the same manner as in Example 1. As a result, the base layer 12 was 25%, the middle layer 13 was 25%, and the surface layer 14 was 5%. Next, the manufactured LED lens 10 was bonded to the base member 22 made of aluminum nitride in the same manner as in Example 1 to manufacture the LED device 20 . As a result of producing ten LED devices 20 , the lens 10 for LEDs was not damaged in all ten LED devices 20 . In addition, the airtightness of the LED device 20, that is, the adhesion between the main body 11 and the base member 22 was confirmed by the FLORINERT test, and leakage was found in 6 out of 10. The leaked LED device 20 was pulled by hand, and as a result, the LED lens 10 and the basic member 22 were easily peeled off. Moreover, the use test was also performed on the remaining four LED devices 20 , and as a result, the lens 10 for LEDs was peeled off from the base member 22 during use. That is, it can be seen that the joint state is poor.

(實施例1與比較例1、2之比較) 根據實施例1、比較例1、比較例2之結果可知,若基底層12及中間層13之空隙率較小,則無法充分緩和應力,會導致LED用透鏡10破損。又可知,若基底層12及中間層13之空隙率較大,則無法以較高之氣密性將LED用透鏡10與基本構件22良好地接合。 (Comparison between Example 1 and Comparative Examples 1 and 2) According to the results of Example 1, Comparative Example 1, and Comparative Example 2, it can be seen that if the porosity of the base layer 12 and the intermediate layer 13 is small, the stress cannot be sufficiently relieved, and the LED lens 10 may be damaged. It can also be seen that if the porosity of the base layer 12 and the intermediate layer 13 is large, the LED lens 10 and the base member 22 cannot be bonded well with high airtightness.

(比較例3) 以與實施例1相同之方式製作本體部11,於凸緣部11B之底面成膜基底層12、中間層13、及表面層14,並成形為框狀圖案。此時,將基底層12之厚度設為300 nm,將中間層13之厚度設為500 nm,將表面層14之厚度設為800 nm。各層之空隙率與實施例1相同。繼而,以與實施例1相同之方式將所製作之LED用透鏡10與氮化鋁製之基本構件22接合,從而製作LED裝置20。製作10個LED裝置20,結果10個中有7個自凸緣部11B之外徑出現龜裂,發現破損。 (comparative example 3) The body part 11 was produced in the same manner as in Example 1, and the base layer 12, the intermediate layer 13, and the surface layer 14 were formed on the bottom surface of the flange part 11B, and formed into a frame pattern. At this time, the thickness of the base layer 12 was set to 300 nm, the thickness of the intermediate layer 13 was set to 500 nm, and the thickness of the surface layer 14 was set to 800 nm. The porosity of each layer is the same as in Example 1. Next, the manufactured LED lens 10 was bonded to the base member 22 made of aluminum nitride in the same manner as in Example 1 to manufacture the LED device 20 . Ten LED devices 20 were manufactured, and cracks were found in seven of the ten LED devices from the outer diameter of the flange portion 11B, and damage was found.

(比較例4) 以與實施例1相同之方式製作本體部11,於凸緣部11B之底面成膜基底層12、中間層13、及表面層14,並成形為框狀圖案。此時,將基底層12之厚度設為10 nm,將中間層13之厚度設為50 nm,將表面層14之厚度設為100 nm。各層之空隙率與實施例1相同。繼而,以與實施例1相同之方式將所製作之LED用透鏡10與氮化鋁製之基本構件22接合,從而製作LED裝置20。製作10個LED裝置20,結果於全部10個LED裝置20中,LED用透鏡10均未發現破損。又,藉由FLORINERT試驗確認LED裝置20之氣密性即本體部11與基本構件22之密接性,結果10個中10個均發現洩漏。用手拉拽發現洩漏之LED裝置20,結果LED用透鏡10與基本構件22容易剝離,從而可知接合狀態較差。 (comparative example 4) The body part 11 was produced in the same manner as in Example 1, and the base layer 12, the intermediate layer 13, and the surface layer 14 were formed on the bottom surface of the flange part 11B, and formed into a frame pattern. At this time, the thickness of the base layer 12 was set to 10 nm, the thickness of the intermediate layer 13 was set to 50 nm, and the thickness of the surface layer 14 was set to 100 nm. The porosity of each layer is the same as in Example 1. Next, the manufactured LED lens 10 was bonded to the base member 22 made of aluminum nitride in the same manner as in Example 1 to manufacture the LED device 20 . As a result of producing ten LED devices 20 , the lens 10 for LEDs was not damaged in all ten LED devices 20 . In addition, the airtightness of the LED device 20, that is, the adhesion between the main body 11 and the base member 22 was confirmed by the FLORINERT test, and leaks were found in 10 out of 10 units. The leaked LED device 20 was pulled by hand, and as a result, the LED lens 10 and the base member 22 were easily peeled off, and it was found that the bonding state was poor.

(實施例1與比較例3、4之比較) 根據實施例1、比較例3、比較例4之結果可知,若基底層12、中間層13、及表面層14之厚度較厚,則無法充分緩和應力,會導致LED用透鏡10破損。又可知,若基底層12、中間層13、及表面層14之厚度較薄,則無法以較高之氣密性將LED用透鏡10與基本構件22良好地接合。 (Comparison between Example 1 and Comparative Examples 3 and 4) According to the results of Example 1, Comparative Example 3, and Comparative Example 4, it can be known that if the base layer 12, the intermediate layer 13, and the surface layer 14 are thicker, the stress cannot be sufficiently relieved, and the LED lens 10 will be damaged. It can also be seen that if the base layer 12 , the intermediate layer 13 , and the surface layer 14 are thin, the LED lens 10 and the base member 22 cannot be bonded well with high airtightness.

以上列舉了實施方式對本發明進行說明,但本發明並不限定於上述實施方式,可進行各種變化。例如,於上述實施方式中,作為氧化矽構件,列舉了作為光源用構件之LED用透鏡10及LED用頂蓋30進行說明,但亦可適用於其他光源用構件。又,亦可適用於光學機器用之光學窗或晶體振子之蓋體等其他氧化矽構件,而不限於光源用構件。As mentioned above, although embodiment was mentioned and this invention was demonstrated, this invention is not limited to the said embodiment, Various changes are possible. For example, in the above-mentioned embodiment, as the silicon oxide member, the lens 10 for LED and the top cover 30 for LED as the member for the light source were cited and described, but it can also be applied to other members for the light source. In addition, it can also be applied to other silicon oxide members such as optical windows for optical equipment and covers of crystal resonators, not limited to members for light sources.

進而,於上述實施方式中,對LED用透鏡10及LED用頂蓋30之構成具體地進行了說明,但亦可具有其他構成。例如,於上述實施方式及實施例中,對凸緣部11B、31B之外周形狀為正方形之情形進行了說明,但亦可為圓形,還可為正方形以外之多邊形。又,亦可不設置凸緣部11B、31B。於該情形時,例如可將透鏡部11A之平面部之周緣部、或頂蓋部31A之開口端部作為其他構件接合部11C、31C。進而,於上述實施方式及實施例中,對透鏡部11A之形狀為半球狀之情形進行了說明,但亦可為非球面或半橢圓形等半球(球面)以外之形狀。Furthermore, in the said embodiment, although the structure of the lens 10 for LEDs and the top cover 30 for LEDs was demonstrated concretely, it may have other structures. For example, in the above-mentioned embodiments and examples, the case where the outer peripheral shape of the flange portions 11B, 31B is a square has been described, but it may be a circle or a polygon other than a square. In addition, the flange parts 11B and 31B may not be provided. In this case, for example, the peripheral portion of the plane portion of the lens portion 11A or the opening end portion of the top cover portion 31A can be used as the other member joint portions 11C, 31C. Furthermore, in the above-mentioned embodiments and examples, the case where the shape of the lens portion 11A was hemispherical was described, but a shape other than a hemispherical (spherical) shape such as an aspherical surface or a semiellipse may be used.

此外,於上述實施方式及實施例中,對基本構件22之構成具體地進行了說明,但亦可具有其他構成。例如,於上述實施方式及實施例中,對在平板之一面設置有供配設LED21之凹部23之情形進行了說明,但亦可於未形成有凹部23之平板之上配設LED21,又,亦可設為殼體狀。In addition, in the said embodiment and the Example, although the structure of the basic member 22 was demonstrated concretely, it may have other structures. For example, in the above-mentioned embodiments and examples, the case where the recessed portion 23 for disposing the LED 21 is provided on one side of the flat plate has been described, but the LED 21 may also be disposed on a flat plate without the recessed portion 23, and, It can also be made into a shell shape.

以上對本發明之較佳實施方式進行了說明,但本發明並不限於上述實施方式,可在申請專利範圍所記載之範圍內進行各種設計變更。 本申請係基於2020年12月25日申請之日本專利申請2020-217879及2021年10月22日申請之日本專利申請2021-172818者,且將其內容作為參照併入本文。 [產業上之可利用性] The preferred embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments, and various design changes can be made within the scope described in the claims. This application is based on Japanese Patent Application No. 2020-217879 filed on December 25, 2020 and Japanese Patent Application No. 2021-172818 filed on October 22, 2021, and the contents thereof are incorporated herein by reference. [Industrial availability]

本發明尤其可用於光源用構件等。The present invention is particularly applicable to members for light sources and the like.

10:LED用透鏡 11:本體部 11A:透鏡部 11B:凸緣部 11C:其他構件接合部 12:基底層 13:中間層 14:表面層 20:LED裝置 21:LED 22:基本構件 23:凹部 24:階差部 25:焊料層 26:金屬化層 30:LED用頂蓋 31:本體部 31A:頂蓋部 31B:凸緣部 31C:其他構件接合部 10: Lens for LED 11: Main body 11A: Lens part 11B: flange part 11C: Joints of other components 12: Base layer 13: middle layer 14: Surface layer 20: LED device 21:LED 22: Basic components 23: Concave 24: Step Department 25: Solder layer 26: metallization layer 30: LED top cover 31: Body Department 31A: top cover 31B: Flange 31C: Joints of other components

圖1(A)、(B)係表示作為本發明之第1實施方式之氧化矽構件之LED用透鏡之構成的圖。 圖2(A)、(B)係表示使用如圖1所示之LED用透鏡之LED裝置之構成的剖視圖。 圖3(A)、(B)係表示作為本發明之第2實施方式之氧化矽構件之LED用頂蓋之構成的圖。 圖4(A)~(C)係表示實施例1中之基底層之粒子狀態之影像圖。 圖5(A)~(C)係表示實施例1中之中間層之粒子狀態之影像圖。 圖6(A)~(C)係表示實施例1中之表面層之粒子狀態之影像圖。 1(A) and (B) are diagrams showing the configuration of a lens for LED which is a silicon oxide member according to the first embodiment of the present invention. 2(A) and (B) are cross-sectional views showing the structure of an LED device using the LED lens shown in FIG. 1 . 3(A) and (B) are diagrams showing the structure of a top cover for LED which is a silicon oxide member according to a second embodiment of the present invention. 4(A)-(C) are image diagrams showing the particle state of the base layer in Example 1. FIG. 5(A)-(C) are images showing the particle state of the intermediate layer in Example 1. FIG. 6(A)-(C) are images showing the particle state of the surface layer in Example 1. FIG.

10:LED用透鏡 10: Lens for LED

11:本體部 11: Main body

11A:透鏡部 11A: Lens part

11B:凸緣部 11B: flange part

11C:其他構件接合部 11C: Joints of other components

12:基底層 12: Base layer

13:中間層 13: middle layer

14:表面層 14: Surface layer

Claims (7)

一種氧化矽構件,其特徵在於:具備含有氧化矽玻璃之本體部, 上述本體部具有與其他構件之其他構件接合部, 於上述其他構件接合部,自上述本體部之側起依序設置基底層、中間層、及含有Au之表面層,且 上述基底層之空隙率處於5%以上10%以下之範圍內,上述中間層之空隙率處於4%以上5%以下之範圍內,並且上述基底層之厚度處於20 nm以上100 nm以下之範圍內,上述中間層之厚度處於100 nm以上200 nm以下之範圍內。 A silicon oxide member, characterized in that: it has a body part containing silicon oxide glass, The above-mentioned main body part has other component joining parts with other components, A base layer, an intermediate layer, and a surface layer containing Au are provided in order from the side of the above-mentioned main body at the joint portion of the above-mentioned other member, and The porosity of the base layer is in the range of 5% to 10%, the porosity of the intermediate layer is in the range of 4% to 5%, and the thickness of the base layer is in the range of 20 nm to 100 nm , the thickness of the above-mentioned intermediate layer is in the range of not less than 100 nm and not more than 200 nm. 如請求項1之氧化矽構件,其中上述基底層之空隙率大於上述中間層之空隙率。The silicon oxide member according to claim 1, wherein the porosity of the base layer is greater than the porosity of the intermediate layer. 如請求項1或2之氧化矽構件,其中上述表面層之空隙率處於0.1%以上0.5%以下之範圍內,上述表面層之厚度處於150 nm以上500 nm以下之範圍內。The silicon oxide member according to claim 1 or 2, wherein the porosity of the above-mentioned surface layer is in the range of 0.1% to 0.5%, and the thickness of the above-mentioned surface layer is in the range of 150 nm to 500 nm. 如請求項1至3中任一項之氧化矽構件,其中上述基底層包含Cr層及Ti層中之至少1層,且上述中間層包含Ni層及Ti層中之至少1層。The silicon oxide member according to any one of claims 1 to 3, wherein the base layer includes at least one layer of a Cr layer and a Ti layer, and the intermediate layer includes at least one layer of a Ni layer and a Ti layer. 如請求項1至4中任一項之氧化矽構件,其中由截線法獲得之上述基底層之平均粒徑處於40 nm以上80 nm以下之範圍內,由截線法獲得之上述中間層之平均粒徑處於50 nm以上70 nm以下之範圍內,且由截線法獲得之上述表面層之平均粒徑處於50 nm以上70 nm以下之範圍內。The silicon oxide member according to any one of claims 1 to 4, wherein the average particle diameter of the above-mentioned base layer obtained by the intercept method is in the range of 40 nm to 80 nm, and the average particle size of the above-mentioned intermediate layer obtained by the intercept method The average particle diameter is in the range of 50 nm to 70 nm, and the average particle diameter of the surface layer obtained by the intercept method is in the range of 50 nm to 70 nm. 如請求項1至5中任一項之氧化矽構件,其係LED用透鏡或LED用頂蓋。The silicon oxide component according to any one of claims 1 to 5, which is a lens for LED or a top cover for LED. 一種LED裝置,其特徵在於具備:LED; 基本構件,其支持上述LED;及 如請求項1至6中任一項之氧化矽構件,其以覆蓋上述LED之方式與上述基本構件接合; 上述基本構件具有與氧化矽構件之氧化矽構件接合部, 於上述氧化矽構件接合部形成有金屬化層,該金屬化層於表面具有含有Au之第1層,且 上述基本構件之上述氧化矽構件接合部與上述氧化矽構件之上述其他構件接合部藉由含有AuSn焊料之焊料層相接合。 An LED device, characterized in that it has: LED; a basic building block supporting the above-mentioned LEDs; and The silicon oxide member according to any one of claims 1 to 6, which is bonded to the above-mentioned basic member in such a way as to cover the above-mentioned LED; The above basic member has a silicon oxide member joining portion with the silicon oxide member, A metallization layer having a first layer containing Au on the surface is formed at the joint portion of the silicon oxide member, and The silicon oxide member joining portion of the basic member and the other member joining portion of the silicon oxide member are joined by a solder layer containing AuSn solder.
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