TW202229493A - Semiconductor device manufacturing method and adhesive used therein - Google Patents

Semiconductor device manufacturing method and adhesive used therein Download PDF

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TW202229493A
TW202229493A TW110129759A TW110129759A TW202229493A TW 202229493 A TW202229493 A TW 202229493A TW 110129759 A TW110129759 A TW 110129759A TW 110129759 A TW110129759 A TW 110129759A TW 202229493 A TW202229493 A TW 202229493A
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adhesive
semiconductor device
temporary
pressure
bonding
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TW110129759A
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上野惠子
平理子
佐藤慎
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日商昭和電工材料股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02—Non-macromolecular additives
    • C09J11/06—Non-macromolecular additives organic
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/08—Macromolecular additives
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00—Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
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    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C—CHEMISTRY; METALLURGY
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    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
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    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Organic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

Disclosed is a manufacturing method for a semiconductor device in which a first and a second member are connected via an adhesive layer, and connecting parts of the first and second members are connected to each other. The manufacturing method comprises: a pre-bonding step in which the first and second members are pre-bonded via a heat-curable adhesive for forming the adhesive layer, thereby obtaining a pre-bonded body; a pre-bonded body pressing step in which the pre-bonded body is pressed in a pressurized atmosphere, thereby obtaining a pressed pre-bonded body; and a main bonding step in which the first and second members in the pressed pre-bonded body are bonded, causing the connecting parts thereof to connect to each other, thereby obtaining a bonded body. In the pre-bonding step, pre-bonding of the first and second members is carried out at a temperature lower than the melting point of the connecting parts. In the pre-bonded body pressing step, the pressing of the pre-bonded body is carried out a temperature lower than the melting point of the connecting parts. In the main bonding step, heating of the pressed pre-bonded body is carried out at a temperature which is at least the melting point of the connecting parts.

Description

半導體裝置的製造方法及用於其之膠黏劑Manufacturing method of semiconductor device and adhesive therefor

本發明係有關一種半導體裝置的製造方法及用於其之膠黏劑。The present invention relates to a manufacturing method of a semiconductor device and an adhesive used for the same.

近年來，為了滿足對半導體裝置之高性能、高集成度、高速度等要求，在半導體晶片或配線電路板上設置稱為凸塊之導電性突起作為連接部，並且藉由連接部彼此的連接直接連接半導體晶片與配線電路板或其他半導體晶片之倒裝晶片連接方法（FC連接方法）被廣泛採用。FC連接方式例如用於作為半導體晶片與配線電路板之間的連接之COB（Chip On Board：晶片集成）型連接方式、在半導體芯片上設置凸塊或配線作為連接部，且在半導體晶片之間連接的CoC（Chip On Chip：晶片上晶片）型連接方式、在晶圓上連接半導體晶片後進行個片化而製作半導體封裝之COW（Chip On Wafer：晶圓上晶片）、在將晶圓彼此壓接後將其個片化而製作半導體封裝之WOW（Wafer On Wafer：晶圓上晶圓）或將半導體封裝彼此壓接之POP（Package On Package：堆疊封裝）等。FC連接方式還用於藉由立體配置半導體晶片而不是平面狀來減小封裝之晶片堆疊型封裝、TSV（Through-Silicon Via：矽穿孔）結構的半導體裝置的製造中。In recent years, in order to meet the requirements for high performance, high integration, and high speed of semiconductor devices, conductive bumps called bumps are provided on semiconductor wafers or wiring boards as connection parts, and the connection parts are connected to each other. A flip-chip connection method (FC connection method) for directly connecting a semiconductor chip to a wiring circuit board or other semiconductor chips is widely used. The FC connection method is, for example, a COB (Chip On Board) type connection method used as a connection between a semiconductor chip and a wiring circuit board, in which bumps or wires are provided on the semiconductor chip as connecting portions, and between the semiconductor chips The connected CoC (Chip On Chip: chip on chip) type of connection method, after connecting semiconductor chips on a wafer, and then individualizing them into pieces to make a semiconductor package COW (Chip On Wafer: chip on wafer), when the wafers are connected to each other. After crimping, they are individualized to make WOW (Wafer On Wafer: wafer-on-wafer) for semiconductor packages or POP (Package On Package: stacking package) for crimping semiconductor packages to each other. The FC connection method is also used in the manufacture of a chip-stacking package that reduces the package size by disposing a semiconductor chip three-dimensionally instead of a planar shape, and a semiconductor device of a TSV (Through-Silicon Via: Through-Silicon Via) structure.

作為利用該種FC連接方式之半導體裝置的製造方法，例如已知下述專利文獻1中公開之製造方法。在同一文獻中，公開了一種經過如下步驟製造半導體裝置之方式，亦即經由熱固化性的膠黏劑且在低於連接部的熔點之溫度下將具有連接部之半導體晶片彼此暫時壓接之步驟；藉由將所獲得之暫時壓接體夾在對置配置之一對按壓構件之間，在2個半導體晶片的連接部中的至少一者的熔點以上的溫度下，一邊加壓一邊加熱來製造壓接體之步驟；及在加壓氣氛下加熱壓接體之步驟。As a manufacturing method of a semiconductor device using such an FC connection method, for example, a manufacturing method disclosed in the following Patent Document 1 is known. In the same document, there is disclosed a method of manufacturing a semiconductor device by temporarily press-bonding semiconductor chips having the connection portion to each other through a thermosetting adhesive at a temperature lower than the melting point of the connection portion. step: heating the obtained temporary pressure-bonded body under pressure at a temperature higher than the melting point of at least one of the connecting portions of the two semiconductor wafers by sandwiching the obtained temporary pressure-bonding body between a pair of pressing members arranged oppositely A step of manufacturing a crimp body; and a step of heating the crimp body in a pressurized atmosphere.

[專利文獻1]國際公開第2019/123518號[Patent Document 1] International Publication No. 2019/123518

然而，上述專利文獻1中所記載的半導體裝置的製造方法具有以下所示之問題。 亦即，在上述專利文獻1中所記載的半導體裝置的製造方法中，雖然確保了連接可靠性，但是從抑制在暫時壓接的步驟所發生之空隙的產生之方面而言，存在改善的餘地。 However, the manufacturing method of the semiconductor device described in the above-mentioned Patent Document 1 has the following problems. That is, in the manufacturing method of the semiconductor device described in the above-mentioned Patent Document 1, although the connection reliability is ensured, there is room for improvement in terms of suppressing the generation of voids generated in the step of temporary pressure bonding .

因此，本發明的目的為，提供一種能夠製造一邊確保良好的連接可靠性一邊抑制空隙的產生之半導體裝置之半導體裝置的製造方法及用於其之膠黏劑。Then, the objective of this invention is to provide the manufacturing method of the semiconductor device which can manufacture the semiconductor device which suppresses generation|occurence|production of a void, ensuring favorable connection reliability, and the adhesive used for it.

為了解決上述問題，本發明的一方面為半導體裝置的製造方法，其中，具有第1連接部之第1構件及具有第2連接部之第2構件經由膠黏層連接，且前述第1連接部及前述第2連接部電連接，前述半導體裝置的製造方法包括：暫時壓接步驟，對前述第1構件及前述第2構件，經由用於形成前述膠黏層之熱固化性膠黏劑使前述第1連接部與前述第2連接部對置配置之狀態下進行暫時壓接而獲得暫時壓接體；暫時壓接體加壓步驟，在加壓氣氛下對前述暫時壓接體加壓，而獲得完成加壓的暫時壓接體；及正式壓接步驟，對前述完成加壓的暫時壓接體一邊加熱一邊加壓，使前述第1構件及前述第2構件壓接，由此連接前述第1連接部與前述第2連接部而獲得壓接體，在前述暫時壓接步驟中，在低於前述第1連接部的熔點及前述第2連接部的熔點的溫度下進行前述第1構件及前述第2構件的暫時壓接，在前述暫時壓接體加壓步驟中，在低於前述第1連接部的熔點及前述第2連接部的熔點之溫度下進行前述暫時壓接體的加壓，在前述正式壓接步驟中，在前述第1連接部及前述第2連接部中的至少一者的熔點以上的溫度下進行前述完成加壓的壓接體的加熱。In order to solve the above problem, one aspect of the present invention is a method of manufacturing a semiconductor device, wherein a first member having a first connection portion and a second member having a second connection portion are connected via an adhesive layer, and the first connection portion is and the second connection portion is electrically connected, and the manufacturing method of the semiconductor device includes a step of temporarily crimping the first member and the second member through a thermosetting adhesive for forming the adhesive layer. The temporary crimping body is obtained by temporarily crimping the first connecting portion and the second connecting portion in a state of being opposed to each other; Obtaining a pressurized temporary crimping body; and a main crimping step of applying pressure while heating the pressurized temporary crimping body to crimp the first member and the second member, thereby connecting the first and second members. 1 connecting the part and the second connecting part to obtain a crimp body, and in the temporary crimping step, the first member and the second connecting part are performed at a temperature lower than the melting point of the first connecting part and the melting point of the second connecting part. In the temporary pressure-bonding of the second member, in the temporary pressure-bonding body pressing step, the temporary pressure-bonding body is pressurized at a temperature lower than the melting point of the first connection portion and the melting point of the second connection portion. In the above-mentioned main crimping step, the heating of the pressurized crimp body is performed at a temperature equal to or higher than the melting point of at least one of the first connection portion and the second connection portion.

依據本發明的半導體裝置的製造方法，在暫時壓接步驟及暫時壓接體加壓步驟後進行之正式壓接步驟中，在第1連接部及第2連接部中的至少一者的熔點以上的溫度下進行完成加壓的暫時壓接體的加熱，因此進行第1連接部與第2連接部的連接。此時，在正式壓接步驟前所進行之暫時壓接體加壓步驟中，在低於第1連接部的熔點及第2連接部的熔點的溫度下進行暫時壓接體的加壓，因此在正式壓接步驟的開始時刻，沒有充分進行膠黏劑的固化，膠黏劑的黏度變低。因此，在正式壓接步驟中，使第1構件及第2構件壓接時，來自相對於第1構件或第2構件之膠黏劑的排斥力變小，容易對第1構件和第2構件加壓，因此能夠容易進行第1連接部與第2連接部的連接。其結果，能夠確保良好的連接可靠性。According to the manufacturing method of the semiconductor device of the present invention, in the main crimping step performed after the temporary crimping step and the temporary crimping body pressing step, the melting point of at least one of the first connection portion and the second connection portion is equal to or higher than the melting point. Since the heating of the pressurized temporary pressure-bonding body is performed at a temperature of 2000 Å, the connection of the first connection portion and the second connection portion is performed. At this time, in the temporary pressure-bonding body pressing step performed before the main pressure-bonding step, the temporary pressure-bonding body is pressurized at a temperature lower than the melting point of the first connection portion and the melting point of the second connection portion. At the start of the actual crimping step, the adhesive is not sufficiently cured, and the viscosity of the adhesive becomes low. Therefore, in the main crimping step, when the first member and the second member are crimped, the repulsive force from the adhesive with respect to the first member or the second member is reduced, and the first member and the second member can be easily bonded to the first member and the second member. Since it is pressurized, the connection of the 1st connection part and the 2nd connection part can be performed easily. As a result, good connection reliability can be ensured.

另一方面，在暫時壓接步驟中獲得之暫時壓接體中，容易在膠黏劑與第1構件之間、及膠黏劑與第2構件之間的至少一者形成空隙，若該空隙原樣殘留，則在半導體裝置中以空隙殘留。能夠藉由加壓並壓縮來消減上述空隙。在此，假設在正式壓接步驟後進行該加壓之情況下，膠黏劑在正式壓接步驟中加熱到第1連接部及第2連接部中的至少一者的熔點以上的溫度而進行固化，膠黏劑的黏度已經變高。又，在正式壓接步驟後，完成第1連接部與第2連接部的連接，第2構件相對於第1構件之位置被固定。因此，即使加熱膠黏劑，亦難以對膠黏劑施加充分的壓力。因此，在正式壓接步驟後，無法充分壓縮空隙，在半導體裝置的膠黏層中容易以空隙殘留。與此相對，如本發明的製造方法，在正式壓接步驟前的暫時壓接體加壓步驟中，在低於第1連接部的熔點及第2連接部的熔點的溫度下進行空隙的加壓之情況下，與在低於第1連接部及第2連接部中的至少一者的熔點以上的溫度下進行之情況相比，沒有進行膠黏劑的固化，膠黏劑的黏度低，因此容易壓縮空隙，空隙在半導體裝置的膠黏層中難以以空隙殘留。其結果，依據本發明的製造方法，能夠製造抑制空隙的產生之半導體裝置。綜上所述，依據本發明的半導體裝置的製造方法，能夠製造一邊確保良好的連接可靠性，一邊抑制空隙的產生之半導體裝置。On the other hand, in the temporary pressure-bonding body obtained in the temporary pressure-bonding step, voids are likely to be formed in at least one of between the adhesive and the first member and between the adhesive and the second member. If it remains as it is, it will remain as a void in the semiconductor device. The above-mentioned voids can be reduced by pressing and compressing. Here, in the case where the pressing is performed after the main crimping step, the adhesive is heated to a temperature equal to or higher than the melting point of at least one of the first connection portion and the second connection portion in the main crimping step. After curing, the viscosity of the adhesive has become high. Moreover, after the main crimping step, the connection of the first connection portion and the second connection portion is completed, and the position of the second member relative to the first member is fixed. Therefore, even if the adhesive is heated, it is difficult to apply sufficient pressure to the adhesive. Therefore, after the main pressure-bonding step, the voids cannot be sufficiently compressed, and voids tend to remain in the adhesive layer of the semiconductor device. On the other hand, according to the manufacturing method of the present invention, in the temporary crimping body pressing step before the main crimping step, the voids are added at a temperature lower than the melting point of the first connection portion and the melting point of the second connection portion. In the case of pressing, compared with the case of performing at a temperature lower than or higher than the melting point of at least one of the first connection part and the second connection part, the curing of the adhesive is not performed, and the viscosity of the adhesive is low, Therefore, it is easy to compress the voids, and it is difficult for the voids to remain as voids in the adhesive layer of the semiconductor device. As a result, according to the manufacturing method of this invention, the semiconductor device which suppressed the generation|occurence|production of a void can be manufactured. As described above, according to the method for manufacturing a semiconductor device of the present invention, it is possible to manufacture a semiconductor device that suppresses the generation of voids while ensuring good connection reliability.

在上述製造方法中，在前述暫時壓接步驟中，在低於前述膠黏劑的反應開始溫度的溫度下進行前述暫時壓接體的加壓為較佳。In the above-mentioned production method, in the temporary pressure-bonding step, it is preferable to pressurize the temporary pressure-bonded body at a temperature lower than the reaction start temperature of the adhesive.

該情況下，難以開始膠黏劑的反應，在暫時壓接體加壓步驟的開始時刻，沒有進行膠黏劑的固化，因此容易排除暫時壓接步驟所產生之空隙。In this case, it is difficult to start the reaction of the adhesive, and the adhesive is not cured at the start of the temporary pressure-bonding body pressing step, so that the voids generated in the temporary pressure-bonding step can be easily eliminated.

在上述製造方法中，在前述暫時壓接體加壓步驟中，以0.05～0.8MPa的壓力進行前述暫時壓接體的加壓為較佳。In the above-mentioned production method, in the step of pressing the temporary pressure-bonded body, it is preferable to pressurize the temporary pressure-bonded body at a pressure of 0.05 to 0.8 MPa.

該情況下，能夠抑制在半導體裝置的膠黏層中產生空隙，並且能夠進一步提高半導體裝置的連接可靠性。In this case, generation of voids in the adhesive layer of the semiconductor device can be suppressed, and the connection reliability of the semiconductor device can be further improved.

在上述製造方法中，在前述暫時壓接體加壓步驟中，在前述膠黏劑的反應開始溫度以上的溫度下進行前述暫時壓接體的加壓為較佳。In the above-mentioned production method, in the step of pressing the temporary pressure-bonded body, it is preferable that the pressure of the temporary pressure-bonded body is performed at a temperature equal to or higher than the reaction start temperature of the adhesive.

該情況下，能夠一邊使膠黏劑流動，一邊更有效地壓縮空隙。In this case, the voids can be compressed more effectively while the adhesive is flowing.

又，本發明的另一方面為一種熱固化性膠黏劑，其在上述半導體裝置的製造方法中用於膠黏前述第1構件與前述第2構件Also, another aspect of the present invention is a thermosetting adhesive for bonding the first member and the second member in the method for manufacturing a semiconductor device.

上述膠黏劑含有環氧樹脂、固化劑及助焊劑，顯示1500Pa・s以下的最低熔融黏度，且在150℃下顯示35秒以上且80秒以下的凝膠時間為較佳。The above-mentioned adhesive contains epoxy resin, curing agent and flux, exhibits a minimum melt viscosity of 1500 Pa·s or less, and preferably exhibits a gel time of not less than 35 seconds and not more than 80 seconds at 150°C.

該情況下，與膠黏劑的最低熔融黏度超過1500Pa・s之情況相比，膠黏劑難以嚙入第1連接部與第2連接部之間，不易發生第1連接部與第2連接部之間的連結不良，因此進一步提高半導體裝置的連接可靠性。又，與凝膠時間大於80秒之情況相比，在暫時壓接體加壓步驟及正式壓接步驟中，膠黏劑容易固化，在半導體裝置的膠黏層中空隙難以殘留，因此能夠製造進一步抑制空隙的產生之半導體裝置。又，與凝膠時間小於35秒之情況相比，在暫時壓接步驟中難以進行膠黏劑的反應，在暫時壓接體加壓步驟中去除空隙之前膠黏劑難以固化，容易去除空隙，因此能夠製造進一步抑制空隙的產生之半導體裝置。In this case, compared with the case where the minimum melt viscosity of the adhesive exceeds 1500 Pa·s, the adhesive is less likely to get caught between the first connection part and the second connection part, and the first connection part and the second connection part are less likely to occur. Since the connection between them is poor, the connection reliability of the semiconductor device is further improved. In addition, compared with the case where the gel time is longer than 80 seconds, the adhesive is easily cured in the temporary crimping body pressing step and the main crimping step, and voids hardly remain in the adhesive layer of the semiconductor device, so it is possible to manufacture A semiconductor device that further suppresses the generation of voids. In addition, compared with the case where the gel time is less than 35 seconds, the reaction of the adhesive is difficult to proceed in the temporary crimping step, the adhesive is difficult to cure before the voids are removed in the temporary crimping body pressing step, and the voids are easily removed, Therefore, it is possible to manufacture a semiconductor device in which generation of voids is further suppressed.

在上述膠黏劑中，前述膠黏劑所含有之前述環氧樹脂的重量平均分子量小於10000為較佳。In the above-mentioned adhesive, the weight-average molecular weight of the epoxy resin contained in the above-mentioned adhesive is preferably less than 10,000.

上述膠黏劑還含有高分子成分，前述高分子成分的重量平均分子量為10000以上為較佳。The aforementioned adhesive further contains a polymer component, and the weight average molecular weight of the aforementioned polymer component is preferably 10,000 or more.

該情況下，與高分子成分的重量平均分子量小於10000之情況相比，膠黏劑在耐熱性及成膜性方面更優異。因此，若使用膠黏劑，則能夠製造耐熱性更優異之半導體裝置。又，在暫時壓接步驟、暫時壓接體加壓步驟及正式壓接步驟中，容易保持膠黏劑的形狀，從而能夠更有效地製造半導體裝置。In this case, compared with the case where the weight average molecular weight of the polymer component is less than 10,000, the adhesive is more excellent in heat resistance and film formability. Therefore, if an adhesive is used, a semiconductor device with more excellent heat resistance can be manufactured. Moreover, in the temporary crimping step, the temporary crimping body pressing step, and the main crimping step, the shape of the adhesive is easily maintained, and the semiconductor device can be manufactured more efficiently.

在上述膠黏劑中，前述高分子成分的重量平均分子量為30000以上，前述高分子成分的玻璃化轉變溫度為200℃以下為較佳。In the above-mentioned adhesive, the weight average molecular weight of the polymer component is preferably 30,000 or more, and the glass transition temperature of the polymer component is preferably 200° C. or lower.

該情況下，膠黏劑能夠獨立地具有良好的成膜性，在暫時壓接步驟、暫時壓接體加壓步驟及正式壓接步驟中，容易保持膠黏劑的形狀，因此能夠進一步提高半導體裝置的製造效率。又，膠黏劑容易嵌入第1構件中的第2構件側的表面中之凹凸、或第2構件中的第1構件側的表面中之凹凸，空隙抑制效果趨於相對變大。In this case, the adhesive can independently have good film-forming properties, and the shape of the adhesive can be easily maintained in the temporary pressure-bonding step, the temporary pressure-bonding body pressing step, and the main pressure-bonding step, so that the semiconductor can be further improved. The manufacturing efficiency of the device. In addition, the adhesive tends to fit into the irregularities on the surface of the first member on the second member side, or the irregularities on the surface on the first member side of the second member, and the void suppressing effect tends to be relatively large.

前述膠黏劑係膜狀膠黏劑為較佳。The aforementioned adhesive is preferably a film-like adhesive.

該情況下，膠黏劑為膜狀，因此進一步提高半導體裝置的製造效率。In this case, since the adhesive is in the form of a film, the manufacturing efficiency of the semiconductor device is further improved.

再者，在本發明中，“第1連接部的熔點”係指形成第1連接部的表面部之材料的熔點。又，“第2連接部的熔點”係指形成第2連接部的表面部之材料的熔點。 [發明效果] In addition, in this invention, "the melting point of a 1st connection part" means the melting point of the material which forms the surface part of a 1st connection part. In addition, "the melting point of a 2nd connection part" means the melting point of the material which forms the surface part of a 2nd connection part. [Inventive effect]

依據本發明，提供一種能夠製造一邊確保良好的連接可靠性，一邊抑制空隙的產生之半導體裝置之半導體裝置的製造方法及用於其之膠黏劑。According to this invention, the manufacturing method of the semiconductor device which can manufacture the semiconductor device which suppresses generation|occurence|production of a void, ensuring favorable connection reliability, and the adhesive used for it are provided.

以下，對本發明的實施形態進行詳細說明。Hereinafter, embodiments of the present invention will be described in detail.

＜半導體裝置＞ 首先，說明本發明的半導體裝置的製造方法之前，參閱圖1對依據本發明的半導體裝置的製造方法製造之半導體裝置進行說明。圖1係表示藉由本發明的半導體裝置的製造方法的一實施形態製造之半導體裝置之局部剖面圖。 <Semiconductor device> First, before describing the method of manufacturing a semiconductor device of the present invention, a semiconductor device manufactured by the method of manufacturing a semiconductor device of the present invention will be described with reference to FIG. 1 . FIG. 1 is a partial cross-sectional view showing a semiconductor device manufactured by one embodiment of the method for manufacturing a semiconductor device of the present invention.

如圖1所示，半導體裝置100經由膠黏層40A將具有作為第1連接部的凸塊30之半導體晶片（第1構件）1與具有作為第2連接部的配線16之配線電路板（第2構件）2電連接。As shown in FIG. 1 , in the semiconductor device 100 , a semiconductor chip (first member) 1 having bumps 30 serving as first connecting portions and a wiring circuit board (first member) having wirings 16 serving as second connecting portions are connected via an adhesive layer 40A. 2 components) 2 electrical connections.

半導體晶片1具備：半導體晶片本體10；配線15，設置於半導體晶片本體10的一表面上；及凸塊30，設置於配線15上。另一方面，配線電路板2具備：基板本體20；及配線16，設置於基板本體20的一表面上。然後，在半導體裝置100中，半導體晶片1中之凸塊30與配線電路板2中之配線16電連接。The semiconductor wafer 1 includes: a semiconductor wafer body 10 ; wirings 15 provided on one surface of the semiconductor wafer body 10 ; and bumps 30 provided on the wirings 15 . On the other hand, the wired circuit board 2 includes: a substrate body 20 ; and wirings 16 , which are provided on one surface of the substrate body 20 . Then, in the semiconductor device 100 , the bumps 30 in the semiconductor wafer 1 are electrically connected to the wirings 16 in the wiring circuit board 2 .

＜半導體裝置的製造方法＞ 接下來，參閱圖2～4對上述半導體裝置100的製造方法進行說明。圖2係表示本發明的半導體裝置的製造方法的一實施形態中之暫時壓接步驟之步驟圖。圖3係表示本發明的半導體裝置的製造方法的一實施形態中之暫時壓接體加壓步驟之步驟圖，圖4係表示本發明的半導體裝置的製造方法的一實施形態中之正式壓接步驟之步驟圖。 <Manufacturing method of semiconductor device> Next, a method of manufacturing the above-described semiconductor device 100 will be described with reference to FIGS. 2 to 4 . 2 is a step diagram showing a temporary pressure bonding step in one embodiment of the method of manufacturing a semiconductor device of the present invention. 3 is a step diagram showing a step of pressing a temporary pressure-bonding body in one embodiment of the method of manufacturing a semiconductor device of the present invention, and FIG. 4 is a diagram showing the main pressure-bonding process in one embodiment of the method of manufacturing a semiconductor device of the present invention Step by step diagram.

如圖2～圖4所示，本發明的半導體裝置的製造方法的第1實施形態包括：暫時壓接步驟，對具有凸塊30之半導體晶片1與具有配線16之配線電路板2，經由用於形成膠黏層40A之熱固化性膠黏劑40使對置配置凸塊30與配線16之狀態下進行暫時壓接而獲得暫時壓接體4（參閱圖2）；暫時壓接體加壓步驟，在加壓氣氛下對暫時壓接體4加壓，而獲得完成加壓的暫時壓接體5（參閱圖3）；及正式壓接步驟，對完成加壓的暫時壓接體5一邊加熱一邊加壓，使半導體晶片1與配線電路板2壓接，由此連接凸塊30與配線16而獲得壓接體6（參閱圖4）。然後，在暫時壓接步驟中，在低於凸塊30的熔點及配線16的熔點的溫度下進行半導體晶片1與配線電路板2的暫時壓接，在暫時壓接體加壓步驟中，在低於凸塊30的熔點及配線16的熔點的溫度下進行暫時壓接體4的加壓。又，在正式壓接步驟中，在凸塊30及配線16中的至少一者的熔點以上的溫度下進行完成加壓的暫時壓接體5的加熱。As shown in FIGS. 2 to 4 , the first embodiment of the method for manufacturing a semiconductor device of the present invention includes a step of temporarily pressing the semiconductor wafer 1 having the bumps 30 and the wiring circuit board 2 having the wirings 16 with The thermosetting adhesive 40 forming the adhesive layer 40A is temporarily crimped in a state where the bumps 30 and the wirings 16 are disposed oppositely to obtain a temporary crimp body 4 (see FIG. 2 ); the temporary crimp body is pressed step, in which the temporary crimping body 4 is pressurized in a pressurized atmosphere to obtain a temporary crimping body 5 that has been pressurized (see FIG. 3 ); Pressurizing while heating, the semiconductor wafer 1 and the wiring board 2 are press-bonded, whereby the bumps 30 and the wirings 16 are connected to obtain a press-bonded body 6 (see FIG. 4 ). Then, in the temporary crimping step, the semiconductor wafer 1 and the wiring circuit board 2 are temporarily crimped at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16, and in the temporary crimping body pressing step, the The temporary pressure-bonding body 4 is pressurized at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16 . In addition, in the main crimping step, the heating of the temporary crimping body 5 that has been pressurized is performed at a temperature equal to or higher than the melting point of at least one of the bumps 30 and the wirings 16 .

依據上述之半導體裝置100的製造方法，在暫時壓接步驟及暫時壓接體加壓步驟後進行之正式壓接步驟中，加熱到凸塊30及配線16中的至少一者的熔點以上的溫度來進行完成加壓的暫時壓接體5的加熱，因此進行凸塊30與配線16的連接。此時，在正式壓接步驟前進行之暫時壓接體加壓步驟中，在低於凸塊30的熔點及配線16的熔點的溫度下進行暫時壓接體4的加壓，因此在正式壓接步驟的開始時刻，沒有充分進行膠黏劑40的固化，膠黏劑40的黏度變低。因此，在正式壓接步驟中，使半導體晶片1與配線電路板2壓接時，來自膠黏劑40相對於半導體晶片1或配線電路板2之排斥力變小，從而容易對半導體晶片1與配線電路板2加壓，因此能夠容易進行凸塊30與配線16的連接。其結果，能夠確保良好的連接可靠性。According to the above-described manufacturing method of the semiconductor device 100 , in the primary crimping step performed after the temporary crimping step and the temporary crimping body pressing step, heating is performed to a temperature equal to or higher than the melting point of at least one of the bumps 30 and the wirings 16 . Since the temporary crimping body 5 that has been pressurized is heated, the bumps 30 and the wirings 16 are connected. At this time, in the temporary pressure-bonding body pressing step performed before the main pressure-bonding step, the temporary pressure-bonding body 4 is pressurized at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16. At the start of the connecting step, the curing of the adhesive 40 is not sufficiently performed, and the viscosity of the adhesive 40 becomes low. Therefore, in the actual crimping step, when the semiconductor chip 1 and the printed circuit board 2 are crimped, the repulsive force from the adhesive 40 with respect to the semiconductor chip 1 or the printed circuit board 2 is reduced, so that the semiconductor chip 1 and the printed circuit board 2 can be easily bonded to each other. Since the wiring board 2 is pressurized, the bumps 30 and the wirings 16 can be easily connected. As a result, good connection reliability can be ensured.

另一方面，在暫時壓接步驟中獲得之暫時壓接體4中，容易在膠黏劑40與半導體晶片1之間及膠黏劑40與配線電路板2之間中的至少一者形成空隙，若該空隙原樣殘留，則在半導體裝置100中以空隙殘留。能夠藉由加壓並壓縮來消減上述空隙。在此，假設在正式壓接步驟後進行該加壓之情況下，膠黏劑40在正式壓接步驟中加熱到凸塊30及配線16中的至少一者的熔點以上的溫度而進行固化，膠黏劑40的黏度已經變高。又，在正式壓接步驟後，完成凸塊30與配線16的連接，半導體晶片1相對於配線電路板2之位置被固定。因此，即使加壓膠黏劑40，亦難以對膠黏劑40施加充分的壓力。因此，在正式壓接步驟後，無法充分壓縮空隙，在半導體裝置100的膠黏層40A中容易以空隙殘留。與此相對，如本實施形態的製造方法，在正式壓接步驟前的暫時壓接體加壓步驟中，在低於凸塊30的熔點及配線16的熔點的溫度下加熱來進行空隙的加壓之情況下，與在低於凸塊30及配線16中的至少一者的熔點以上的溫度下進行之情況相比，沒有進行膠黏劑40的固化，膠黏劑40的黏度低，因此容易壓縮空隙，空隙在半導體裝置100的膠黏層40A中難以以空隙殘留。其結果，依據本實施形態的製造方法，能夠製造抑制空隙的產生之半導體裝置100。綜上所述，依據本實施形態的半導體裝置的製造方法，能夠製造一邊確保良好的連接可靠性，一邊抑制空隙的產生之半導體裝置100。On the other hand, in the temporary crimping body 4 obtained in the temporary crimping step, voids are easily formed in at least one of between the adhesive 40 and the semiconductor chip 1 and between the adhesive 40 and the wiring circuit board 2 , if the voids remain as they are, they remain as voids in the semiconductor device 100 . The above-mentioned voids can be reduced by pressing and compressing. Here, in the case where the pressing is performed after the main crimping step, the adhesive 40 is heated to a temperature equal to or higher than the melting point of at least one of the bumps 30 and the wiring 16 in the main crimping step, and is cured. The viscosity of the adhesive 40 has become high. In addition, after the main crimping step, the connection of the bumps 30 and the wirings 16 is completed, and the position of the semiconductor wafer 1 with respect to the wiring circuit board 2 is fixed. Therefore, even if the adhesive 40 is pressed, it is difficult to apply sufficient pressure to the adhesive 40 . Therefore, the voids cannot be sufficiently compressed after the main crimping step, and voids are likely to remain in the adhesive layer 40A of the semiconductor device 100 . On the other hand, in the manufacturing method of the present embodiment, in the temporary crimping body pressing step before the main crimping step, heating is performed at a temperature lower than the melting point of the bumps 30 and the melting point of the wiring 16 to form the voids. In the case of pressing, compared with the case where the temperature is lower than the melting point of at least one of the bump 30 and the wiring 16, the adhesive 40 is not cured, and the viscosity of the adhesive 40 is low, so The voids are easily compressed, and the voids are unlikely to remain as voids in the adhesive layer 40A of the semiconductor device 100 . As a result, according to the manufacturing method of this embodiment, the semiconductor device 100 in which the generation of voids is suppressed can be manufactured. As described above, according to the method of manufacturing a semiconductor device of the present embodiment, it is possible to manufacture the semiconductor device 100 in which the generation of voids is suppressed while ensuring good connection reliability.

接下來，對上述暫時壓接步驟、上述暫時壓接體加壓步驟及正式壓接步驟進行詳細說明。Next, the above-mentioned temporary crimping step, the above-mentioned temporary crimping body pressing step, and the main crimping step will be described in detail.

（暫時壓接步驟） 在暫時壓接步驟中，首先，如圖2（a）所示，在基板本體20及具有作為第2連接部的配線16之配線電路板2上，將半導體晶片本體10、及具有作為第1連接部的凸塊30之半導體晶片1以一邊在該等之間配置膠黏劑40一邊重疊的方式形成層疊體3。半導體晶片1例如藉由半導體晶圓的切片形成後，拾取傳送至配線電路板2上，並以作為第1連接部的凸塊30與配線16對置配置之方式對位。層疊體3形成在具有作為對置配置之一對暫時壓接用按壓構件的壓接頭41及工作台42之按壓裝置43的工作台42上。在層疊體3中，凸塊30設置於在半導體晶片本體10上設置之配線15上。配線電路板2的配線16設置於基板本體20上的規定位置上。凸塊30及配線16分別具有由金屬材料形成之表面部。 (temporary crimping step) In the temporary crimping step, first, as shown in FIG. 2( a ), on the board body 20 and the wiring circuit board 2 having the wiring 16 as the second connection portion, the semiconductor chip body 10 , and the circuit board 2 having the wiring 16 as the second connection portion are first The semiconductor wafers 1 of the bumps 30 of the connection portion are stacked while the adhesive 40 is disposed therebetween to form the laminate 3 . The semiconductor wafer 1 is formed by, for example, slicing a semiconductor wafer, and is picked up and transported to the printed circuit board 2 , and aligned so that the bumps 30 serving as the first connection portions and the wirings 16 are arranged to face each other. The laminated body 3 is formed on the table 42 having the press head 41 as one pair of the pressing members for temporary crimping and the pressing device 43 of the table 42 which are opposed to each other. In the laminated body 3 , the bumps 30 are provided on the wirings 15 provided on the semiconductor wafer body 10 . The wirings 16 of the printed circuit board 2 are provided at predetermined positions on the substrate body 20 . The bumps 30 and the wirings 16 each have a surface portion formed of a metal material.

膠黏劑40可以塗佈於半導體晶片1中的配線電路板2側的表面上，亦可以塗佈於配線電路板2中的半導體晶片1側的表面上，亦可以將預先準備之膜狀膠黏劑貼附於配線電路板2。膜狀膠黏劑40能夠藉由熱壓、輥層壓、真空層壓等貼附。膠黏劑40的面積及厚度根據半導體晶片1或配線電路板2的尺寸、凸塊30及配線16的高度等適當設定。再者，可以將膜狀膠黏劑40貼附於半導體晶片1。該情況下，例如將膜狀膠黏劑貼附於半導體晶圓後，藉由將半導體晶圓切片以將半導體晶圓單片化，而獲得貼附了膜狀膠黏劑40之半導體晶片1。The adhesive 40 may be applied on the surface of the semiconductor wafer 1 on the side of the wiring circuit board 2, or may be applied on the surface of the wiring circuit board 2 on the side of the semiconductor chip 1, or a film-like adhesive prepared in advance may be applied. The adhesive is attached to the wiring circuit board 2 . The film adhesive 40 can be attached by heat pressing, roll lamination, vacuum lamination, or the like. The area and thickness of the adhesive 40 are appropriately set according to the size of the semiconductor wafer 1 or the wiring board 2 , the heights of the bumps 30 and the wirings 16 , and the like. Furthermore, the film-like adhesive 40 can be attached to the semiconductor wafer 1 . In this case, for example, after the film adhesive is attached to the semiconductor wafer, the semiconductor wafer is singulated by slicing the semiconductor wafer to obtain the semiconductor wafer 1 to which the film adhesive 40 is attached. .

接著，如圖2（b）所示，藉由將層疊體3夾在作為暫時壓接用按壓構件的工作台42及壓接頭41之間並加壓，藉此將半導體晶片1與配線電路板2暫時壓接而獲得暫時壓接體4。在圖2中，壓接頭41配置於半導體晶片1側，工作台42配置於配線電路板2側。作為具有工作台42及壓接頭41之暫時壓接用按壓裝置43，能夠使用倒裝晶片接合器等。Next, as shown in FIG. 2( b ), by sandwiching the laminated body 3 between the table 42 and the crimping head 41 , which are the pressing members for temporary crimping, and pressurizing, the semiconductor wafer 1 and the wiring board are pressed together. 2 is temporarily crimped to obtain a temporary crimp body 4 . In FIG. 2 , the press head 41 is arranged on the side of the semiconductor wafer 1 , and the stage 42 is arranged on the side of the printed circuit board 2 . As the pressing device 43 for temporary pressure bonding having the table 42 and the pressure head 41, a flip chip bonder or the like can be used.

對於為了暫時壓接的層疊體3的加壓，在工作台42及壓接頭41中的至少一者低於半導體晶片1的作為第1連接部的凸塊30的熔點、及配線電路板2的作為第2連接部的配線16的熔點的溫度下進行。At least one of the table 42 and the crimping head 41 for pressing the laminated body 3 for temporary crimping is lower than the melting point of the bump 30 serving as the first connection portion of the semiconductor wafer 1 and the melting point of the printed circuit board 2 . This is performed at the temperature of the melting point of the wiring 16 serving as the second connection portion.

在暫時壓接步驟中，從抑制藉由在拾取作為第1構件的半導體晶片1時暫時壓接用按壓構件與半導體晶片1的接觸而使熱轉印到半導體晶片1之觀點考慮，暫時壓接用按壓構件設定為低溫為較佳。 另一方面，為了暫時壓接而對層疊體3加壓期間，為了將膠黏劑40的流動性提高到能夠排除所捲入之空隙之程度，可以將暫時壓接用按壓構件加熱到一定程度的高溫。此時，從縮短暫時壓接用按壓構件的冷卻時間之觀點考慮，拾取半導體晶片1時的暫時壓接用按壓構件的溫度與為了獲得暫時壓接體4而對層疊體3加熱並加壓時的暫時壓接用按壓構件的溫度之差較小為較佳。具體而言，該溫度差較佳為100℃以下，更佳為60℃以下，進一步較佳為實際上0℃。該溫度差可以係恆定的。溫度差為100℃以下時，能夠進一步縮短暫時壓接用按壓構件的冷卻所需的時間。 In the temporary pressure-bonding step, from the viewpoint of suppressing thermal transfer to the semiconductor wafer 1 due to the contact between the pressing member for temporary pressure-bonding and the semiconductor wafer 1 when the semiconductor wafer 1 as the first member is picked up, the temporary pressure-bonding is performed. It is preferable to set it to a low temperature by the pressing member. On the other hand, in order to increase the fluidity of the adhesive 40 to such an extent that the entrapped voids can be eliminated while the laminated body 3 is pressurized for the temporary pressure-bonding, the temporary pressure-bonding pressing member may be heated to a certain degree. of high temperature. At this time, from the viewpoint of shortening the cooling time of the temporary pressure-bonding pressing member, the temperature of the temporary pressure-bonding pressing member when picking up the semiconductor wafer 1 and the temperature of the temporary pressure-bonding pressing member when the laminated body 3 is heated and pressurized in order to obtain the temporary pressure-bonding body 4 It is preferable that the temperature difference of the temporarily crimping pressing member is small. Specifically, the temperature difference is preferably 100°C or lower, more preferably 60°C or lower, and further preferably substantially 0°C. The temperature difference can be constant. When the temperature difference is 100° C. or less, the time required for cooling the temporary pressure-bonding pressing member can be further shortened.

為了獲得暫時壓接體4對層疊體3加壓時的暫時壓接用按壓構件的溫度可以為膠黏劑40的反應開始溫度以上的溫度，亦可以為低於膠黏劑40的反應開始溫度的溫度，但是低於膠黏劑40的反應開始溫度的溫度為較佳。該情況下，難以開始膠黏劑40的反應，在暫時壓接體加壓步驟的開始時刻，沒有進行膠黏劑40的固化，因此容易排除在暫時壓接步驟所產生之空隙。反應開始溫度係指使用DSC（PerkinElmer, Inc.製造、產品名稱“DSC-Pyirs1”），在膠黏劑40的樣品量10mg、升溫速度10℃/分鐘、測定氣氛：氮氣的條件下測定時獲得之DSC溫度記錄圖中之On-set溫度。在完成加壓的暫時壓接步驟中，從在更容易排除暫時壓接步驟所発生之空隙之觀點考慮，暫時壓接用按壓構件的溫度為70℃以上為較佳。In order to obtain the temperature of the temporary pressure-bonding pressing member when the temporary pressure-bonding body 4 presses the laminated body 3 , the temperature of the pressure member for temporary pressure-bonding may be higher than the reaction start temperature of the adhesive 40 or lower than the reaction start temperature of the adhesive 40 . temperature, but a temperature lower than the reaction start temperature of the adhesive 40 is preferable. In this case, it is difficult to start the reaction of the adhesive 40 , and the adhesive 40 is not cured at the start of the temporary pressure-bonding body pressing step, so that the voids generated in the temporary pressure-bonding step can be easily eliminated. The reaction start temperature is obtained by using a DSC (manufactured by PerkinElmer, Inc., product name "DSC-Pyirs1") under the conditions of a sample amount of the adhesive 40 of 10 mg, a temperature increase rate of 10°C/min, and a measurement atmosphere: nitrogen. The On-set temperature in the DSC thermogram. In the temporary pressure-bonding step in which the pressure is completed, the temperature of the temporary pressure-bonding pressing member is preferably 70° C. or higher from the viewpoint of easier removal of voids generated in the temporary pressure-bonding step.

關於為了獲得暫時壓接體4而用於對層疊體3加壓的按壓荷載，考慮凸塊30的個數、凸塊30的高度偏差的吸收、及凸塊30的變形量來適當設定。此時，以對層疊體3加壓，且半導體晶片1的凸塊30與配線電路板2的配線16在暫時壓接體4中相接觸的方式設定按壓荷載為較佳。該情況下，在後續進行之正式壓接步驟中，容易形成凸塊30與配線16的金屬鍵結，凸塊30與配線16之間的膠黏劑40的嚙入趨於變少。從使凸塊30及配線16充分接觸之觀點考慮，為了獲得暫時壓接體4而用於對層疊體3加壓的按壓荷載例如可以設定為半導體晶片1的每一個凸塊30為0.009～0.5N。The pressing load for pressing the laminated body 3 to obtain the temporary crimping body 4 is appropriately set in consideration of the number of bumps 30 , absorption of height variation of the bumps 30 , and deformation amount of the bumps 30 . At this time, it is preferable to set the pressing load so that the laminated body 3 is pressurized and the bumps 30 of the semiconductor wafer 1 and the wirings 16 of the printed circuit board 2 come into contact with the temporary crimping body 4 . In this case, in the subsequent main crimping step, the metal bonding between the bumps 30 and the wirings 16 is easily formed, and the engagement of the adhesive 40 between the bumps 30 and the wirings 16 tends to be less. From the viewpoint of sufficiently contacting the bumps 30 and the wirings 16 , the pressing load for pressing the laminated body 3 in order to obtain the temporary pressure-bonding body 4 can be set to, for example, 0.009 to 0.5 per bump 30 of the semiconductor wafer 1 . N.

為了獲得暫時壓接體4而對層疊體3加壓之時間並無特別限制，但從提高生產率的觀點考慮，5秒以下為較佳，3秒以下為更佳，設為2秒以下為特佳。但是，為了獲得暫時壓接體4而對層疊體3加壓之時間可以為0.1秒以上。又，使凸塊30與配線16接觸之情況下，為了獲得暫時壓接體4而對層疊體3加壓之時間期望設為直到凸塊30與配線16接觸之時間。The time for pressing the laminated body 3 in order to obtain the temporary pressure-bonded body 4 is not particularly limited, but from the viewpoint of improving productivity, it is preferably 5 seconds or less, more preferably 3 seconds or less, and particularly 2 seconds or less. good. However, the time to pressurize the laminated body 3 in order to obtain the temporary pressure-bonded body 4 may be 0.1 second or more. Furthermore, when the bumps 30 are brought into contact with the wirings 16 , the time until the bumps 30 and the wirings 16 are brought into contact with each other is desirably the time to press the laminated body 3 in order to obtain the temporary pressure-bonded body 4 .

作為半導體晶片本體10，並無特別限制，能夠使用由矽、鍺等同種元素構成之元素半導體、砷化鎵、銦磷等化合物半導體等各種半導體。The semiconductor wafer body 10 is not particularly limited, and various semiconductors such as elemental semiconductors composed of the same elements such as silicon and germanium, and compound semiconductors such as gallium arsenide and indium phosphorus can be used.

作為配線電路板2，並無特別限制，作為基板本體20具有以環氧玻璃、聚醯亞胺、聚酯、陶瓷、環氧、雙馬來醯亞胺三嗪等為主要成分之絕緣基板，且使用蝕刻去除形成於其表面之金屬層的不必要的部位而形成配線（配線圖案）之電路板、在上述絕緣基板的表面藉由金屬電鍍等形成配線（配線圖案）之電路板、在上述絕緣基板的表面印刷導電性物質而形成配線（配線圖案）之電路板等。The printed circuit board 2 is not particularly limited, and the substrate body 20 has an insulating substrate mainly composed of epoxy glass, polyimide, polyester, ceramic, epoxy, bismaleimide triazine, etc. In addition, a circuit board in which wiring (wiring pattern) is formed by removing unnecessary parts of the metal layer formed on the surface by etching, a circuit board in which wiring (wiring pattern) is formed on the surface of the insulating substrate by metal plating, etc., in the above-mentioned The surface of the insulating substrate is printed with a conductive substance to form wiring (wiring pattern) of the circuit board and the like.

凸塊30及配線16的材質例如包含金、銀、銅、焊錫（主要成分例如為錫-銀、錫-鉛、錫-鉍、錫-銅、錫-銀-銅）、錫、鎳等金屬作為主要成分。凸塊30及配線16可以僅由單一成分構成，亦可以由複數個成分構成。凸塊30及配線16可以具有該等金屬所層疊之結構。The materials of the bumps 30 and the wirings 16 include, for example, gold, silver, copper, solder (the main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), tin, nickel and other metals as the main ingredient. The bumps 30 and the wirings 16 may be composed of only a single component, or may be composed of a plurality of components. The bumps 30 and the wirings 16 may have a structure in which these metals are stacked.

即使在上述金屬中，從製造凸塊30及配線16的導電性及導熱性優異之半導體裝置（封裝）100之觀點考慮，金、銀或銅為較佳，銀或銅為更佳。從製造成本被降低之半導體裝置（封裝）100之觀點考慮，廉價的銀、銅或焊錫為較佳，銅或焊錫為更佳，焊錫為特佳。從抑制在室溫下形成金屬表面上之氧化膜且抑制生產率的降低及成本的增加之觀點考慮、金、銀、銅或焊錫為較佳，金、銀或焊錫為更佳，金或銀為進一步較佳。從提高半導體裝置100的連接可靠性及抑制翹曲的觀點考慮，焊錫為較佳。Among the above metals, gold, silver or copper is preferable, and silver or copper is more preferable from the viewpoint of manufacturing the semiconductor device (package) 100 having excellent electrical conductivity and thermal conductivity of the bumps 30 and the wirings 16 . From the viewpoint of the semiconductor device (package) 100 in which the manufacturing cost is reduced, inexpensive silver, copper or solder is preferable, copper or solder is more preferable, and solder is particularly preferable. From the viewpoints of suppressing the formation of an oxide film on the metal surface at room temperature, and suppressing a decrease in productivity and an increase in cost, gold, silver, copper or solder is preferable, gold, silver or solder is more preferable, and gold or silver is Further preferred. Solder is preferable from the viewpoints of improving the connection reliability of the semiconductor device 100 and suppressing warpage.

凸塊30及配線16作為表面部，可以具有以金、銀、銅、焊錫（主要成分例如為錫-銀、錫-鉛、錫-鉍、錫-銅）、錫、鎳等為主要成分之金屬層。該種金屬層例如能夠藉由電鍍形成。該金屬層可以僅由單一成分構成，亦可以由複數個成分構成。又，上述金屬層可以具有由單層形成之結構或層疊複數個金屬層之結構。The bumps 30 and the wirings 16 may be made of gold, silver, copper, solder (main components, for example, tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. as the main components. metal layer. Such a metal layer can be formed, for example, by electroplating. The metal layer may be composed of only a single component, or may be composed of a plurality of components. In addition, the above-mentioned metal layer may have a structure formed of a single layer or a structure in which a plurality of metal layers are stacked.

（暫時壓接體加壓步驟） 在暫時壓接體加壓步驟中，如圖3所示，在獲得暫時壓接體4之後，在加熱爐60內的加壓氣氛下一邊對暫時壓接體4加壓一邊加熱。此時，在1個加熱爐60內一次對複數個暫時壓接體4加壓為較佳。其理由如下。亦即，若使用按壓構件一次對複數個暫時壓接體4加壓，則難以對複數個暫時壓接體4均勻地加壓。與此相對，若使用加熱爐60一次對複數個暫時壓接體4加壓，則能夠容易對多個暫時壓接體4均勻地加壓，藉此提高半導體裝置100的生產率。作為加熱爐60，能夠使用回焊爐、加壓烤箱等。 (Temporary crimping body pressurization step) In the temporary pressure-bonding body pressing step, as shown in FIG. 3 , after the temporary pressure-bonding body 4 is obtained, the temporary pressure-bonding body 4 is heated while being pressurized in a pressurized atmosphere in the heating furnace 60 . At this time, it is preferable to pressurize a plurality of temporary crimp bodies 4 at a time in one heating furnace 60 . The reason for this is as follows. That is, if the plurality of temporary crimp bodies 4 are pressurized at one time using the pressing member, it is difficult to pressurize the plurality of temporary crimp bodies 4 uniformly. On the other hand, if the heating furnace 60 is used to pressurize the plurality of temporary pressure-bonding bodies 4 at a time, the plurality of temporary pressure-bonding bodies 4 can be easily and uniformly pressurized, thereby improving the productivity of the semiconductor device 100 . As the heating furnace 60, a reflow furnace, a pressurized oven, or the like can be used.

在加壓氣氛下對暫時壓接體4加壓時，與使用按壓構件對暫時壓接體4加壓之情況相比，內圓角趨於得到抑制。內圓角抑制在小型化及高密度化之半導體裝置100的製造中尤其重要。在此，內圓角抑制係指較小抑制內圓角寬度，內圓角寬度為向半導體裝置100的外周部突出之膠黏劑的長度。內圓角寬度例如能夠藉由數位顯微鏡（KEYENCE CORPORATION製造、產品名稱“VHX-5000”）對半導體裝置100的外管圖像進行拍攝，並在所獲得之圖像上進行測量。此時，測量從半導體晶片1的周圍四邊突出之膠黏劑40的長度（內圓角寬度），且求出其平均值作為內圓角值。從在配線電路板2上搭載複數個半導體晶片1之觀點考慮，內圓角值為150μm以下為較佳。When the temporary crimping body 4 is pressurized in a pressurized atmosphere, the fillet tends to be suppressed as compared with the case where the temporary crimping body 4 is pressurized using a pressing member. Fillet suppression is particularly important in the fabrication of miniaturized and high-density semiconductor devices 100 . Here, fillet suppression means small suppression of fillet width, and fillet width is the length of the adhesive protruding toward the outer peripheral portion of the semiconductor device 100 . The fillet width can be measured on the image obtained by capturing an image of the outer tube of the semiconductor device 100 with, for example, a digital microscope (manufactured by KEYENCE CORPORATION, product name "VHX-5000"). At this time, the length (fillet width) of the adhesive 40 protruding from the surrounding four sides of the semiconductor wafer 1 is measured, and the average value thereof is obtained as the fillet value. From the viewpoint of mounting a plurality of semiconductor wafers 1 on the printed circuit board 2 , the fillet value is preferably 150 μm or less.

加熱爐60內的氣氛並無特別限制，例如只要係空氣、氮氣或甲酸等即可。The atmosphere in the heating furnace 60 is not particularly limited, and may be air, nitrogen, formic acid, or the like, for example.

加熱爐60內的加壓氣氛的壓力（氣壓）根據所連接之半導體晶片1或配線電路板2的尺寸及個數等適當設定。用於加壓的壓力並無特別限制，例如可以超過大氣壓且1MPa以下。此時，從抑制空隙及提高連接可靠性的觀點考慮，壓力大為較佳。另一方面，從抑制內圓角的觀點考慮，壓力越小越較佳。因此，考慮抑制空隙及提高連接可靠性時，用於加壓的壓力為0.05～0.8MPa為較佳。The pressure (air pressure) of the pressurized atmosphere in the heating furnace 60 is appropriately set according to the size and number of the semiconductor wafer 1 or the wiring board 2 to be connected. The pressure used for pressurization is not particularly limited, and for example, it can be higher than atmospheric pressure and 1 MPa or less. In this case, from the viewpoint of suppressing voids and improving connection reliability, the pressure is preferably large. On the other hand, from the viewpoint of suppressing the fillet, the smaller the pressure, the better. Therefore, in consideration of suppressing voids and improving connection reliability, the pressure for pressurization is preferably 0.05 to 0.8 MPa.

在暫時壓接體加壓步驟中，對暫時壓接體4加壓時，加熱爐60的設定溫度設為低於作為半導體晶片1的第1連接部的凸塊30的熔點、及作為配線電路板2的第2連接部的配線16的熔點的溫度。該情況下，與加熱爐60的設定溫度設為作為半導體晶片1的第1連接部的凸塊30及作為配線電路板2的第2連接部的配線16中的至少一者的熔點以上的溫度之情況相比，能夠容易壓縮半導體晶片1與膠黏劑40之間或配線電路板2與膠黏劑40之間之空隙，從而能夠進一步充分地抑制半導體裝置100的膠黏層40A中之空隙的產生。又，膠黏劑40的固化不會過度進行，因此在正式壓接步驟中，容易在完成加壓的暫時壓接體5中進行凸塊30與配線16的連接，從而能夠進一步提高半導體裝置100的連接可靠性。In the temporary pressure-bonding body pressing step, when the temporary pressure-bonding body 4 is pressurized, the set temperature of the heating furnace 60 is set to be lower than the melting point of the bumps 30 serving as the first connection parts of the semiconductor wafer 1 and the wiring circuit The temperature of the melting point of the wiring 16 in the second connection portion of the board 2 . In this case, the set temperature with the heating furnace 60 is set to a temperature equal to or higher than the melting point of at least one of the bumps 30 serving as the first connecting portion of the semiconductor wafer 1 and the wiring 16 serving as the second connecting portion of the printed circuit board 2 . Compared with the case of the above, the gap between the semiconductor chip 1 and the adhesive 40 or between the wiring circuit board 2 and the adhesive 40 can be easily compressed, so that the gap in the adhesive layer 40A of the semiconductor device 100 can be further sufficiently suppressed. production. In addition, since the curing of the adhesive 40 does not proceed excessively, in the main crimping step, the connection between the bumps 30 and the wirings 16 can be easily performed in the temporary crimping body 5 that has been pressurized, and the semiconductor device 100 can be further improved. connection reliability.

在暫時壓接體加壓步驟中，對暫時壓接體4加壓時的加熱爐60的設定溫度可以為膠黏劑40的反應開始溫度以上，亦可以為低於反應開始溫度的溫度，但是膠黏劑40的反應開始溫度以上的溫度為較佳。該情況下，能夠一邊使膠黏劑40流動，一邊更有效地壓縮空隙。此時，從更容易排除空隙之觀點考慮，在暫時壓接體加壓步驟中，加熱爐60的設定溫度與膠黏劑40的反應開始溫度之差（ΔT2）為5℃以上為較佳，10℃以上為更佳。但是，ΔT2為100℃以下為較佳。In the temporary pressure-bonding body pressurizing step, the set temperature of the heating furnace 60 when the temporary pressure-bonding body 4 is pressurized may be higher than the reaction start temperature of the adhesive 40 or lower than the reaction start temperature, but The temperature higher than the reaction start temperature of the adhesive 40 is preferable. In this case, the voids can be compressed more efficiently while the adhesive 40 is flowing. In this case, from the viewpoint of easier removal of voids, in the step of temporarily crimping the body, the difference (ΔT2) between the set temperature of the heating furnace 60 and the reaction start temperature of the adhesive 40 is preferably 5°C or more. 10°C or higher is more preferable. However, ΔT2 is preferably 100°C or lower.

在暫時壓接步驟中，對暫時壓接體4加壓時的加熱爐60的設定溫度可以係為了獲得暫時壓接體4而對層疊體3加壓時（進行半導體晶片1與配線電路板2的暫時壓接時）的暫時壓接用按壓構件的溫度以下的溫度，亦可以係高於為了獲得暫時壓接體4而對層疊體3加壓時的暫時壓接用按壓構件的溫度的溫度，但是高於為了獲得暫時壓接體4而對層疊體3加壓時的暫時壓接用按壓構件的溫度的溫度為較佳。In the temporary pressure-bonding step, the set temperature of the heating furnace 60 when pressing the temporary pressure-bonding body 4 may be the time when the laminated body 3 is pressurized in order to obtain the temporary pressure-bonding body 4 (the semiconductor wafer 1 and the wiring board 2 are subjected to pressure). The temperature below the temperature of the temporary pressure-bonding pressing member at the time of temporary pressure-bonding) may be higher than the temperature of the temporary pressure-bonding pressing member when the laminated body 3 is pressurized in order to obtain the temporary pressure-bonding body 4 However, it is preferable that the temperature is higher than the temperature of the pressing member for temporary pressure-bonding when the laminated body 3 is pressurized in order to obtain the temporary pressure-bonding body 4 .

從一邊流動一邊有效地壓縮空隙之觀點考慮，對暫時壓接體4加壓時的加熱爐60的設定溫度為140℃以上為較佳，145℃以上為更佳，150℃以上為特佳。但是，對暫時壓接體4加壓時的加熱爐60的設定溫度為260℃以下為較佳。From the viewpoint of efficiently compressing the voids while flowing, the set temperature of the heating furnace 60 when pressurizing the temporary crimp body 4 is preferably 140°C or higher, more preferably 145°C or higher, and particularly preferably 150°C or higher. However, it is preferable that the preset temperature of the heating furnace 60 when the temporary crimping body 4 is pressurized is 260° C. or lower.

（正式壓接步驟） 在正式壓接步驟中，獲得完成加壓的暫時壓接體5後，如圖4（a）及（b）所示，使用具有對置配置之工作台45及壓接頭44來作為一對正式壓接用構件之按壓裝置46，且藉由利用工作台45及壓接頭44夾著之熱壓一邊對完成加壓的暫時壓接體5加熱一邊加壓，從而形成壓接體6。此時，按壓裝置46可以與按壓裝置43相同，亦可以係另外準備者。又，工作台45及壓接頭44中的至少一者對完成加壓的暫時壓接體5加壓時，加熱到凸塊30的熔點及配線16的熔點中的至少任一方的熔點以上的溫度。又，在壓接體6中，通常半導體晶片1與配線電路板2藉由凸塊30及配線16進行金屬鍵結來電連接。壓接體6可以直接用作半導體裝置，亦可以在正式壓接步驟後，在加壓氣氛下進一步加熱壓接體6，使膠黏劑40進一步固化而形成膠黏層40A後作為半導體裝置100。 (Formal crimping step) In the main crimping step, after the temporary crimping body 5 that has been pressurized is obtained, as shown in FIGS. 4( a ) and 4 ( b ), the table 45 and the crimping head 44 which are arranged to face each other are used as a pair of formal crimping The pressing device 46 of the crimping member forms the crimping body 6 by heating and pressing the temporarily crimping body 5 that has been pressurized by thermal pressing between the table 45 and the crimping head 44 . At this time, the pressing device 46 may be the same as the pressing device 43, or it may be prepared by another person. Furthermore, when at least one of the table 45 and the crimping head 44 pressurizes the pressurized temporary crimp body 5 , it is heated to a temperature equal to or higher than the melting point of at least one of the melting point of the bump 30 and the melting point of the wiring 16 . . Moreover, in the crimping body 6 , the semiconductor chip 1 and the wiring circuit board 2 are normally electrically connected by metal bonding through the bumps 30 and the wirings 16 . The crimping body 6 can be directly used as a semiconductor device, or after the actual crimping step, the crimping body 6 can be further heated in a pressurized atmosphere to further solidify the adhesive 40 to form an adhesive layer 40A as the semiconductor device 100 . .

再者，在圖4中，壓接頭44配置在完成加壓的暫時壓接體的半導體晶片1側，工作台45配置在完成加壓的暫時壓接體的配線電路板2側。在壓接體6中，配線16及凸塊30藉由膠黏劑40密封以便與外部環境阻斷。In FIG. 4 , the press head 44 is arranged on the side of the semiconductor wafer 1 of the temporary pressure-bonding body after pressing, and the table 45 is arranged on the wiring board 2 side of the temporary pressure-bonding body after the pressing. In the crimp body 6, the wiring 16 and the bumps 30 are sealed by the adhesive 40 so as to be blocked from the external environment.

為了獲得壓接體6而對完成加壓的暫時壓接體5加熱及加壓時，可以去除凸塊30及配線16中的至少一者的表面的氧化膜。因此，工作台45及壓接頭44的至少一者的溫度可以設定為有效去除凸塊30及配線16中的至少一者的表面的氧化膜之溫度以上。從該種觀點考慮，工作台45及壓接頭44的至少一者的溫度在220℃以上且330℃以下為較佳。該情況下，凸塊30或配線16的金屬材料包含焊錫時，與工作台45及壓接頭44的至少一者的溫度小於220℃之情況相比，凸塊30或配線16的焊錫熔融而容易形成充分的金屬鍵結。溫度為330℃以下時，與溫度超過330℃之情況相比，不易產生空隙，或焊錫不易飛散。凸塊30及配線16中的至少一者的金屬材料包含熔點約220℃的Sn/Ag之情況下，工作台45及壓接頭44的至少一者的溫度亦可以為220℃以上。The oxide film on the surface of at least one of the bumps 30 and the wirings 16 may be removed when heating and pressurizing the pressurized temporary crimping body 5 in order to obtain the crimping body 6 . Therefore, the temperature of at least one of the stage 45 and the press head 44 can be set to be equal to or higher than the temperature at which the oxide film on the surface of at least one of the bumps 30 and the wirings 16 is effectively removed. From such a viewpoint, the temperature of at least one of the table 45 and the crimping head 44 is preferably 220° C. or higher and 330° C. or lower. In this case, when the metal material of the bumps 30 or the wirings 16 contains solder, the solder of the bumps 30 or the wirings 16 is easily melted compared with the case where the temperature of at least one of the table 45 and the press head 44 is lower than 220° C. Form sufficient metallic bonds. When the temperature is 330°C or lower, voids are less likely to be generated or solder is less likely to be scattered than when the temperature exceeds 330°C. When the metal material of at least one of the bumps 30 and the wirings 16 includes Sn/Ag with a melting point of about 220°C, the temperature of at least one of the stage 45 and the press head 44 may be 220°C or higher.

使用按壓裝置46一邊加熱完成加壓的暫時壓接體5一邊加壓之情況下，按壓荷載可考慮除去凸塊30及配線16中的至少一者的表面的氧化膜、凸塊30的個數、凸塊30的高度偏差的吸收、及凸塊30的變形量的控制等而適當設定。按壓荷載較大時，趨於容易去除氧化膜。按壓荷載可以為例如半導體晶片1的每一個凸塊30為0.009～0.2N。該按壓荷載為0.009N以上時，容易去除形成在凸塊30及配線16中的至少一者之氧化膜，或膠黏劑40難以捕獲到凸塊30及配線16中的至少一者。又，按壓荷載為0.2N以下時，不易發生包含焊錫等之凸塊被壓碎或飛散等不良情況。In the case where the pressurizing device 46 is used to pressurize the temporarily press-bonded body 5 that has been pressurized, the pressing load can be taken into consideration to remove the oxide film on the surface of at least one of the bumps 30 and the wirings 16 and the number of the bumps 30 . , absorption of the height variation of the bumps 30 , and control of the deformation amount of the bumps 30 are appropriately set. When the pressing load is large, the oxide film tends to be easily removed. The pressing load may be, for example, 0.009 to 0.2 N per bump 30 of the semiconductor wafer 1 . When the pressing load is 0.009N or more, the oxide film formed on at least one of the bumps 30 and the wirings 16 is easily removed, or the adhesive 40 is difficult to capture at least one of the bumps 30 and the wirings 16 . In addition, when the pressing load is 0.2 N or less, failures such as bumps including solder or the like being crushed or scattered are less likely to occur.

從提高生產率的觀點考慮、為了獲得壓接體6而一邊加熱完成加壓的暫時壓接體5一邊加壓之時間為5秒以下為較佳，3秒以下為更佳，2秒以下為特佳。但是，為了獲得壓接體6而一邊加熱完成加壓的暫時壓接體5一邊加壓之時間可以為0.1秒以上。From the viewpoint of improving productivity, in order to obtain the pressure-bonded body 6, the time for pressing while heating and pressing the temporary pressure-bonding body 5 is preferably 5 seconds or less, more preferably 3 seconds or less, and particularly 2 seconds or less good. However, in order to obtain the pressure-bonded body 6 , the time for pressing while heating the temporary pressure-bonding body 5 that has been pressurized may be 0.1 second or more.

對完成加壓的暫時壓接體5加熱及加壓之方法並不限定於如圖4之熱壓，例如可以使用加熱爐在加熱爐內的加壓氣氛下加熱完成加壓的暫時壓接體5。作為加熱爐，能夠使用回焊爐、加壓烤箱等。加熱爐內的氣氛並無特別限制，例如可以為空氣、氮氣或甲酸等。The method of heating and pressurizing the pressurized temporary pressure-bonding body 5 is not limited to the hot-pressing shown in FIG. 4 . For example, a heating furnace can be used to heat the pressurized temporary pressure-bonding body in a pressurized atmosphere in the heating furnace. 5. As a heating furnace, a reflow furnace, a pressure oven, etc. can be used. The atmosphere in the heating furnace is not particularly limited, and may be, for example, air, nitrogen, formic acid, or the like.

＜膠黏劑＞ 接下來，對用於上述半導體裝置的製造方法的實施形態之膠黏劑進行說明。 本實施形態的膠黏劑只要係熱固化性膠黏劑，則並無特別限制，例如含有環氧樹脂、固化劑及助焊劑。 ＜Adhesive＞ Next, the adhesive used in the embodiment of the manufacturing method of the said semiconductor device is demonstrated. The adhesive of the present embodiment is not particularly limited as long as it is a thermosetting adhesive, and includes, for example, an epoxy resin, a curing agent, and a flux.

（環氧樹脂） 環氧樹脂只要係在分子內具有2個以上環氧基者，則並無特別限制。作為環氧樹脂，能夠使用雙酚A型環氧樹脂、雙酚F型環氧樹脂、萘型環氧樹脂、苯酚酚醛型環氧樹脂、甲酚酚醛型環氧樹脂、苯酚芳烷基型環氧樹脂、伸茬基型環氧樹脂、三苯甲烷型環氧樹脂、二環戊二烯型環氧樹脂等各種多官能環氧樹脂等。該等彈性體能夠單獨使用或組合2種以上而使用。 (epoxy resin) The epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule. As the epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, naphthalene type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, phenol aralkyl type epoxy resin can be used Various multifunctional epoxy resins such as oxygen resin, stubble-based epoxy resin, triphenylmethane epoxy resin, dicyclopentadiene epoxy resin, etc. These elastomers can be used alone or in combination of two or more.

環氧樹脂的重量平均分子量並無特別限制，小於10000為較佳。The weight average molecular weight of the epoxy resin is not particularly limited, and it is preferably less than 10,000.

從抑制在高溫下連接時分解而產生揮發成分之觀點考慮，環氧樹脂使用連接時的溫度（正式壓接步驟中之加熱溫度）下之熱重量減少率為5%以下的環氧樹脂為較佳。例如連接時的溫度為250℃的情況下，使用250℃下之熱重量減少率為5%以下的環氧樹脂為較佳，300℃的情況下，使用300℃下之熱重量減少率為5%以下的環氧樹脂為較佳。From the viewpoint of suppressing the generation of volatile components due to decomposition during connection at high temperature, it is preferable to use an epoxy resin with a thermal weight reduction rate of 5% or less at the temperature at the time of connection (heating temperature in the actual crimping step). good. For example, if the temperature at the time of connection is 250°C, it is better to use an epoxy resin with a thermal weight reduction rate of 5% or less at 250°C. In the case of 300°C, use an epoxy resin with a thermal weight reduction rate of 5% at 300°C. % or less of epoxy resin is preferred.

以膠黏劑40的總量基準計，環氧樹脂的含量例如為5～75質量%，較佳為10～50質量%，更佳為15～35質量%。The content of the epoxy resin is, for example, 5 to 75% by mass, preferably 10 to 50% by mass, and more preferably 15 to 35% by mass, based on the total amount of the adhesive 40 .

（固化劑） 作為固化劑，例如可舉出酚醛樹脂系固化劑、酸酐系固化劑、胺系固化劑、咪唑系固化劑及膦系固化劑。從顯示抑制在凸塊30或配線16產生氧化膜之助焊活性，且提高連接可靠性及絕緣可靠性之觀點考慮，固化劑包含選自酚性樹脂系固化劑、酸酐系固化劑、胺系固化劑及咪唑系固化劑之至少一種為較佳，包含咪唑系固化劑為進一步較佳。以下、對各固化劑進行說明。 (Hardener) As the curing agent, for example, a phenolic resin-based curing agent, an acid anhydride-based curing agent, an amine-based curing agent, an imidazole-based curing agent, and a phosphine-based curing agent can be mentioned. From the viewpoint of showing the fluxing activity of suppressing the generation of oxide films on the bumps 30 or the wirings 16 and improving the connection reliability and insulation reliability, the curing agent includes a curing agent selected from the group consisting of phenolic resin-based curing agents, acid anhydride-based curing agents, and amine-based curing agents. At least one of a curing agent and an imidazole-based curing agent is preferred, and it is further preferred to include an imidazole-based curing agent. Hereinafter, each curing agent will be described.

酚醛樹脂系固化劑只要在分子內具有2個以上酚性羥基則並無特別限制，作為其例子，可舉出苯酚酚醛樹脂、甲酚酚醛樹脂、苯酚芳烷基樹脂、甲酚萘酚甲醛縮聚物、三苯甲烷型多官能酚及各種多官能酚醛樹脂。該等能夠單獨使用或用作2種以上的混合物。The phenolic resin curing agent is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule, and examples thereof include phenol novolac resin, cresol novolac resin, phenol aralkyl resin, cresol naphthol formaldehyde polycondensation Compounds, triphenylmethane-type polyfunctional phenols and various polyfunctional phenolic resins. These can be used individually or as a mixture of 2 or more types.

從良好的固化性、膠黏性及保存穩定性的觀點考慮，酚醛樹脂系固化劑相對於環氧樹脂之當量比（酚性羥基/環氧基、莫耳比）為0.3～1.5為較佳，0.4～1.0為更佳，0.5～1.0為進一步較佳。當量比為0.3以上時，固化性趨於提高且膠黏力趨於提高，為1.5以下時，未反應的酚性羥基不會過度殘留，且較低地抑制吸水率，從而半導體裝置100的絕緣可靠性趨於提高。當量比為0.3～1.5時，容易在適當範圍內調整凝膠時間。From the viewpoint of good curability, adhesiveness, and storage stability, the equivalent ratio (phenolic hydroxyl group/epoxy group, molar ratio) of the phenolic resin-based curing agent to the epoxy resin is preferably 0.3 to 1.5 , 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is further preferable. When the equivalence ratio is 0.3 or more, the curability tends to improve and the adhesive force tends to improve, and when it is 1.5 or less, the unreacted phenolic hydroxyl group does not remain excessively, and the water absorption rate is suppressed low, thereby insulating the semiconductor device 100 Reliability tends to improve. When the equivalence ratio is 0.3 to 1.5, it is easy to adjust the gel time within an appropriate range.

作為酸酐系固化劑，例如可舉出甲基環己烷四羧酸二酐、苯三甲酸酐、苯四甲酸酐、二苯甲酮四羧酸二酐及乙二醇雙苯偏三酸酐。該等能夠單獨使用或用作2種以上的混合物。As an acid anhydride type hardening|curing agent, methylcyclohexane tetracarboxylic dianhydride, trimellitic anhydride, a pyromellitic anhydride, a benzophenone tetracarboxylic dianhydride, and ethylene glycol bis trimellitic anhydride are mentioned, for example. These can be used individually or as a mixture of 2 or more types.

從良好的固化性、膠黏性及保存穩定性的觀點考慮，酸酐系固化劑相對於環氧樹脂之當量比（酸酐基/環氧基、莫耳比）為0.3～1.5為較佳，0.4～1.0為更佳，0.5～1.0為進一步較佳。當量比為0.3以上時，固化性趨於提高且膠黏力趨於提高，為1.5以下時，未反應的酸酐不會過度殘留，且較低地抑制吸水率，從而半導體裝置100的絕緣可靠性趨於提高。當量比為0.3～1.5時，容易在適當範圍內調整凝膠時間。From the viewpoint of good curability, adhesiveness and storage stability, the equivalent ratio (acid anhydride group/epoxy group, molar ratio) of the acid anhydride type curing agent to the epoxy resin is preferably 0.3 to 1.5, and 0.4 is preferred. -1.0 is more preferable, and 0.5-1.0 is more preferable. When the equivalence ratio is 0.3 or more, the curability tends to improve and the adhesive force tends to improve, and when it is 1.5 or less, the unreacted acid anhydride does not remain excessively, and the water absorption rate is suppressed low, so that the insulation reliability of the semiconductor device 100 is improved. tend to increase. When the equivalence ratio is 0.3 to 1.5, it is easy to adjust the gel time within an appropriate range.

作為胺系固化劑，例如能夠使用二氰二胺。As the amine-based curing agent, for example, dicyandiamine can be used.

從良好的固化性、膠黏性及保存穩定性的觀點考慮，胺系固化劑相對於環氧樹脂之當量比（胺基/環氧基、莫耳比）為0.3～1.5為較佳，0.4～1.0為更佳，0.5～1.0為進一步較佳。當量比為0.3以上時，固化性趨於提高且膠黏力趨於提高，為1.5以下時，未反應的胺不會過度殘留，從而半導體裝置100的絕緣可靠性趨於提高。當量比為0.3～1.5時，容易在適當範圍內調整凝膠時間。From the viewpoint of good curability, adhesiveness and storage stability, the equivalent ratio of the amine-based curing agent to the epoxy resin (amine group/epoxy group, molar ratio) is preferably 0.3 to 1.5, preferably 0.4 -1.0 is more preferable, and 0.5-1.0 is more preferable. When the equivalent ratio is 0.3 or more, the curability and adhesive force tend to improve, and when it is 1.5 or less, the unreacted amine does not remain excessively, and the insulation reliability of the semiconductor device 100 tends to improve. When the equivalence ratio is 0.3 to 1.5, it is easy to adjust the gel time within an appropriate range.

作為咪唑系固化劑，例如可舉出2-苯基咪唑、2-苯基-4-甲基咪唑、1-芐基-2-甲基咪唑、1-芐基-2-苯基咪唑、1-氰基乙基-2-十一烷基咪唑，1-氰基-2-苯基咪唑，1-氰基乙基-2-十一烷基咪唑三甲酸酯、1,2,4-苯三甲酸1-氰基乙基-2-苯基咪唑鎓、2,4-二胺基-6-[2’-甲基咪唑基-（1’）]-乙基-對稱三嗪、2,4-二胺基-6-[2’-十一烷基咪唑-（1’）]-乙基-對稱三嗪、2,4-二胺基-6-[2’-乙基-4’-甲基咪唑基-（1’）]-乙基-對稱三嗪、2,4-二胺基-6-[2’-甲基咪唑基-（1’）]-乙基-對稱三嗪異三聚氰酸加成物、2-苯基咪唑三聚氰酸加成物、2-苯基-4,5-二羥甲基咪唑、2-苯基-4-甲基-5-羥甲基咪唑及環氧樹脂與咪唑類的加成物。從優異之固化性、保存穩定性及連接可靠性的觀點考慮，可以從1-氰基乙基-2-十一烷基咪唑、1-氰基-2-苯基咪唑、1-氰基乙基-2-十一烷基咪唑三甲酸酯、1,2,4-苯三甲酸1-氰基乙基-2-苯基咪唑鎓、2,4-二胺基-6-[2’-甲基咪唑基-（1’）]-乙基-對稱三嗪、2,4-二胺基-6-[2’-乙基-4’-甲基咪唑基-（1’）]-乙基-對稱三嗪、2,4-二胺基-6-[2’-甲基咪唑基-（1’）]-乙基-對稱三嗪異三聚氰酸加成物、2-苯基咪唑三聚氰酸加成物、2-苯基-4,5-二羥甲基咪唑及2-苯基-4-甲基-5-羥甲基咪唑選擇咪唑系固化劑。該等能夠單獨使用或併用2種以上。亦能夠將包含該等之微膠囊用作潛在固化劑。Examples of imidazole-based curing agents include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-benzyl-2-phenylimidazole, -Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole tricarboxylate, 1,2,4-benzene 1-cyanoethyl-2-phenylimidazolium tricarboxylate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric triazine, 2, 4-Diamino-6-[2'-undecylimidazole-(1')]-ethyl-symmetric triazine, 2,4-diamino-6-[2'-ethyl-4' -Methylimidazolyl-(1')]-ethyl-symmetric triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric triazine Isocyanuric acid adduct, 2-phenylimidazole cyanuric acid adduct, 2-phenyl-4,5-dimethylolimidazole, 2-phenyl-4-methyl-5-hydroxyl Methyl imidazole and adducts of epoxy resins and imidazoles. From the viewpoint of excellent curability, storage stability and connection reliability, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl 1-cyanoethyl-2-phenylimidazolium 1,2,4-benzenetricarboxylic acid, 2,4-diamino-6-[2'- Methylimidazolyl-(1')]-ethyl-symmetric triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl Base-symmetric triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric triazine isocyanuric acid adduct, 2-phenyl Imidazole cyanuric acid adduct, 2-phenyl-4,5-dimethylolimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole are selected as imidazole-based curing agents. These can be used alone or in combination of two or more. Microcapsules containing these can also be used as latent curing agents.

咪唑系固化劑的含量相對於環氧樹脂100質量份為0.1～20質量份為較佳，0.1～10質量份為更佳，3.2～5.5質量份為進一步較佳。咪唑系固化劑的含量為0.1質量份以上時，膠黏劑40的固化性趨於提高，為20質量份以下時，在由凸塊30和配線16形成金屬鍵結之前，膠黏劑40不會固化，從而趨於不易發生凸塊30與配線16的連接不良。咪唑系固化劑的含量為0.1～20質量份時，容易在適當範圍內調整凝膠時間。The content of the imidazole-based curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, and even more preferably 3.2 to 5.5 parts by mass relative to 100 parts by mass of the epoxy resin. When the content of the imidazole-based curing agent is 0.1 parts by mass or more, the curability of the adhesive 40 tends to be improved, and when the content is 20 parts by mass or less, the adhesive 40 does not work before forming the metal bond between the bumps 30 and the wirings 16 . It is cured, so that poor connection between the bumps 30 and the wirings 16 tends to be less likely to occur. When the content of the imidazole-based curing agent is 0.1 to 20 parts by mass, it is easy to adjust the gel time within an appropriate range.

作為膦系固化劑，例如可舉出三苯基膦、四苯基硼四苯基膦、四苯基硼四（4-甲基苯基）硼酸鹽及四苯基硼四（4-氟苯基）硼酸鹽。Examples of the phosphine-based curing agent include triphenylphosphine, tetraphenylboron tetraphenylphosphine, tetraphenylboron tetrakis(4-methylphenyl)borate, and tetraphenylboron tetrakis(4-fluorobenzene) base) borate.

膦系固化劑的含量相對於環氧樹脂100質量份為0.1～10質量份為較佳，0.1～5質量份為更佳。膦系固化劑的含量為0.1質量份以上時，膠黏劑40的固化性趨於提高，為10質量份以下時，在由凸塊30和配線16形成金屬鍵結之前，膠黏劑40不會固化，從而凸塊30與配線16趨於不易發生連接不良。The content of the phosphine-based curing agent is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass, with respect to 100 parts by mass of the epoxy resin. When the content of the phosphine-based curing agent is 0.1 parts by mass or more, the curability of the adhesive 40 tends to be improved, and when the content is 10 parts by mass or less, the adhesive 40 does not become stable until the metal bonding between the bumps 30 and the wiring 16 is formed. It is cured, so that the connection failure between the bumps 30 and the wirings 16 tends to be less likely to occur.

酚醛樹脂系固化劑、酸酐系固化劑及胺系固化劑能夠分別單獨使用，或用作2種以上的混合物。咪唑系固化劑及膦系固化劑可以分別單獨使用，亦可以與酚醛樹脂系固化劑、酸酐系固化劑或胺系固化劑並用。The phenolic resin-based curing agent, the acid anhydride-based curing agent, and the amine-based curing agent can be used alone or as a mixture of two or more. The imidazole-based curing agent and the phosphine-based curing agent may be used alone, or may be used in combination with a phenolic resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.

（助焊劑） 助焊劑為具有例如由式（1）表示之基團之化合物。作為助焊劑，能夠使用僅包含1種或2種以上由下述式（1）表示之基團者。 (flux) The flux is a compound having, for example, a group represented by formula (1). As the flux, one containing only one or two or more groups represented by the following formula (1) can be used.

【化學式1】

Figure 02_image001
在式（1）中，R 1表示氫原子或供電子性基團。作為供電子性基團，例如可舉出烷基、羥基、胺基、烷氧基、烷胺基。供電子性基團係難以與其他成分（環氧樹脂等）反應者為較佳，烷基、羥基或烷氧基為較佳，烷基為更佳。 [Chemical formula 1]
Figure 02_image001
In formula (1), R 1 represents a hydrogen atom or an electron-donating group. As an electron donating group, an alkyl group, a hydroxyl group, an amino group, an alkoxy group, and an alkylamino group are mentioned, for example. The electron-donating group is preferably one that is difficult to react with other components (epoxy resin, etc.), preferably an alkyl group, a hydroxyl group or an alkoxy group, and even more preferably an alkyl group.

作為烷基，碳原子數1～10的烷基為較佳，碳原子數1～5的烷基為更佳。基本上，供電子基團越多供電子性越強而較佳，但立體阻礙亦變大。因此，烷基可以為直鏈狀，亦可以為支鏈狀，但直鏈狀為較佳。烷基為直鏈狀之情況下，從減少立體阻礙之觀點考慮，烷基的碳原子數與包含羧基之主鏈的碳原子數相等或在其以下為較佳。As the alkyl group, an alkyl group having 1 to 10 carbon atoms is preferable, and an alkyl group having 1 to 5 carbon atoms is more preferable. Basically, the more electron-donating groups, the stronger the electron-donating property and the better, but the steric hindrance also increases. Therefore, the alkyl group may be straight-chain or branched, but straight-chain is preferred. When the alkyl group is linear, the number of carbon atoms in the alkyl group is preferably equal to or less than the number of carbon atoms in the main chain including the carboxyl group from the viewpoint of reducing steric hindrance.

作為烷氧基，碳原子數1～10的烷氧基為較佳，碳原子數1～5的烷氧基為更佳。基本上，供電子基團越多供電子性越強，但立體阻礙亦變大。因此，烷氧基的烷基部分可以為直鏈狀，亦可以為支鏈狀，直鏈狀為較佳。烷氧基的烷基部分為直鏈狀之情況下，從減少立體阻礙之觀點考慮，其碳原子數與包含羧酸之主鏈的碳原子數相等或再在其以下為較佳。As the alkoxy group, an alkoxy group having 1 to 10 carbon atoms is preferable, and an alkoxy group having 1 to 5 carbon atoms is more preferable. Basically, the more electron-donating groups, the stronger the electron-donating property, but the larger the steric hindrance. Therefore, the alkyl moiety of the alkoxy group may be straight-chain or branched, and straight-chain is preferred. When the alkyl moiety of the alkoxy group is linear, the number of carbon atoms in the main chain including the carboxylic acid is preferably equal to or less than that from the viewpoint of reducing steric hindrance.

作為烷胺基，可舉出單烷基胺基及二烷基胺基。作為單烷基胺基，碳原子數1～10的單烷基胺基為較佳，碳原子數1～5的單烷基胺基為更佳。單烷基胺基的烷基部分可以為直鏈狀，亦可以為支鏈狀，直鏈狀為較佳。As an alkylamino group, a monoalkylamine group and a dialkylamine group are mentioned. As the monoalkylamine group, a monoalkylamine group having 1 to 10 carbon atoms is preferable, and a monoalkylamine group having 1 to 5 carbon atoms is more preferable. The alkyl moiety of the monoalkylamine group may be straight-chain or branched, but straight-chain is preferred.

作為二烷基胺基，碳原子數1～20的二烷基胺基為較佳，碳原子數1～10的二烷基胺基為更佳。二烷基胺基的烷基部分可以為直鏈狀，亦可以為支鏈狀，直鏈狀為較佳。As the dialkylamine group, a dialkylamine group having 1 to 20 carbon atoms is preferable, and a dialkylamine group having 1 to 10 carbon atoms is more preferable. The alkyl moiety of the dialkylamine group may be straight-chain or branched, but straight-chain is preferred.

助焊劑為具有2個羧基之化合物（二羧酸）為較佳。具有2個羧基之化合物與具有1個羧基之化合物（一元羧酸）相比，即使在連接時的高溫下亦難以揮發，從而能夠進一步抑制空隙的產生。又，使用具有2個羧基之化合物時，與使用具有3個以上羧基之化合物之情況相比，能夠進一步抑制保管時及連接作業時等之膠黏劑40的黏度上升。其結果，能夠進一步提高半導體裝置100的連接可靠性。The flux is preferably a compound (dicarboxylic acid) having two carboxyl groups. Compared with the compound having one carboxyl group (monocarboxylic acid), the compound having two carboxyl groups is less likely to volatilize even at a high temperature at the time of connection, so that the generation of voids can be further suppressed. Moreover, when the compound which has 2 carboxyl groups is used, compared with the case where the compound which has 3 or more carboxyl groups is used, the viscosity rise of the adhesive 40 at the time of storage, connection work, etc. can be suppressed further. As a result, the connection reliability of the semiconductor device 100 can be further improved.

作為助焊劑，能夠適宜地使用由下述式（2）表示之化合物。依據包含由下述式（2）表示之化合物形成之助焊劑，能夠進一步提高半導體裝置100的耐回焊性及連接可靠性。 【化學式2】

Figure 02_image003
在式（2）中，R 1及R 2分別獨立地表示氫原子或供電子性基團，n表示0～10的整數。 As the flux, a compound represented by the following formula (2) can be suitably used. According to the flux containing the compound represented by the following formula (2), the reflow resistance and connection reliability of the semiconductor device 100 can be further improved. [Chemical formula 2]
Figure 02_image003
In formula (2), R 1 and R 2 each independently represent a hydrogen atom or an electron-donating group, and n represents an integer of 0 to 10.

式（2）中之n係2～10的整數為較佳，2～8的整數為更佳。n為10以下時，在更短時間內顯現助焊活性，尤其連接時間較短之情況下，可獲得進一步優異之連接可靠性。又，n為2以上時，即使在連接時的高溫下亦難以揮發，從而能夠進一步抑制空隙的產生。In the formula (2), n is preferably an integer of 2 to 10, more preferably an integer of 2 to 8. When n is 10 or less, the fluxing activity is exhibited in a shorter time, and in particular, when the connection time is short, further excellent connection reliability can be obtained. Moreover, when n is 2 or more, volatilization becomes difficult even at high temperature at the time of connection, and generation of voids can be further suppressed.

R 1及R 2可以為氫原子，亦可以為供電子性基團。R 1及R 2為氫原子時，膠黏劑40的熔點趨於變低，從而存在連接可靠性（焊錫潤濕性）變得更好之情況。例如，R 1、R 2均為相同甲基之助焊劑與一個（R 1或R 2）為甲基者相比熔點變高，焊錫的潤濕性藉由熔點趨於（例如成為150℃以上時）降低。 R 1 and R 2 may be hydrogen atoms or electron-donating groups. When R 1 and R 2 are hydrogen atoms, the melting point of the adhesive 40 tends to be lower, and the connection reliability (solder wettability) may become better. For example, the melting point of a flux in which both R 1 and R 2 are the same methyl group has a higher melting point than one (R 1 or R 2 ) is a methyl group, and the wettability of the solder tends to become (for example, 150°C or more) due to the melting point. time) decreased.

作為助焊劑，例如能夠使用在選自琥珀酸、戊二酸、己二酸、庚二酸、辛二酸、壬二酸、癸二酸、十一烷二酸和十二烷二酸之二羧酸的第2位上取代了供電子性基團之化合物。As the flux, for example, it is possible to use two of succinic acid, glutaric acid, adipic acid, pimelic acid, suberic acid, azelaic acid, sebacic acid, undecanedioic acid and dodecanedioic acid. A compound in which an electron-donating group is substituted at the 2nd position of the carboxylic acid.

助焊劑的熔點為150℃以下為較佳，140℃以下為更佳，130℃以下為進一步較佳。該種助焊劑在環氧樹脂與固化劑發生固化反應之前充分顯現助焊活性。因此，藉由含有該種助焊劑之膠黏劑40，能夠實現連接可靠性進一步優異之半導體裝置100。又，上述助焊劑係在室溫下為固體者為較佳，助焊劑的熔點為25℃以上為較佳，50℃以上為更佳。助焊劑的熔點例如能夠藉由在雙管式溫度計上安裝裝有試料之毛細管並在熱水槽中加熱之裝置來測定。The melting point of the flux is preferably 150°C or lower, more preferably 140°C or lower, and even more preferably 130°C or lower. This flux fully exhibits fluxing activity before the epoxy resin and curing agent undergo a curing reaction. Therefore, by the adhesive 40 containing such a flux, the semiconductor device 100 with further excellent connection reliability can be realized. In addition, it is preferable that the above-mentioned flux is solid at room temperature, and the melting point of the flux is preferably 25°C or higher, more preferably 50°C or higher. The melting point of the flux can be measured, for example, by attaching a capillary tube containing a sample to a double-tube thermometer and heating it in a hot water bath.

本實施形態的膠黏劑40中含有之助焊劑的熔點高於用於形成暫時壓接體4的按壓裝置43的工作台42的溫度為較佳。助焊劑的熔點高於按壓裝置43的工作台溫度之情況下，在正式壓接步驟中，容易使凸塊30與配線16接觸，因此即使正式壓接步驟的最初和最後的熱歷程不同，亦能夠製造連接可靠性優異之半導體裝置100。The melting point of the flux contained in the adhesive 40 of the present embodiment is preferably higher than the temperature of the table 42 of the pressing device 43 for forming the temporary crimping body 4 . When the melting point of the flux is higher than the table temperature of the pressing device 43, the bumps 30 and the wirings 16 are easily brought into contact with each other in the main crimping step. The semiconductor device 100 excellent in connection reliability can be manufactured.

以膠黏劑40的總量基準計，助焊劑的含量為0.5～10質量%為較佳，0.5～5質量%為更佳。The content of the flux is preferably 0.5 to 10% by mass, more preferably 0.5 to 5% by mass, based on the total amount of the adhesive 40 .

（高分子成分） 膠黏劑40可以進一步含有高分子成分。 (polymer component) The adhesive 40 may further contain a polymer component.

高分子成分由與環氧樹脂不同的高分子構成。作為該種高分子成分，例如可舉出苯氧基樹脂、聚醯亞胺樹脂、聚醯胺樹脂、聚碳二亞胺樹脂、氰酸酯樹脂、丙烯酸樹脂、聚酯樹脂、聚乙烯樹脂、聚醚碸樹脂、聚醚醯亞胺樹脂、聚乙烯醇縮醛樹脂、聚胺酯樹脂及丙烯酸凝膠。在該等中，從耐熱性及成膜性優異之觀點考慮，苯氧基樹脂、聚醯亞胺樹脂、丙烯酸凝膠、氰酸酯樹脂及聚碳二亞胺樹脂為較佳，苯氧基樹脂、聚醯亞胺樹脂及丙烯酸凝膠為更佳。該等高分子成分亦能夠單獨使用或用作2種以上的混合物或共聚物。The polymer component is composed of a polymer different from the epoxy resin. Examples of such polymer components include phenoxy resins, polyimide resins, polyamide resins, polycarbodiimide resins, cyanate resins, acrylic resins, polyester resins, polyethylene resins, Polyether tungsten resin, polyether imide resin, polyvinyl acetal resin, polyurethane resin and acrylic gel. Among these, phenoxy resins, polyimide resins, acrylic gels, cyanate resins, and polycarbodiimide resins are preferred from the viewpoint of being excellent in heat resistance and film-forming properties, and phenoxy resins are preferred. Resin, polyimide resin and acrylic gel are more preferred. These polymer components can also be used alone or as a mixture or copolymer of two or more kinds.

高分子成分的重量平均分子量並無特別限制，但10000以上為較佳。該情況下，含有高分子成分之膠黏劑40在耐熱性及成膜性這一點上進一步優異。因此，若使用膠黏劑40，則能夠製造耐熱性更優異之半導體裝置100。又，在暫時壓接步驟、暫時壓接體加壓步驟及正式壓接步驟中，容易保持膠黏劑40的形狀，從而能夠更有效地製造半導體裝置100。The weight average molecular weight of the polymer component is not particularly limited, but is preferably 10,000 or more. In this case, the adhesive 40 containing a polymer component is further excellent in heat resistance and film formability. Therefore, if the adhesive 40 is used, the semiconductor device 100 having more excellent heat resistance can be manufactured. In addition, in the temporary crimping step, the temporary crimping body pressing step, and the main crimping step, the shape of the adhesive 40 is easily maintained, and the semiconductor device 100 can be manufactured more efficiently.

對膠黏劑40單獨賦予良好的成膜性，在暫時壓接步驟、暫時壓接體加壓步驟及正式壓接步驟中容易保持膠黏劑40的形狀來有效地製造半導體裝置100之觀點考慮，高分子成分的重量平均分子量為30000以上為較佳，40000以上為更佳，50000以上為進一步較佳。Considering that the adhesive 40 alone has good film-forming properties, the shape of the adhesive 40 can be easily maintained in the temporary crimping step, the temporary crimping body pressing step, and the main crimping step, and the semiconductor device 100 can be manufactured efficiently. The weight average molecular weight of the polymer component is preferably 30,000 or more, more preferably 40,000 or more, and even more preferably 50,000 or more.

膠黏劑40含有重量平均分子量為10000以上的高分子成分時，環氧樹脂的含量C a相對於重量平均分子量為10000以上的高分子成分的含量C d之比C a/C d（質量比）為0.01～5為較佳，0.05～3為更佳，0.1～2為進一步較佳。藉由將比C a/C d設為0.01以上，可獲得更加良好的固化性及膠黏力。又，藉由將比C a/C d設為5以下，在膠黏劑40中，可獲得更加良好的成膜性，因此在暫時壓接步驟、暫時壓接體加壓步驟及正式壓接步驟中，容易保持膠黏劑40的形狀，從而有效地製造半導體裝置100。 When the adhesive 40 contains a polymer component with a weight average molecular weight of 10,000 or more, the ratio of the content Ca of the epoxy resin to the content of the polymer component with a weight average molecular weight of 10,000 or more C d (C a /C d (mass ratio) ) is preferably 0.01 to 5, more preferably 0.05 to 3, and further preferably 0.1 to 2. By making the ratio C a /C d 0.01 or more, more favorable curability and adhesive force can be obtained. In addition, by setting the ratio C a /C d to be 5 or less, in the adhesive 40 , more favorable film-forming properties can be obtained. Therefore, in the temporary pressure-bonding step, the temporary pressure-bonding body pressing step, and the final pressure-bonding During the steps, the shape of the adhesive 40 is easily maintained, thereby efficiently manufacturing the semiconductor device 100 .

高分子成分的玻璃化轉變溫度（Tg）並無特別限制，但200℃以下為較佳，180℃以下為更佳，150℃以下為進一步較佳。該情況下，關於膠黏劑40，膠黏劑40容易嵌入形成在半導體晶片1的凸塊30、配線電路板2之電極及配線圖案等的凹凸，空隙抑制效果趨於相對變大。在此，Tg使用DSC（PerkinElmer, Inc.製造、產品名稱“DSC-7型”），且在樣品量10mg、升溫速度10℃/分鐘、空氣氣氛下的條件測定。The glass transition temperature (Tg) of the polymer component is not particularly limited, but is preferably 200°C or lower, more preferably 180°C or lower, and even more preferably 150°C or lower. In this case, the adhesive 40 tends to fit into the bumps 30 formed on the semiconductor wafer 1 , the electrodes and wiring patterns of the wiring board 2 , and other irregularities, and the effect of suppressing voids tends to be relatively large. Here, Tg was measured using DSC (manufactured by PerkinElmer, Inc., product name "DSC-7 type") under the conditions of a sample amount of 10 mg, a heating rate of 10° C./min, and an air atmosphere.

高分子成分的玻璃化轉變溫度（Tg）為50℃以上為較佳。高分子成分的Tg為50℃以上時，膠黏劑40的膠黏（黏性）力趨於適當變弱。The glass transition temperature (Tg) of the polymer component is preferably 50° C. or higher. When the Tg of the polymer component is 50° C. or higher, the adhesive (tack) force of the adhesive 40 tends to be appropriately weakened.

再者，從膠黏劑40對配線電路板2或半導體晶片1的貼附性優異之觀點考慮，高分子成分的玻璃化轉變溫度（Tg）可以為50℃以上且200℃以下，50℃以上且180℃以下為較佳，50℃以上且150℃以下為進一步較佳。Furthermore, from the viewpoint of excellent adhesion of the adhesive 40 to the printed circuit board 2 or the semiconductor wafer 1 , the glass transition temperature (Tg) of the polymer component may be 50° C. or higher and 200° C. or lower, and 50° C. or higher. And 180 degrees C or less is preferable, and 50 degrees C or more and 150 degrees C or less are more preferable.

（填料） 為了控制黏度及固化物的物理性質，以及為了抑制連接半導體晶片1與配線電路板2時的空隙的產生及吸濕率，膠黏劑40可以含有填料。填料可以為無機填料，作為其例子，可舉出玻璃、二氧化矽、氧化鋁、氧化鈦、雲母、氮化硼等絕緣性無機填料及碳黑等導電性無機填料。該等中，從膠黏劑40的特性之類的觀點考慮，使用選自二氧化矽、氧化鋁、氧化鈦及氮化硼之絕緣性無機填料、或選自二氧化矽、氧化鋁及氮化硼之絕緣性無機填料為較佳。填料可以為晶須，作為其例子，可舉出硼酸鋁，鈦酸鋁、氧化鋅、矽酸鈣、硫酸鎂及氮化硼。填料可以為樹脂填料（有機填料），作為其例子，可舉出聚胺酯樹脂、聚醯亞胺樹脂、甲基丙烯酸甲基樹脂、甲基丙烯酸甲酯-丁二烯-苯乙烯共聚樹脂（MBS）。該等填料亦能夠單獨使用或用作2種以上的組合。對於填料的形狀、平均粒徑及含量並無特別限制。 (filler) The adhesive 40 may contain a filler in order to control the viscosity and the physical properties of the cured product, and to suppress the generation of voids and the moisture absorption rate when connecting the semiconductor wafer 1 and the wiring board 2 . The filler may be an inorganic filler, and examples thereof include insulating inorganic fillers such as glass, silica, alumina, titanium oxide, mica, and boron nitride, and conductive inorganic fillers such as carbon black. Among these, from the viewpoint of the properties of the adhesive 40 and the like, insulating inorganic fillers selected from silica, alumina, titania, and boron nitride, or selected from silica, alumina, and nitrogen are used. Insulating inorganic fillers of boronide are preferred. The filler may be a whisker, and examples thereof include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. The filler may be a resin filler (organic filler), and examples thereof include polyurethane resin, polyimide resin, methyl methacrylate resin, and methyl methacrylate-butadiene-styrene copolymer resin (MBS). . These fillers can also be used alone or in combination of two or more. The shape, average particle size and content of the filler are not particularly limited.

填料可以係藉由表面處理適當調整物理性質者。The filler may be one whose physical properties are appropriately adjusted by surface treatment.

從將最低熔融黏度調整到適當範圍之觀點考慮，以膠黏劑40的總量基準計，填料的含量為10～80質量%為較佳，15～60質量%為更佳。From the viewpoint of adjusting the minimum melt viscosity to an appropriate range, the content of the filler is preferably 10 to 80% by mass, more preferably 15 to 60% by mass, based on the total amount of the adhesive 40 .

（其他成分） 膠黏劑40可以進一步包含離子捕集劑、抗氧化劑、矽烷偶聯劑、鈦偶聯劑及流平劑等其他成分。該等可以單獨使用1種，亦可以組合2種以上來使用。對於該等的配比量，以顯現各添加劑的效果的方式適當調整即可。 (other ingredients) The adhesive 40 may further include other components such as ion trapping agents, antioxidants, silane coupling agents, titanium coupling agents, and leveling agents. These may be used individually by 1 type, and may be used in combination of 2 or more types. These compounding amounts may be appropriately adjusted so that the effect of each additive is exhibited.

從提高半導體裝置100的製造效率的觀點考慮，膠黏劑40可以為膜狀。膜狀膠黏劑能夠藉由將包含環氧樹脂、固化劑、助焊劑、及根據所需的有機溶劑其他成分之樹脂清漆塗佈於基材膜上來形成塗膜，並使塗膜乾燥之方法來製造。From the viewpoint of improving the manufacturing efficiency of the semiconductor device 100 , the adhesive 40 may be in the form of a film. The film-like adhesive can form a coating film by coating a resin varnish containing epoxy resin, curing agent, flux, and other components of an organic solvent as required on a substrate film, and drying the coating film. to manufacture.

將環氧樹脂、固化劑及助焊劑、以及根據需要添加之高分子成分及填料等與有機溶劑混合，並藉由攪拌或混煉將該等溶解或分散來製備樹脂清漆。例如使用刮刀式塗佈機、輥式塗佈機、敷抹機、模塗佈機或缺角輪塗佈機將樹脂清漆塗佈於實施了脫模處理之基材膜上。之後，藉由加熱從樹脂清漆的塗膜減少有機溶劑，亦即使塗膜乾燥，以在基材膜上形成膜狀膠黏劑。可以藉由旋轉塗佈等方法在半導體晶圓等上形成樹脂清漆的膜，之後，以乾燥塗膜之方法在半導體晶圓上形成膜狀膠黏劑。Resin varnish is prepared by mixing epoxy resin, curing agent, flux, and polymer components and fillers added as needed with an organic solvent, and dissolving or dispersing these by stirring or kneading. The resin varnish is applied on the base film to which the mold release treatment has been performed, for example, using a knife coater, a roll coater, an applicator, a die coater, or a notch coater. After that, the organic solvent is reduced from the coating film of the resin varnish by heating, that is, the coating film is dried to form a film-like adhesive on the base film. A film of resin varnish can be formed on a semiconductor wafer or the like by a method such as spin coating, and then a film-like adhesive can be formed on the semiconductor wafer by a method of drying the coating film.

作為用於製備樹脂清漆之有機溶劑，具有能夠均勻地溶解或分散各成分之特性者為較佳，例如可舉出二甲基甲醯胺、二甲基乙醯胺、N-甲基-2-吡咯啶酮、二甲基亞碸、二乙二醇二甲醚、甲苯、苯、二甲苯、甲基乙基酮、四氫呋喃、乙基溶纖劑、乙基溶纖劑乙酸酯、丁基溶纖劑、二氧烷、環己酮及乙酸乙酯。該等有機溶劑能夠單獨使用或組合2種以上使用。製備樹脂清漆時的攪拌及混煉例如能夠使用攪拌機、擂潰機、三輥磨機、球磨機、珠磨機或均質分散器來進行。As the organic solvent used for the preparation of the resin varnish, one having the property of uniformly dissolving or dispersing each component is preferable, for example, dimethylformamide, dimethylacetamide, N-methyl-2 - Pyrrolidone, dimethyl sulfoxide, diethylene glycol dimethyl ether, toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl solvent Fiber, dioxane, cyclohexanone and ethyl acetate. These organic solvents can be used alone or in combination of two or more. Stirring and kneading at the time of preparing the resin varnish can be performed using, for example, a stirrer, a beater, a three-roll mill, a ball mill, a bead mill, or a homodisperser.

作為基材膜，只要係具有能夠承受揮發有機溶劑時的加熱條件之耐熱性者，則並無特別限制，能夠例示聚丙烯薄膜、聚甲基戊烯膜等聚烯烴膜、聚對苯二甲酸乙二酯膜、聚萘酯等聚酯膜、聚醯亞胺膜及聚醚醯亞胺膜。基材膜並不限定於由該等膜形成之單層者，可以為由2種以上的材料形成之多層膜。The base film is not particularly limited as long as it has heat resistance capable of withstanding heating conditions when the organic solvent is volatilized, and examples thereof include polypropylene films, polyolefin films such as polymethylpentene films, and polyterephthalic acid. Polyester film such as ethylene glycol film, polynaphthalene ester film, polyimide film and polyetherimide film. The base film is not limited to a single layer formed of these films, and may be a multilayer film formed of two or more kinds of materials.

具體而言，為了使有機溶劑從塗佈後的樹脂清漆揮發而進行之加熱可以為50～200℃、0.1～90分鐘的加熱。在對半導體裝置100中之膠黏層40A中之空隙產生抑制及黏度製備沒有實際影響的範圍內，去除有機溶劑直到殘留量成為1.5質量%以下。Specifically, the heating performed in order to volatilize the organic solvent from the resin varnish after coating can be performed at 50 to 200° C. for 0.1 to 90 minutes. The organic solvent is removed until the residual amount becomes 1.5 mass % or less within a range that has no practical effect on void generation in the adhesive layer 40A in the semiconductor device 100 and viscosity preparation.

膠黏劑40的最低熔融黏度為1500Pa・s以下為較佳。若膠黏劑40的最低熔融黏度在該範圍內，則空隙難以殘留在半導體裝置100的膠黏層40A，並且在半導體晶片1與配線電路板2之間能夠容易確保良好的連接可靠性。又，與膠黏劑40的最低熔融黏度大於1500Pa・s之情況相比，膠黏劑40難以嚙入凸塊30與配線16之間，不易發生凸塊30與配線16的連接不良，因此能夠進一步提高半導體裝置100的連接可靠性。藉由調整膠黏劑40中的成分的配比，膠黏劑40的最低熔融黏度能夠調整為1500Pa・s以下的範圍。The minimum melt viscosity of the adhesive 40 is preferably 1500 Pa·s or less. When the minimum melt viscosity of the adhesive 40 is within this range, voids are less likely to remain in the adhesive layer 40A of the semiconductor device 100 , and good connection reliability can be easily ensured between the semiconductor wafer 1 and the wiring board 2 . In addition, compared with the case where the minimum melt viscosity of the adhesive 40 is greater than 1500 Pa·s, the adhesive 40 is less likely to be caught between the bumps 30 and the wirings 16 , and the connection failure between the bumps 30 and the wirings 16 is less likely to occur, so it is possible to The connection reliability of the semiconductor device 100 is further improved. By adjusting the mixing ratio of the components in the adhesive 40, the minimum melt viscosity of the adhesive 40 can be adjusted to be in the range of 1500 Pa·s or less.

膠黏劑40的最低熔融黏度為在升溫速度10℃/分鐘、頻率10Hz的條件下，對試驗片施加1%的變形，並一邊在35～150℃的溫度範圍內進行升溫一邊對膠黏劑40的黏彈性進行測定時獲得之黏度（複數黏度）與溫度之間的關係之黏度的最低值。作為黏彈性測定的試驗片，例如可以使用以厚度成為400μm的方式層疊複數個膜狀膠黏劑40而獲得之層疊體。作為黏度測定裝置，使用TA Instruments Japan Inc.製造的動態黏彈性測定裝置（產品名稱“ARES”）。The minimum melt viscosity of the adhesive 40 is that under the conditions of a heating rate of 10°C/min and a frequency of 10Hz, a deformation of 1% is applied to the test piece, and the adhesive is heated in the temperature range of 35 to 150°C. The lowest value of the viscosity in the relationship between the viscosity (complex viscosity) and temperature obtained when the viscoelasticity of 40 is measured. As a test piece for viscoelasticity measurement, for example, a laminate obtained by laminating a plurality of film-like adhesives 40 so as to have a thickness of 400 μm can be used. As the viscosity measuring apparatus, a dynamic viscoelasticity measuring apparatus (product name "ARES") manufactured by TA Instruments Japan Inc. was used.

從進一步提高半導體裝置100的連接可靠性之觀點考慮，膠黏劑40的最低熔融黏度為1500Pa・s以下為較佳。From the viewpoint of further improving the connection reliability of the semiconductor device 100 , the minimum melt viscosity of the adhesive 40 is preferably 1500 Pa·s or less.

膠黏劑40的最低熔融黏度為100Pa・s以上為較佳。該情況下，與最低熔融黏度小於100Pa・s之情況相比，膠黏劑40容易作為膜處理，從而進一步提高半導體裝置100的製造效率。The minimum melt viscosity of the adhesive 40 is preferably 100 Pa·s or more. In this case, compared with the case where the minimum melt viscosity is less than 100 Pa·s, the adhesive 40 can be easily handled as a film, and the manufacturing efficiency of the semiconductor device 100 can be further improved.

膠黏劑40在150℃下顯示35秒以上且80秒以下的凝膠時間為較佳。藉由凝膠時間在該範圍內，空隙難以殘留在半導體裝置100的膠黏層40A，並且在半導體晶片1與配線電路板2之間能夠確保良好的連接可靠性。膠黏劑40的凝膠時間能夠藉由固化劑的種類及含量等調整在35秒以上且80秒以下的範圍內。藉由將膠黏劑40的凝膠時間在150℃下設為35秒以上且80秒以下，與凝膠時間大於80秒的情況相比，在半導體裝置100的膠黏層40A中，空隙難以殘留，從而能夠製造更抑制空隙的產生之半導體裝置100。又，與凝膠時間小於35秒之情況相比，在暫時壓接步驟中難以進行固化反應（因為在如80℃之低溫下難以固化）、容易去除空隙，在半導體裝置100的膠黏層40A中不易殘留空隙，因此能夠製造進一步抑制空隙的產生之半導體裝置100。The adhesive 40 preferably exhibits a gel time of not less than 35 seconds and not more than 80 seconds at 150°C. When the gel time is within this range, voids are less likely to remain in the adhesive layer 40A of the semiconductor device 100 , and good connection reliability can be ensured between the semiconductor wafer 1 and the wiring board 2 . The gel time of the adhesive 40 can be adjusted in the range of 35 seconds or more and 80 seconds or less by the type and content of the curing agent. By setting the gel time of the adhesive 40 to 35 seconds or more and 80 seconds or less at 150°C, voids are less likely to be formed in the adhesive layer 40A of the semiconductor device 100 than when the gel time is more than 80 seconds. By leaving the residue, the semiconductor device 100 in which the generation of voids is more suppressed can be manufactured. In addition, compared with the case where the gel time is less than 35 seconds, it is difficult to carry out curing reaction in the temporary pressure bonding step (because it is difficult to cure at a low temperature such as 80° C.), and it is easy to remove voids. In the adhesive layer 40A of the semiconductor device 100 Since voids are unlikely to remain, the semiconductor device 100 in which the generation of voids is further suppressed can be manufactured.

在此，凝膠時間係指從將膠黏劑40置於150℃加熱板上開始，直到膠黏劑40成凝膠化的時間。具體而言，凝膠時間係指直到膜固化之時間。Here, the gel time refers to the time from when the adhesive 40 is placed on a heating plate at 150° C. until the adhesive 40 is gelled. Specifically, gel time refers to the time until the film is cured.

從進一步抑制半導體裝置100的膠黏層40A中之空隙的產生之觀點考慮，膠黏劑40的凝膠時間為38秒以上且78秒以下為更佳。From the viewpoint of further suppressing the generation of voids in the adhesive layer 40A of the semiconductor device 100 , the gel time of the adhesive 40 is preferably 38 seconds or more and 78 seconds or less.

本發明並不限定於上述實施形態。例如，上述實施形態中，示出將本發明的半導體裝置的製造方法適用於半導體裝置100之例子，但本發明的半導體裝置的製造方法亦能夠適用於製造圖5、圖6及圖7所示之半導體裝置200、300、400、500之情況。圖5、圖6及圖7分別係表示藉由本發明的半導體裝置的製造方法的其他實施形態製造之半導體裝置之局部剖面圖。The present invention is not limited to the above-described embodiment. For example, in the above-described embodiment, the example in which the method of manufacturing a semiconductor device of the present invention is applied to the semiconductor device 100 is shown, but the method of manufacturing a semiconductor device of the present invention can also be applied to the manufacturing method shown in FIGS. 5 , 6 and 7 . of the semiconductor devices 200, 300, 400, and 500. FIGS. 5 , 6 and 7 are respectively partial cross-sectional views showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present invention.

圖5所示之半導體裝置200具備：半導體晶片1（第1構件），具有半導體晶片本體10；配線電路板2（第2構件），具有基板本體20；及介隔該等之間之膠黏層40A。半導體裝置200的情況下，半導體晶片1作為第1連接部具有配置在半導體晶片1的配線電路板2側的面上之凸塊32。配線電路板2作為第2連接部具有配置在基板本體20的半導體晶片1側的面上之凸塊33。半導體晶片1的凸塊32與配線電路板2的凸塊33藉由金屬鍵結而電連接。亦即，半導體晶片1及配線電路板2藉由凸塊32、33進行倒裝晶片連接。凸塊32、33藉由膠黏層40A密封，藉此與外部環境阻斷。The semiconductor device 200 shown in FIG. 5 includes a semiconductor chip 1 (first member) having a semiconductor chip body 10 ; a wiring circuit board 2 (second member) having a substrate body 20 ; Layer 40A. In the case of the semiconductor device 200 , the semiconductor wafer 1 has, as the first connection portion, the bumps 32 arranged on the surface of the semiconductor wafer 1 on the side of the printed circuit board 2 . The printed circuit board 2 has bumps 33 arranged on the surface of the substrate body 20 on the side of the semiconductor wafer 1 as the second connection portion. The bumps 32 of the semiconductor wafer 1 and the bumps 33 of the wiring circuit board 2 are electrically connected by metal bonding. That is, the semiconductor chip 1 and the wiring circuit board 2 are flip-chip connected by the bumps 32 and 33 . The bumps 32, 33 are sealed by the adhesive layer 40A, thereby being blocked from the external environment.

圖6及圖7表示作為半導體晶片1彼此連接之連接體之CoC型半導體裝置300、400。圖6所示之半導體裝置300的結構除了2個半導體晶片1作為第1構件及第2構件經由配線15及凸塊30倒裝晶片連接之這一點之外，與半導體裝置100相同。圖7所示之半導體裝置400結構除了具有凸塊32之2個半導體晶片1經由凸塊32倒裝晶片連接之這一點之外，與半導體裝置200相同。FIGS. 6 and 7 show CoC-type semiconductor devices 300 and 400 as connectors for connecting the semiconductor wafers 1 to each other. The structure of the semiconductor device 300 shown in FIG. 6 is the same as that of the semiconductor device 100 except that two semiconductor chips 1 are flip-chip connected as a first member and a second member via wirings 15 and bumps 30 . The structure of the semiconductor device 400 shown in FIG. 7 is the same as that of the semiconductor device 200 except that the two semiconductor chips 1 having the bumps 32 are flip-chip connected via the bumps 32 .

又，在圖1及圖5～圖7所示之半導體裝置100、200、300及400中，配線15、凸塊32等第1連接部或第2連接部可以為稱為墊之金屬膜（例如鍍金），亦可以為後電極（例如銅柱）。例如，其中一個半導體晶片1可以具有銅柱及連接凸塊（焊錫：錫-銀）作為第1連接部，另一個半導體晶片1或配線電路板2具有鍍金作為第2連接部。In the semiconductor devices 100 , 200 , 300 and 400 shown in FIGS. 1 and 5 to 7 , the first connection portion or the second connection portion such as the wiring 15 and the bump 32 may be a metal film called a pad ( For example, gold plating), it can also be a back electrode (such as copper pillar). For example, one of the semiconductor chips 1 may have copper pillars and connection bumps (solder: tin-silver) as the first connection parts, and the other semiconductor chip 1 or the wiring board 2 may have gold plating as the second connection parts.

又，本發明的半導體裝置的製造方法亦能夠適用於圖8所示之半導體裝置500的製造。圖8係表示藉由本發明的半導體裝置的製造方法的另一實施形態製造之半導體裝置之局部剖面圖。In addition, the manufacturing method of the semiconductor device of the present invention can also be applied to the manufacture of the semiconductor device 500 shown in FIG. 8 . 8 is a partial cross-sectional view showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present invention.

圖8係表示半導體裝置的另一實施形態之剖面圖。圖8所示之半導體裝置500具有層疊複數個半導體晶片1之TSV結構。圖8所示之半導體裝置500中，藉由作為第2構件的形成在中介層501的中介層本體50上之配線15與半導體晶片1的凸塊30連接，半導體晶片1與中介層501以倒裝晶片方式連接。在半導體晶片1與中介層501之間介隔膠黏層40A。在半導體晶片1中之與中介層501相反側的表面上，隔著配線15、凸塊30及膠黏層40A重複層疊半導體晶片1。半導體晶片1的表面和背面上之圖案面的配線15藉由填充在貫穿半導體晶片本體10的內部之孔內之貫通電極34來相互連接。作為貫通電極34的材質，能夠使用銅、鋁等。FIG. 8 is a cross-sectional view showing another embodiment of the semiconductor device. The semiconductor device 500 shown in FIG. 8 has a TSV structure in which a plurality of semiconductor wafers 1 are stacked. In the semiconductor device 500 shown in FIG. 8, the wiring 15 formed on the interposer body 50 of the interposer 501 as the second member is connected to the bumps 30 of the semiconductor wafer 1, and the semiconductor wafer 1 and the interposer 501 are inverted to each other. Chip mounted connection. The adhesive layer 40A is interposed between the semiconductor wafer 1 and the interposer 501 . On the surface of the semiconductor wafer 1 on the opposite side to the interposer 501 , the semiconductor wafer 1 is repeatedly stacked with the wirings 15 , the bumps 30 and the adhesive layer 40A interposed therebetween. The wirings 15 on the pattern surface on the front and back surfaces of the semiconductor wafer 1 are connected to each other by through electrodes 34 filled in holes penetrating the inside of the semiconductor wafer body 10 . As the material of the through electrode 34, copper, aluminum, or the like can be used.

圖8的半導體裝置500能夠藉由將複數個半導體晶片1一個一個重疊並依次暫時壓接，在加熱爐60內且在加壓氣氛下一次對複數個半導體晶片1一邊加壓一邊加熱，並藉由正式壓接步驟進行壓接來製造。In the semiconductor device 500 of FIG. 8 , a plurality of semiconductor wafers 1 can be stacked one by one and temporarily press-bonded one by one, and the plurality of semiconductor wafers 1 can be heated in a heating furnace 60 under a pressurized atmosphere while being pressurized at a time. Manufactured by crimping in the main crimping step.

又，在圖8的半導體裝置500中，可以使用主板來代替中介層501。該情況下，半導體晶片1可以不介入中介層501而直接安裝於主板。In addition, in the semiconductor device 500 of FIG. 8 , a motherboard may be used instead of the interposer 501 . In this case, the semiconductor chip 1 may be directly mounted on the motherboard without interposing the interposer 501 .

再者，作為具有多層半導體晶片之半導體裝置的其他例子，還有晶片堆疊型封裝及POP（Package On Package），本發明的半導體裝置的製造方法對該種半導體裝置的製造亦能夠適用。該等半導體裝置能夠藉由與具有TSV結構之半導體裝置500相同的方法製造。Furthermore, as other examples of the semiconductor device having a multilayer semiconductor chip, there are a chip stack package and a POP (Package On Package), and the manufacturing method of the semiconductor device of the present invention can also be applied to the manufacture of such a semiconductor device. These semiconductor devices can be fabricated by the same method as the semiconductor device 500 having the TSV structure.

以下、舉出實施例更具體地說明本公開，但本發明並不限定於該等實施例。 [實施例] Hereinafter, the present disclosure will be described more specifically with reference to examples, but the present invention is not limited to these examples. [Example]

以下，利用實施例更具體地說明本發明，但本發明並不限定於實施例。Hereinafter, although an Example demonstrates this invention more concretely, this invention is not limited to an Example.

各實施例及比較例中使用之材料如下。 （i）環氧樹脂 ・EP1032H60：含有三酚甲烷骨架之多官能固體環氧樹脂（JAPAN EPOXY RESIN KK,製造、產品名稱“EP1032H60”、重量平均分子量：800～2000） ・YL983U：雙酚F型液體環氧樹脂（JAPAN EPOXY RESIN KK,製造、產品名稱“YL983U”、重量平均分子量：約336） ・YL7175：柔性環氧樹脂（JAPAN EPOXY RESIN KK,製造、產品名稱“YL7175”、重量平均分子量：1000～5000） （ii）固化劑 ・2MAOK-PW：2,4-二胺基-6-[2’-甲基咪唑基-（1’）]-乙基-對稱三嗪異三聚氰酸加成物（SHIKOKU CHEMICALS CORPORATION製造、產品名稱“2MAOK-PW”） （iii）助焊劑 ・戊二酸（Tokyo Chemical Industry Co., Ltd.製造、熔點約98℃） （iv）高分子成分 ・ZX1356-2：苯氧基樹脂（Tohto Kasei Co., Ltd.製造、產品名稱“ZX1356-2”、Tg：約71℃、重量平均分子量：約63000） （v）填料 （無機填料） ・SE2050：二氧化矽填料（ADMATECHS CO., LTD.製造、產品名稱“SE2050”、平均粒徑0.5μm） ・SE2050-SEJ：環氧矽烷處理二氧化矽填料（ADMATECHS CO., LTD.製造、產品名稱“SE2050-SEJ”、平均粒徑0.5μm） ・SM奈米二氧化矽：丙烯酸表面處理奈米二氧化矽填料（ADMATECHS CO., LTD.製造、產品名稱“YA050C-SM”、平均粒徑約50nm） ・SM奈米二氧化矽2：丙烯酸表面處理奈米二氧化矽填料（ADMATECHS CO., LTD.製造、產品名稱“YA180C-SM”、平均粒徑約180nm） （有機填料） ・EXL2655：核殼式有機微粒（ROHM AND HAAS ELECTRONIC MATERIALS K.K.製造、產品名稱“EXL2655”） The materials used in the respective Examples and Comparative Examples are as follows. (i) Epoxy resin ・EP1032H60: Polyfunctional solid epoxy resin containing trisphenol methane skeleton (JAPAN EPOXY RESIN KK, manufactured, product name "EP1032H60", weight average molecular weight: 800 to 2000) ・YL983U: Bisphenol F type liquid epoxy resin (JAPAN EPOXY RESIN KK, manufactured, product name "YL983U", weight average molecular weight: about 336) ・YL7175: Flexible epoxy resin (JAPAN EPOXY RESIN KK, manufactured, product name "YL7175", weight average molecular weight: 1000 to 5000) (ii) Curing agent ・2MAOK-PW: 2,4-Diamino-6-[2'-methylimidazolyl-(1')]-ethyl-symmetric triazine isocyanuric acid adduct (manufactured by SHIKOKU CHEMICALS CORPORATION, Product name "2MAOK-PW") (iii) Flux ・Glutaric acid (manufactured by Tokyo Chemical Industry Co., Ltd., melting point about 98°C) (iv) Polymer components ・ZX1356-2: Phenoxy resin (manufactured by Tohto Kasei Co., Ltd., product name "ZX1356-2", Tg: about 71°C, weight average molecular weight: about 63000) (v) Filler (inorganic filler) ・SE2050: Silica filler (manufactured by ADMATECHS CO., LTD., product name "SE2050", average particle size 0.5μm) ・SE2050-SEJ: Epoxysilane-treated silica filler (manufactured by ADMATECHS CO., LTD., product name "SE2050-SEJ", average particle size 0.5μm) ・SM nanosilica: Acrylic surface treated nanosilica filler (manufactured by ADMATECHS CO., LTD., product name "YA050C-SM", average particle size about 50nm) ・SM Nanosilica 2: Acrylic surface-treated nanosilica filler (manufactured by ADMATECHS CO., LTD., product name "YA180C-SM", average particle size about 180nm) (organic filler) ・EXL2655: Core-shell organic fine particles (manufactured by ROHM AND HAAS ELECTRONIC MATERIALS K.K., product name "EXL2655")

（實施例1） （1）膜狀膠黏劑的製作 將環氧樹脂3.1g（“EP1032”：2.4g、“YL983”：0.5g、“YL7175”：0.2g）、固化劑“2MAOK”0.1g、戊二酸0.1g（0.7mmol）、填料（無機填料）1.9g（“SE2050”0.4g、“SE2050-SEJ”0.4g、“SM奈米二氧化矽”1.1g）、有機填料（EXL-2655）0.3g及甲基乙基酮（固體成分量成為63質量%之量）放入珠磨機（Fritsch Japan Co.,Ltd、行星式微粉碎機P-7）的容器內，並按與固體成分的總質量相同重量加入直徑0.8mm的微珠及直徑2.0mm的微珠並攪拌30分鐘而獲得了混合物。接著，向容器內加入苯氧基樹脂（ZX1356-2）1.7g，再次用珠磨機攪拌了30分鐘。之後，藉由過濾去除用於攪拌之微珠而獲得了樹脂清漆。 (Example 1) (1) Production of film adhesive 3.1 g of epoxy resin ("EP1032": 2.4 g, "YL983": 0.5 g, "YL7175": 0.2 g), curing agent "2MAOK" 0.1 g, glutaric acid 0.1 g (0.7 mmol), filler (inorganic Filler) 1.9g ("SE2050" 0.4g, "SE2050-SEJ" 0.4g, "SM nanosilica" 1.1g), organic filler (EXL-2655) 0.3g and methyl ethyl ketone (solid content amount of 63% by mass) into the container of a bead mill (Fritsch Japan Co., Ltd, planetary pulverizer P-7), and added microbeads with a diameter of 0.8 mm and A mixture was obtained with beads of 2.0 mm in diameter and stirring for 30 minutes. Next, 1.7 g of phenoxy resin (ZX1356-2) was put into the container, and the mixture was stirred again with a bead mill for 30 minutes. After that, the microbeads for stirring were removed by filtration to obtain a resin varnish.

將所獲得之樹脂清漆利用小型精密塗佈裝置（YASUI SEIKI CO.,LTD.製造）塗佈在基材膜（TEIJIN LIMITED.製造、產品名稱“PUREX A53”）上而形成了塗膜。然後，將該塗膜使用潔淨烘箱（ESPEC Corp製造）在70℃下乾燥10分鐘後，獲得了膜狀膠黏劑（厚度0.040mm）。該膜狀膠黏劑的反應開始溫度為135℃。The obtained resin varnish was applied on a base film (manufactured by TEIJIN LIMITED., product name "PUREX A53") by a small precision coating apparatus (manufactured by YASUI SEIKI CO., LTD.) to form a coating film. Then, after drying the coating film at 70° C. for 10 minutes using a clean oven (manufactured by ESPEC Corp), a film-like adhesive (thickness 0.040 mm) was obtained. The reaction initiation temperature of the film adhesive was 135°C.

（2）最低熔融黏度的測定 以厚度成為400μm的方式層疊複數個膜狀膠黏劑以獲得了層疊體。然後，將該層疊體用作試驗片，在升溫速度10℃/分鐘、頻率10Hz的條件下，對試驗片施加1%的變形，並一邊在35～150℃的溫度範圍內進行升溫一邊對膠黏劑的黏彈性進行了測定。然後，將此時所獲得之黏度（複數黏度）與溫度之間的關係中之黏度的最低值設為膠黏劑的最低熔融黏度。將結果示於表1。 (2) Determination of minimum melt viscosity A plurality of film-like adhesives were laminated so as to have a thickness of 400 μm to obtain a laminated body. Then, this laminate was used as a test piece, and under the conditions of a heating rate of 10°C/min and a frequency of 10 Hz, a deformation of 1% was applied to the test piece, and the adhesive was heated in a temperature range of 35 to 150°C. The viscoelasticity of the adhesive was measured. Then, the lowest value of the viscosity in the relationship between the viscosity (complex viscosity) obtained at this time and the temperature was set as the lowest melt viscosity of the adhesive. The results are shown in Table 1.

（3）凝膠時間的測定 藉由在80℃的氣氛下層疊複數片（3片）膜狀膠黏劑，使整體厚度成為120μm。從所形成的層壓膜切取11mm見方尺寸的試驗片。將所獲得之試驗片置於150℃的加熱板上熔融，且用攪拌棒以畫小圓的方式對試驗片進行了攪拌。當試驗片開始變稠時攪拌整體，直到試驗片成凝膠化而成為失去流動性之狀態為止持續攪拌。以從將試驗片置於加熱板上之時間開始直到試驗片成凝膠化而成為失去流動性之狀態為止的時間作為“凝膠時間”，以1秒單位進行了測定。實施2次同樣的測定，在基於2次測定之2個測定值中，高值為低值的1.05倍以下之情況下，將2個測定值的平均值記錄為該試驗片的凝膠時間。2個測定值中的高值大於低值的1.05倍之情況下，實施第3次測定，並將基於3次測定之3個測定值的平均值記錄為該試驗片的凝膠時間。將結果示於表1。 (3) Determination of gel time By laminating plural sheets (3 sheets) of film-like adhesives in an atmosphere of 80° C., the overall thickness was 120 μm. A test piece of 11 mm square size was cut out from the formed laminated film. The obtained test piece was melted on a hot plate at 150°C, and the test piece was stirred in a small circle with a stirring bar. When the test piece starts to thicken, the whole is stirred, and the stirring is continued until the test piece gels and loses fluidity. The time from the time when the test piece was placed on the hot plate until the time when the test piece was in a state where the test piece gelled and lost fluidity was defined as "gel time", and was measured in units of 1 second. The same measurement was performed twice, and when the high value was 1.05 times or less the low value among the two measured values based on the two measurements, the average value of the two measured values was recorded as the gel time of the test piece. When the high value of the two measurement values is greater than 1.05 times the low value, the third measurement is performed, and the average value of the three measurement values based on the three measurements is recorded as the gel time of the test piece. The results are shown in Table 1.

（4）半導體裝置的製作 接下來，使用如上述製作之膜狀膠黏劑，按如下製作了半導體裝置。 （暫時壓接體的製作） 切取所製作之膜狀膠黏劑，準備了具有8mm×8mm×厚度0.045mm尺寸之膜狀膠黏劑。將其貼附於半導體晶片（10mm×10mm）、厚度0.1mm、連接部金屬：Au、產品名稱：WALTS-TEG IP80、Waltz Co.,Ltd.製造）。在此貼附帶焊錫凸塊的半導體晶片（晶片尺寸：7.3mm×7.3mm×厚度0.05mm、焊錫凸塊熔點：約220℃、凸塊高度：銅柱與焊錫的合計為約45μm、凸塊個數1048銷、間距80μm、產品名稱：WALTS-TEG CC80、Waltz Co.,Ltd.製造）以獲得了層疊體。接著，將該層疊體設置於具有工作台及壓接頭之倒裝晶片接合器（產品名稱“FCB3”、Panasonic Corporation製造）的80℃工作台上，且藉由利用工作台及壓接頭夾著之熱壓，在3秒、25N荷載下，一邊對層疊體加壓一邊加熱到80℃。如上製作了暫時壓接體。 (4) Fabrication of semiconductor devices Next, using the film-like adhesive produced as described above, a semiconductor device was produced as follows. (Production of temporary crimp body) The produced film-like adhesive was cut out, and a film-like adhesive having a size of 8 mm×8 mm×thickness 0.045 mm was prepared. It was attached to a semiconductor wafer (10 mm×10 mm), thickness 0.1 mm, connection part metal: Au, product name: WALTS-TEG IP80, manufactured by Waltz Co., Ltd.). Here is a semiconductor wafer with solder bumps attached (die size: 7.3mm x 7.3mm x thickness 0.05mm, solder bump melting point: about 220°C, bump height: the total of copper pillars and solder is about 45μm, each bump Count 1048 pins, pitch 80 μm, product name: WALTS-TEG CC80, manufactured by Waltz Co., Ltd.) to obtain a laminate. Next, this laminated body was placed on an 80°C table of a flip chip bonder (product name "FCB3", manufactured by Panasonic Corporation) having a table and a press head, and was sandwiched by the table and the press head. In the hot pressing, the laminate was heated to 80° C. under a load of 25 N for 3 seconds while being pressurized. The temporary crimping body was produced as above.

（完成加壓的暫時壓接體的製作） 將如上述製作之暫時壓接體配置於加壓式烤箱裝置（產品名稱：PCOA-01T、NTT Advanced Technology Corporation製造）的烤箱內。然後，首先將烤箱內的壓力設定為0.7MPa，並以升溫速度20℃/分鐘從室溫升溫至150℃。接著，一邊維持壓力及溫度，一邊在加壓氣氛下對暫時壓接體加壓並加熱了30分鐘。如上製作了完成加壓的暫時壓接體。 (Complete the production of the pressurized temporary crimp body) The temporary crimping body produced as described above was placed in an oven of a pressurized oven apparatus (product name: PCOA-01T, manufactured by NTT Advanced Technology Corporation). Then, first, the pressure in the oven was set to 0.7 MPa, and the temperature was raised from room temperature to 150° C. at a temperature increase rate of 20° C./min. Next, while maintaining the pressure and temperature, the temporary pressure-bonded body was pressurized and heated in a pressurized atmosphere for 30 minutes. The pressurized temporary crimp body was produced as described above.

（壓接體的製作） 使如上述製作之完成加壓的暫時壓接體移動到其他倒裝晶片接合器（產品名稱：FCB3、Panasonic Corporation製造）的80℃工作台上，進行了利用工作台及壓接頭，一邊以25N荷載對完成加壓的暫時壓接體加壓一邊在230℃下加熱1秒之熱壓。如上製作了半導體裝置。將該半導體裝置用作評價用半導體裝置樣品。 (Production of crimp body) The pressurized temporary press-bonded body produced as described above was moved to an 80°C table of another flip chip bonder (product name: FCB3, manufactured by Panasonic Corporation), and while using the table and the press head, the pressure was 25N. The load was heated at 230° C. for 1 second while pressing the temporarily press-bonded body that had been pressurized. The semiconductor device was fabricated as described above. This semiconductor device was used as a semiconductor device sample for evaluation.

（實施例2～4） 除了將所使用之膠黏劑的組成變更為下述表1中的記載以外，以與實施例1相同的方式，製作了實施例2～4的半導體裝置。 (Examples 2 to 4) The semiconductor devices of Examples 2 to 4 were produced in the same manner as in Example 1, except that the composition of the adhesive used was changed to the description in Table 1 below.

（比較例1） 切取以與實施例1相同方式準備之膜狀膠黏劑，準備了具有8mm×8mm×厚度0.045mm尺寸之膜狀膠黏劑。將其貼附於半導體晶片（10mm、厚度0.1mm、連接部金屬：Au、產品名稱：WALTS-TEG IP80、Waltz Co.,Ltd.製造）。在此貼附帶焊錫凸塊的半導體晶片（晶片尺寸：7.3mm×7.3mm×厚度0.05mm、焊錫凸塊熔點：約220℃、凸塊高度：銅柱與焊錫的合計為約45μm、凸塊個數1048銷、間距80μm、產品名稱：WALTS-TEG CC80、Waltz Co.,Ltd.製造）以獲得了層疊體。將層疊體設置於具有工作台及壓接頭之倒裝晶片接合器（FCB3、Panasonic Corporation製造）的工作台上，且藉由利用工作台及壓接頭夾著之熱壓，在1秒、25N荷載下，一邊對層疊體加壓一邊加熱到80℃。如上製作了暫時壓接體。 (Comparative Example 1) The film-like adhesive prepared in the same manner as in Example 1 was cut out to prepare a film-like adhesive having a size of 8 mm×8 mm×thickness 0.045 mm. This was attached to a semiconductor wafer (10 mm, thickness 0.1 mm, connection part metal: Au, product name: WALTS-TEG IP80, manufactured by Waltz Co., Ltd.). Here is a semiconductor wafer with solder bumps attached (die size: 7.3mm x 7.3mm x thickness 0.05mm, solder bump melting point: about 220°C, bump height: the total of copper pillars and solder is about 45μm, each bump Count 1048 pins, pitch 80 μm, product name: WALTS-TEG CC80, manufactured by Waltz Co., Ltd.) to obtain a laminate. The laminated body was placed on a table of a flip-chip bonder (FCB3, manufactured by Panasonic Corporation) having a table and a press head, and by hot pressing between the table and the press head, a load of 25 N was applied for 1 second. Next, the laminate was heated to 80°C while being pressurized. The temporary crimping body was produced as above.

使如上述製作之暫時壓接體移動到其他倒裝晶片接合器（FCB3、Panasonic Corporation製造）的工作台上，進行了藉由利用工作台及壓接頭夾著，並一邊以25N荷載加壓一邊在230℃下加熱3秒之熱壓。如上製作了壓接體。The temporary press-bonded body produced as described above was moved to a table of another flip chip bonder (FCB3, manufactured by Panasonic Corporation), and clamped by using the table and the press head, and pressurized with a load of 25N. Heat press at 230°C for 3 seconds. The crimp body was produced as above.

將如上述製作之壓接體配置於加壓烤箱裝置（產品名稱：PCOA-01T、NTT Advanced Technology Corporation製造）的烤箱內。然後，首先將烤箱內的壓力設定為0.7MPa，並以升溫速度20℃/分鐘從室溫升溫至175℃。接著，一邊維持壓力及溫度，一邊在加壓氣氛下對壓接體加壓並加熱了10分鐘。如上製作了半導體裝置。將該半導體裝置用作評價用半導體裝置樣品。The press-bonded body produced as described above was placed in an oven of a pressure oven apparatus (product name: PCOA-01T, manufactured by NTT Advanced Technology Corporation). Then, first, the pressure in the oven was set to 0.7 MPa, and the temperature was increased from room temperature to 175°C at a temperature increase rate of 20°C/min. Next, while maintaining the pressure and temperature, the press-bonded body was pressurized and heated in a pressurized atmosphere for 10 minutes. The semiconductor device was fabricated as described above. This semiconductor device was used as a semiconductor device sample for evaluation.

＜評價＞ 對於如上述獲得之實施例1～4及比較例1中獲得之評價用半導體裝置樣品，進行了空隙抑制效果及連接可靠性的評價。 ＜Evaluation＞ With respect to the semiconductor device samples for evaluation obtained in Examples 1 to 4 and Comparative Example 1 obtained as described above, evaluations of void suppressing effect and connection reliability were performed.

（空隙抑制效果的評價） 對於實施例1～4及比較例1中獲得之評價用半導體裝置樣品，使用超音波影像診斷裝置（產品名稱：Insight-300、INSIGHT Inc.製造）拍攝了外觀圖像。從所獲得之圖像，由掃描儀（產品名稱：GT-9300UF、SEIKO EPSON CORPORATION製造）獲取了晶片上的膠黏層的部分。使用圖像處理軟件Adobe Photoshop（註冊商標），且藉由色調校正、二色調化識別空隙部分，將膠黏層的面積設為100%，藉由直方圖算出空隙部分所佔之比例（空隙產生率）。藉由以下基準對空隙的產生狀態進行了評價。將結果示於表1。 A：空隙產生率為5%以下 B：空隙產生率大於5% (Evaluation of void suppression effect) Appearance images of the semiconductor device samples for evaluation obtained in Examples 1 to 4 and Comparative Example 1 were photographed using an ultrasonic imaging diagnostic apparatus (product name: Insight-300, manufactured by INSIGHT Inc.). From the obtained image, a part of the adhesive layer on the wafer was acquired by a scanner (product name: GT-9300UF, manufactured by SEIKO EPSON CORPORATION). The image processing software Adobe Photoshop (registered trademark) was used, and the voids were identified by tone correction and two-tone colorization, the area of the adhesive layer was set to 100%, and the proportion of voids was calculated from the histogram (void generation). Rate). The generation state of voids was evaluated according to the following criteria. The results are shown in Table 1. A: The void generation rate is 5% or less B: The void generation rate is more than 5%

（連接可靠性的評價） 對於實施例1～4及比較例1中獲得之評價用半導體裝置樣品，使用萬用表（ADVANTEST CORPORATION製造、產品名稱：R6871E）測定了初始連接電阻值。然後，在以下基準下對連接可靠性進行了判定。將結果示於表1。 A：連接電阻值在對於評價用半導體裝置樣品中之半導體晶片設為最佳之連接電阻值的範圍（本實施例及比較例中為10.0～15.0Ω）內 B：連接電阻值超出A的範圍（10.0～15.0Ω）或因連接不良無法測定連接電阻值 再者，關於在評價用半導體裝置樣品中是否發生連接不良，藉由確認如下來進行判斷，亦即確認樣品的截面，焊錫凸塊是否濕，亦即帶焊錫凸塊的半導體晶片的焊錫凸塊沒有到達對置之半導體晶片的連接部。 (Evaluation of connection reliability) For the semiconductor device samples for evaluation obtained in Examples 1 to 4 and Comparative Example 1, initial connection resistance values were measured using a multimeter (manufactured by ADVANTEST CORPORATION, product name: R6871E). Then, the connection reliability was determined under the following criteria. The results are shown in Table 1. A: The connection resistance value is within the range (10.0 to 15.0Ω in the present Example and Comparative Example) that is optimal for the connection resistance value of the semiconductor wafer in the sample semiconductor device for evaluation. B: The connection resistance value exceeds the range of A (10.0 to 15.0Ω) or the connection resistance value cannot be measured due to poor connection In addition, whether or not poor connection occurred in the semiconductor device sample for evaluation was judged by checking the cross section of the sample and whether the solder bumps were wet, that is, the solder bumps of the semiconductor wafer with solder bumps. The connecting portion of the opposing semiconductor wafer is not reached.

【表1】   實施例 比較例 1 2 3 4 1 組 成 環氧樹脂 EP1032H60 2.4g 2.4g 2.4g 2.4g 2.4g YL983U 0.5g 0.5g 0.5g 0.7g 0.7g YL7175 0.2g 0.2g 0.2g 0.2g 0.2g 固化劑 2MA0K-PW 0.1g 0.1g 0.1g 0.1g 0.1g 助焊劑 戊二酸 0.1g 0.1g 0.1g 0.lg 0.1g 高分子成分 ZX1356-2 1.7g 1.7g 1.7g 1.7g 1.7g 填料 SE2050 0.4g 0.4g 0.3g 0.3g 0.4g SE2050-SEJ 0.4g 0.4g 0.4g 0.4g 0.4g SM奈米二氧化矽 1.1g     1.1g 1.1g SM奈米二氧化矽2   1.1g 1.1g     EXL2655 0.3g 0.3g 0.3g 0.3g 0.3g 膠黏劑的最低熔融黏度[Ｐａ・ｓ] 1500 950 550 250 1500 膠黏劑的凝膠時間[秒] 40 80 75 35 40 評 價 空隙抑制效果 空隙產生率[%] 1 4 2 0 50 評價 A A A A B 連接可靠性 連接電阻值[Ω] 13 12 11 13 14 評價 A A A A A 【Table 1】 Example Comparative example 1 2 3 4 1 composition epoxy resin EP1032H60 2.4g 2.4g 2.4g 2.4g 2.4g YL983U 0.5g 0.5g 0.5g 0.7g 0.7g YL7175 0.2g 0.2g 0.2g 0.2g 0.2g Hardener 2MA0K-PW 0.1g 0.1g 0.1g 0.1g 0.1g Flux glutaric acid 0.1g 0.1g 0.1g 0.lg 0.1g Polymer composition ZX1356-2 1.7g 1.7g 1.7g 1.7g 1.7g filler SE2050 0.4g 0.4g 0.3g 0.3g 0.4g SE2050-SEJ 0.4g 0.4g 0.4g 0.4g 0.4g SM Nano Silica 1.1g 1.1g 1.1g SM Nano Silica 2 1.1g 1.1g EXL2655 0.3g 0.3g 0.3g 0.3g 0.3g Minimum melt viscosity of adhesive [Pa·s] 1500 950 550 250 1500 Adhesive gel time [seconds] 40 80 75 35 40 Evaluation void suppression effect void generation rate [%] 1 4 2 0 50 Evaluation A A A A B connection reliability Connection resistance value [Ω] 13 12 11 13 14 Evaluation A A A A A

在實施例1～4的半導體裝置中均確認到空隙產生率低，抑制空隙的產生，並且連接電阻值示出適當的值，連接可靠性亦良好。與此相對，在比較例1的半導體裝置中，確認到空隙產生率高，且空隙的產生沒有得到抑制。In all of the semiconductor devices of Examples 1 to 4, it was confirmed that the void generation rate was low, the generation of voids was suppressed, the connection resistance value showed an appropriate value, and the connection reliability was also good. On the other hand, in the semiconductor device of Comparative Example 1, it was confirmed that the generation rate of voids was high, and the generation of voids was not suppressed.

1:半導體晶片（第1構件） 2:配線電路板（第2構件） 15:配線（第2連接部） 16:配線（第2連接部） 30:凸塊（第1連接部） 32:凸塊（第1連接部或第2連接部） 33:凸塊（第2連接部） 40:膠黏劑 40A:膠黏層 501:中介層（第2構件） 100,200,300,400,500:半導體裝置 1: Semiconductor wafer (first member) 2: Wiring board (second member) 15: Wiring (2nd connection part) 16: Wiring (2nd connection part) 30: bump (1st connection part) 32: bump (first connection part or second connection part) 33: Bump (second connection part) 40: Adhesive 40A: Adhesive layer 501: Interposer (Part 2) 100,200,300,400,500: Semiconductor devices

圖1係表示藉由本發明的半導體裝置的製造方法的一實施形態製造之半導體裝置之局部剖面圖。 圖2係表示本發明的半導體裝置的製造方法的一實施形態中之暫時壓接步驟之步驟圖。 圖3係表示本發明的半導體裝置的製造方法的一實施形態中之暫時壓接體加壓步驟之步驟圖。 圖4係表示本發明的半導體裝置的製造方法的一實施形態中之正式壓接步驟之步驟圖。 圖5係表示藉由本發明的半導體裝置的製造方法的另一實施形態製造之半導體裝置之局部剖面圖。 圖6係表示藉由本發明的半導體裝置的製造方法的另一實施形態製造之半導體裝置之局部剖面圖。 圖7係表示藉由本發明的半導體裝置的製造方法的另一實施形態製造之半導體裝置之局部剖面圖。 圖8係表示藉由本發明的半導體裝置的製造方法的另一實施形態製造之半導體裝置之局部剖面圖。 FIG. 1 is a partial cross-sectional view showing a semiconductor device manufactured by one embodiment of the method for manufacturing a semiconductor device of the present invention. 2 is a step diagram showing a temporary pressure bonding step in one embodiment of the method of manufacturing a semiconductor device of the present invention. FIG. 3 is a step diagram showing a step of pressing the temporary pressure-bonding body in one embodiment of the method of manufacturing a semiconductor device of the present invention. FIG. 4 is a step diagram showing a main pressure bonding step in one embodiment of the method of manufacturing a semiconductor device of the present invention. 5 is a partial cross-sectional view showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present invention. 6 is a partial cross-sectional view showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present invention. 7 is a partial cross-sectional view showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present invention. 8 is a partial cross-sectional view showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present invention.

1:半導體晶片(第1構件) 1: Semiconductor wafer (first member)

2:配線電路板(第2構件) 2: Wiring circuit board (second member)

4:暫時壓接體 4: Temporary crimp body

10:半導體晶片本體 10: Semiconductor wafer body

15:配線(第2連接部) 15: Wiring (2nd connection part)

16:配線(第2連接部) 16: Wiring (2nd connection part)

20:基板本體 20: Substrate body

30:凸塊(第1連接部) 30: bump (1st connection part)

40:膠黏劑 40: Adhesive

Claims (14)

一種半導體裝置的製造方法，其中，具有第1連接部之第1構件及具有第2連接部之第2構件經由膠黏層連接，且前述第1連接部及前述第2連接部電連接，前述半導體裝置的製造方法包括： 暫時壓接步驟，前述第1構件及前述第2構件，經由用於形成前述膠黏層之熱固化性膠黏劑使前述第1連接部與前述第2連接部相對配置之狀態下進行暫時壓接而獲得暫時壓接體； 暫時壓接體加壓步驟，在加壓氣氛下對前述暫時壓接體加壓，而獲得完成加壓的暫時壓接體；及 正式壓接步驟，對前述完成加壓的暫時壓接體一邊加熱一邊加壓，使前述第1構件及前述第2構件壓接，由此連接前述第1連接部與前述第2連接部而獲得壓接體， 在前述暫時壓接步驟中，在低於前述第1連接部的熔點及前述第2連接部的熔點的溫度下進行前述第1構件及前述第2構件的暫時壓接， 在前述暫時壓接體加壓步驟中，在低於前述第1連接部的熔點及前述第2連接部的熔點之溫度下進行前述暫時壓接體的加壓， 在前述正式壓接步驟中，在前述第1連接部及前述第2連接部中的至少一者的熔點以上的溫度下進行前述完成加壓的暫時壓接體的加熱。 A method of manufacturing a semiconductor device, wherein a first member having a first connection portion and a second member having a second connection portion are connected via an adhesive layer, and the first connection portion and the second connection portion are electrically connected, and the A method of manufacturing a semiconductor device includes: In the temporary pressure bonding step, the first member and the second member are temporarily pressed in a state in which the first connection portion and the second connection portion are opposed to each other through a thermosetting adhesive for forming the adhesive layer. Then, a temporary crimp body is obtained; The temporary crimping body pressurizing step is to pressurize the temporary crimping body in a pressurized atmosphere to obtain a pressurized temporary crimping body; and In the main crimping step, the temporary crimping body that has been pressurized is heated and pressurized, and the first member and the second member are crimped, thereby connecting the first connection portion and the second connection portion. crimp body, In the temporary pressure-bonding step, the temporary pressure-bonding of the first member and the second member is performed at a temperature lower than the melting point of the first connection portion and the melting point of the second connection portion, In the step of pressing the temporary pressure-bonding body, the pressure of the temporary pressure-bonding body is performed at a temperature lower than the melting point of the first connection part and the melting point of the second connection part, In the above-mentioned main pressure-bonding step, the heating of the temporary pressure-bonded body that has been pressurized is performed at a temperature equal to or higher than the melting point of at least one of the first connection portion and the second connection portion. 如請求項1所述之半導體裝置的製造方法，其中 在前述暫時壓接步驟中，在低於前述膠黏劑的反應開始溫度的溫度下進行前述暫時壓接體的加壓。 The method for manufacturing a semiconductor device as claimed in claim 1, wherein In the temporary pressure-bonding step, the pressure of the temporary pressure-bonded body is performed at a temperature lower than the reaction start temperature of the adhesive. 如請求項1或請求項2所述之半導體裝置的製造方法，其中 在前述暫時壓接體加壓步驟中，以0.05～0.8MPa的壓力進行前述暫時壓接體的加壓。 The method for manufacturing a semiconductor device according to claim 1 or claim 2, wherein In the step of pressing the temporary pressure-bonding body, the pressure of the temporary pressure-bonding body is performed at a pressure of 0.05 to 0.8 MPa. 如請求項1至請求項3之任一項所述之半導體裝置的製造方法，其中 在前述暫時壓接體加壓步驟中，在前述膠黏劑的反應開始溫度以上的溫度下進行前述暫時壓接體的加壓。 The method for manufacturing a semiconductor device according to any one of claim 1 to claim 3, wherein In the step of pressing the temporary pressure-bonded body, the pressure of the temporary pressure-bonded body is performed at a temperature equal to or higher than the reaction start temperature of the adhesive. 如請求項1至請求項4之任一項所述之半導體裝置的製造方法，其中 前述膠黏劑含有環氧樹脂、固化劑及助焊劑，顯示1500Pa・s以下的最低熔融黏度，且在150℃下顯示35秒以上且80秒以下的凝膠時間。 The method for manufacturing a semiconductor device according to any one of claim 1 to claim 4, wherein The aforementioned adhesive contains epoxy resin, curing agent and flux, exhibits a minimum melt viscosity of 1500 Pa·s or less, and exhibits a gel time of 35 seconds or more and 80 seconds or less at 150°C. 如請求項5所述之半導體裝置的製造方法，其中 前述膠黏劑所含有之前述環氧樹脂的重量平均分子量為小於10000。 The method for manufacturing a semiconductor device as claimed in claim 5, wherein The weight-average molecular weight of the epoxy resin contained in the adhesive is less than 10,000. 如請求項5或請求項6所述之半導體裝置的製造方法，其中 前述膠黏劑還含有高分子成分， 前述高分子成分的重量平均分子量為10000以上。 The method for manufacturing a semiconductor device according to claim 5 or claim 6, wherein The aforementioned adhesive also contains polymer components, The weight average molecular weight of the polymer component is 10,000 or more. 如請求項7所述之半導體裝置的製造方法，其中 前述高分子成分的重量平均分子量為30000以上，前述高分子成分的玻璃化轉變溫度為200℃以下。 The method for manufacturing a semiconductor device as claimed in claim 7, wherein The weight average molecular weight of the polymer component is 30,000 or more, and the glass transition temperature of the polymer component is 200°C or lower. 如請求項1至請求項8之任一項所述之半導體裝置的製造方法，其中 前述膠黏劑為膜狀膠黏劑。 The method for manufacturing a semiconductor device according to any one of claim 1 to claim 8, wherein The aforementioned adhesive is a film adhesive. 一種熱固化性膠黏劑，其係在請求項1至請求項4之任一項所述之半導體裝置的製造方法中用於膠黏前述第1構件與前述第2構件。A thermosetting adhesive for bonding the first member and the second member in the method for manufacturing a semiconductor device according to any one of Claims 1 to 4. 如請求項10所述之膠黏劑，其係含有環氧樹脂、固化劑及助焊劑， 顯示1500Pa・s以下的最低熔融黏度，且在150℃下顯示35秒以上且80秒以下的凝膠時間。 The adhesive according to claim 10, which contains epoxy resin, curing agent and flux, Shows a minimum melt viscosity of 1500 Pa·s or less, and shows a gel time of 35 seconds or more and 80 seconds or less at 150°C. 如請求項11所述之膠黏劑，其中 前述環氧樹脂的重量平均分子量為小於10000。 The adhesive of claim 11, wherein The weight average molecular weight of the aforementioned epoxy resin is less than 10,000. 如請求項11或請求項12所述之膠黏劑，其係還含有高分子成分， 前述高分子成分的重量平均分子量為10000以上。 The adhesive according to claim 11 or claim 12, which further contains a polymer component, The weight average molecular weight of the polymer component is 10,000 or more. 如請求項13所述之膠黏劑，其中 前述高分子成分的重量平均分子量為30000以上，前述高分子成分的玻璃化轉變溫度為200℃以下。 The adhesive of claim 13, wherein The weight average molecular weight of the polymer component is 30,000 or more, and the glass transition temperature of the polymer component is 200°C or less.
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