TW202143418A - 用於重分佈層的互連結構和半導體封裝 - Google Patents
用於重分佈層的互連結構和半導體封裝 Download PDFInfo
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Abstract
本發明公開一種用於重分佈層的互連結構,包括:中間通孔焊盤;上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到上通孔焊盤;以及下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該下導電通孔佈置在沿該中間通孔焊盤的周邊延伸的馬蹄形通孔區域內。
Description
本發明半導體技術領域,尤其涉及一種用於重分佈層的互連結構和半導體封裝。
近年來,隨著設計複雜度的增加,業界已經提出了用於系統整合的先進封裝技術。例如,扇出晶圓級晶片級封裝(fan-out wafer-level chip-scale package,FO-WLCSP)提供了一種有前途的替代方案,該方案具有小尺寸,更好的信噪比和改進的熱特性。
如本領域中已知的,微凸塊(micro-bump)和重分佈層(redistribution layer,RDL)用於多晶片FO-WLCSP中,以連接相鄰晶片以及連接到扇出晶片上的輸入/輸出(input/output,I/O)焊盤上。RDL可以是晶片的上層金屬層,並且複數個晶片在多晶片FO-WLCSP中共用相同的RDL。在現代IC設計中,I/O焊盤通常沿著晶片的邊界放置,RDL用於將I/O焊盤重新分配到受控的塌陷晶片連接(controlled collapse chip connection,C4)凸塊焊盤,或連接不同晶片之間I/O焊盤。I/O焊盤可以重新分配到晶片外部的扇出區域,以增加引腳數。
C4凸塊是扇出晶片封裝和電路基板(例如,封裝基板)之間的界面。眾所周知,由於熱膨脹係數不匹配(或CTE(coefficient of thermal expansion,熱膨脹係數)不匹配),C4凸塊通常承受較大的應力。因此,C4凸塊的尺寸和間距大於I/O焊盤或微型凸塊的尺寸和間距。這導致C4凸塊位置可能與其對應的I/O焊盤或微型凸塊位置不同。
通常,焊盤到凸塊(即I/O焊盤到C4凸塊焊盤)的相對位置數以千計,因此在RDL佈線的設計過程中會生成數千種通孔和焊盤互連圖案,這不可避免地增加了執行時間(runtime),並使RDL電路設計過程變得繁重。
有鑑於此,本發明提供一種用於重分佈層的互連結構和半導體封裝,以解決上述問題。
根據本發明的第一方面,公開一種用於重分佈層的互連結構,包括:
中間通孔焊盤;
一個或一簇上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到上通孔焊盤;以及
下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該下導電通孔佈置在沿該中間通孔焊盤的周邊延伸的馬蹄形通孔區域內。
根據本發明的第二方面,公開一種半導體封裝,包括:
至少一個半導體晶粒;
模塑料,圍繞該半導體晶粒的;以及
重分佈層,設置在該模塑料的下表面上,其中,該至少一個半導體晶粒電連接至該重分佈層的互連結構,其中,該互連結構包括:
中間通孔焊盤;
一個或一簇上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到該上通孔焊盤;以及
下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該下導電通孔佈置在沿該中間通孔焊盤的周邊延伸的馬蹄形通孔區域內。
根據本發明的第三方面,公開一種用於重分佈層的互連結構,包括:
中間通孔焊盤;
一個或一簇上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到該上通孔焊盤;和
下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該一個或一簇上導電通孔設置在該中間通孔焊盤上的該上通孔焊盤的投影區域內,其中該下導電通孔佈置在投影區域外部的中間通孔焊盤的其餘部分上,並且不與該上導電通孔簇重疊。
本發明的用於重分佈層的互連結構由於該下導電通孔佈置在沿該中間通孔焊盤的周邊延伸的馬蹄形通孔區域內。因此本發明中上導電通孔不與下導電通孔重疊,因此避免了應力沿垂直方向傳遞,可以減輕電路設計人員的負擔,並且可以顯著減少執行時間;並且本發明的上述方式可以方便重分佈層中上導電通孔與下導電通孔之間的佈局設計,當上導電通孔或下導電通孔因設計要求需要改變位置時,可以通過旋轉的方式改變上導電通孔或下導電通孔的位置,從而滿足不同的設計需求,具有更好的設計彈性和靈活性。
以下描述是實施本發明的最佳構想模式。進行該描述是為了說明本發明的一般原理,而不應被認為是限制性的。本發明的範圍由所附申請專利範圍書確定。
在下文中,參考附圖對本發明構思進行全面描述,在附圖中示出了本發明構思的示例性實施例。根據以下示例性實施例,本發明構思的優點和特徵以及實現它們的方法將變得顯而易見,所述實施例將參考附圖進行更詳細地描述。然而,應當注意,本發明構思不限於以下示例性實施例,並且可以以各種形式實現。因此,提供示例性實施例僅是為了公開發明構思,並且使所屬技術領域具有通常知識者知道發明構思的類別。而且,所示的附圖僅是示意性的,並且是非限制性的。在附圖中,出於說明的目的,一些元件的尺寸可能被放大並且未按比例繪製。在本發明的實踐中,尺寸和相對尺寸不對應於實際尺寸。
本文所使用的術語僅出於描述特定實施例的目的,並不旨在限制本發明。如本文所使用的,單數術語“一”、“一個”和“該”也旨在包括複數形式,除非上下文另外明確指出。如本文所使用的,術語“和/或”包括一個或複數個相關聯的所列項目的任何和所有組合。應該理解的是,當一個元件稱為“連接”或“接觸”到另一個元件時,它可以直接連接或接觸另一個元件,或者可以存在中間元件。
類似地,應當理解,當諸如層、區域或基板的元件稱為在另一元件“上”時,其可以直接在另一元件上,或者可以存在中間元件。相反,術語“直接”是指不存在中間元件。應該理解的是,當在本文中使用時,術語“包括”,和/或“包含”規定了所陳述的特徵、整數、步驟、操作、元件和/或部件的存在,但是不排除存在或增加一個或複數個其他特徵、整數、步驟、操作、元件、部件和/或其組合。
現在將參考附圖描述本發明的一個或複數個實施方式,其中,貫穿全文,相似的附圖標記用於指代相似的元件,並且其中所示的結構不必按比例繪製。在整個說明書中,術語“晶粒”、“半導體晶片”和“半導體晶粒”可以互換使用。
請參考圖1。圖1是示出根據本發明的一個實施例的示例性扇出封裝的示意性截面圖。如圖1所示,扇出封裝1(可以稱為半導體封裝)可以包括至少兩個電耦接到重分佈層(redistribution layer,RDL)20的半導體晶粒11和12。RDL(或RDL插入層(interposer))可以透過在晶圓表面上添加金屬層和介電層來定義,以將I / O佈局重新佈線為更寬鬆的間距尺寸。這種重分佈(層)需要薄膜聚合物(例如苯並環丁烯(benzocyclobutene,BCB)、聚醯亞胺(polyimide,PI)或其他有機聚合物和金屬化材料(例如鋁(Al)或銅(Cu)),以將週邊焊盤重新佈線(reroute)為區域配置(area array configuration)。
根據本發明的實施例,例如,RDL 20可以包括至少一個介電層201和至少一個金屬層202。介電層201可以包括諸如氮化矽、氧化矽或類似的無機材料,但不限於此。根據本發明的實施例,介電層201可以包括聚合物材料,但不限於此。金屬層202可以包括鋁、銅、鎢、鈦、氮化鈦等。應當理解,金屬層202可以包括多層金屬跡線,並且介電層201可以包括多層介電層壓板。
根據本發明的實施例,翻轉(flip)晶粒11和12,使得有源表面(active surface)11a和12a直接面向RDL 20。在晶粒11的有源表面11a上,複數個輸入/輸出(I/O)焊盤111可以例如沿著其有源表面11a的周邊設置。同樣,在晶粒12的有源表面12a上,例如,可以沿著其有源表面的周邊設置複數個I/O焊盤121。晶粒11和12的有源表面11a和12a可以由鈍化層130共形地(conformally)覆蓋。
根據本發明的實施例,晶粒11和12可以包括端子(terminal)112和122,其包括但不限於分別設置在I/O焊盤111和121上的金屬凸塊或微凸塊,這些金屬凸塊或微凸塊設置在翻轉的有源表面11a和12a上。根據本發明的實施例,端子112和122可以包括大約20-50微米的凸塊間距,但不限於此。可選地,諸如介電層或聚合物層的平坦化層210可以被施加在鈍化層130上並且可以圍繞端子112和122。
根據本發明的實施例,晶粒11和12可以被諸如模塑料30的密封劑圍繞並支撐。模塑料30可以具有與平坦化層210的下表面210a齊平的下表面30a。模塑料30可以具有與晶粒11和12的後表面11b和12b齊平的上表面30b。可以在晶片級封裝製程期間對模塑料30進行固化製程。根據本發明的實施例,模塑料30可以包括環氧樹脂和二氧化矽填充劑的混合物,但不限於此。
RDL 20可以包括多層導電通孔,例如V1
-V3
、通孔焊盤(例如P2
、P3
)、多層導電跡線(例如T2
和T3
)、以及凸塊焊盤BP,以扇出I/O焊盤111和121至C4凸塊SB在RDL 20的下表面上,以具有較寬鬆的節距(例如130〜150微米)。C4凸塊SB分別形成在凸塊焊盤BP上。為了簡單起見,在圖1中僅示出了三層導電通孔(例如V1
-V3
)、以及兩層通孔焊盤(例如P2
、P3
)。通孔和焊盤可能會根據設計要求而有所不同。
例如,在圖1中,RDL 20可以包括通用互連結構IS,其包括中間通孔焊盤Pn
、與中間通孔焊盤Pn
鄰接並將中間通孔焊盤Pn
電耦接到上通孔焊盤Pn-1
的一個或一簇上導電通孔Vn-1
、以及將中間通孔焊盤Pn
與下電路焊盤Pn+1
電耦接的下導電通孔Vn
。在一些實施例中,下電路焊盤Pn+1
可以是凸塊焊盤,但不限於此。
根據本發明的實施例,在基於有利的扇出晶圓級晶片規模(fan-out wafer-level chip-scale)平臺實施RDL電路設計時,經過發明人研究之後,認為需要考慮或滿足以下條件。首先,考慮到電遷移(electromigration,EM)和IR性能,在互連結構IS中,相對於每個鄰接的通孔焊盤(或凸塊焊盤)有一個以上的通孔(標準(Criterion)A)。例如,一個或一簇上導電通孔Vn-1
可以包括3〜6個通孔,並且下導電通孔Vn
可以包括4〜8個通孔,但不限於此,例如下導電通孔Vn
的數量也可以是1個、2個3個或更多。第二,為了避免應力沿垂直方向傳遞,一個或一簇上導電通孔Vn-1
不與下導電通孔Vn
重疊(標準B)。
請參考圖2至圖4。圖2是示出示例性互連結構的俯視透視圖,根據本發明的實施例,該互連結構包括中間通孔焊盤、與該中間通孔焊盤鄰接的一個或一簇上導電通孔以及下導電通孔。圖3是示出了圖2中的中間通孔焊盤、上導電通孔和下導電通孔的相對位置的示意性截面圖。圖4是圖2中的示例性互連結構的側視透視圖,其中相同的數字或標籤表示相似的層、區域或元素。
為了清楚起見,忽略了示例性互連結構的介電層或聚合物層。應當理解,通孔焊盤的形狀僅用於說明目的。在一些實施例中,通孔焊盤可以具有圓形、矩形、正方形、多邊形、橢圓形或不規則形狀,但不限於此。
如圖2至圖4所示,根據一個實施例,例如,通用互連結構IS包括中間通孔焊盤Pn
、與該中間通孔焊盤Pn
鄰接並將中間通孔焊盤Pn
電耦接到上通孔焊盤Pn-1
的一個或一簇上導電通孔Vn-1
、以及將中間通孔焊盤Pn
電耦接到下電路焊盤Pn+1
的下導電通孔Vn
。圖4還示出了示例性的C4凸塊SB可以設置在從下電路焊盤Pn+1
延伸的凸塊焊盤上。
應當理解,根據各種實施例,中間通孔焊盤Pn
可以包括圓形、矩形、正方形、多邊形、橢圓形或不規則形狀。應當理解,根據各種實施例,上通孔焊盤Pn-1
可以包括圓形、矩形、正方形、邊形、橢圓形或不規則形狀。應當理解,根據各種實施例,中間通孔焊盤Pn
可以具有與上通孔焊盤Pn-1
的形狀不同的形狀。應當理解,根據各種實施例,中間通孔焊盤Pn
和上通孔焊盤Pn-1
可以具有相同的形狀。
根據本發明的一個實施例,例如,中間通孔焊盤Pn
和上通孔焊盤Pn-1
都可以具有圓形形狀,並且當從上方觀察時可以相對於中心軸AX同心。一個或一簇上導電通孔Vn-1
可以設置在半徑為R的中間通孔焊盤Pn
上的半徑為r的投影區域PPR內。投影面積PPR基本上等於上通孔焊盤Pn-1
的上表面面積。中間通孔焊盤Pn
的位於投影區域PPR外部的其餘部分被定義為具有均勻寬度(等於R-r)的環形區域RA,可以透過與中心軸AX相交的中心虛線CL將其劃分為兩個鏡像對稱的馬蹄形(或C形或彎曲的帶狀)區域。根據本發明的一個實施例,將兩個鏡面對稱的馬蹄形區域之一(環形區域RA的一半)定義為通孔區域VAR(用虛線表示)。根據本發明的實施例,下導電通孔Vn
僅被允許佈置在假想的馬蹄形通孔區域VAR內,該區域沿著中間通孔焊盤Pn
的周長延伸,其大約為環形區域RA的一半,或者馬蹄形通孔區域VAR可以小於等於環形區域RA的一半(例如馬蹄形通孔區域VAR的面積可以小於等於環形區域RA的面積的一半)。本發明的上述方式可以方便RDL中上導電通孔與下導電通孔之間的佈局設計,當上導電通孔或下導電通孔因設計要求需要改變位置時,可以通過如下所述的旋轉的方式改變上導電通孔或下導電通孔的位置,從而滿足不同的設計需求,具有更好的設計彈性和靈活性。在一個實施例中,下導電通孔Vn
可以包括複數個通孔(例如4〜8個),以形成下導電通孔陣列;此外上導電通孔Vn-1
也可以是複數個;下導電通孔或/和上導電通孔為複數個的設置可以提高電性能,同時複數個下導電通孔和複數個上導電通孔透過進行上述旋轉不會重疊,因此本實施例在提高電性能的同時滿足了提高設計彈性的需求。此外,複數個下導電通孔可以均勻的分佈在馬蹄形通孔區域VAR內,以提高電性能,使訊號的傳遞更加均勻。複數個上導電通孔可以均勻的分佈在中間通孔焊盤Pn內,以提高電性能,使訊號的傳遞更加均勻。
在某些情況下,當從上方觀察時,中間通孔焊盤Pn
和上通孔焊盤Pn-1
相對於中心軸AX不同心,則可以透過簡單地圍繞中心軸AX旋轉下導電通孔Vn
以及假想的通孔區域VAR即可滿足上述標準B。具體可以參考以下實施例的描述。
圖5示出了佈置在通孔區域VAR內的下導電通孔Vn
的示例性旋轉操作。例如,在圖5中,一個或一簇上導電通孔Vn-1
包括兩個導電通孔,並且下導電通孔Vn
包括五個導電通孔。如圖5所示,上通孔焊盤Pn-1
與中間通孔焊盤Pn
的中心軸線AX偏移。為了避免下導電通孔Vn
和上導電通孔Vn-1
之間的重疊,透過實施VAR的旋轉操作,使下導電通孔Vn
與假想的通孔區域VAR一起繞中心軸AX旋轉。
圖6示出了佈置在通孔區域VAR內的下導電通孔Vn
的另一示例性旋轉操作。例如,在圖6中,一個或一簇上導電通孔Vn-1
可以包括四個導電通孔,並且下導電通孔Vn
可以包括六個導電通孔。中間通孔焊盤Pn
和上通孔焊盤Pn-1
可以具有矩形形狀。如圖6所示,上通孔焊盤Pn-1
與中間通孔焊盤Pn
的中心軸線AX偏移。為了避免下導電通孔Vn
和上導電通孔Vn-1
之間的重疊,透過執行VAR的旋轉操作,使下導電通孔Vn
和中間通孔焊盤Pn
繞中心軸AX旋轉。因此本實施例中,如圖2所示的環形區域RA可以是圓環或者方形環或者其他形狀的環形,而如圖2所示的馬蹄形通孔區域VAR也可以相對應的為半圓環形、或者方形環的一半、或者其他形狀的環形的一半(當然如上所述,也可以小於等於一半),因此馬蹄形通孔區域VAR也可以是半個方形環或其他的形狀的環。馬蹄形通孔區域VAR可以小於等於環形區域RA的一半的方式可以在執行VAR的旋轉操作時更容易的避免下導電通孔Vn
和上導電通孔Vn-1
之間的重疊,具有更好的設計彈性和佈局的靈活性,方便通孔的設計和佈線的佈局。
圖7示出了佈置在通孔區域VAR內的下導電通孔Vn
的又一示例性旋轉操作。例如,在圖7中,上導電通孔Vn-1
的簇可以包括四個導電通孔,並且下導電通孔Vn
可以包括五個導電通孔。中間通孔焊盤Pn
可以具有圓形形狀,而上通孔焊盤Pn-1
可以具有矩形形狀。如圖7所示,上通孔焊盤Pn-1
與中間通孔焊盤Pn
的中心軸線AX偏移。為了避免下導電通孔Vn
和上導電通孔Vn-1
之間的重疊,透過實施VAR的旋轉操作,使下導電通孔Vn
與假想通孔區域VAR一起繞中心軸AX旋轉。
使用本發明是有利的,因為在實現RDL電路設計時,透過將新穎的通孔配置合併到通用互連結構中,可以減輕電路設計人員的負擔,並且可以顯著減少執行時間。此外,通用互連結構中的新穎通孔配置使RDL電路設計非常容易在不同的最小C4凸點間距(例如,當前最小)的規則之間轉換。 扇出晶圓級晶片級封裝(FO-WLCSP)的C4凸點間距為130μm。 適用於CoWoS(Chip-on-Wafer-on-Substrate,基片上晶片)技術的C4凸點間距為150μm。 本發明為不同的扇出封裝技術提供了一種靈活的RDL電路設計方法,可以適用於不同的凸點間距要求,就有更好的設計彈性和佈局的靈活性。
儘管已經對本發明實施例及其優點進行了詳細說明,但應當理解的是,在不脫離本發明的精神以及申請專利範圍所定義的範圍內,可以對本發明進行各種改變、替換和變更。所描述的實施例在所有方面僅用於說明的目的而並非用於限制本發明。本發明的保護範圍當視所附的申請專利範圍所界定者為准。本領域技術人員皆在不脫離本發明之精神以及範圍內做些許更動與潤飾。
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。
1:扇出封裝
11,12:半導體晶粒
11a,12a:有源表面
11b,12b:後表面
20:重分佈層
30:模塑料
30a,210a:下表面
30b:上表面
111,121:輸入/輸出焊盤
112,122:端子
130:鈍化層
201:介電層
202:金屬層
210:平坦化層
IS:互連結構
V1,V2,V3:導電通孔
Vn:下導電通孔
Vn-1:上導電通孔
P2,P3:通孔焊盤
Pn:中間通孔焊盤
Pn-1:上通孔焊盤
Pn+1:下電路焊盤
T2,T3:導電跡線
透過閱讀後續的詳細描述和實施例可以更全面地理解本發明,本實施例參照附圖給出,其中:
圖1是示出根據本發明的一個實施例的示例性扇出封裝的示意性截面圖;
圖2是根據本發明的一個實施例的示例性互連結構的俯視自上向下的透視圖,該互連結構包括中間通孔焊盤(intermediate via land pad),鄰接該中間通孔焊盤的一個或一簇(cluster)上導電通孔以及下導電通孔;
圖3是示出圖2中的中間通孔焊盤、上導電通孔和下導電通孔的相對位置的示意性截面圖;
圖4是圖2中的示例性互連結構的透視側視圖;以及
圖5至圖7示出了根據本發明的一些實施例的下導電通孔的示例性旋轉操作,該下導電通孔佈置在通孔區域內以避免通孔重疊。
1:扇出封裝
11,12:半導體晶粒
11a,12a:有源表面
11b,12b:後表面
20:重分佈層
30:模塑料
30a,210a:下表面
30b:上表面
111,121:輸入/輸出焊盤
112,122:端子
130:鈍化層
201:介電層
202:金屬層
210:平坦化層
IS:互連結構
V1,V2,V3:導電通孔
Vn:下導電通孔
Vn-1:上導電通孔
P2,P3:通孔焊盤
Pn:中間通孔焊盤
Pn-1:上通孔焊盤
Pn+1:下電路焊盤
T2,T3:導電跡線
Claims (12)
- 一種用於重分佈層的互連結構,包括: 中間通孔焊盤; 上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到該上通孔焊盤;以及 下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該下導電通孔佈置在沿該中間通孔焊盤的周邊延伸的馬蹄形通孔區域內。
- 如請求項1之用於重分佈層的互連結構,其中,該中間通孔焊盤包括圓形、矩形、正方形、多邊形、橢圓形或不規則形狀;或/和,該上通孔焊盤包括圓形、矩形、正方形、多邊形、橢圓形或不規則形狀。
- 如請求項2之用於重分佈層的互連結構,其中,該中間通孔焊盤和該上通孔焊盤具有相同或不同的形狀。
- 如請求項1之用於重分佈層的互連結構,其中,該上導電通孔設置在該中間通孔焊盤上的該上通孔焊盤的投影區域內。
- 如請求項4之用於重分佈層的互連結構,其中,該投影面積等於該上通孔焊盤的上表面面積。
- 如請求項4之用於重分佈層的互連結構,其中,該中間通孔焊盤的在該投影區域之外的其餘部分是具有均勻寬度的環形區域。
- 如請求項6之用於重分佈層的互連結構,其中,該環形區域由中心線劃分為兩個鏡像對稱的馬蹄形,並且其中該兩個鏡像對稱的馬蹄形區域之一定義為馬蹄形通孔區域。
- 如請求項1之用於重分佈層的互連結構,其中,該下導電通孔將該中間通孔焊盤與該下電路焊盤電耦接。
- 如請求項1之用於重分佈層的互連結構,其中,當從上方觀察時,該中間通孔焊盤和該上通孔焊盤相對於中心軸不是同心的。
- 如請求項1之用於重分佈層的互連結構,其中,佈置在該馬蹄形通孔區域內的該下導電通孔不與該上導電通孔重疊。
- 一種半導體封裝,包括: 至少一個半導體晶粒; 模塑料,圍繞該半導體晶粒的;以及 重分佈層,設置在該模塑料的下表面上,其中,該至少一個半導體晶粒電連接至該重分佈層的互連結構,其中,該互連結構包括: 中間通孔焊盤; 上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到該上通孔焊盤;以及 下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該下導電通孔佈置在沿該中間通孔焊盤的周邊延伸的馬蹄形通孔區域內。
- 一種用於重分佈層的互連結構,包括: 中間通孔焊盤; 上導電通孔,鄰接該中間通孔焊盤,並且將該中間通孔焊盤電耦接到該上通孔焊盤;以及 下導電通孔,將該中間通孔焊盤與該下電路焊盤電耦接,其中,該上導電通孔設置在該中間通孔焊盤上的該上通孔焊盤的投影區域內,其中該下導電通孔佈置在該投影區域外部的該中間通孔焊盤的其餘部分上,並且不與該上導電通孔簇重疊。
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