TW202141905A - Power supply device for eliminating ringing effect - Google Patents

Abstract

A power supply device for eliminating the ringing effect includes an input stage circuit, a transformer, an output stage circuit, a power switch element, a PWM (Pulse Width Modulation) IC (Integrated Circuit), and a control circuit. The transformer includes a main coil, a secondary coil, and a magnetizing inductor. The power switch element selectively couples the main coil and the magnetizing inductor to a ground voltage according to a PWM voltage. A parasitic capacitor is built in the power switch element. The PWM IC generates the PWM voltage. The control circuit monitors a resonant voltage between the magnetizing inductor and the parasitic capacitor. If the resonant voltage is lower than a threshold voltage, the control circuit will force the power switch element to be turned on. The threshold voltage is determined according to a reference voltage of the input stage circuit.

Description

Power supply to eliminate ringing effect

The present invention relates to a power supply, and more particularly to a power supply that can eliminate the ringing effect.

In the traditional power supply, the non-ideal parasitic capacitance of the power switch often produces a ringing effect, which not only causes a large switching loss, but also causes the overall conversion efficiency of the power supply to decrease. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by the previous technology.

In a preferred embodiment, the present invention provides a power supply that eliminates the ringing effect, including: an input stage circuit, which generates a reference potential according to the input potential; a transformer, including a main coil, a secondary coil, and a Excitation inductor, where the main coil is used to receive the input potential, and the auxiliary coil is used to generate an induced potential; an output stage circuit generates an output potential according to the induced potential; a power switch, according to a Pulse width modulation potential is used to selectively couple the main coil and the magnetizing inductor to a ground potential, wherein the power switch has a built-in parasitic capacitor; a pulse width modulation integrated circuit generates the pulse Width modulation potential; and a control circuit that monitors a resonance potential between the magnetizing inductor and the parasitic capacitor, wherein if the resonance potential is lower than a critical potential, the control circuit will forcibly turn on the power switch; The critical potential is determined according to the reference potential.

In order to make the purpose, features and advantages of the present invention more comprehensible, specific embodiments of the present invention are specifically listed below, in conjunction with the accompanying drawings, and are described in detail as follows.

Certain vocabulary is used to refer to specific elements in the specification and the scope of the patent application. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and the scope of the patent application do not use differences in names as a way to distinguish elements, but use differences in functions of elements as a criterion for distinguishing. The terms "include" and "include" mentioned in the entire specification and the scope of the patent application are open-ended terms and should be interpreted as "including but not limited to". The term "approximately" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the term "coupling" includes any direct and indirect electrical connection means in this specification. Therefore, if it is described in the text that a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. Two devices.

FIG. 1 shows a schematic diagram of a power supply 100 according to an embodiment of the invention. For example, the power supply 100 can be applied to a desktop computer, a notebook computer, or an integrated computer. As shown in Figure 1, the power supply 100 includes: an input stage circuit 110, a transformer 120, an output stage circuit 130, a power switch 140, a pulse width modulation integrated circuit 150, and a control circuit 160 . It should be noted that although not shown in Figure 1, the power supply 100 may further include other components, such as a voltage regulator or (and) a negative feedback circuit.

The input stage circuit 110 can generate a reference potential VE according to an input potential VIN. The input potential VIN can come from an external input power source. For example, the input potential VIN can be roughly a DC potential, and its potential level can be from 100V to 400V, but it is not limited to this. The transformer 120 includes a main coil 121, a secondary coil 122, and a magnetizing inductor LM. The main coil 121 and the magnetizing inductor LM can be located on the same side of the transformer 120, and the secondary coil 122 can be located on the opposite side of the transformer 120. One side. The main coil 121 can receive the input potential VIN, and in response to the input potential VIN, the auxiliary coil 122 can generate an induced potential VS. The magnetizing inductor LM may be an inherent component that is incidental to the manufacture of the transformer 120, and it is not an external independent component. The output stage circuit 130 can generate an output potential VOUT according to the induced potential VS. For example, the output potential VOUT can be another DC potential, and its potential level can be from 18V to 22V, but it is not limited to this. The power switch 140 selectively couples both the main coil 121 and the magnetizing inductor LM to a ground potential VSS (for example, 0V) according to a pulse width modulation potential VA. For example, if the pulse width modulation potential VA is a high logic level (ie, logic "1"), the power switch 140 will couple the main coil 121 and the magnetizing inductor LM to the ground potential VSS (ie, The power switch 140 can be approximated as a short-circuit path); on the contrary, if the pulse width modulation potential VA is a low logic level (that is, logic "0"), the power switch 140 will not energize the main coil 121 and The inductor LM is coupled to the ground potential VSS (that is, the power switch 140 can be approximated as an open path). In addition, the power switch 140 may have a built-in parasitic capacitor CP. It must be understood that the total parasitic capacitance between the two ends of the power switch 140 can be simulated as the aforementioned parasitic capacitor CP, which is not an external independent component. The pulse width modulation integrated circuit 150 can generate a pulse width modulation potential VA. The control circuit 160 can monitor a resonance potential VR between the magnetizing inductor LM and the parasitic capacitor CP, and if the resonance potential VR is lower than a critical potential VTH, the control circuit 160 will forcibly turn on the power switch 140 so that the main coil 121 and The magnetizing inductors LM are all coupled to the ground potential VSS. It should be noted that the threshold potential VTH can be determined according to the reference potential VE of the input stage circuit 110. Under this design, once a ringing effect occurs between the magnetizing inductor LM and the parasitic capacitor CP, the control circuit 160 can immediately turn on the power switch 140 to eliminate this non-ideal characteristic. Therefore, the present invention can reduce the switching loss of the power switch 140 and improve the conversion efficiency of the power supply 100 at the same time.

The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these drawings and descriptions are only examples, and are not used to limit the scope of the present invention.

FIG. 2 is a schematic diagram of the power supply 200 according to an embodiment of the invention. In the embodiment of Figure 2, the power supply 200 has an input node NIN and an output node NOUT, and includes an input stage circuit 210, a transformer 220, an output stage circuit 230, a power switch 240, and a pulse Width modulation integrated circuit 250, and a control circuit 260. The input node NIN of the power supply 200 can receive an input potential VIN from an external input power source, and the output node NOUT of the power supply 200 can output an output potential VOUT to an electronic device.

The input stage circuit 210 includes a first diode D1, a first resistor R1, and a first capacitor C1. The anode of the first diode D1 is coupled to the input node NIN, and the cathode of the first diode D1 is coupled to a first node N1 to output a reference potential VE. The first end of the first resistor R1 is coupled to the first node N1, and the second end of the first resistor R1 is coupled to a second node N2. The first terminal of the first capacitor C1 is coupled to the second node N2, and the second terminal of the first capacitor C1 is coupled to a ground potential VSS.

The transformer 220 includes a main coil 221, a secondary coil 222, and a magnetizing inductor LM. The main coil 221 and the magnetizing inductor LM can be located on the same side of the transformer 220, and the secondary coil 222 can be located on the opposite side of the transformer 220. One side. The first end of the main coil 221 is coupled to the input node NIN, and the second end of the main coil 221 is coupled to a third node N3. The first end of the auxiliary winding 222 is coupled to a fourth node N4 to output an induced potential VS, and the second end of the auxiliary winding 222 is coupled to a fifth node N5. The first end of the magnetizing inductor LM is coupled to the input node NIN, and the second end of the magnetizing inductor LM is coupled to the third node N3.

The output stage circuit 230 includes a second diode D2 and a second capacitor C2. The anode of the second diode D2 is coupled to the fourth node N4 to receive the induced potential VS, and the cathode of the second diode D2 is coupled to the output node NOUT. The first end of the second capacitor C2 is coupled to the output node NOUT, and the second end of the second capacitor C2 is coupled to the fifth node N5. The fifth node N5 can be regarded as a common node or another ground node.

The power switch 240 includes a first transistor M1. The first transistor M1 can be an N-type MOSFET. The control terminal of the first transistor M1 is coupled to a sixth node N6 to receive a pulse width modulation potential VA, the first terminal of the first transistor M1 is coupled to the ground potential VSS, and the first transistor The second end of M1 is coupled to the third node N3. The power switch 240 has a built-in parasitic capacitor CP. The first end of the parasitic capacitor CP is coupled to the third node N3 to output a resonance potential VR, and the second end of the parasitic capacitor CP is coupled to the ground potential VSS. It must be understood that the total parasitic capacitance between the first terminal and the second terminal of the first transistor M1 can be simulated as the aforementioned parasitic capacitor CP, which is not an external independent component.

The pulse width modulation integrated circuit 250 can output the pulse width modulation potential VA at the sixth node N6, and the pulse width modulation potential VA can be used to adjust the duty cycle of the power switch 240. For example, the pulse width modulation potential VA can be maintained at a fixed potential when the power supply 200 is initialized, and can provide a periodic clock waveform after the power supply 200 enters the normal use phase. In addition, the pulse width modulation potential VA may also be changed by the control circuit 260.

The control circuit 260 includes a comparator 262, a third diode D3, a second transistor M2, a third transistor M3, a second resistor R2, and a third resistor R3. The comparator 262 can be implemented by an operational amplifier. The second transistor M2 and the third transistor M3 can each be an N-type MOSFET. The anode of the triode D3 is coupled to the third node N3 to receive the resonance potential VR, and the cathode of the third diode D3 is coupled to a seventh node N7. The control terminal of the second transistor M2 is coupled to the seventh node N7, the first terminal of the second transistor M2 is coupled to an eighth node N8 to output a threshold potential VTH, and the first terminal of the second transistor M2 The two terminals are coupled to a ninth node N9. The first end of the second resistor R2 is coupled to the first node N1 to receive the reference potential VE, and the second end of the second resistor R2 is coupled to the ninth node N9. The first end of the third resistor R3 is coupled to the eighth node N8, and the second end of the third resistor R3 is coupled to a tenth node N10. The control terminal of the third transistor M3 is coupled to the third node N3 to receive the resonance potential VR, the first terminal of the third transistor M3 is coupled to the ground potential VSS, and the second terminal of the third transistor M3 is Coupled to the tenth node N10. The positive input terminal of the comparator 262 is coupled to the eighth node N8 to receive the threshold potential VTH, the negative input terminal of the comparator 262 is coupled to the third node N3 to receive the resonance potential VR, and the output terminal of the comparator 262 is Coupled to the sixth node N6. If the resonance potential VR is higher than or equal to the critical potential VTH, the comparator 262 will not affect the pulse width modulation potential VA; on the contrary, if the resonance potential VR is lower than the critical potential VTH, the comparator 262 will force the pulse width modulation The potential VA is pulled up to a high logic level to turn on the first transistor M1.

In some embodiments, the power supply 200 can operate in an initial mode, a first mode, or a second mode, and the operating principles will be as follows, respectively.

In the initial mode, the first transistor M1, the second transistor M2, the third transistor M3, and the second diode D2 are all turned off.

In the first mode, the pulse width modulation potential VA is at a high logic level and the first transistor M1 is turned on. The first capacitor C1 is charged by the input potential VIN through the first diode D1 and the first resistor R2. At this time, the magnetizing inductor LM has a positive voltage (that is, the input potential VIN of the input node NIN is higher than the resonance potential VR of the third node N3). Therefore, the third diode D3, the second transistor M2, and the third transistor M3 are all turned off, and the comparator 262 does not affect the pulse width modulation potential VA.

In the second mode, the pulse width modulation potential VA is switched from a high logic level to a low logic level and the first transistor M1 is turned off. According to the cold order law, the magnetizing inductor LM will instantly turn to have a negative voltage (that is, the input potential VIN of the input node NIN is lower than the resonance potential VR of the third node N3). At this time, the parasitic capacitor CP of the power switch 240 will resonate with the magnetizing inductor LM of the transformer 220 (that is, the ringing effect), and the third diode D3, the second transistor M2, and the third transistor M3 Both are turned on, so that the critical potential VTH becomes a specific ratio of the reference potential VE. In some embodiments, the critical potential VTH is directly proportional to the reference potential VE, which can be roughly as described in the following equation (1):

…………………………(1) 其中「VTH」代表臨界電位VTH之位準，「VE」代表參考電位VE之位準，「R2」代表第二電阻器R2之電阻值，而「R3」代表第三電阻器R3之電阻值。

……………………(1) where "VTH" represents the level of the critical potential VTH, "VE" represents the level of the reference potential VE, "R2" represents the resistance value of the second resistor R2, and "R3" represents the resistance value of the third resistor R3.

When the resonance potential VR stored in the parasitic capacitor CP is lower than the critical potential VTH, the comparator 262 will force the pulse width modulation potential VA to rise to a high logic level to turn on the first transistor M1. Therefore, the power supply 200 is forced to switch from the second mode to the first mode, and the non-ideal ringing effect in the power supply 200 can be completely eliminated.

Figure 3 shows the potential waveform of a conventional power supply, where the horizontal axis represents time, and the vertical axis represents potential level or current value. If the control circuit 260 is not used, after the current I2 passing through the second diode D2 drops to zero, a ringing effect will easily occur between the parasitic capacitor CP of the power switch 240 and the magnetizing inductor LM of the transformer 220 (such as the first Shown at the dashed box 370).

Fig. 4 shows a potential waveform diagram of the power supply 200 according to an embodiment of the present invention, in which the horizontal axis represents time, and the vertical axis represents potential level or current value. According to the measurement result in Figure 4, if the control circuit 260 has been used, after the current I2 through the second diode D2 drops to 0, the parasitic capacitor CP of the power switch 240 and the magnetizing inductor LM of the transformer 220 The ringing effect will be quickly suppressed (as shown at the second dashed box 470). In detail, the resonance potential VR between the magnetizing inductor LM and the parasitic capacitor CP can be directly pulled down to the ground potential VSS at its own first trough, so the non-ideal characteristics of the power supply 200 will be effectively reduced eliminate.

In some embodiments, the component parameters of the power supply 200 may be as described below. The inductance value of the magnetizing inductor LM can be between 285 μH and 315 μH, preferably 300 μH. The capacitance value of the parasitic capacitor CP may be between 90 pF and 110 pF, preferably 100 pF. The capacitance value of the first capacitor C1 may be between 108 μF and 132 μF, preferably 120 μF. The capacitance value of the second capacitor C1 may be between 612 μF and 748 μF, preferably 680 μF. The resistance value of the first resistor R1 may be between 9.5KΩ and 10.5KΩ, and preferably may be 10KΩ. The resistance value of the second resistor R2 may be between 13.3KΩ and 14.7KΩ, and preferably may be 14KΩ. The resistance value of the third resistor R3 may be between 0.95KΩ and 1.05KΩ, and preferably may be 1KΩ. The ratio of the number of turns of the primary coil 221 to the secondary coil 222 can be between 1 and 100, and preferably can be 10. The above parameter range is obtained based on the results of many experiments, which helps to optimize the conversion efficiency of the power supply 200.

The present invention proposes a novel power supply, which includes a control circuit to suppress the ringing effect. According to the actual measurement results, the use of the aforementioned power supply design can almost completely eliminate the non-ideal characteristics between the magnetizing inductor and the parasitic capacitor. Since the present invention can improve the conversion efficiency of the power supply and reduce its electromagnetic interference phenomenon, it is very suitable for application in various types of devices.

It is worth noting that the above-mentioned potential, current, resistance value, inductance value, capacitance value, and other component parameters are not limitations of the present invention. The designer can adjust these settings according to different needs. The power supply of the present invention is not limited to the state shown in Figures 1-4. The present invention may only include any one or more of the features of any one or more of the embodiments shown in FIGS. 1-4. In other words, not all the features shown in the figures need to be implemented in the power supply of the present invention at the same time. Although the embodiment of the present invention uses metal oxide half field effect transistors as an example, the present invention is not limited to this. Those skilled in the art can use other types of transistors, such as junction field effect transistors or fins. Type field effect transistors, etc., without affecting the effect of the present invention.

Although the present invention is disclosed as above in a preferred embodiment, it is not intended to limit the scope of the present invention. Anyone who is familiar with the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The scope of protection of the present invention shall be subject to those defined by the attached patent scope.

100,200: power supply 110, 210: Input stage circuit 120, 220: Transformer 121, 221: main coil 122,222: secondary coil 130, 230: output stage circuit 140, 240: power switch 150, 250: Pulse width modulation integrated circuit 160, 260: control circuit 262: Comparator 370: The first dashed frame 470: Second dotted frame C1: The first capacitor C2: second capacitor CP: Parasitic capacitor D1: The first diode D2: The second diode D3: The third diode I2: current LM: Magnetizing inductor M1: The first transistor M2: second transistor M3: third transistor N1: the first node N2: second node N3: third node N4: Fourth node N5: fifth node N6: sixth node N7: seventh node N8: The eighth node N9: Ninth node N10: Tenth node NIN: input node NOUT: output node R1: first resistor R2: second resistor R3: third resistor VA: Pulse width modulation potential VE: Reference potential VIN: input potential VOUT: output potential VR: resonance potential VS: induced potential VSS: Ground potential VTH: critical potential

Figure 1 is a schematic diagram of a power supply according to an embodiment of the invention. FIG. 2 is a schematic diagram of the power supply according to an embodiment of the invention. Figure 3 shows the potential waveform diagram of the traditional power supply. Figure 4 is a diagram showing the potential waveform of the power supply according to an embodiment of the present invention.

100: power supply

110: Input stage circuit

120: Transformer

121: main coil

122: secondary coil

130: output stage circuit

140: power switch

150: Pulse width modulation integrated circuit

160: control circuit

CP: Parasitic capacitor

LM: Magnetizing inductor

VA: Pulse width modulation potential

VE: Reference potential

VIN: input potential

VOUT: output potential

VR: resonance potential

VS: induced potential

VSS: Ground potential

VTH: critical potential

Claims (10)

A power supply for eliminating the ringing effect, including: An input stage circuit generates a reference potential according to the input potential; A transformer, including a main coil, a secondary coil, and a magnetizing inductor, wherein the primary coil is used to receive the input potential, and the secondary coil is used to generate an induced potential; An output stage circuit generates an output potential according to the induced potential; A power switch, which selectively couples the main coil and the magnetizing inductor to a ground potential according to a pulse width modulation potential, wherein the power switch has a built-in parasitic capacitor; A pulse width modulation integrated circuit to generate the pulse width modulation potential; and A control circuit that monitors a resonance potential between the magnetizing inductor and the parasitic capacitor, wherein if the resonance potential is lower than a critical potential, the control circuit will forcibly turn on the power switch; The critical potential is determined according to the reference potential. The power supply according to claim 1, wherein the input stage circuit includes: A first diode has an anode and a cathode, wherein the anode of the first diode is coupled to an input node to receive the input potential, and the cathode of the first diode is coupled To a first node to output the reference potential; A first resistor has a first end and a second end, wherein the first end of the first resistor is coupled to the first node, and the second end of the first resistor is coupled Connected to a second node; and A first capacitor has a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the second node, and the second terminal of the first capacitor is coupled to the Ground potential. The power supply of claim 2, wherein the main coil has a first end and a second end, the first end of the main coil is coupled to the input node to receive the input potential, and the main coil The second end is coupled to a third node, the auxiliary coil has a first end and a second end, and the first end of the auxiliary coil is coupled to a fourth node to output the induced potential, The second end of the auxiliary winding is coupled to a fifth node, the exciting inductor has a first end and a second end, the first end of the exciting inductor is coupled to the input node, and the The second end of the magnetizing inductor is coupled to the third node. The power supply according to claim 3, wherein the output stage circuit includes: A second diode has an anode and a cathode, wherein the anode of the second diode is coupled to the fourth node to receive the induced potential, and the cathode of the second diode is coupled Connected to an output node to output the output potential; and A second capacitor has a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the output node, and the second terminal of the second capacitor is coupled to the first terminal Five nodes. The power supply according to claim 4, wherein the power switch includes: A first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is coupled to a sixth node to receive the pulse width modulation potential, The first terminal of the first transistor is coupled to the ground potential, and the second terminal of the first transistor is coupled to the third node. The power supply of claim 5, wherein the parasitic capacitor has a first terminal and a second terminal, the first terminal of the parasitic capacitor is coupled to the third node to output the resonance potential, and the The second end of the parasitic capacitor is coupled to the ground potential. The power supply according to claim 6, wherein the control circuit includes: A third diode has an anode and a cathode, wherein the anode of the third diode is coupled to the third node to receive the resonance potential, and the cathode of the third diode is coupled Connected to a seventh node; A second transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is coupled to the seventh node, and the first terminal of the second transistor The terminal is coupled to an eighth node to output the critical potential, and the second terminal of the second transistor is coupled to a ninth node; and A second resistor has a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the first node to receive the reference potential, and the second resistor of the The second end is coupled to the ninth node. The power supply according to claim 7, wherein the control circuit further includes: A third resistor has a first end and a second end, wherein the first end of the third resistor is coupled to the eighth node, and the second end of the third resistor is coupled Connected to a tenth node; and A third transistor has a control terminal, a first terminal, and a second terminal. The control terminal of the third transistor is coupled to the third node to receive the resonance potential. The first end of the crystal is coupled to the ground potential, and the second end of the third transistor is coupled to the tenth node. The power supply according to claim 8, wherein the control circuit further includes: A comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator is coupled to the eighth node to receive the threshold potential, and the negative input of the comparator The terminal is coupled to the third node to receive the resonance potential, and the output terminal of the comparator is coupled to the sixth node. The power supply according to claim 9, wherein the pulse width modulation integrated circuit outputs the pulse width modulation potential at the sixth node, and if the resonance potential is lower than the critical potential, the comparison The device will force the pulse width modulation potential to rise to a high logic level.

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