TW202141272A - Debug device and operation method thereof - Google Patents

Abstract

A debug device and an operation method thereof are disclosed. The debug device is used to connect an electronic device with a serial wire debug (SWD) interface. The debug device includes a memory, a processing unit, a serial wire debug (SWD) connector and a universal serial bus (USB) connector. The SWD connector is connected to the SWD interface. When the USB connector is connected to a computer, debug instructions are sent to the electronic device by the processing unit. When the USB connector is disconnected to the computer, the memory becomes an external storage device of the electronic device.

Description

Error detection device and its operation method

The present invention relates to a debugging device and an operating method thereof, in particular to using the memory of the debugging device as an external storage device of an electronic device when the debugging program is not executed, and a corresponding operating method thereof.

In the process of product development, various tests or inspections are carried out for newly developed products. During these tests, various debugging data or records of abnormal conditions will be generated, and these data must be stored for developers to do Further analysis, to adjust or change the existing design. Most of the existing data storage methods are to store them in the original flash memory space inside the device, that is, in the remaining space outside the storage of relevant test programs and other data. In this regard, if a long-term electrical test or temperature and humidity environment reliability test is required, the original remaining memory space may not be enough to store a large amount of debugging data generated by the long-term test.

In order to solve the above-mentioned problem of debugging data storage, it is necessary to seek external storage space. The existing solution is to transmit the debugging data to the external storage space through wired or wireless means to avoid data loss. However, while performing the above reliability test, the device under test may not be able to connect to other data transmission lines, that is, it may not be able to send data through a wired method. If it is to be transmitted wirelessly, it is necessary to install an additional wireless transmission device on the originally developed device, which increases the difficulty of operation, and not all products are applicable.

In summary, the conventional method for storing error detection data still has considerable room for improvement. Therefore, the present invention addresses the shortcomings of the existing technology by designing a debugging device and its operating method, thereby improving the implementation in the industry. use.

In view of the above-mentioned problems of the prior art, the purpose of the present invention is to provide a debugging device and an operating method thereof, by using the memory of the debugging device as an external storage device of the electronic device when the debugging process is not executed, the storage is solved The problem of insufficient space.

According to one objective of the present invention, a debug device is provided for connecting an electronic device with a serial wire debug (SWD) interface. The debugging device includes a memory, a processing unit, a serial line debugging interface, and a universal serial bus (Universal serial bus, USB) interface. The processing unit is connected to the memory, and the serial line debugging interface is connected to the serial line debugging interface. The universal serial bus interface is connected to the computer, and the processing unit transmits the computer's debugging instructions to the electronic device. When the universal serial bus interface is disconnected, the memory becomes an external storage device of the electronic device.

Preferably, the memory may include flash memory (Flash) or static random access memory (SRAM).

Preferably, the error detection device may further include at least one of a light emitting diode (LED) and a counter (Counter).

Preferably, the storage data of the external storage device may include the error detection data or the abnormality record of the electronic device.

Preferably, the data stored in the memory may include a debug command or a conversion program of the debug command.

Preferably, the stored data of the memory may include offline test commands of the electronic device.

According to another object of the present invention, an operating method of a debug device is provided, which includes the following steps: setting a debug device, the debug device includes a memory, a processing unit, a serial line debug interface, and a universal serial bus interface; The serial line debug interface is connected to the serial line debug interface of the electronic device, and the universal serial bus interface is connected to the universal serial bus interface of the computer, and the computer's debug command is sent to the electronic device through the processing unit; and Open the universal serial bus interface and use the memory as the external storage device of the electronic device.

Preferably, the memory may include flash memory or static random access memory.

Preferably, the error detection device may include at least one of a light emitting diode and a counter.

Preferably, the external storage device can store the error detection data or abnormal records of the electronic device.

Preferably, the memory can store the debug command or the conversion program of the debug command.

Preferably, the memory can store offline test commands of the electronic device.

In summary, according to the debug device and its operating method of the present invention, it can have one or more of the following advantages:

(1) This debugging device and its operating method can use the debugging device to switch to the external storage device of the electronic device when the universal serial bus interface is disconnected, thereby increasing the storage space for storing the electronic device debugging data or abnormal records, etc. Avoid data loss and increase the convenience of data access at the same time.

(2) This debugging device and its operating method can provide external storage space with the originally connected debugging device during the debugging process of the electronic device, without the need to connect additional transmission lines or wireless transmission devices to transmit data, reducing hardware setup costs, Also avoid affecting the environment settings of the debugging process.

(3) This debugging device and its operating method can use the functions of the debugging device's own components to provide software and hardware support for the debugging process of electronic devices, such as counters, light-emitting diodes, etc., to upgrade electronic devices Operational efficiency during debugging.

In order to facilitate the reviewers to understand the technical features, content and advantages of the present invention and the effects that can be achieved, the present invention is described in detail with the accompanying drawings and in the form of embodiment expressions as follows, and the diagrams used therein are The subject matter is only for the purpose of illustration and auxiliary description, and may not be the true proportions and precise configuration after the implementation of the invention. Therefore, it should not be interpreted in terms of the proportions and configuration relationships of the attached drawings, and should not limit the scope of rights of the present invention in actual implementation. Hexian stated.

Please refer to Figure 1. Figure 1 is a block diagram of a debug device according to an embodiment of the present invention. As shown in the figure, the debugging device 11 includes a memory 111, a processing unit 112, a serial line debugging interface 113, and a universal serial bus interface 114. The processing unit 112 may be a microprocessor and is connected to the memory 111 to access the memory. Program or data in body 111. The serial line error detection interface 113 and the universal serial bus interface 114 are connected to the processing unit 112, and two different interfaces can be connected to different data transmission interfaces. In this embodiment, the serial line debugging interface 113 is connected to the serial line debugging interface 121 of the electronic device 12, and the universal serial bus interface 114 is connected to the universal serial bus interface 131 of the computer 13.

The electronic device 12 includes a chip 122. The chip 122 may be a newly developed system chip, a driver chip, or a control chip, etc., which can be mounted on a main board or a printed circuit board in various devices. During the test, the chip 122 must connect its pins to the circuit board or the circuit on the test board, and further connect to the serial line debug interface 121, in order to perform related debug procedures. The serial line debugging interface 121 is an operating interface for chip debugging. Compared with the debugging mode of the Joint test action group (JTAG) protocol, the serial line debugging interface 121 requires fewer pins. Less, and suitable for high-speed and large amount of data debugging procedures. On the other hand, the computer 13 includes a processor 132 and a storage device 133. The processor 132 can be a central processing unit of a desktop computer or a notebook computer, and is connected to a storage device 133 such as a hard disk to access various debugging or test programs. , And sent to the debugging device 11 through the universal serial bus interface 131 of the computer 13.

The debugging device 11 is set up to convert the debugging program edited in the computer 13 into debugging commands that can be read by the chip 122. Therefore, the memory 111 in the debugging device 11 can store the conversion of the debugging commands When the debugging device 11 is connected to the computer 13 by the universal serial bus interface 114, the computer 13 can send the debugging program to the debugging device 11, and convert the debugging program into the debugging command executable by the chip 122 through the conversion program. The serial line debugging interface 113 directly transmits the debugging command to the electronic device 12 to perform the debugging procedure on the chip 122. In another embodiment, the debug command can also be pre-stored in the memory 111 of the debug device 11, and the debug program is performed on the chip 122 after the debug device 11 is connected to the electronic device 12.

As described in the prior art, the chip 122 will generate related debugging data and abnormal status records when performing the testing of these debugging procedures. When the original storage space inside the chip 122 is insufficient to store the above-mentioned debugging data, You need to find additional storage space. In this embodiment, when the universal serial bus interface 114 of the debugging device 11 is disconnected from the computer 13, that is, when the debugging device 11 no longer receives data from the computer 13, the memory of the debugging device 11 itself The body 111 can become an external storage device of the electronic device 12. When the chip 122 executes the debug command, the relevant data generated can be sent to the debug device 11 through the serial line debug interface 121 for storage. When the debug process is completed, the operator can connect the debug device 11 to the computer 13 Or the server that stores the data will send the stored data such as debugging data or abnormal records to the computer 13, so that the developer can view the data, and then adjust or modify the relevant software and hardware settings for product development.

In addition, the debug device 11 may also include a light emitting diode 115 and a counter 116, which are respectively connected to the processing unit 112. When the debug device 11 is connected to the computer 13 through the universal serial bus interface 114, the light emitting diode 115 can be used as an indicator number during data transmission, and the counter 116 can assist the processing unit 112 to control the transmission volume. When the debugging device 11 is disconnected from the universal serial bus interface 114, the memory 111 of the debugging device 11 can be used as an external storage device of the electronic device 12. At this time, the light-emitting diode 115 can be used as a debugging program. The indicator light, and the timer 116 can also be used as a counting device in the debugging process, providing hardware and software support required by the debugging process.

Please refer to Figure 2. Figure 2 is a schematic diagram of the error detection device according to an embodiment of the present invention. As shown in the figure, the debugging device 21 has interfaces suitable for two different connection interfaces, namely a serial line debugging interface 211 and a universal serial bus interface 212. The aforementioned interfaces may be connectors corresponding to different transmission interfaces. The serial line debug interface 211 corresponds to the serial line debug interface 221, and the universal serial bus interface 212 corresponds to the universal serial bus interface 231. The chip 222 can be set on the test substrate 223. The test substrate 223 can be a motherboard or a printed circuit board similar to an electronic device, including related passive components. The chip 222 can be connected to the serial line for debugging through the circuit on the test substrate 223 The interface 221 is further connected to the debugging device 21 for debugging procedures. The serial wire debug interface 221 is a slot that extends outside the electronic device or the test board, and it can correspond to the serial wire debug interface 211 of the debug device 21, because the debug device 21 includes this serial wire debug (SWD) The transmission interface is different from the general universal serial bus (USB) external device.

In this embodiment, the universal serial bus interface 231 can be a universal serial bus slot of the computer 23. The computer 23 described here can be a notebook computer, a desktop computer, or a related test device on a test workstation. After editing the debug program on the computer 23, the operator can transfer the debug program to the debug device 21, and the debug device 21 further converts the debug program into the debug command executable by the chip 222, and then debugs through the serial line The interface 221 transmits the debugging command to the chip 222 for execution, thereby executing the above-mentioned debugging procedure. When the universal serial bus interface 212 of the debugging device 21 is disconnected from the computer 23, that is, when the universal serial bus interface 212 is no longer powered, the debugging device 21 can generate a support code and send the support code to The chip 222 allows the chip 222 to use the debug device 21 as an external storage device. For example, the debugging device 21 can transmit information such as the storage space capacity of the memory or the pre-planned storage location to the chip 222, and provide the information required by the chip 222 when uploading data.

Set the universal serial bus interface 212 to disconnect the computer 23 as the switching mechanism. The main reason is that when the chip 222 is in the debugging process, the test environment needs to consider the static electricity, temperature and humidity settings, and it is difficult to connect to the computer 23. Therefore, when the computer 23 is disconnected at the end of the debugging device 21, the offline test command stored in the memory can continue the debugging process of the chip 222, and the remaining memory space of the debugging device 21 is It becomes the external storage device of the chip 222, which increases the storage space but does not affect the setting and execution of the debugging process. After the debugging process is completed, the debugging data and exception records stored in the debugging device 21 can be connected to the computer 23 again, and the computer 23 can access the above-mentioned stored data, and further combine these debugging data and exceptions. The record is uploaded to the database of the server 24 for storage, or when the debugging device 21 is directly connected to the device interface of the server 24, the data stored in the debugging device 21 is directly uploaded to the database to save the chip 222 Debugging data or exception records generated in the debugging process.

Please refer to FIG. 3, which is a schematic diagram of the error detection device according to an embodiment of the present invention. As shown in the figure, both ends of the debug device 31 respectively include a serial line debug interface 311 and a universal serial bus interface 312, the interfaces of which are the same as the previous embodiment, respectively corresponding to the serial wire debug (SWD) interface and the universal serial For the USB interface, the same content will not be repeated. In the debug device 31, a control board 313 is provided. The control board 313 can be a printed circuit board. The control board 313 can be set in the housing 314 of the debug device 31. The lines on the control board 313 are respectively connected to the serial line detection. Wrong interface 311 and universal serial bus interface 312. The control board 313 includes a microprocessor 315 and a memory device. In this embodiment, the memory device may include flash memory 316 or static random access memory 317, but the present disclosure is not limited to this. The device can also be other types of storage devices. In addition, one or more light-emitting diodes 318 can be further provided on the control substrate 313 to serve as a status display light signal when the error detection device 31 is operating.

As described in the foregoing embodiment, when the universal serial bus interface 312 of the debug device 31 is disconnected from the computer, the flash memory 316 or the static random access memory 317 in the debug device 31 can be used as a chip The external storage device during the debugging process, storing the debugging data and abnormal records. In addition, when used as an external storage device, the microprocessor 315 in the debug device 31 can also provide hardware support for chip testing, such as setting a counter on the control board 313 to connect the microprocessor 315 To the counter, the counting function can be provided in the debugging program. The light-emitting diode 318 originally used as the operating state indicator of the debug device 31 can also be used as the indicator of the operating state in the chip debugging program.

Please refer to FIG. 4, which is a flowchart of the method of operating the error detection device according to an embodiment of the present invention. This operation method is applicable to the debug device of the foregoing embodiment, and the relevant device architecture and connection relationship please refer to the description of the foregoing embodiment. As shown in the figure, the operation method of the debugging device includes the following steps (S1~S3):

Step S1: Set up the error detection device. A debug device is set up, and the debug device is connected to the electronic device and the computer editing the debug program. The debug device includes a memory, a processing unit, a serial line debug interface, and a universal serial bus interface. The memory described here may include flash memory or static random access memory.

Step S2: Connect the serial line debug interface to the serial line debug interface of the electronic device, and connect the universal serial bus interface to the universal serial bus interface of the computer, and send the computer's debug command to the electronic device through the processing unit Device. Connect the serial line debug interface of the debug device to the serial line debug slot on the chip test board, and the universal serial bus interface of the debug device is connected to the universal serial bus slot of the computer, so that the detection in the computer The error program can convert the debug instruction into a chip executable instruction format through the debug instruction conversion program stored in the memory, and then send the debug instruction to the electronic device containing the chip for the debug process. In another embodiment, the memory can also pre-store the chip's debug command or offline test command, and send it to the electronic device for the debug process.

Step S3: Disconnect the universal serial bus interface, and use the memory as an external storage device of the electronic device. When the universal serial bus interface of the debug device is disconnected from the computer, the debug device can send a support code to the chip so that the chip uses the debug device as an external storage device of the electronic device. When the chip in the electronic device performs detection When the program is wrong, each debug data or abnormal state record can be stored in the memory of the debug device, thereby increasing the data storage space, and the electronic device does not need to add additional hardware connections.

In this embodiment, the processing unit in the debug device can also share other hardware resources for use by the electronic device. For example, a counter provides a counting function, or the light-emitting diode is turned into a state in the debug program. The display lights can provide better operation efficiency of the electronic device.

The above description is only illustrative, and not restrictive. Any equivalent modifications or alterations that do not depart from the spirit and scope of the present invention shall be included in the scope of the appended patent application.

11, 21, 31: Debugging device 12: Electronic device 13, 23: Computer 24: server 111: Memory 112: Processing Unit 113, 211, 311: serial line debug interface 114, 212, 312: universal serial bus interface 115, 318: LED 116: counter 121, 221: serial line debugging interface 122, 222: chip 131, 231: Universal serial bus interface 132: Processor 133: storage device 223: test substrate 313: control board 314: Shell 315: Microprocessor 316: flash memory 317: Static random access memory S1~S3: steps

Fig. 1 is a block diagram of a debugging device according to an embodiment of the present invention. Figure 2 is a schematic diagram of the error detection device according to an embodiment of the present invention. FIG. 3 is a schematic diagram of a debugging device according to another embodiment of the present invention. FIG. 4 is a flowchart of the method of operating the error detection device according to an embodiment of the present invention.

11: Debugging device

12: Electronic device

13: Computer

111: Memory

112: Processing Unit

113: Serial line debug interface

114: Universal serial bus interface

115: LED

116: counter

121: Serial line debugging interface

122: chip

131: Universal Serial Bus Interface

132: Processor

133: storage device

Claims (12)

A debugging device for connecting an electronic device with a serial line debugging interface, the debugging device includes: A memory; A processing unit connected to the memory; A serial line debugging interface, connected to the serial line debugging interface; A universal serial bus interface. When the universal serial bus interface is connected to a computer, the processing unit transmits a debugging command of the computer to the electronic device. When the universal serial bus interface is disconnected, the memory Become an external storage device of the electronic device. In the debug device described in the first item of the scope of patent application, the memory includes flash memory or static random access memory. The error detection device described in item 1 of the scope of patent application further includes at least one of a light-emitting diode and a counter. For the debugging device described in item 1 of the scope of patent application, the stored data of one of the external storage devices includes a debugging data of the electronic device or an abnormal record. For the debug device described in item 1 of the scope of patent application, one of the stored data in the memory includes the debug command or a conversion program of the debug command. As for the debugging device described in the first item of the scope of patent application, one of the stored data of the memory includes an offline test command of the electronic device. An operating method of a debugging device, which includes the following steps: Set up a debug device, the debug device includes a memory, a processing unit, a serial line debug interface and a universal serial bus interface; Connect the serial line debug interface to a serial line debug interface of an electronic device, and connect the universal serial bus interface to a universal serial bus interface of a computer, and use the processing unit to detect one of the computers The wrong command is transmitted to the electronic device; and Disconnect the universal serial bus interface, and use the memory as an external storage device of the electronic device. According to the operating method of the debug device described in item 7 of the scope of patent application, the memory includes flash memory or static random access memory. The operating method of the debug device described in item 7 of the scope of patent application, wherein the debug device includes at least one of a light-emitting diode and a counter. Such as the operating method of the debugging device described in item 7 of the scope of patent application, wherein the external storage device stores a debugging data or an abnormality record of the electronic device. Such as the operating method of the debugging device described in item 7 of the scope of patent application, wherein the memory stores the debugging command or a conversion program of the debugging command. As for the operating method of the debug device described in item 7 of the scope of patent application, the memory stores an offline test command of the electronic device.

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