TW202121642A - 封裝器件 - Google Patents

封裝器件 Download PDF

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Publication number
TW202121642A
TW202121642A TW109141007A TW109141007A TW202121642A TW 202121642 A TW202121642 A TW 202121642A TW 109141007 A TW109141007 A TW 109141007A TW 109141007 A TW109141007 A TW 109141007A TW 202121642 A TW202121642 A TW 202121642A
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TW
Taiwan
Prior art keywords
module
package
thermal module
thermal
die
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TW109141007A
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English (en)
Inventor
余振華
劉重希
蔡豪益
郭庭豪
賴季暉
Original Assignee
台灣積體電路製造股份有限公司
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Publication of TW202121642A publication Critical patent/TW202121642A/zh

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Abstract

本公開的各種實施例涉及一種封裝器件。實施例包含第一封裝元件，第一封裝元件包含第一積體電路晶粒和至少部分地包圍第一積體電路晶粒的第一密封體。器件還包含位於第一密封體上且耦合到第一積體電路晶粒的重佈線結構。器件還包含耦合到第一積體電路晶粒的第一熱模組。器件還包含接合到第一封裝元件的第二封裝元件，第二封裝元件包含附接到第一封裝元件的電源模組，電源模組包含主動器件。器件還包含耦合到電源模組的第二熱模組。器件還包含從第二熱模組的頂部表面延伸到第一熱模組的底部表面的機械支架，機械支架物理接觸第一熱模組和第二熱模組。

Description

封裝器件
本發明實施例是有關於一種封裝器件。
半導體行業已經由於多種電子元件（例如，電晶體、二極體、電阻器、電容器等）的集成密度的持續改進而經歷快速增長。主要來說，最小特徵大小的反復減小已經帶來集成密度的改進，這允許將更多元件集成到給定區域中。隨著對縮小的電子器件的需求的增長，對半導體晶粒的更小和更有創造性的封裝技術的需求也已經出現。這些封裝系統的實例是疊層封裝（package-on-package；PoP）技術。在PoP器件中，頂部半導體封裝堆疊在底部半導體封裝的頂部上以提供高水準的集成和元件密度。PoP技術通常能夠在印刷電路板（printed circuit board；PCB）上生產功能增強和小佔據面積的半導體器件。
本申請的一些實施例提供一種封裝器件，包括：第一封裝組件，包括：第一積體電路晶粒；第一密封體，至少部分地包圍所述第一積體電路晶粒；以及重佈線結構，位於所述第一密封體上且耦合到所述第一積體電路晶粒；第一熱模組，耦合到所述第一積體電路晶粒；第二封裝元件，接合到所述第一封裝元件，所述第二封裝元件包括：電源模組，附接到所述第一封裝元件，所述電源模組包括主動器件；第二熱模組，耦合到所述電源模組；以及機械支架，從所述第二熱模組的頂部表面延伸到所述第一熱模組的底部表面，所述機械支架物理接觸所述第一熱模組和所述第二熱模組。
以下公開內容提供用於實施本發明的不同特徵的許多不同實施例或實例。下文描述元件和佈置的具體實例來簡化本公開。當然，這些元件和佈置只是實例且並不意欲為限制性的。舉例來說，在以下描述中，第一特徵在第二特徵上方或第二特徵上形成可包含第一特徵與第二特徵直接接觸地形成的實施例，且還可包含額外特徵可在第一特徵與第二特徵之間形成以使得第一特徵與第二特徵可不直接接觸的實施例。另外，本公開可在各種實例中重複圖式元件符號和/或字母。這種重複是出於簡化和清楚的目的且本身並不指示所論述的各種實施例和/或配置之間的關係。
另外，為易於描述，本文中可使用如“在……之下（beneath）”、“在……下方（below）”、“下部（lower）”、“在……之上（above）”、“上部（upper）”以及類似術語的空間相對術語來描述如各圖中所示出的一個元件或特徵與另一（一些）元件或特徵的關係。除圖中所描繪的定向以外，空間相對術語意欲涵蓋器件在使用或操作中的不同定向。裝置可以其它方式定向（旋轉90度或處於其它定向），且本文中所使用的空間相對描述詞同樣可相應地進行解釋。
雖然下文詳細描述實施例，但本文中提供本公開的一般描述。在廣義上，本文中描述的實施例提供一種封裝，其中包含壓縮部件的機械支架用於在熱管理系統中實現增強的熱介面材料（thermal interface material；TIM）壓力。舉例來說，在高功率系統中，熱冷卻要求可需要TIM上的高壓（＞30磅/平方英寸），以降低熱冷卻的熱阻。這些高功率系統可用於高效能計算（high performance computing；HPC）、邊緣計算、雲計算、資料中心、網路連接以及人工智慧中。
本文描述的實施例中的一些或全部的有利特徵可包含防止晶片孔鑽孔和擰緊製程對集成扇出型（integrated fan-out；InFO）晶片的損壞和成本，這可增加熱循環後封裝的可靠性。另外，所公開的封裝可具有與伺服器主機殼集成的熱管理系統。
圖1到圖16是根據一些實施例的在用於形成封裝的製程期間的中間步驟的橫截面視圖。圖17到圖22以及圖25到圖26是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面視圖。圖23、圖24以及圖27是根據一些實施例的封裝器件的俯視圖。
圖1到圖16是根據一些實施例的在用於形成封裝100A的製程期間的中間步驟的橫截面視圖。在圖1中，提供載體基底102，且釋放層104形成在載體基底102上。載體基底102可以是玻璃載體基底、陶瓷載體基底或類似物。載體基底102可以是晶片，使得多個封裝可同時形成在載體基底102上。
釋放層104可由聚合物類材料形成，所述材料可連同載體基底102一起從後續步驟中將形成的上覆結構中去除。在一些實施例中，釋放層104是環氧樹脂類熱釋放材料，所述材料在加熱時失去其黏合屬性，如光到熱轉換（light-to-heat-conversion；LTHC）釋放塗層。在其它實施例中，釋放層104可以是紫外線（ultra-violet；UV）膠，所述紫外線膠在暴露於UV光時失去其黏合屬性。釋放層104可以液體形式分配且固化，可以是層壓到載體基底102上的疊層膜，或可以是類似物。釋放層104的頂部表面可以是水平的且可具有高度的平面性。
在圖2中，晶粒110（有時稱為積體電路晶粒110）通過黏合劑106黏合到釋放層104。雖然六個晶粒110示出為黏合的，但應瞭解，更多或更少晶粒110可黏合到釋放層104。舉例來說，兩個或三個晶粒110可黏合到釋放層104。在一些實施例中，晶粒110是積體電路晶粒且可以是邏輯晶粒（例如，中央處理單元、微控制器等）、記憶體晶粒（例如，動態隨機存取記憶體（dynamic random access memory；DRAM）晶粒、靜態隨機存取記憶體（static random access memory；SRAM）晶粒等）、功率管理晶粒（例如，功率管理積體電路（power management integrated circuit；PMIC）晶粒）、射頻（radio frequency；RF）晶粒、感測器晶粒、微機電系統（micro-electro-mechanical-system；MEMS）晶粒、信號處理晶粒（例如，數位信號處理（digital signal processing；DSP）晶粒）、前端晶粒（例如，類比前端（analog front-end；AFE）晶粒）、類似物或其組合。在一些實施例中，晶粒110可以是被動器件，如集成被動器件（integrated passive device；IPD）或離散被動器件。此外，在一些實施例中，晶粒110可以是不同大小（例如，不同高度和/或表面面積），且在其它實施例中，晶粒110可以是相同大小（例如，相同高度和/或表面面積）。下文參考圖3更詳細地描述晶粒110。
在一些實施例中，背側重佈線結構可在黏合晶粒110之前形成在釋放層104上，使得晶粒110黏合到背側重佈線結構。在一實施例中，背側重佈線結構包含在一或多個介電層內具有一或多個金屬化圖案的那些介電層（有時稱為重佈線層或重佈線線路）。在一些實施例中，在將晶粒110黏合到介電層之前，不具有金屬化圖案的介電層形成在釋放層104上。
圖3是根據一些實施例的晶粒110中的一個。晶粒110將在後續處理中封裝以形成積體電路封裝。晶粒110可形成在晶片中，所述晶片可包含在後續步驟中單體化以形成多個主動器件晶粒的不同器件區。晶粒110可根據可適用的製造製程進行處理，以形成積體電路。舉例來說，晶粒110包含半導體基底112，如摻雜或未摻雜的矽，或絕緣體上半導體（semiconductor-on-insulator；SOI）基底的主動層。半導體基底112可包含：其它半導體材料，如鍺；化合物半導體，包含碳化矽、砷化鎵、磷化鎵、磷化銦、砷化銦和/或銻化銦；合金半導體，包含SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP和/或GaInAsP；或其組合。還可使用其它基底，如多層或梯度基底。半導體基底112具有主動表面（例如，圖3中面朝上的表面），有時稱為前側；以及非主動表面（例如，圖3中面朝下的表面），有時稱為背側。
器件114可形成在半導體基底112的前側處。器件114可以是主動器件（例如，電晶體、二極體或類似物）、電容器、電阻器或類似物。層間介電質（inter-layer dielectric；ILD）116形成在半導體基底112的前側上方。ILD 116包圍且可覆蓋器件114。ILD 116可包含由如磷矽酸鹽玻璃（phosphosilicate glass；PSG）、硼矽酸鹽玻璃（borosilicate glass；BSG）、硼摻雜磷矽酸鹽玻璃（boron-doped phosphosilicate glass；BPSG）、未摻雜矽酸鹽玻璃（undoped silicate glass；USG）或類似物的材料形成的一或多個介電層。
導電插塞118延伸穿過ILD 116從而以電氣和物理方式耦合器件114。舉例來說，當器件114是電晶體時，導電插塞118可耦合電晶體的閘極和源極/汲極區。導電插塞118可由鎢、鈷、鎳、銅、銀、金、鋁、類似物或其組合形成。包含在ILD 116和導電插塞118上方的內連線結構119。內連線結構119內連器件114，以形成積體電路。內連線結構119可通過例如ILD 116上的介電層中的金屬化圖案來形成。金屬化圖案包含形成在一或多個低k介電層中的金屬線和通孔。內連線結構119的金屬化圖案通過導電插塞118電耦合到器件114。
晶粒110更包含與其形成外部連接的接墊120，如鋁接墊。接墊120在晶粒110的主動側上，如在內連線結構119中和/或上。一或多個鈍化膜122在晶粒110上，如在內連線結構119和接墊120的部分上。開口穿過鈍化膜122延伸到接墊120。如導電柱（例如，由如銅的金屬形成）的晶粒連接件124，延伸穿過鈍化膜122中的開口，且以物理和電氣方式耦合到接墊120的相應者。晶粒連接件124可通過例如鍍覆或類似方法形成。晶粒連接件124電耦合晶粒110的相應積體電路。
任選地，焊料區（例如，焊料球或焊料凸塊）可安置在接墊120上。焊料球可用於對晶粒110執行晶片探針（chip probe；CP）測試。可對晶粒110執行CP測試以確定晶粒110是否是已知良好晶粒（known good die；KGD）。因此，僅封裝經歷後續處理的作為KGD的晶粒110，且不封裝未通過CP測試的晶粒。在測試之後，可在後續處理步驟中去除焊料區。
介電層126可在晶粒110的前側上，如在鈍化膜122和晶粒連接件124上。介電層126橫向密封晶粒連接件124，且介電層126與晶粒110橫向相連。首先，介電層126可掩埋晶粒連接件124，使得介電層126的最頂部表面在晶粒連接件124的最頂部表面之上。在其中焊料區安置在晶粒連接件124上的一些實施例中，介電層126也可掩埋焊料區。可替代地，可在形成介電層126之前去除焊料區。
介電層126可以是聚合物，如聚苯並惡唑（polybenzoxazole；PBO）、聚醯亞胺、苯環丁烷（benzocyclobutene；BCB）或類似物；氮化物，如氮化矽或類似物；氧化物，如氧化矽、磷矽酸鹽玻璃（PSG）、硼矽酸鹽玻璃（BSG）、硼摻雜磷矽酸鹽玻璃（BPSG）或類似物；類似物；或其組合。介電層126可例如通過旋轉塗布、疊層、化學氣相沉積（chemical vapor deposition；CVD）或類似操作而形成。在一些實施例中，在晶粒110的形成期間，晶粒連接件124通過介電層126暴露。在一些實施例中，晶粒連接件124保持掩埋，且在用於封裝晶粒110的後續製程期間暴露。暴露晶粒連接件124可去除晶粒連接件124上可存在的任何焊料區。
在一些實施例中，晶粒110是包含多個半導體基底112的堆疊器件。舉例來說，晶粒110可以是包含多個記憶體晶粒的記憶體器件，如混合記憶體立方體（hybrid memory cube；HMC）模組、高頻寬記憶體（high bandwidth memory；HBM）模組或類似物。在這類實施例中，晶粒110包含通過基底穿孔（through-substrate via；TSV）內連的多個半導體基底112。半導體基底112中的每一個可具有內連線結構119。
黏合劑106在晶粒110的背側上，且將晶粒110黏合到釋放層104。黏合劑106可以是任何合適的黏合劑、環氧樹脂、晶粒貼合膜（die attach film；DAF）或類似物。黏合劑106可塗覆到積體電路晶粒110的背側，如相應半導體晶片的背側，或可塗覆在載體基底100的表面上方。晶粒110可如通過鋸切或切割而單體化，且通過黏合劑106使用例如拾放工具黏合到釋放層104。
在圖4中，密封體130形成在晶粒110上和周圍。在形成之後，密封體130密封晶粒110。密封體130可以是模制化合物、環氧樹脂或類似物。密封體130可通過壓縮模制、轉移模制或類似方法來塗覆，且可形成在載體基底102上方，使得晶粒110被掩埋或覆蓋。密封體130進一步形成在晶粒110之間的間隙區中。密封體130可以液體或半液體形式塗覆且隨後固化。
另外，在圖4中，對密封體130執行平坦化製程以暴露晶粒連接件124和介電層126。平坦化製程還可去除介電層126和/或晶粒連接件124的材料，直到暴露晶粒連接件124。在平坦化製程之後，晶粒連接件124、介電層126以及密封體130的頂部表面可彼此齊平（例如，共面）。平坦化製程可以是例如化學機械拋光（chemical-mechanical polish；CMP）製程、研磨製程、回蝕製程或類似製程。在一些實施例中，例如，如果晶粒連接件124已經暴露，那麼可省略平坦化製程。
在圖5到圖14中，具有精細特徵部分152和粗糙特徵部分154的重佈線結構156（參見圖14）形成在密封體130和晶粒110上方。重佈線結構156包含金屬化圖案、介電層以及凸塊下金屬（under-bump metallurgy；UBM）。金屬化圖案也可稱為重佈線層或重佈線線路。將重佈線結構156繪示為具有四層金屬化圖案的實例。更多或更少介電層和金屬化圖案可形成在重佈線結構156中。如果將形成較少介電層和金屬化圖案，那麼可省略下文論述的步驟和製程。如果將形成較多介電層和金屬化圖案，那麼可重複下文論述的步驟和製程。重佈線結構156的精細特徵部分152和粗糙特徵部分154包含不同大小的金屬化圖案和介電層。
圖5到圖8是形成重佈線結構156的精細特徵部分152的實例。在圖5中，介電層132沉積在密封體130、介電層126以及晶粒連接件124上。在一些實施例中，介電層132由可使用微影罩幕來圖案化的感光性材料形成，所述感光性材料如PBO、聚醯亞胺、BCB或類似物。介電層132可通過旋轉塗布、疊層、CVD、類似方法或其組合來形成。
在圖6中，隨後對介電層132進行圖案化且形成金屬化圖案134。所述圖案化形成暴露晶粒連接件124的部分的開口。圖案化可通過可接受的製程來進行，如在介電層132是感光性材料時通過曝光介電層132，或通過使用例如各向異性蝕刻進行蝕刻。如果介電層132是感光性材料，那麼可在曝光之後使介電層132顯影。
隨後，形成金屬化圖案134。金屬化圖案134具有在介電層132的主表面上且沿著所述主表面延伸的線部分（也稱為導電線或跡線），且具有延伸穿過介電層132從而以物理和電氣方式耦合積體電路晶粒405的晶粒連接件124的通孔部分（也稱為導通孔）。作為實例，金屬化圖案134可通過在介電層132上方和在延伸穿過介電層132的開口中形成晶種層來形成。在一些實施例中，晶種層是金屬層，所述金屬層可以是單層或包括由不同材料形成的多個子層的複合層。在一些實施例中，晶種層包括鈦層和位於鈦層上方的銅層。晶種層可使用例如物理氣相沉積（physical vapor deposition；PVD）或類似操作而形成。隨後在晶種層上形成光阻並圖案化光阻。光阻可通過旋轉塗布或類似操作而形成，且可曝光以進行圖案化。光阻的圖案對應於金屬化圖案134。圖案化形成穿過光阻的開口以暴露晶種層。導電材料隨後形成在光阻的開口中和晶種層的暴露部分上。導電材料可通過鍍覆（如電鍍或無電極鍍覆）或類似方法形成。導電材料可包括金屬，如銅、鈦、鎢、鋁或類似物。晶種層的導電材料與下伏部分的組合形成金屬化圖案134。去除光阻和晶種層上未形成導電材料的部分。光阻可通過可接受的灰化或剝離製程去除，如使用氧等離子或類似物。一旦將光阻去除，那麼使用如濕式或乾式蝕刻的可接受蝕刻製程來去除晶種層的暴露部分。
在圖7中，介電層136隨後沉積在金屬化圖案134和介電層132上。介電層136可以類似於介電層132的方式形成，且可由與介電層132的材料類似的材料形成。
在圖8中，隨後對介電層132進行圖案化且形成金屬化圖案138。圖案化形成暴露金屬化圖案134的部分的開口。圖案化可通過可接受的製程來進行，如在介電層136是感光性材料時通過曝光介電層136，或通過使用例如各向異性蝕刻進行蝕刻。如果介電層136是感光性材料，那麼可在曝光之後使介電層136顯影。
隨後，形成金屬化圖案138。金屬化圖案138具有在介電層136的主表面上和沿著所述主表面延伸的線部分，且具有延伸穿過介電層136從而以物理和電氣方式耦合金屬化圖案134的通孔部分。金屬化圖案138可以類似於金屬化圖案134的方式形成，且可由與金屬化圖案134的材料類似的材料形成。雖然精細特徵部分152示出為包含兩個介電層和兩個金屬化圖案，但任何數量的介電層和金屬化圖案可形成在精細特徵部分152中。
重佈線結構156的精細特徵部分152包含介電層132和介電層136；以及金屬化圖案134和金屬化圖案138。在一些實施例中，介電層132和介電層136由相同介電材料形成，且形成為相同的厚度。類似地，在一些實施例中，金屬化圖案134和金屬化圖案138的導電特徵由相同導電材料形成，且形成為相同的厚度。確切地說，介電層132和介電層136具有小的第一厚度T1 ，如在約5微米到約40微米的範圍內，且金屬化圖案134和金屬化圖案138的導電特徵具有小的第二厚度T2 ，如在約1微米到約25微米的範圍內。
圖9到圖14是形成重佈線結構156的粗糙特徵部分154的實例。在圖9中，介電層140可沉積在金屬化圖案138和介電層136上。介電層140可以類似於介電層132的方式形成，且可由與介電層132的材料類似的材料形成。
在圖10中，介電層140可進行圖案化且隨後形成金屬化圖案142。金屬化圖案142具有在介電層140的主表面上和沿著所述主表面延伸的線部分，且具有延伸穿過介電層140從而以物理和電氣方式耦合金屬化圖案138的通孔部分。金屬化圖案142可以類似於金屬化圖案134的方式形成，且可由與金屬化圖案134的材料類似的材料形成。
在圖11中，介電層144隨後沉積在金屬化圖案142和介電層140上。介電層144可以類似於介電層132的方式形成，且可由與介電層132的材料類似的材料形成。
在圖12中，對介電層144進行圖案化且隨後形成金屬化圖案146。介電層144可以類似於介電層132的方式進行圖案化。金屬化圖案146具有在介電層144的主表面上和沿著所述主表面延伸的線部分，且具有延伸穿過介電層144從而以物理和電氣方式耦合金屬化圖案142的通孔部分。金屬化圖案146可以類似於金屬化圖案134的方式形成，且可由與金屬化圖案134的材料類似的材料形成。
在圖13中，介電層148隨後沉積在金屬化圖案146和介電層144上。介電層148可以類似於介電層132的方式形成，且可由與介電層132的材料類似的材料形成。雖然粗糙特徵部分154示出為包含三個介電層和兩個金屬化圖案，但任何數量的介電層和金屬化圖案可形成在粗糙特徵部分154中。在一些實施例中，精細特徵部分152和粗糙特徵部分154可各自包含3個介電層和3個金屬化圖案。
重佈線結構156的粗糙特徵部分154包含介電層140、介電層144以及介電層148；以及金屬化圖案142和金屬化圖案146。在一些實施例中，介電層140、介電層144以及介電層148由相同介電材料形成，且形成為相同的厚度。類似地，在一些實施例中，金屬化圖案142和金屬化圖案146的導電特徵由相同導電材料形成，且形成為相同的厚度。確切地說，介電層140、介電層144以及介電層148具有大的第三厚度T3 ，如在約5微米到約40微米的範圍內，且金屬化圖案142和金屬化圖案146的導電特徵具有大的第四厚度T4 ，如在約1微米到約25微米的範圍內。在各種實施例中，第三厚度T3 可大於第一厚度T1 （參見圖8），且第四厚度T4 可大於第二厚度T2 （參見圖8）。
由於包含在粗糙特徵部分154和精細特徵部分152中的金屬化圖案的厚度，粗糙特徵部分154與精細特徵部分152相比可具有更低的電阻。由於電阻較低，粗糙特徵部分154可用於佈線電源線。精細特徵部分152可用於佈線不需要較低電阻的信號線。包含粗糙特徵部分154和精細特徵部分152兩者允許電源線和信號線被佈線，同時使重佈線結構156的厚度最小化。
在圖14中，接墊150形成在介電層148上和介電層148到金屬化圖案146的開口中。接墊150用以耦合到導電連接件174，且可稱為凸塊下金屬（UBM）150。形成UBM 150以用於與重佈線結構156的外部連接。UBM 150具有在介電層148的主表面上且沿著所述主表面延伸的凸塊部分，且具有延伸穿過介電層148從而以物理和電氣方式耦合金屬化圖案146的通孔部分。因此，UBM 150電耦合到積體電路晶粒405。在一些實施例中，UBM 150具有與金屬化圖案134、金屬化圖案138、金屬化圖案142以及金屬化圖案146不同的大小。
作為實例，UBM 150可通過首先在介電層148上方和延伸穿過介電層148的開口中形成晶種層來形成。在一些實施例中，晶種層是金屬層，所述金屬層可以是單層或包括由不同材料形成的多個子層的複合層。在一些實施例中，晶種層包括鈦層和位於鈦層上方的銅層。晶種層可使用例如PVD或類似方法來形成。隨後在晶種層上形成光阻並圖案化光阻。光阻可通過旋轉塗布或類似操作而形成，且可曝光以進行圖案化。光阻的圖案對應於UBM 150。圖案化形成穿過光阻的開口以暴露晶種層。導電材料隨後形成在光阻的開口中和晶種層的暴露部分上。導電材料可通過鍍覆（如電鍍或無電極鍍覆）或類似方法形成。導電材料可包括如銅、鈦、鎢、鋁或類似物的金屬。在一些實施例中，UBM 150可包括合金，如無電鍍鎳鈀浸金（electroless nickel, electroless palladium, immersion gold；ENEPIG）、無電鍍鎳浸金（electroless nickel, immersion gold；ENIG）或類似物。晶種層的導電材料與下伏部分的組合形成UBM 150。去除光阻和晶種層上未形成導電材料的部分。光阻可通過可接受的灰化或剝離製程去除，如使用氧等離子或類似物。一旦將光阻去除，那麼使用如濕式或乾式蝕刻的可接受蝕刻製程來去除晶種層的暴露部分。
在圖15中，翻轉圖13的結構，放置在載帶160上，且載體基底102從封裝結構的背側（例如，晶粒110和密封體130的背側）剝離。根據一些實施例，剝離包含在釋放層104上投射光（如雷射或UV光），使得釋放層104在光的熱量下分解，且可去除載體基底102。隨後，將結構翻轉且放置在載帶160上（參見圖16）。
在圖16中，導電連接件162形成在UBM 150上，形成封裝100A。導電連接件162可以是球柵陣列封裝（ball grid array；BGA）連接件、焊料球、金屬柱、受控塌陷晶片連接（C4）凸塊、微凸塊、無電鍍鎳鈀浸金技術（ENEPIG）形成的凸塊、無電鍍鎳浸金技術（ENIG）形成凸塊或類似物。導電連接件162可包含導電材料，如焊料、銅、鋁、金、鎳、銀、鈀、錫、類似物或其組合。在一些實施例中，導電連接件162首先通過經由蒸鍍、電鍍、印刷、焊料轉移、植球或類似方法形成焊料或焊膏層來形成。一旦已在結構上形成焊料層，便可執行回焊以便使材料成形為期望凸塊形狀。
圖17到圖19是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面視圖。
在圖17中，將包含模組170（170A和170B）的封裝100B接合到封裝100A，且將外部連接件180接合到封裝100A。模組170可以是供電模組、記憶體模組、電壓調節器模組、集成被動器件（IPD）模組、類似物或其組合。模組170可稱為電源模組170。在一些實施例中，模組170可包含倒裝晶片接合、線接合或類似物。模組170可以是晶片級封裝（chip-scale package；CSP）、多晶片模組（multi-chip module；MCM）或類似物。根據一些實施例，模組170可以是包含離散積體電路和被動器件的封裝電路板（packaged circuit board；PCB）模組。在一些實施例中，模組170可以類似於上文所描述的晶粒110的方式形成。
如圖17中所示出，模組170可包含耦合到導電連接件174的接墊172。接墊172可以類似於接墊150的方式形成，且可由與接墊150的材料類似的材料形成。模組170可使用拾放機器或類似物來放置。一旦放置模組170，那麼可回焊導電連接件174以將模組170接合到封裝100A。
可形成底填充料176以填充模組170與封裝100A之間的空隙。底填充料176可在附接模組170之後通過毛細流動製程形成，或可在附接模組170之前通過合適的沉積方法形成。
在各種實施例中，封裝100A可以是具有10,000平方毫米或大於10,000平方毫米的超大扇出型晶片級封裝。封裝100B的模組170A和模組170B可使用拾放機器或類似物放置在封裝100A上方。一旦放置模組170A和模組170B，那麼可回焊導電連接件174以將封裝100B接合到封裝100A。雖然圖17示出封裝100B中的兩個模組170（170A和170B），但封裝100B可包含更多或更少的模組170。舉例來說，封裝100B可包含四個模組170。
另外，外部連接件180附接到封裝100A。外部連接件180可以是封裝100A到其它封裝100A、其它外部系統或類似物的電氣和物理介面。舉例來說，當封裝100A作為如資料中心的較大外部系統的部分安裝時，外部連接件180可用於將封裝100A耦合到外部系統。外部連接件180的實例包含大的線接合、帶狀電纜的接收器、柔性印刷電路或類似物。外部連接件180包含可類似於UBM 150的接墊182。外部連接件180可包含如主機殼、接墊182以及外部連接引腳的不同元件，所述元件可包括不同材料。接墊182和導電連接件174用於與封裝100A的物理和電氣連接。附接外部連接件180可包含使用拾放機器或類似物將外部連接件180放置在封裝100A上，且隨後回焊導電連接件174從而以物理和電氣方式耦合接墊182和UBM 150。
在圖18中，熱模組192附接到封裝100B，且熱模組196附接到封裝100A。熱模組192附接到模組170A和模組170B，且熱模組196附接到晶粒110的背側。熱模組192和熱模組196可以是散熱片、散熱器、冷板、類似物或其組合。
在將熱模組192附接到封裝100B之前，熱介面材料（TIM）190可分配在模組170的背側上，從而將熱模組192以物理和熱方式耦合到封裝100B。在將熱模組196附接到封裝100A之前，熱介面材料（TIM）194可分配在封裝100A的背側上，從而將熱模組196以物理和熱方式耦合到封裝100A。在一些實施例中，TIM 190和TIM 194由包括銦、熱油脂、熱薄片、相變材料、其組合或類似物的膜形成。
在圖19中，安裝機械支架200以將熱模組192和熱模組196分別固定到封裝100B和封裝100A。機械支架200物理嚙合熱模組192和熱模組196的部分。使用機械支架200將熱模組192和熱模組196夾持到封裝100B和封裝100A可減少封裝100B和封裝100A中的任何翹曲。在一些實施例中，機械支架200的主體202具有從主體202的最底部表面到主體202的最頂部表面的高度H1。在一些實施例中，高度H1在10毫米（mm）到約100毫米的範圍內，如約15毫米。
機械支架200包含主體202和緊固件204（有時稱為壓縮部件204）。在圖19的實施例中，機械支架200包含直接與熱模組192和熱模組196兩者嚙合的緊固件204。機械支架的主體202是硬質支撐件，所述硬質支撐件可由具有高硬度的材料形成，如可包含鋼、鈦、鈷或類似物的金屬。緊固件204包含主體204A和接墊204B。緊固件204的主體204A與機械支架200的主體202嚙合，以允許緊固件204的接墊204B將壓力施加到相應熱模組。在一些實施例中，緊固件204的主體204A是螺紋螺栓，以與機械支架200的主體202中的螺紋孔嚙合。在一些實施例中，主體204A通過棘輪機構與主體202嚙合。在其它實施例中，主體204A可以允許接墊204B將壓力施加到相應熱模組的任何方式與主體202嚙合。
在機械支架200首先與熱模組192和熱模組196嚙合之後，擰緊緊固件204，從而增加由熱模組192和熱模組196施加到封裝100A和封裝100B的機械力。擰緊緊固件204，直到熱模組192和熱模組196對TIM 190和TIM 194施加期望量的壓力。在一些實施例中，TIM 190和TIM 194上的期望量的壓力大於30磅/平方英寸（psi）。在一些實施例中，TIM 190和TIM 194上的期望量的壓力是從約30磅/平方英寸到約80磅/平方英寸，如約40磅/平方英寸。
圖20是根據一些實施例的另一封裝器件的橫截面視圖。圖20中的實施例類似於圖1到圖19中所示出的實施例，不同之處在於這一實施例不包含封裝器件的底部上的緊固件204。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。
在這一實施例中，機械支架200的主體202直接接觸熱模組196，而主體202與熱模組196之間沒有任何緊固件。在其它實施例中，機械支架200可具有與熱模組196嚙合的緊固件204，且可省略與熱模組192嚙合的緊固件204。在一些實施例中，器件可包含與封裝器件的頂部、封裝器件的底部、封裝器件的側壁或其組合嚙合的緊固件204。
圖21是根據一些實施例的另一封裝器件的橫截面視圖。圖21中的實施例類似於圖21中所示出的實施例，不同之處在於這一實施例包含與熱模組196的側壁嚙合的緊固件204。在這一實施例中，機械支架200的緊固件204直接接觸熱模組196的側壁。在一些實施例中，器件可包含與封裝器件的頂部、封裝器件的底部、封裝器件的側壁或其組合嚙合的緊固件204。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。
圖22是根據一些實施例的另一封裝器件的橫截面視圖。圖20中的實施例類似於圖1到圖19中所示出的實施例，不同之處在於，在這一實施例中，機械支架的主體集成到系統的殼體210中。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。
在這一實施例中，殼體210充當機械支架200的主體。在一些實施例中，殼體210可以是伺服器主機殼、伺服器機架、類似物或其組合。在一些實施例中，器件可包含與封裝器件的頂部、封裝器件的底部、封裝器件的側壁或其組合嚙合的緊固件204。
圖23是根據一些實施例的封裝器件的俯視圖。俯視圖可適用於上文所描述的圖19到圖22中的實施例中的任一個。在圖23中，封裝100A和封裝100B以及熱模組192和熱模組196在俯視圖中具有圓形形狀。在其它實施例中，這些結構在俯視圖中可具有任何形狀，如正方形、矩形、三角形、其它多邊形或類似物（參見例如圖24）。
圖23是在封裝器件的頂部（即，具有熱模組192的側面）上具有三個臂的機械支架200。機械支架200可在封裝器件的底部（即，具有熱模組196的側面）上具有相同數量的臂。在一些實施例中，機械支架200可具有更多或更少臂。舉例來說，機械支架200可在封裝器件的頂部和底部中的每一個上具有2個到64個臂，如在頂部或底部中的每一個上具有3個臂或8個臂。
熱模組192具有直徑D1 。封裝100B具有直徑D2 。熱模組196具有直徑D3 。機械支架的臂具有長度L1 。緊固件204與熱模組192/熱模組196的接觸面積是A1 。在一些實施例中，直徑D2 大於或等於直徑D1 。在一些實施例中，直徑D2 小於或等於直徑D3 。在一些實施例中，長度L1 在約
Figure 02_image001
D3 到約
Figure 02_image003
D3 的範圍內。在一些實施例中，接觸面積A1 在相應熱模組192/熱模組196的面積的約
Figure 02_image005
到約
Figure 02_image007
的範圍內。
圖24是根據一些實施例的封裝器件的俯視圖。俯視圖可適用於上文所描述的圖19到圖22中的實施例中的任一個。圖24中的實施例類似於圖23中所示出的實施例，不同之處在於，在這一實施例中，封裝100A和封裝100B以及熱模組192和熱模組196在俯視圖中具有正方形和/或矩形形狀。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。
圖25到圖27是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面圖和俯視圖。圖23到圖27中的實施例類似於圖1到圖24中所示出的實施例，不同之處在於，這一實施例包含延伸穿過封裝100A和封裝100B的螺栓230A。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。
圖25是類似於上文圖25中所描述的處理的中間階段，且本文中不重述形成處理的這一中間階段的描述。在圖25中，在剝離載體基底102之後，穿過封裝100C形成孔222，以允許螺栓230A延伸穿過封裝100C。
孔222可通過鑽孔製程220（如雷射鑽孔、機械鑽孔或類似製程）形成。孔222可通過以下形成：用鑽孔製程鑽出孔222的輪廓，並隨後去除由輪廓分離的材料。
圖26是類似於上文圖19和圖20中所描述的處理的中間階段，且本文中不重述形成處理的這一中間階段的描述。在圖26中，螺栓230A延伸穿過封裝100C和封裝100B，且緊固件230B緊固到螺栓230A的末端。緊固件230B與螺栓230A嚙合，且物理接觸熱模組192和熱模組196以將壓力施加到熱模組192/熱模組196以及TIM 190和TIM 194。在一些實施例中，緊固件230B旋擰到螺栓230A上。在一些實施例中，緊固件230B通過棘輪機構與螺栓230A嚙合。在其它實施例中，緊固件230B可以允許緊固件230B將壓力施加到相應熱模組的任何方式與螺栓230A嚙合。雖然示出一個螺栓230A，但在封裝器件中可存在1到約5個螺栓。
圖27是根據一些實施例的圖26中的封裝器件的俯視圖。圖27中的實施例類似於圖23中所示出的實施例，不同之處在於，在這一實施例中，封裝器件包含螺栓230A和緊固件230B。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。
距離D4 是從封裝100C的外邊緣到螺栓230A的中心的距離。距離D5 是鄰近螺栓230A的中心之間的距離。在一些實施例中，距離D4 在約
Figure 02_image007
D2 到約
Figure 02_image009
D2 的範圍內。在一些實施例中，距離D5 在約0.5毫米到約
Figure 02_image009
D2 的範圍內。
圖28是根據一些實施例的封裝器件的橫截面視圖。圖28中的實施例類似於圖1到圖27中所示出的實施例，不同之處在於，在這一實施例中，熱模組192具有比熱模組196更大的直徑。本文中將不重述類似於用於先前描述的實施例的細節的關於這一實施例的細節。這一實施例中的熱模組192和熱模組196的配置可應用於先前所公開實施例中的任一個。
在圖28中，熱模組192具有比熱模組196更大的直徑。如圖28中所示出，熱模組192附接到封裝100B和外部連接件180。在一些實施例中，熱模組192僅附接到封裝100B。類似於先前實施例，熱模組196附接到封裝100A。
本文中所公開的實施例可達成優勢。舉例來說，本文中描述的實施例中的一些或全部可允許增強的TIM壓力，同時還防止晶片孔鑽孔和擰緊製程對集成扇出型（InFO）晶片的損壞和成本。這一優勢組合可提高熱循環後封裝的可靠性。另外，所公開的封裝可具有與伺服器主機殼集成的熱管理系統，這可降低整個系統的成本和大小。
一個實施例包含第一封裝元件，所述第一封裝組件包含第一積體電路晶粒。器件還包含至少部分地包圍第一積體電路晶粒的第一密封體。器件還包含位於第一密封體上且耦合到第一積體電路晶粒的重佈線結構。器件還包含耦合到第一積體電路晶粒的第一熱模組。器件還包含接合到第一封裝元件的第二封裝元件，第二封裝元件包含附接到第一封裝元件的電源模組，電源模組包含主動器件。器件還包含耦合到電源模組的第二熱模組。器件還包含從第二熱模組的頂部表面延伸到第一熱模組的底部表面的機械支架，機械支架物理接觸第一熱模組和第二熱模組。
實施方案可包含以下特徵中的一或多個。機械支架包含：主體；第一壓縮部件，延伸穿過主體且物理接觸第一熱模組；以及第二壓縮部件，延伸穿過主體且物理接觸第二熱模組。機械支架的主體鄰近第一封裝元件和第二封裝元件的相對側延伸。機械支架的主體集成到系統殼體中。器件更包含安置在第一熱模組與第一積體電路晶粒之間的第一熱介面材料，和安置在第二熱模組與電源模組之間的第二熱介面材料。機械支架配置成將大於30磅/平方英寸的壓力施加到第一熱介面材料。電源模組包含供電模組、記憶體模組、電壓調節器模組、集成被動器件（IPD）模組或其組合。第一熱模組包含散熱片、散熱器、冷板或其組合。器件更包含：第一螺栓，延伸穿過第一封裝元件和第二封裝元件；第一緊固件，旋擰到第一螺栓的第一端上，第一緊固件物理接觸第一熱模組；以及第二緊固件，旋擰到第一螺栓的第二端上，第二緊固件物理接觸第二熱模組。第二距離在
Figure 02_image007
第一直徑到
Figure 02_image003
第一直徑的範圍內。
根據本發明的一些實施例，其中所述機械支架包括：主體；第一壓縮部件，延伸穿過所述主體且物理接觸所述第一熱模組；以及第二壓縮部件，延伸穿過所述主體且物理接觸所述第二熱模組。
根據本發明的一些實施例，其中所述機械支架的所述主體鄰近所述第一封裝元件和所述第二封裝元件的相對側延伸。
根據本發明的一些實施例，其中所述機械支架的所述主體集成到系統殼體中。
根據本發明的一些實施例，所述的封裝器件，更包括：第一熱介面材料，安置在所述第一熱模組與所述第一積體電路晶粒之間；以及第二熱介面材料，安置在所述第二熱模組與所述電源模組之間。
根據本發明的一些實施例，其中所述機械支架配置成將大於30磅/平方英寸的壓力施加到所述第一熱介面材料。
根據本發明的一些實施例，其中所述電源模組包括供電模組、記憶體模組、電壓調節器模組、集成被動器件（IPD）模組或其組合。
根據本發明的一些實施例，其中所述第一熱模組包括散熱片、散熱器、冷板或其組合。
根據本發明的一些實施例，所述的封裝器件，更包括：第一螺栓，延伸穿過所述第一封裝元件和所述第二封裝元件；第一緊固件，旋擰到所述第一螺栓的第一端上，所述第一緊固件物理接觸所述第一熱模組；以及第二緊固件，旋擰到所述第一螺栓的第二端上，所述第二緊固件物理接觸所述第二熱模組。
根據本發明的一些實施例，所述的封裝器件，更包括：第二螺栓，延伸穿過所述第一封裝元件和所述第二封裝元件，所述第二螺栓的中心與所述第一螺栓的中心間隔開第一距離，所述第一螺栓的所述中心與所述第二封裝元件的外邊緣間隔開第二距離，所述第二封裝元件具有第一直徑，所述第一距離在所述0.5毫米到第一直徑的½的範圍內，其中所述第二距離在所述第一直徑的
Figure 02_image007
到所述第一直徑的
Figure 02_image003
的範圍內。
一個實施例包含第一封裝，所述第一封裝包含多個積體電路晶粒。器件還包含位於第一封裝上方且接合到所述第一封裝的第一電源模組和第二電源模組。器件還包含位於第一封裝的多個積體電路晶粒下方且耦合到第一封裝的多個積體電路晶粒的第一熱介面材料（TIM）。器件還包含位於第一TIM下方且耦合到第一TIM的第一熱模組。器件還包含位於第一電源模組和第二電源模組上方且耦合到第一電源模組和第二電源模組的第二TIM。器件還包含位於第二TIM上方且耦合到第二TIM的第二熱模組。器件還包含機械支架，機械支架包含主體、第一緊固件以及第二緊固件，主體包含延伸到第一熱模組下方的第一部分、沿著第一封裝的一側延伸的第二部分以及在第二熱模組上方延伸的第三部分，第一部分、第二部分以及第三部分為連續的，第一緊固件延伸穿過機械支架的主體的第一部分且耦合到第一熱模組，第二緊固件延伸穿過機械支架的主體的第三部分且耦合到第二熱模組。
實施方案可包含以下特徵中的一或多個。第一緊固件旋擰穿過機械支架的主體的第一部分。機械支架的第一緊固件、第二緊固件以及主體配置成將大於30磅/平方英寸的壓力施加到第一TIM和第二TIM。第一封裝在俯視圖中具有圓形形狀。第一熱介面材料包含膜，所述膜包含銦、熱油脂、熱薄片、相變材料或其組合。第一封裝更包含：第一密封體，至少部分地包圍多個積體電路晶粒；以及重佈線結構，位於第一密封體上且耦合到多個積體電路晶粒，第一電源模組和第二電源模組接合到重佈線結構。
一個實施例包含一種封裝器件，包括：第一封裝，包括多個積體電路晶粒；第一電源模組和第二電源模組，位於所述第一封裝上方且接合到所述第一封裝；第一熱介面材料（TIM），位於所述第一封裝的所述多個積體電路晶粒下方且耦合到所述第一封裝的所述多個積體電路晶粒；第一熱模組，位於所述第一熱介面材料下方且耦合到所述第一熱介面材料；第二熱介面材料，位於所述第一電源模組和所述第二電源模組上方且耦合到所述第一電源模組和所述第二電源模組；第二熱模組，位於所述第二熱介面材料上方且耦合到所述第二熱介面材料；以及機械支架，包括主體、第一緊固件以及第二緊固件，所述主體包括延伸到所述第一熱模組下方的第一部分、沿著所述第一封裝的一側延伸的第二部分以及在所述第二熱模組上方延伸的第三部分，所述第一部分、所述第二部分以及所述第三部分為連續的，所述第一緊固件延伸穿過所述機械支架的所述主體的所述第一部分且耦合到所述第一熱模組，所述第二緊固件延伸穿過所述機械支架的所述主體的所述第三部分且耦合到所述第二熱模組。
根據本發明的一些實施例，其中所述第一緊固件旋擰穿過所述機械支架的所述主體的所述第一部分。
根據本發明的一些實施例，其中所述機械支架的所述第一緊固件、所述第二緊固件以及所述主體配置成將大於30磅/平方英寸的壓力施加到所述第一熱介面材料和所述第二熱介面材料。
根據本發明的一些實施例，其中所述第一封裝在俯視圖中具有圓形形狀。
根據本發明的一些實施例，其中所述第一熱介面材料包括膜，所述膜包括銦、熱油脂、熱薄片、相變材料或其組合。
根據本發明的一些實施例，其中所述第一封裝更包括：第一密封體，至少部分地包圍所述多個積體電路晶粒；以及重佈線結構，位於所述第一密封體上且耦合到所述多個積體電路晶粒，所述第一電源模組和所述第二電源模組接合到所述重佈線結構。
一個實施例包含形成第一封裝元件，其中形成第一封裝組件包含用密封體密封第一積體電路晶粒。方法還包含在密封體和第一積體電路晶粒的主動側上形成重佈線結構。方法還包含將電源模組接合到第一封裝元件的重佈線結構，電源模組包含主動器件。方法還包含在第一積體電路晶粒的背側上和密封體的表面上形成第一熱介面材料（TIM）。方法還包含附接耦合到第一TIM的第一熱模組。方法還包含在電源模組的背側上形成第二TIM。方法還包含將第二熱模組附接到第二TIM。方法還包含將機械支架附接到第一熱模組和第二熱模組，機械支架包含壓縮部件和主體，機械支架的主體從第二熱模組的頂部表面延伸到第一熱模組的底部表面，機械支架物理接觸第一熱模組和第二熱模組。方法還包含調整機械支架的壓縮部件以增加第一TIM和第二TIM上的壓力。
實施方案可包含以下特徵中的一或多個。調整機械支架的壓縮部件以將大於30磅/平方英寸的壓力施加到第一TIM和第二TIM。方法更包含：形成穿過第一封裝組件的孔；穿過第一封裝元件且鄰近電源模組安置螺栓；將第一緊固件附接到螺栓的第一端上，第一緊固件物理接觸第一熱模組；以及將第二緊固件附接到螺栓的第二端上，第二緊固件物理接觸第二熱模組。機械支架的主體集成到系統殼體中。
一個實施例包含一種形成封裝器件的方法，包括：形成第一封裝組件，其中形成所述第一封裝組件包括：用密封體密封第一積體電路晶粒；以及在所述密封體和所述第一積體電路晶粒的主動側上形成重佈線結構；將電源模組接合到所述第一封裝元件的所述重佈線結構，所述電源模組包括主動器件；在所述第一積體電路晶粒的背側上和所述密封體的表面上形成第一熱介面材料（TIM）；附接耦合到所述第一熱介面材料的第一熱模組；在所述電源模組的背側上形成第二熱介面材料；將第二熱模組附接到所述第二熱介面材料；將機械支架附接到所述第一熱模組和所述第二熱模組，所述機械支架包括壓縮部件和主體，所述機械支架的所述主體從所述第二熱模組的頂部表面延伸到所述第一熱模組的底部表面，所述機械支架物理接觸所述第一熱模組和所述第二熱模組；以及調整所述機械支架的所述壓縮部件以增加所述第一熱介面材料和所述第二熱介面材料上的壓力。
根據本發明的一些實施例，其中調整所述機械支架的所述壓縮部件以將大於30磅/平方英寸的壓力施加到所述第一熱介面材料和所述第二熱介面材料。
根據本發明的一些實施例，所述的方法，更包括：形成穿過所述第一封裝組件的孔；穿過所述第一封裝元件且鄰近所述電源模組安置螺栓；將第一緊固件附接到所述螺栓的第一端上，所述第一緊固件物理接觸所述第一熱模組；以及將第二緊固件附接到所述螺栓的第二端上，所述第二緊固件物理接觸所述第二熱模組。
根據本發明的一些實施例，其中所述機械支架的所述主體集成到系統殼體中。
還可包含其它特徵和製程。舉例來說，可包含測試結構以輔助對3D封裝或3DIC器件的校驗測試。測試結構可包含例如形成在重佈線層中或基底上的測試接墊，所述基底允許對3D封裝或3DIC的測試、對探針和/或探針卡的使用以及類似操作。可對中間結構以及最終結構進行校驗測試。此外，本文中所公開的結構和方法可與並有已知良好晶粒的中間校驗的測試方法結合使用以增大良率且降低成本。
前文概述若干實施例的特徵以使本領域的技術人員可更好地理解本公開的各方面。本領域的技術人員應瞭解，其可以易於使用本公開作為設計或修改用於實現本文中所介紹的實施例的相同目的和/或達成相同優勢的其它製程和結構的基礎。本領域的技術人員還應認識到，這種等效構造並不脫離本公開的精神和範圍，且本領域的技術人員可在不脫離本公開的精神和範圍的情況下在本文中進行各種改變、替代以及更改。
100:載體基底 100A、100B、100C:封裝 102:載體基底 104:釋放層 106:黏合劑 110:晶粒 112:半導體基底 114:器件 116:層間介電質 118:導電插塞 119:內連線結構 120、150、172、182、204B:接墊 122:鈍化膜 124:晶粒連接件 126、132、136、140、144、148:介電層 130:密封體 134、138、142、146:金屬化圖案 152:精細特徵部分 154:粗糙特徵部分 156:重佈線結構 160:載帶 162、174:導電連接件 170、170A、170B:模組 176:底填充料 180:外部連接件 190、194:熱介面材料 192、196:熱模組 200:機械支架 202、204A:主體 204、230B:緊固件 210:殼體 220:鑽孔製程 222:孔 230A:螺栓 405:積體電路晶粒 A1:接觸面積 D1、D2、D3:直徑 D4、D5:距離 H1:高度 L1:長度 T1:第一厚度 T2:第二厚度 T3:第三厚度 T4:第四厚度
結合附圖閱讀以下具體實施方式會最好地理解本公開的各方面。應注意，根據業界中的標準慣例，各種特徵未按比例繪製。實際上，為了論述清楚起見，可任意增大或減小各種特徵的尺寸。 圖1到圖19是根據一些實施例的在用於形成封裝的製程期間的中間步驟的橫截面視圖。 圖20是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面視圖。 圖21是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面視圖。 圖22是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面視圖。 圖25和圖26是根據一些實施例的在用於形成封裝器件的製程期間的中間步驟的橫截面視圖。 圖23、圖24以及圖27是根據一些實施例的封裝器件的俯視圖。 圖28是根據一些實施例的封裝器件的橫截面視圖。
100A、100B:封裝
204B:接墊
170A、170B:模組
190、194:熱介面材料
192、196:熱模組
200:機械支架
202、204A:主體
204:緊固件
H1 :高度

Claims (1)

  1. 一種封裝器件，包括： 第一封裝組件，包括： 第一積體電路晶粒； 第一密封體，至少部分地包圍所述第一積體電路晶粒；以及 重佈線結構，位於所述第一密封體上且耦合到所述第一積體電路晶粒； 第一熱模組，耦合到所述第一積體電路晶粒； 第二封裝元件，接合到所述第一封裝元件，所述第二封裝元件包括： 電源模組，附接到所述第一封裝元件，所述電源模組包括主動器件； 第二熱模組，耦合到所述電源模組；以及 機械支架，從所述第二熱模組的頂部表面延伸到所述第一熱模組的底部表面，所述機械支架物理接觸所述第一熱模組和所述第二熱模組。
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TWI798748B (zh) * 2021-07-09 2023-04-11 欣興電子股份有限公司 電路板結構及其製作方法
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US11342295B2 (en) * 2018-12-24 2022-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Electronic assembly, package structure having hollow cylinders and method of fabricating the same
DE102020101293A1 (de) * 2020-01-21 2021-07-22 Infineon Technologies Ag Hochfrequenz-vorrichtung mit halbleitervorrichtung und wellenleiter-bauteil
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