TW202107663A - Electronic package and method for fabricating the same - Google Patents

Abstract

This invention provides an electronic package comprising a first line structure; an electronic component disposed on the first line structure by a shielding structure; a conductive column disposed on the first line structure; a coating layer coating the electronic component and the conductive column; and a second line structure formed on the coating layer and electrically connecting the electronic component and the conductive column, and by covering the periphery of the electronic component with a shielding structure, the electronic component is prevented from being subjected to external electromagnetic interference when the electronic package operates. This invention further provides a method for fabricating the electronic package.

Description

Electronic package and its manufacturing method

The present invention relates to a semiconductor packaging process, in particular to a semiconductor package and its manufacturing method for avoiding electromagnetic interference.

With the vigorous development of the electronics industry, electronic products are gradually moving towards the trend of multi-function and high performance. In order to meet the packaging requirements of miniaturization of electronic packages, Wafer Level Packaging (WLP) technology has been developed.

Figures 1A to 1D are schematic cross-sectional views of the conventional method of manufacturing the semiconductor package 1 of wafer level packaging.

As shown in FIG. 1A, a thermal release tape 100 is formed on a carrier 10.

Next, a plurality of semiconductor elements 11 are placed on the thermal release adhesive layer 100. The semiconductor elements 11 have opposite active surfaces 11a and non-active surfaces 11b. Each active surface 11a has a plurality of electrode pads 110, and Each of the acting surfaces 11 a is adhered to the thermal release adhesive layer 100.

As shown in FIG. 1B, an encapsulant 14 is formed on the thermal release adhesive layer 100 上, to cover the semiconductor element 11.

As shown in FIG. 1C, the encapsulant 14 is baked to harden the thermal release adhesive layer 100, and then the thermal release adhesive layer 100 and the carrier 10 are removed to expose the active surface of the semiconductor element 11 11a.

As shown in FIG. 1D, a circuit structure 16 is formed on the active surface 11a of the encapsulant 14 and the semiconductor device 11, and the circuit structure 16 is electrically connected to the electrode pad 110. Then, an insulating protective layer 18 is formed on the circuit structure 16, and the insulating protective layer 18 exposes part of the surface of the circuit structure 16 for bonding conductive elements 17 such as solder balls to form the semiconductor package 1.

However, in the conventional semiconductor package 1, it can only place the semiconductor element 11 on one side of the encapsulant 14, which greatly restricts the application of the terminal product using the semiconductor package 1, which is difficult to meet the current terminal products. The multi-functional needs.

Furthermore, during operation, since the semiconductor package 1 lacks a shielding structure for electromagnetic interference (EMI), the semiconductor device 11 is susceptible to external electromagnetic interference (EMI), thus affecting Overall electrical performance of the semiconductor package 1.

Therefore, how to overcome the various problems of the above-mentioned conventional technology has become an urgent problem to be solved at present.

In view of the deficiencies of the above-mentioned conventional technology, the present invention provides an electronic package including: a first circuit structure having a first side and a second side opposite to each other, and the first side is formed There are a plurality of conductive pillars that are electrically connected to the first circuit structure; the first electronic component is provided on the first side of the first circuit structure by a shielding structure; the cladding layer is formed on the first circuit structure On the first side, the coating layer is used to cover the shielding structure, the first electronic component and the conductive pillar, and part of the surface of the first electronic component and the end surface of the conductive pillar to expose the coating layer; And a second circuit structure is formed on the coating layer and electrically connects the conductive pillar and the first electronic element.

The present invention also provides a method for manufacturing an electronic package, which includes: providing a first circuit structure having opposite first and second sides; forming a plurality of conductive pillars electrically connected to the first circuit structure on the first side And the first electronic component is arranged on the first side of the first circuit structure by the shielding structure; a coating layer is formed on the first side of the first circuit structure so that the coating layer covers the shielding Structure, the first electronic component and the conductive column, and make part of the surface of the first electronic component and the end surface of the conductive column expose the coating layer; and form a second circuit structure on the coating layer, and make The second circuit structure electrically connects the conductive pillar and the first electronic component.

In the aforementioned electronic package and its manufacturing method, the shielding structure includes an isolation layer provided on the first electronic component and a shielding layer provided on the isolation layer, so that the first electronic component can pass through the shielding layer Set on the first side of the first circuit structure.

In the aforementioned electronic package and its manufacturing method, the first electronic component has an opposite active surface and a non-active surface, the first electronic component is combined with the shielding structure with the non-active surface, and the active surface has a plurality of electrode pads, and A conductor is formed on the electrode pad. For example, the end surface of the conductor is exposed to the coating layer.

In the aforementioned electronic package and its manufacturing method, the second circuit structure is grounded to the first electronic component and/or the shielding structure.

In the aforementioned electronic package and its manufacturing method, it further includes disposing an electronic device on the second side of the first circuit structure, and the electronic device is electrically connected to the first circuit structure. For example, the electronic device includes a second electronic element formed on the second side of the first circuit structure and electrically connected to the first circuit structure. In addition, the electronic device further includes an encapsulation layer covering the second electronic component.

The aforementioned electronic package and its manufacturing method further include forming a plurality of conductive elements on the second circuit structure.

In the aforementioned electronic package and its manufacturing method, it further includes disposing another electronic component on the second circuit structure.

It can be seen from the above that the electronic package and the manufacturing method of the present invention mainly use the shielding structure to cover the periphery of the first electronic component with a shielding layer, so that the first electronic component is not in operation when the electronic package is in operation. It is subject to electromagnetic interference from the outside world or electronic devices, so compared to the prior art, the electrical functions of the electronic package of the present invention can operate normally.

1‧‧‧Semiconductor package

10‧‧‧Carrier

100‧‧‧Thermal release adhesive layer

11‧‧‧Semiconductor components

11a,21a‧‧‧action surface

11b,21b‧‧‧Non-acting surface

110,210‧‧‧electrode pad

14‧‧‧Packaging gel

16‧‧‧Line structure

17,27‧‧‧Conductive element

18,202‧‧‧Insulation protection layer

2‧‧‧Electronic package

2a‧‧‧Electronic device

20‧‧‧The first line structure

20a‧‧‧First side

20b‧‧‧Second side

200‧‧‧First insulation layer

201‧‧‧Relaying the first line

21‧‧‧The first electronic component

211‧‧‧Insulation layer

212‧‧‧Conductor

214,221,91‧‧‧Combination layer

22‧‧‧Second electronic component

220‧‧‧Wire

23‧‧‧Conductive post

24‧‧‧Encapsulation layer

25‧‧‧Coating

26‧‧‧Second line structure

260,260’‧‧‧Second insulating layer

261,261’‧‧‧Second line re-layout

270‧‧‧Metal layer under bump

28‧‧‧Electronic components

29‧‧‧Shielding structure

290‧‧‧Isolation layer

291‧‧‧Shielding layer

7‧‧‧Carrier

8‧‧‧Supporting structure

80‧‧‧Protective film

9‧‧‧Carrier plate

90‧‧‧Release layer

S‧‧‧cutting path

21c‧‧‧Side

Figures 1A to 1D are schematic cross-sectional views of the conventional manufacturing method of semiconductor packages.

2A to 2F are schematic cross-sectional views of the manufacturing method of the electronic package of the present invention.

Figure 2A’ is a schematic diagram of the previous operations of Figure 2A.

Fig. 2A" is a schematic diagram of another embodiment of Fig. 2A.

Figure 2D' is a schematic diagram of the previous operations of Figure 2E.

Figure 2F' is a schematic diagram of another embodiment of Figure 2F.

The following specific examples illustrate the implementation of the present invention. Those familiar with the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification.

It should be noted that the structure, ratio, size, etc. shown in the drawings in this manual are only used to match the content disclosed in the manual for the understanding and reading of those who are familiar with the art, and are not intended to limit the implementation of the present invention. Therefore, it does not have any technical significance. Any structural modification, proportional relationship change or size adjustment, without affecting the effects and objectives that can be achieved by the present invention, should still fall within the scope of the present invention. The technical content disclosed by the invention can be covered. At the same time, the terms "on", "first", "second" and "one" cited in this specification are only for ease of description and are not used to limit the scope of the present invention. The change or adjustment of the relative relationship shall be regarded as the scope of the implementation of the present invention without substantial changes to the technical content.

2A to 2F are schematic cross-sectional views of the manufacturing method of the electronic package 2 of the present invention.

As shown in FIG. 2A, a first circuit structure 20 is combined with a carrier board 9. The first circuit structure 20 has a first side 20a and a second side 20b opposite to each other, and the first circuit structure 20 has a first side 20a and a second side 20b. The two sides 20b are bonded to the supporting board 9. Next, a plurality of conductive pillars 23 electrically connected to the first circuit structure 20 are formed on the first side 20a of the first circuit structure 20, and the first electronic component 21 is disposed on the first side 20a of the first circuit structure 20 Wherein, the first electronic component 21 is combined and electrically connected to a plurality of conductors 212, and the conductors 212 are such as The ball shape of the solder ball, or the column shape of metal materials such as copper pillars and solder bumps, or the stud shape (stud) made by wire bonding machine, but not limited to this.

In this embodiment, the first circuit structure 20 includes at least one first insulating layer 200 and a first redistribution layer (RDL) 201 disposed on the first insulating layer 200. For example, the material for forming the first circuit redistribution layer 201 is copper, and the material for forming the first insulating layer 200 is, for example, Polybenzoxazole (PBO), Polyimide (Polyimide) Dielectric materials such as PI), Prepreg (PP), etc. In addition, the carrier board 9 is, for example, a circular board made of semiconductor material, on which a release layer 90 and a bonding layer 91 are sequentially formed by coating, so that the first circuit structure 20 is disposed on the bonding layer. 91 on.

Furthermore, the conductive pillar 23 is disposed on the first circuit redistribution layer 201 and electrically connected to the first circuit redistribution layer 201, and the material for forming the conductive pillar 23 is a metal material such as copper or a solder material .

In addition, the first electronic component 21 is an active component, a passive component, or a combination of both, wherein the active component is a semiconductor chip, and the passive component is a resistor, a capacitor, and an inductor. In this embodiment, the first electronic component 21 is a semiconductor chip, which has an active surface 21a and a non-active surface 21b opposite to each other. The first electronic component 21 is disposed on the first circuit structure with its non-active surface 21b. On the first side 20a of 20, the active surface 21a has a plurality of electrode pads 210, wherein the conductor 212 is formed on the electrode pad 210, and an insulating layer 211 is formed on the active surface 21a to insulate the The layer 211 covers the electrode pads 210 and the conductive bodies 212. Alternatively, the conductor 212 can also be exposed to the insulating layer 211.

In addition, the non-acting surface 21b and the side surface 21c of the first electronic component 21 are A shielding structure 29 is formed, which includes an isolation layer 290 disposed on the first electronic component 21 and a shielding layer 291 disposed on the isolation layer 290, so that the first electronic component 21 is configured by the shielding layer 291 On the first side 20a of the first circuit structure 20. For example, the material for forming the shielding layer 291 is copper, and the material for forming the isolation layer 290 is such as polypara-diazole benzene (PBO), polyimide (PI), prepreg (PP), etc. Electric material. Specifically, as shown in Figure 2A', the manufacturing process of the first electronic component 21 incorporating the shielding structure 29 is to arrange a plurality of the first electronic components 21 on a full-page carrier 7, and then place the first electronic components 21 on the carrier 7. The shielding structure 29 is formed on the 7 and the first electronic component 21, and then the singulation process is performed and the carrier 7 is removed.

It should be understood that the shielding layer 291 can be directly heated to bond to the first insulating layer 200 of the first circuit structure 20; or, as shown in FIG. 2A", the shielding layer 291 can be made of adhesive The bonding layer 214 is bonded to the first insulating layer 200 of the first circuit structure 20.

As shown in FIG. 2B, a coating layer 25 is formed on the first side 20a of the first circuit structure 20, so that the coating layer 25 covers the shielding structure 29, the first electronic component 21, and the The conductor 212 and the conductive pillars 23 are flattened so that the upper surface of the coating layer 25 is flush with the upper surface of the insulating layer 211, the end face of the conductive pillar 23 and the end face of the conductor 212, The coating layer 25 is exposed outside the upper surface of the insulating layer 211, the end surface of the conductive pillar 23, and the end surface of the conductor 212.

In this embodiment, the material forming the coating layer 25 is an insulating material such as polyimide (PI), dry film, epoxy, or molding compound. , But not limited to the above.

Furthermore, the coating layer 25 can be formed on the first side 20a of the first circuit structure 20 by lamination or molding.

In addition, the leveling process is to remove part of the material of the conductive pillar 23, part of the material of the insulating layer 211 (part of the material of the conductor 212 can be removed at the same time as required), and the coating by grinding. Part of the material of layer 25.

It should be understood that if the conductor 212 has been exposed on the insulating layer 211, part of the material of the insulating layer 211 is removed to expose the conductors 212 on the coating layer 25 (as required, it can also be At the same time, part of the material of the insulating layer 211 and part of the material of the conductor 212 are removed, so that the conductors 212 are exposed to the coating layer 25).

As shown in FIG. 2C, a second circuit structure 26 is formed on the cladding layer 25, and the second circuit structure 26 is electrically connected to the conductive pillars 23 and the conductor 212, so that the first electronic element 21 is electrically connected and grounded to the second circuit structure 26 by the conductor 212, and the shielding structure 29 can be grounded to the second circuit structure 26 as required.

In this embodiment, the second circuit structure 26 includes a plurality of second insulating layers 260, 260', and a plurality of second circuit redistribution layers (RIDL) 261, 261' disposed on the second insulating layers 260, 260', and the outermost layer The second insulating layer 260' can be used as a solder mask, so that the second circuit redistribution layer 261' of the outermost layer is exposed to the solder mask. Alternatively, the second circuit structure 26 can also only include a single second insulating layer 260 and a single second circuit redistribution layer 261.

Furthermore, the material for forming the second circuit redistribution layer 261, 261' is copper, and the material for forming the second insulating layer 260, 260' is such as polyparabenzazole (PBO), polyimide (PI), Dielectric material of prepreg (PP).

In addition, a plurality of conductive elements 27 such as solder balls are formed on the second circuit redistribution layer 261' of the outermost layer for subsequent connection of electronic devices such as package structures or other structures (such as another package or chip) (Figure slightly). For example, a metal layer under the bump can be formed Under Bump Metallurgy (UBM for short) 270 is located on the second circuit redistribution layer 261' of the outermost layer to facilitate the bonding of the conductive element 27.

In addition, at least one electronic component 28 can be formed on the outermost second circuit redistribution layer 261' according to requirements, and the electronic component 28 is electrically connected to the second circuit redistribution layer 261 through a conductive element 27 such as a solder material. '. For example, the electronic component 28 is an active component, a passive component, or a combination of both, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor, and an inductor.

As shown in FIGS. 2D to 2E, the carrier board 9 and the release layer 90 thereon are removed, and the bonding layer 91 is removed as required. After that, the overall structure is turned over, and then at least one electronic device 2 a is connected to the second side 20 b of the first circuit structure 20.

In this embodiment, the electronic device 2a may be a package structure, such as including a second electronic component 22, which is an active component, a passive component, or a combination of both, and the active component is, for example, a semiconductor chip, and the passive component Such as resistance, capacitance and inductance. For example, the second electronic component 22 is disposed on the second side 20b of the first circuit structure 20 by the bonding layer 221, and is electrically connected to the first circuit by bonding wires 220 such as gold wires. Cloth layer 201; or, the second electronic component 22 is provided on the second side 20b of the first circuit structure 20 in a flip chip manner by a plurality of conductive bumps such as solder material (the figure is omitted) and is electrically connected to the first circuit structure 20 A circuit redistribution layer 201; or, the second electronic component 22 can directly contact the first circuit redistribution layer 201 to electrically connect the first circuit redistribution layer 201. However, the manner in which the second electronic component 22 is electrically connected to the first circuit redistribution layer 201 is not limited to the above.

Furthermore, an insulating protective layer 202 such as a solder mask can be selectively formed on the second side 20b of the first circuit structure 20, and the insulating protective layer 202 has a plurality of openings to make Part of the surface of the first circuit redistribution layer 201 is exposed to the openings for bonding the bonding wires 220. Alternatively, the insulating protective layer 202 may not be formed, and the bonding layer 91 may be retained as the solder mask for forming a plurality of openings on the bonding layer 91, so that part of the surface of the first circuit redistribution layer 201 is exposed The openings are used to connect the bonding wires 220.

Furthermore, the electronic device 2a may include an encapsulation layer 24 formed on the second side 20b of the first circuit structure 20 to cover the second electronic component 22. For example, the material for forming the encapsulation layer 24 is an insulating material such as polyimide (PI), dry film, epoxy resin, or encapsulation material, but it is not limited to the above. Specifically, the materials of the encapsulation layer 24 and the encapsulation layer 25 may be the same or different.

In addition, as shown in Figure 2D', before the electronic device 2a is installed, the conductive element 27 and the electronic element 28 can be placed on the protective film 80 of a supporting structure 8 to facilitate the overturning, and the electronic device 2a is to be installed. After the device 2a is installed, the supporting structure 8 and its protective film 80 are removed.

It should be understood that there are many types of the electronic device 2a, such as a carrier board or a packaging substrate, which is not limited to the above.

As shown in FIG. 2F, the singulation process is performed along the cutting path S shown in FIG. 2E to obtain the electronic package 2.

Therefore, the manufacturing method of the electronic package 2 of the present invention is based on the design of the shielding structure 29 so that the periphery of the first electronic component 21 is covered with a shielding layer 291. Therefore, when the electronic package 2 is in operation, the first electronic component 21 will not be subjected to electromagnetic interference (EMI) from the outside or the electronic device 2a (or another electronic component 28), so the electrical operation function of the electronic package 2 can be normal, so as to avoid affecting the overall electrical performance of the electronic package 2 .

Furthermore, by the first side 20a and the second side 20b of the first circuit structure 20 The first and second electronic components 21 and 22 are respectively provided to increase the application range of the terminal product using the electronic package 2 so as to meet the functional requirements of the current terminal product.

In addition, the isolation layer 290 is located between the shielding layer 291 and the first electronic component 21 to prevent the metal ions of the shielding layer 291 from dissociating to the first electronic component 21, causing the shielding layer 291 to electrically conduct the Because of the problem of the first electronic component 21, the isolation layer 290 can effectively and electrically isolate the shielding layer 291 and the first electronic component 21 to achieve an insulation effect.

In addition, the second circuit redistribution layer 261 of the second circuit structure 26 is grounded by the shielding structure 29, as shown in Figure 2F', to provide a better shielding effect.

The present invention also provides an electronic package 2, which includes: a first circuit structure 20, a first electronic component 21, a coating layer 25 and a second circuit structure 26.

The first circuit structure 20 has a first side 20a and a second side 20b opposite to each other, and a plurality of conductive pillars electrically connected to the first circuit structure 20 are formed on the first side 20a of the first circuit structure 20 twenty three.

The first electronic component 21 is arranged on the first side 20 a of the first circuit structure 20 by the shielding structure 29, and a plurality of electrical conductors 212 are combined on the first electronic component 21.

The coating layer 25 is formed on the first side 20a of the first circuit structure 20, so that the coating layer 25 covers the shielding structure 29, the first electronic component 21 and the conductive pillars 23, The end surface of the conductive pillar 23 and the end surface of the conductor 212 are exposed to the coating layer 25.

The second circuit structure 26 is formed on the coating layer 25, and the second circuit structure 26 is electrically connected to the conductive pillar 23 and the conductor 212 of the first electronic component 21.

In one embodiment, the shielding structure 29 includes a first electronic element The isolation layer 290 on the component 21 and the shielding layer 291 disposed on the isolation layer 290 enable the first electronic component 21 to be disposed on the first side 20a of the first circuit structure 20 through the shielding layer 291.

In one embodiment, the first electronic component 21 has an opposite active surface 21a and a non-active surface 21b. The first electronic component 21 is combined with the shielding structure 29 with the non-active surface 21b, and the active surface 21a has a plurality of electrodes. A pad 210, and a conductive body 212 is formed on the electrode pad 210.

In one embodiment, the second circuit structure 26 is grounded to the first electronic component 21 and/or the shielding structure 29.

In one embodiment, the electronic package 2 further includes at least one electronic device 2 a, which is disposed on the second side 20 b of the first circuit structure 20 and is electrically connected to the first circuit structure 20. For example, the electronic device 2a includes a second electronic component 22, which is disposed on the second side 20b of the first circuit structure 20 and is electrically connected to the first circuit structure 20. In addition, the electronic device 2a further includes an encapsulation layer 24 covering the second electronic component 22.

In one embodiment, the electronic package 2 further includes a plurality of conductive elements 27 formed on the second circuit structure 26.

In one embodiment, the electronic package 2 further includes another electronic component 28 arranged on the second circuit structure 26.

In summary, the electronic package and its manufacturing method of the present invention are configured by the shielding structure to prevent the first electronic component from being subjected to electromagnetic interference from the outside or the electronic device when the electronic package is in operation. The electrical functions of the electronic package can operate normally.

The above-mentioned embodiments are used to exemplify the principles and effects of the present invention, but not to limit the present invention. Anyone who is familiar with this skill can do so without departing from the spirit of the present invention and Under the scope, the above-mentioned embodiment is modified. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.

2‧‧‧Electronic package

2a‧‧‧Electronic device

20‧‧‧The first line structure

201‧‧‧Relaying the first line

202‧‧‧Insulation protection layer

20a‧‧‧First side

20b‧‧‧Second side

21‧‧‧The first electronic component

22‧‧‧Second electronic component

220‧‧‧Wire

221‧‧‧Combination layer

23‧‧‧Conductive post

24‧‧‧Encapsulation layer

25‧‧‧Coating

26‧‧‧Second line structure

27‧‧‧Conductive element

28‧‧‧Electronic components

29‧‧‧Shielding structure

290‧‧‧Isolation layer

291‧‧‧Shielding layer

Claims (20)

An electronic package includes: a first circuit structure having a first side and a second side opposite to each other, and a plurality of conductive pillars electrically connected to the first circuit structure are formed on the first side; a first electronic element , Is provided on the first side of the first circuit structure by a shielding structure; a coating layer is formed on the first side of the first circuit structure to cover the shielding structure, the first electronic component and The conductive pillar, and the covering layer is exposed from part of the surface of the first electronic component and the end surface of the conductive pillar; and the second circuit structure is formed on the covering layer and electrically connects the conductive pillar and the conductive pillar The first electronic component. For the electronic package described in item 1 of the scope of patent application, the shielding structure includes an isolation layer provided on the first electronic component and a shielding layer provided on the isolation layer, so that the first electronic The element is arranged on the first side of the first circuit structure through the shielding layer. According to the electronic package described in item 1 of the scope of the patent application, wherein the first electronic component has an opposite active surface and a non-active surface, the first electronic component is combined with the shielding structure with the non-active surface, and the active surface has A plurality of electrode pads, and conductors are formed on the electrode pads. The electronic package described in item 3 of the scope of patent application, wherein the end surface of the conductor is exposed on the coating layer. The electronic package described in item 1 of the scope of patent application, wherein the second circuit structure is grounded to the first electronic component and/or the shielding structure. The electronic package described in item 1 of the scope of the patent application includes an electronic device, which is arranged on the second side of the first circuit structure and is electrically connected to the first circuit structure. According to the electronic package described in item 6 of the scope of patent application, the electronic device includes a second electronic element which is arranged on the second side of the first circuit structure and is electrically connected to the first circuit structure. The electronic package described in item 7 of the scope of patent application, wherein the electronic device further includes an encapsulation layer covering the second electronic component. The electronic package described in item 1 of the scope of the patent application includes a plurality of conductive elements formed on the second circuit structure. The electronic package described in item 1 of the scope of patent application includes another electronic component arranged on the second circuit structure. A manufacturing method of an electronic package includes: providing a first circuit structure with opposite first and second sides; forming a plurality of conductive posts electrically connected to the first circuit structure on the first side, and by The first electronic component is arranged on the first side of the first circuit structure by the shielding structure; a coating layer is formed on the first side of the first circuit structure so that the coating layer covers the shielding structure and the first side An electronic element and the conductive pillar, and make part of the surface of the first electronic element and the end surface of the conductive pillar expose the cladding layer; and form a second circuit structure on the cladding layer, and make the second circuit The structure electrically connects the conductive pillar and the first electronic component. For example, the manufacturing method of the electronic package described in item 11 of the scope of patent application, wherein the shielding structure includes an isolation layer provided on the first electronic component and a shielding layer provided on the isolation layer, so that the second An electronic component is arranged on the first side of the first circuit structure through the shielding layer. The method for manufacturing an electronic package as described in item 11 of the scope of patent application, wherein the first electronic component has an opposite active surface and a non-active surface, the first electronic component is combined with the shielding structure with the non-active surface, and the function The surface has a plurality of electrode pads, and a conductor is formed on the electrode pads. The manufacturing method of the electronic package as described in item 13 of the scope of patent application, wherein the end surface of the conductor is exposed outside of the coating layer. The method for manufacturing an electronic package as described in item 11 of the scope of patent application, wherein the second circuit structure is grounded to the first electronic component and/or the shielding structure. The manufacturing method of the electronic package described in item 11 of the scope of the patent application further includes disposing an electronic device on the second side of the first circuit structure, and electrically connecting the electronic device to the first circuit structure. The method for manufacturing an electronic package as described in claim 16, wherein the electronic device includes a second electronic element formed on the second side of the first circuit structure and electrically connected to the first circuit structure . According to the method for manufacturing an electronic package described in claim 17, wherein the electronic device further includes an encapsulation layer covering the second electronic component. The manufacturing method of the electronic package described in item 11 of the scope of patent application includes forming a plurality of conductive elements on the second circuit structure. For example, the manufacturing method of the electronic package described in item 11 of the scope of the patent application includes arranging another electronic component on the second circuit structure.

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