TW202030818A - Variable pitch multi-needle head for transfer of semiconductor devices - Google Patents

Variable pitch multi-needle head for transfer of semiconductor devices Download PDF

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Publication number
TW202030818A
TW202030818A TW108135266A TW108135266A TW202030818A TW 202030818 A TW202030818 A TW 202030818A TW 108135266 A TW108135266 A TW 108135266A TW 108135266 A TW108135266 A TW 108135266A TW 202030818 A TW202030818 A TW 202030818A
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Taiwan
Prior art keywords
transfer
semiconductor device
substrate
configuration
collision lines
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TW108135266A
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Chinese (zh)
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TWI731423B (en
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可迪 皮特森
安德魯 賀斯卡
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美商羅茵尼公司
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Abstract

A direct transfer apparatus includes a dot matrix transfer head, which includes an impact wire housing and a plurality of impact wires disposed within the impact wire housing and extending out of the impact wire housing. Aguide head is attached to the impact wire housing. The guide head includes multiple holes configured to arrange the plurality of impact wires in a matrix configuration, the matrix configuration being a matched-pitch configuration.

Description

用於轉移半導體器件的可變節距多針頭Variable-pitch multi-needle head for transferring semiconductor devices

本發明關於一種可變節距多針頭,特別是指一種用於轉移半導體器件的可變節距多針頭。The present invention relates to a variable-pitch multi-needle head, in particular to a variable-pitch multi-needle head for transferring semiconductor devices.

半導體器件是採用矽、鍺、砷化鎵等半導體材料的電氣部件。半導體器件一般製造為單一分立器件或積體電路(IC)。單一分立器件的範例包括電驅動元件。例如,發光二極體(LED)、二極體、電晶體、電阻器、電容器、熔斷器等。Semiconductor devices are electrical components that use semiconductor materials such as silicon, germanium, and gallium arsenide. Semiconductor devices are generally manufactured as a single discrete device or integrated circuit (IC). Examples of single discrete devices include electric drive components. For example, light emitting diodes (LED), diodes, transistors, resistors, capacitors, fuses, etc.

半導體器件的製造,一般涉及包含大量步驟的複雜製造過程。製造的成品是「封裝」半導體器件。修飾語「封裝」係指內置在成品中的外殼和保護特性,以及可使封裝中的器件組合到最終電路中的介面。The manufacture of semiconductor devices generally involves a complex manufacturing process involving a large number of steps. The finished product manufactured is a "packaged" semiconductor device. The modifier "package" refers to the housing and protection features built into the finished product, and the interface that allows the components in the package to be combined into the final circuit.

半導體器件的常規製造過程,係從半導體晶圓的處理開始。晶圓被切割成大量「未封裝」半導體器件。修飾語「未封裝」係指不具有保護特性的未封閉半導體器件。在本文中,未封裝半導體器件可稱為半導體器件晶粒,或簡稱為「晶粒」。可對單一半導體晶圓進行切割,形成各種尺寸的晶粒,從而由半導體晶圓形成100,000甚至1,000,000個以上的晶粒(視半導體原始尺寸而定),每個晶粒有特定品質。 然後,透過常規製造過程對未封裝晶粒進行「封裝」,下文對該過程進行了簡單討論。晶圓處理與封裝之間操作可稱為「晶粒製備」。The conventional manufacturing process of semiconductor devices starts with the processing of semiconductor wafers. The wafer is cut into a large number of "unpackaged" semiconductor devices. The modifier "unpackaged" refers to unencapsulated semiconductor devices that do not have protective properties. In this context, unpackaged semiconductor devices may be referred to as semiconductor device die, or simply as "die". A single semiconductor wafer can be cut to form dies of various sizes, so that 100,000 or even more than 1,000,000 dies (depending on the original size of the semiconductor) can be formed from the semiconductor wafer, and each die has a specific quality. Then, the unpackaged die is "packaged" through a conventional manufacturing process, which is briefly discussed below. The operation between wafer processing and packaging can be referred to as "die preparation".

在某些實例中,晶粒製備可包括透過「取放過程」進行的晶粒分選。透過該過程單獨拾取切割的晶粒,並分選到盒子中。可根據晶粒的正向電壓容量、晶粒的平均功率和/或晶粒的波長進行分選。In some instances, grain preparation may include grain sorting through a "pick and place process." Through this process, the cut dies are picked up individually and sorted into boxes. The sorting can be performed according to the forward voltage capacity of the crystal grains, the average power of the crystal grains, and/or the wavelength of the crystal grains.

一般來說,封裝過程需要將晶粒安裝到塑膠或陶瓷封裝中(例如,模具或外殼)。封裝過程還包括將晶粒觸點與銷子/導線連接,以便與最終電路進行接合/互連。半導體器件的封裝,一般透過密封晶粒來完成。密封目的係防止晶粒受環境(例如,灰塵)污染。Generally speaking, the packaging process requires the die to be installed in a plastic or ceramic package (for example, a mold or a housing). The packaging process also includes connecting die contacts with pins/wires for bonding/interconnection with the final circuit. The packaging of semiconductor devices is generally accomplished by sealing the die. The purpose of sealing is to prevent the die from being contaminated by the environment (for example, dust).

然後,產品製造商會將封裝的半導體器件放在產品電路中。由於已進行封裝,器件做好了「插入」在製品電路元件中的準備。此外,雖然器件的封裝可將其與可能導致器件退化或損壞的元素阻隔。然而,封裝器件本質上比封裝內的晶粒大得多(例如,在某些情況下,厚度約為10倍,面積約為10倍。因此,體積約為100倍)。因此,組成的電路元件厚度不可能小於半導體器件的封裝。Then, the product manufacturer places the packaged semiconductor device in the product circuit. Since the packaging has been carried out, the device is ready to be "inserted" into the circuit component of the product. In addition, although the packaging of the device can block it from elements that may cause degradation or damage to the device. However, packaged devices are inherently much larger than the die inside the package (for example, in some cases, the thickness is about 10 times and the area is about 10 times. Therefore, the volume is about 100 times). Therefore, the thickness of the composed circuit element cannot be less than the package of the semiconductor device.

如上所述,可切割單一半導體晶圓,由半導體晶圓形成100,000或1,000,000個以上的晶粒。因此,這些用於轉移半導體晶粒的機器要求精度非常高。因此,轉移機構一般有具體設計目的並有嚴格限制,以確保精度和準確度。然而,這些轉移機構一般缺乏變化性及對不同應用或製造目的之適應性。例如,轉移機構用於轉移特定產品的晶粒,之後可對其進行重新配置或調整,用於轉移另一種產品的晶粒。重新配置耗時、效率低,有時要求拆除並改造機器的部件。As described above, a single semiconductor wafer can be cut, and 100,000 or more than 1,000,000 dies can be formed from the semiconductor wafer. Therefore, these machines for transferring semiconductor dies require very high precision. Therefore, the transfer mechanism generally has specific design goals and strict restrictions to ensure precision and accuracy. However, these transfer mechanisms generally lack variability and adaptability to different applications or manufacturing purposes. For example, the transfer mechanism is used to transfer the crystal grains of a specific product, which can be reconfigured or adjusted later to transfer the crystal grains of another product. Reconfiguration is time-consuming and inefficient, and sometimes requires the removal and modification of machine parts.

本發明總體涉及將半導體器件晶粒從某個襯底直接轉移至另一個襯底(例如晶粒襯底(例如,膠帶、膠帶上的半導體晶圓等)、電路襯底(例如,柔性或剛性、金屬或塑膠印製電路板、電路表面)、另一個晶粒(即,晶粒堆疊在晶粒上,下層晶粒起「襯底」的作用,用於容納被轉移晶粒))之轉移機構,還涉及實現該目的之一般過程。在一則實施例中,所述轉移機構可用於將未封裝晶粒從「晶圓膠帶」等襯底上直接轉移至電路襯底等產品襯底上。與常規方法生產的類似產品相較,直接轉移未封裝晶粒可大幅度減小最終產品的厚度,以及製造產品襯底所需的時間和/或成本。The present invention generally relates to the direct transfer of semiconductor device die from a certain substrate to another substrate (for example, a die substrate (for example, tape, semiconductor wafer on tape, etc.), a circuit substrate (for example, flexible or rigid , Metal or plastic printed circuit board, circuit surface), another die (ie, the die is stacked on the die, and the lower die acts as a "substrate" to accommodate the transferred die)) Institutions also involve the general process of achieving this purpose. In one embodiment, the transfer mechanism can be used to directly transfer unpackaged dies from a substrate such as "wafer tape" to a product substrate such as a circuit substrate. Compared with similar products produced by conventional methods, direct transfer of unpackaged die can greatly reduce the thickness of the final product, as well as the time and/or cost required to manufacture the product substrate.

為了便於說明,術語「襯底」係指在其上面進行過程或操作的任何物質。此外,術語「產品」係指過程或操作的預期輸出,無論其完成狀態如何。因此,產品襯底係指為獲得預期輸出而在上面進行過程或操作的任何物質。晶圓膠帶在本文中還可稱為半導體器件晶粒襯底,或簡稱為晶粒襯底。For ease of description, the term "substrate" refers to any substance on which a process or operation is performed. In addition, the term "product" refers to the expected output of a process or operation, regardless of its completion status. Therefore, the product substrate refers to any substance on which a process or operation is performed in order to obtain the expected output. Wafer tape can also be referred to as a semiconductor device die substrate, or simply a die substrate in this text.

在一則實施例中,所述轉移機構可將半導體器件晶粒從晶圓膠帶直接轉移至產品襯底上,無需「封裝」晶粒。所述轉移機構可垂直佈置在晶圓膠帶上方,可驅動衝撞線,以透過晶圓膠帶在晶粒上對產品襯底施壓。這個晶粒下壓過程可從晶粒側面開始將晶粒從晶圓膠帶上剝離,直到晶粒與晶圓膠帶分離,附著在產品襯底上。即,透過減小晶粒與晶圓膠帶之間黏合力,並增加晶粒與產品襯底之間黏合力,即可完成晶粒的轉移。In one embodiment, the transfer mechanism can directly transfer the semiconductor device die from the wafer tape to the product substrate without the need to "package" the die. The transfer mechanism can be vertically arranged above the wafer tape and can drive the collision line to press the product substrate on the die through the wafer tape. This die pressing process can peel the die from the wafer tape from the side of the die until the die is separated from the wafer tape and attached to the product substrate. That is, by reducing the adhesive force between the die and the wafer tape, and increasing the adhesive force between the die and the product substrate, the transfer of the die can be completed.

轉移機器可固定用於容納「未封裝」晶粒(例如,從晶圓膠帶轉移的 LED)的產品襯底。為了減小使用晶粒的產品之尺寸,晶粒非常小且薄。例如,晶粒的高度可為約12微米至50微米,其橫向尺寸範圍可為約100微米至400微米,或該範圍以上或以下。然而,本文所述轉移機器的實施例,可足以轉移尺寸大於上述尺寸的晶粒。然而,本文所述轉移機器的實施例,可特別適用於轉移尺寸範圍如上所述的微型LED。由於晶粒的尺寸相對較小,所述轉移機器包括用於將攜帶晶粒的晶圓膠帶和產品襯底精確對準的部件,以確保精確放置並/或避免產品材料浪費。在一則實施例中,將產品襯底與晶圓膠帶上的晶粒對準的部件可包括一組框架。晶圓膠帶和產品襯底在框架中分別固定並單獨輸送至對準位置,使晶圓膠帶上的特定晶粒轉移至產品襯底上的特定點。The transfer machine can hold the product substrate used to hold "unpackaged" dies (for example, LEDs transferred from wafer tape). In order to reduce the size of products using crystal grains, the crystal grains are very small and thin. For example, the height of the crystal grains may be about 12 to 50 microns, and the lateral dimension thereof may range from about 100 to 400 microns, or above or below this range. However, the embodiment of the transfer machine described herein may be sufficient to transfer crystal grains with a size larger than the above-mentioned size. However, the embodiments of the transfer machine described herein are particularly suitable for transferring micro LEDs in the size range described above. Due to the relatively small size of the die, the transfer machine includes components for accurately aligning the wafer tape carrying the die and the product substrate to ensure accurate placement and/or avoid product material waste. In one embodiment, the component that aligns the product substrate with the die on the wafer tape may include a set of frames. The wafer tape and the product substrate are respectively fixed in the frame and separately transported to the alignment position, so that the specific die on the wafer tape is transferred to a specific point on the product substrate.

輸送產品襯底的框架可在各個方向上移動,包括水平方向和/或垂直方向,甚至是可轉移至曲面上的方向。輸送晶圓膠帶的框架亦可在各個方向上移動。可使用齒輪、軌道、電機和/或其他元件組成的系統,來固定和輸送分別攜帶產品襯底和晶圓膠帶的框架,以將產品襯底與晶圓膠帶對準,從而將晶粒放置在產品襯底的正確位置。每個框架系統還可移動至抽取位置,以在完成轉移過程時,協助抽取晶圓膠帶和產品襯底。The frame conveying the product substrate can be moved in various directions, including the horizontal direction and/or the vertical direction, and even the direction that can be transferred to the curved surface. The frame that transports the wafer tape can also move in all directions. A system consisting of gears, rails, motors, and/or other components can be used to fix and transport the frame that carries the product substrate and the wafer tape, respectively, to align the product substrate with the wafer tape and place the die on The correct position of the product substrate. Each frame system can also be moved to the extraction position to assist in the extraction of wafer tape and product substrates when the transfer process is completed.

在一則實施例中,所述轉移機構可包括多針轉移頭,與點陣印表機使用的列印頭類似。因此,下文中亦可稱為「點陣轉移頭」。所述點陣轉移頭可包括多條衝撞線(本文亦稱為「針」或「銷子」),所述衝撞線可同時或按順序單獨驅動。所述多條衝撞線可用於將多個半導體器件晶粒從晶圓膠帶等第一襯底直接轉移至產品襯底等第二襯底上。所述點陣轉移頭可進一步包括外殼,所述外殼可包括用於控制多條衝撞線驅動的驅動組件。所述點陣轉移頭還可包括展開單元。所述展開單元可用於以指定間距分散多條衝撞線。在一則實施例中,所述展開單元可作為外殼的一部分。然而,在另一則實施例中,所述展開單元能以可拆卸方式附著在外殼上。所述點陣轉移頭還可包括導向器或導向頭,所述導向器或導向頭可附著在展開單元和/或外殼的側面。所述導向器可用於在轉移過程中,保持多條衝撞線的橫向位置。在一則實施例中,所述導向器可與晶圓膠帶的表面接觸。然而,在其他實施例中,所述導向器可佈置在晶圓膠帶的表面附近,沒有任何直接接觸或只有一定間歇性直接接觸。In one embodiment, the transfer mechanism may include a multi-needle transfer head, which is similar to a print head used in a dot matrix printer. Therefore, it may also be referred to as a "dot transfer head" hereinafter. The dot matrix transfer head may include a plurality of collision lines (also referred to herein as “needles” or “pins”), and the collision lines may be driven simultaneously or individually in sequence. The multiple collision lines can be used to directly transfer multiple semiconductor device dies from a first substrate such as a wafer tape to a second substrate such as a product substrate. The dot matrix transfer head may further include a housing, and the housing may include a driving assembly for controlling the driving of a plurality of collision lines. The dot matrix transfer head may further include an unfolding unit. The unfolding unit can be used to disperse multiple collision lines at specified intervals. In one embodiment, the deployment unit may be used as a part of the housing. However, in another embodiment, the deployment unit can be detachably attached to the housing. The dot matrix transfer head may further include a guide or a guide head, which may be attached to the side of the unfolding unit and/or the housing. The guide can be used to maintain the lateral position of multiple collision lines during the transfer process. In one embodiment, the guide may be in contact with the surface of the wafer tape. However, in other embodiments, the guide may be arranged near the surface of the wafer tape without any direct contact or only intermittent direct contact.

在一則實施例中,所述多條衝撞線可採用多節距點陣配置(本文稱為「多節距」)。本文使用的術語「節距」係指物體或點之間的間隔。然而,術語「節距」用於指代多條衝撞線的佈置時,表示多條衝撞線可與一或多個其他部件(例如,待轉移晶粒)對準或不對準。例如,在一則實施例中,所述多節距配置能以恒定間距佈置多條衝撞線。在這種實施例中,所述多條衝撞線可互相均勻間隔佈置,而非與電路跡或半導體器件晶粒對準。因此,晶圓膠帶上的半導體器件晶粒或產品襯底上的電路跡不均勻間隔時(即,晶粒或示蹤劑之間有多種不同節距),所述多條衝撞線的多節距配置較為有用。因此,使用術語「多節距」。例如,所述多條衝撞線互相均勻間隔,可增加多條衝撞線中的至少一條衝撞線與半導體器件晶粒或電路跡的至少其中之一對準的機率。可將導向頭附著在多節距配置中的多條衝撞線上,實現多節距配置。In one embodiment, the multiple collision lines may adopt a multi-pitch lattice configuration (referred to herein as “multi-pitch”). The term "pitch" as used herein refers to the spacing between objects or points. However, when the term “pitch” is used to refer to the arrangement of multiple collision lines, it means that the multiple collision lines may be aligned or misaligned with one or more other components (for example, die to be transferred). For example, in one embodiment, the multi-pitch configuration can arrange multiple collision lines at a constant interval. In this embodiment, the multiple collision lines may be arranged evenly spaced apart from each other, instead of being aligned with the circuit trace or the semiconductor device die. Therefore, when the semiconductor device dies on the wafer tape or the circuit traces on the product substrate are not evenly spaced (that is, there are multiple different pitches between the dies or tracers), the multiple sections of the multiple collision lines Distance configuration is more useful. Therefore, the term "multi-pitch" is used. For example, the multiple collision lines are evenly spaced from each other, which can increase the probability that at least one of the multiple collision lines is aligned with at least one of the semiconductor device die or the circuit trace. The guide head can be attached to multiple collision lines in a multi-pitch configuration to realize a multi-pitch configuration.

附加地,並且/或者可替代地,在一則實施例中,所述多條衝撞線可佈置為匹配節距配置。在這種實施例中,所述多條衝撞線可與產品襯底上預定節距的電路跡或晶圓膠帶上預定節距的半導體器件晶粒對準。可根據電路跡還是半導體器件晶粒中的哪個易於實現更均勻的間隔,確定與哪個部件對準。例如,如果固定在框架中時,電路跡比半導體器件晶粒的間隔更均勻,佈置在匹配節距配置中時,所述多條衝撞線可與電路跡對準。Additionally, and/or alternatively, in an embodiment, the plurality of collision lines may be arranged in a matching pitch configuration. In such an embodiment, the plurality of collision lines may be aligned with a predetermined pitch of circuit traces on the product substrate or a predetermined pitch of semiconductor device die on the wafer tape. Which component is aligned with can be determined according to the circuit trace or the semiconductor device die which is easier to achieve more uniform spacing. For example, if the circuit traces are more evenly spaced than the semiconductor device dies when fixed in a frame, when arranged in a matching pitch configuration, the multiple collision lines can be aligned with the circuit traces.

本申請透過引用,將以下專利申請完整併入本文:提交於2015年11月12日,標題為「Apparatus for Transfer of Semiconductor Devices」。現在,發佈為第9,633,883號美國專利第14/939,896號美國專利申請;以及,提交於2018年5月12日,標題為「Method and Apparatus for Multiple Direct Transfers of Semiconductor Devices」的第15/978,094號美國專利申請。This application incorporates the following patent applications by reference in their entirety: Submitted on November 12, 2015, with the title "Apparatus for Transfer of Semiconductor Devices". Now, it is issued as US Patent No. 9,633,883, US Patent Application No. 14/939,896; and, filed on May 12, 2018, entitled “Method and Apparatus for Multiple Direct Transfers of Semiconductor Devices”, US No. 15/978,094 patent application.

圖1圖解了裝置100(或稱為「直接轉移裝置」)的一則實施例,所述裝置100可用於將未封裝半導體器件晶粒從晶圓膠帶102直接轉移至產品襯底104上,或者相似地,將其他電氣部件從載體襯底(即攜帶一或多個電氣部件的襯底)轉移至產品襯底上。晶圓膠帶在本文中還可稱為半導體器件晶粒襯底,或簡稱為晶粒襯底。所述裝置100可包括產品襯底輸送機構106和晶圓膠帶輸送機構108。所述產品襯底輸送機構106可包括產品襯底框架110,所述晶圓膠帶輸送機構可包括晶圓膠帶框架112。在一則實施例中,所述產品襯底框架110和晶圓膠帶框架112可分別拉伸產品襯底和晶圓膠帶,以透過拉伸力,將拉伸的電路跡和半導體器件晶粒展開。然而,(例如)在產品襯底的材料具有最小相對拉伸/撓曲特性之情況下,無需進行拉伸。所述裝置100可進一步包括轉移機構114,例如點陣轉移頭(本文標記為114)。如圖所示,可垂直佈置在晶圓膠帶102上方。在一則實施例中,所述點陣轉移頭114可位於幾乎與晶圓膠帶102接觸的位置。Figure 1 illustrates an embodiment of an apparatus 100 (or "direct transfer apparatus"), which can be used to directly transfer unpackaged semiconductor device die from wafer tape 102 to product substrate 104, or similar Ground, transfer other electrical components from the carrier substrate (ie, the substrate that carries one or more electrical components) to the product substrate. Wafer tape can also be referred to as a semiconductor device die substrate, or simply a die substrate in this text. The apparatus 100 may include a product substrate conveying mechanism 106 and a wafer tape conveying mechanism 108. The product substrate conveying mechanism 106 may include a product substrate frame 110, and the wafer tape conveying mechanism may include a wafer tape frame 112. In one embodiment, the product substrate frame 110 and the wafer tape frame 112 can respectively stretch the product substrate and the wafer tape to expand the stretched circuit traces and semiconductor device dies through the stretching force. However, for example, in the case where the material of the product substrate has minimal relative stretch/flexibility characteristics, stretching is not required. The device 100 may further include a transfer mechanism 114, such as a dot matrix transfer head (labeled 114 herein). As shown in the figure, it can be vertically arranged above the wafer tape 102. In an embodiment, the dot matrix transfer head 114 may be located at a position almost in contact with the wafer tape 102.

所述點陣轉移頭114可進一步包括導向頭116,多條衝撞線(118(1),118(2), . . .118(n);本文統稱為118)中的一條衝撞線118(1)插入導向頭的多個孔120中的一個孔,以在轉移操作期間保持每條衝撞線118的位置。例如,所述導向頭116能以m xn 矩陣配置佈置多條衝撞線118。在這種實施例中,所述多條衝撞線118可插入導向頭116的多個孔120中,從而引導多條衝撞線118在m xn 矩陣配置(例如,12x2矩陣配置,包含十二列、兩行孔)中驅動。附加地,所述導向頭116易於用具有相同或不同多孔配置的另一個導向頭替換。例如,可將第一導向頭附著在具有12x2矩陣配置,用於第一電路設計的點陣轉移頭114上。在不同於第一電路設計的第二電路設計中進行轉移時,可將具有8x3矩陣或其他配置的第二導向頭附著在點陣轉移頭100上,從而代替第一導向頭。在一則實施例中,所述導向頭106包括底側和與底側相對的附著側,所述導向頭116以可拆卸方式透過附著側附著在點陣轉移頭114上。The dot matrix transfer head 114 may further include a guide head 116, and one collision line 118(1) among multiple collision lines (118(1), 118(2),... 118(n); collectively referred to as 118 herein). ) Insert one of the plurality of holes 120 of the guide head to maintain the position of each collision line 118 during the transfer operation. For example, the guide head 116 can arrange multiple collision lines 118 in an m x n matrix configuration. In this embodiment, the plurality of collision wires 118 can be inserted into the plurality of holes 120 of the guide head 116, so as to guide the plurality of collision wires 118 in a m x n matrix configuration (for example, a 12x2 matrix configuration, including twelve columns). , Two rows of holes) in the drive. Additionally, the guide head 116 can be easily replaced with another guide head having the same or different porous configuration. For example, the first guide head can be attached to the dot matrix transfer head 114 having a 12x2 matrix configuration for the first circuit design. When transferring in a second circuit design different from the first circuit design, a second guide head having an 8×3 matrix or other configuration can be attached to the dot matrix transfer head 100 to replace the first guide head. In one embodiment, the guide head 106 includes a bottom side and an attachment side opposite to the bottom side, and the guide head 116 is detachably attached to the dot matrix transfer head 114 through the attachment side.

所述多條衝撞線118可與促動器122連接。所述促動器122可包括與多條衝撞線118連接的電機(未顯示),所述電機用於按預定/程式設計時間,將多條衝撞線118朝向晶圓膠帶102驅動。在這種實施例中,所述促動器122和/或裝置100可與控制器(未顯示)通訊耦合,所述控制器用於啟動/控制促動器122和/或本文所述的其他功能。在一則實施例中,所述多條衝撞線118可用於將未封裝半導體器件晶粒124從晶圓膠帶102直接轉移至產品襯底104上,使至少一個半導體器件晶粒124與至少一片電路跡126接觸並黏合。由於所述點陣轉移頭114包括多條衝撞線118,可將所述點陣轉移頭114配置並程式設計為同時轉移多個半導體器件晶粒124的形式。附加地,且/或可替代地,所述點陣轉移頭114可採用多條衝撞線118,按順序轉移多個半導體器件晶粒124。圖1顯示了三條衝撞線118。但在一則實施例中,點陣轉移頭114可包括兩條或多條衝撞線118。例如,所述多條衝撞線118可包括數量為2、3、6、12、24等的衝撞線,所述數量亦可為範例數量之間或大於範例數量的值。The multiple collision wires 118 may be connected with the actuator 122. The actuator 122 may include a motor (not shown) connected to a plurality of collision wires 118, and the motor is used to drive the plurality of collision wires 118 toward the wafer tape 102 according to a predetermined/programmed time. In such an embodiment, the actuator 122 and/or the device 100 may be communicatively coupled with a controller (not shown) that is used to activate/control the actuator 122 and/or other functions described herein . In one embodiment, the multiple collision lines 118 can be used to directly transfer the unpackaged semiconductor device die 124 from the wafer tape 102 to the product substrate 104, so that at least one semiconductor device die 124 is connected to at least one circuit trace. 126 touch and bond. Since the dot matrix transfer head 114 includes multiple collision lines 118, the dot matrix transfer head 114 can be configured and programmed to transfer multiple semiconductor device dies 124 at the same time. Additionally, and/or alternatively, the dot matrix transfer head 114 may use multiple collision lines 118 to transfer multiple semiconductor device dies 124 in sequence. Figure 1 shows three collision lines 118. However, in an embodiment, the dot matrix transfer head 114 may include two or more collision lines 118. For example, the plurality of collision lines 118 may include collision lines of 2, 3, 6, 12, 24, etc., and the number may also be between or greater than the number of examples.

無論數量如何,所述多條衝撞線的每條衝撞線皆可獨立驅動,以單獨並/或按一組或多組驅動多條衝撞線118中的單條衝撞線。即,例如,所述點陣轉移頭114可一次驅動單條衝撞線118(1),一次驅動兩條或多條衝撞線(例如,118(1)和118(n)),且/或一次驅動多條衝撞線118中的所有衝撞線。在這種實施例中,一組多條衝撞線118之採用,可使轉移機構的晶粒轉移效率高於採用單條衝撞線的機構。例如,所述點陣轉移頭114在產品襯底上移動時,採用多條衝撞線118的轉移機構可一次轉移一個以上的晶粒。透過一組多條衝撞線118或一組多個針118轉移多個晶粒,可大幅度縮短總轉移時間,並減少轉移機構在其他方式中需要移動的移動距離。在一則實施例中,所述多條衝撞線118可同時或按順序驅動。然而,在另一則實施例中,如上文所述,可同時或基本同時驅動多條衝撞線中的一條或一條以上(並非全部)。Regardless of the number, each of the plurality of collision lines can be independently driven to drive a single collision line of the plurality of collision lines 118 individually and/or in one or more groups. That is, for example, the dot matrix transfer head 114 may drive a single collision line 118(1) at a time, drive two or more collision lines at a time (for example, 118(1) and 118(n)), and/or drive at a time All the collision lines in the plurality of collision lines 118. In this embodiment, the use of a set of multiple collision lines 118 can make the transfer mechanism more efficient than a mechanism using a single collision line. For example, when the dot matrix transfer head 114 moves on the product substrate, the transfer mechanism using multiple collision lines 118 can transfer more than one die at a time. Transferring multiple dies through a set of multiple collision wires 118 or a set of multiple pins 118 can greatly shorten the total transfer time and reduce the moving distance of the transfer mechanism that needs to be moved in other ways. In one embodiment, the multiple collision lines 118 can be driven simultaneously or sequentially. However, in another embodiment, as described above, one or more (not all) of the multiple collision lines can be driven simultaneously or substantially simultaneously.

圖2圖解了以多節距配置設置多條衝撞線202的直接轉移裝置100,以及半導體器件晶粒204和電路跡206的一則實施例之俯視示意圖。如圖2所示,在多節距配置中,一行中的每條衝撞線202可互相均勻間隔。然而,在一則替代實施例中,所述多條衝撞線202可在多節距配置下不均勻間隔。在多節距配置中,所述多條衝撞線202可互相靠近。這種多節距配置將多條衝撞線202中的一條衝撞線與另一條衝撞線緊鄰佈置。如上文所述,採用多節距配置的原因是,所述多條衝撞線可容納以多種不同節距(或「間隔」)佈置的半導體器件晶粒和/或電路跡。由於一行中只有一條衝撞線與另一條衝撞線連續相鄰佈置,如果轉移過程中使用的半導體器件晶粒或電路跡固定在其各個框架中時的間距不均勻,可採用多節距配置。如上文所述,可附著導向頭,透過導向頭的多個孔,將多條衝撞線202佈置為圖2所示的配置,從而實現多節距配置。附加地,且/或可替代地,在一則實施例中,所述多條衝撞線202可附著在轉移機構上,以將多條衝撞線202佈置在多節距配置中。在多節距配置中,所述多條衝撞線202可間隔(例如)0.1mm至2mm、0.25mm至1mm、0.35mm至0.75mm、0.4mm至0.6mm。FIG. 2 illustrates a schematic top view of an embodiment of the direct transfer device 100 in which multiple collision lines 202 are arranged in a multi-pitch configuration, and an embodiment of the semiconductor device die 204 and the circuit trace 206. As shown in Figure 2, in a multi-pitch configuration, each of the collision lines 202 in a row can be evenly spaced from each other. However, in an alternative embodiment, the multiple collision lines 202 may be unevenly spaced in a multi-pitch configuration. In a multi-pitch configuration, the multiple collision lines 202 may be close to each other. This multi-pitch configuration arranges one of the multiple collision lines 202 in close proximity to the other collision line. As mentioned above, the reason for adopting the multi-pitch configuration is that the multiple collision lines can accommodate semiconductor device dies and/or circuit traces arranged at a variety of different pitches (or “intervals”). Since only one collision line in a row is continuously adjacent to another collision line, if the semiconductor device dies or circuit traces used in the transfer process are fixed in their respective frames with uneven spacing, a multi-pitch configuration can be used. As described above, a guide head can be attached, and multiple collision lines 202 can be arranged in the configuration shown in FIG. 2 through multiple holes of the guide head, thereby realizing a multi-pitch configuration. Additionally, and/or alternatively, in one embodiment, the plurality of collision lines 202 may be attached to a transfer mechanism to arrange the plurality of collision lines 202 in a multi-pitch configuration. In a multi-pitch configuration, the plurality of collision lines 202 may be spaced, for example, 0.1 mm to 2 mm, 0.25 mm to 1 mm, 0.35 mm to 0.75 mm, 0.4 mm to 0.6 mm.

在一則實施例中,可將半導體器件晶粒204轉移至衝撞線202、半導體器件晶粒204和電路跡206全部對準的位置,以向半導體器件晶粒204驅動衝撞線202,使衝撞線在半導體器件晶粒204上施壓,使其接觸電路跡206並與其黏合。這種位置如位置A所示。附加地,且/或可替代地,在一則實施例中,所述三個部件(衝撞線、半導體器件晶粒和電路跡)不完全對準亦能進行轉移。例如,在一則實施例中,如果所述部件在容限閾值的範圍內對準,亦可轉移所述半導體器件晶粒204。位置B和C顯示了三個部件未通過中心軸對準,但仍可轉移半導體器件晶粒204的可能位置。可根據最終產品品質的限制條件,確定這種容限。In one embodiment, the semiconductor device die 204 can be transferred to a position where the collision line 202, the semiconductor device die 204, and the circuit trace 206 are all aligned to drive the collision line 202 to the semiconductor device die 204, so that the collision line is in Pressure is applied to the semiconductor device die 204 to make it contact and bond with the circuit trace 206. This position is shown in position A. Additionally, and/or alternatively, in one embodiment, the three components (impact line, semiconductor device die, and circuit trace) can be transferred without being completely aligned. For example, in one embodiment, if the components are aligned within the tolerance threshold, the semiconductor device die 204 may also be transferred. Positions B and C show that the three components are not aligned through the central axis, but the possible positions of the semiconductor device die 204 can still be transferred. This tolerance can be determined according to the quality constraints of the final product.

圖3圖解了以匹配節距配置設置多條衝撞線302的直接轉移裝置100,以及半導體器件晶粒304和電路跡306的一則實施例之俯視示意圖。如圖3所示,在匹配結局配置中,每條衝撞線302與另一種類型的部件對準。在圖3所示的特定實施例中,所述多條衝撞線302在匹配節距配置下與電路跡306對準。附加地,且/或可替代地,在一則實施例中,所述多條衝撞線302可與半導體器件晶粒304對準。在一則實施例中,所述多條衝撞線302可與相互間隔更均勻的另一個部件對準。例如,如果每片電路跡306之間的間隔更均勻,所述多條衝撞線302將在匹配節距配置下與電路跡306對準。然而,如果半導體器件晶粒304的間隔更均勻,所述多條衝撞線302將在匹配節距配置下與半導體器件晶粒304對準。所述匹配節距配置,可使其中兩個部件在兩次轉移操作之間基本保持靜止,同時根據需要,調整第三個部件。例如,如果所述多條衝撞線302在匹配節距配置下與電路跡306對準,所述半導體器件晶粒302可為進行轉移而需要調整的唯一部件。因此,無需將轉移機構、晶圓膠帶和產品襯底移動至與三個部件對準的位置,僅需在兩次轉移操作之間調整一個部件(例如,上面佈置有半導體器件晶粒的晶圓膠帶),即可確保三個部件全部充分對準。如上文所述,可附著導向頭,透過導向頭的多個孔,將多條衝撞線302佈置為圖3所示的匹配節距配置,從而實現匹配節距配置。附加地,且/或可替代地,在一則實施例中,可使用可在匹配節距與多節距配置之間調整的導向頭,無需更換導向頭。進一步,在一則實施例中,所述多條衝撞線302可附著在轉移機構上,以將多條衝撞線302佈置在匹配節距配置中。FIG. 3 illustrates a schematic top view of an embodiment of the direct transfer device 100 in which a plurality of collision lines 302 are arranged in a matching pitch configuration, and an embodiment of the semiconductor device die 304 and the circuit trace 306. As shown in Figure 3, in the matched ending configuration, each impact line 302 is aligned with another type of component. In the particular embodiment shown in FIG. 3, the plurality of collision lines 302 are aligned with the circuit traces 306 in a matched pitch configuration. Additionally, and/or alternatively, in one embodiment, the plurality of collision lines 302 may be aligned with the semiconductor device die 304. In one embodiment, the plurality of collision lines 302 may be aligned with another component that is more evenly spaced from each other. For example, if the spacing between each piece of circuit trace 306 is more uniform, the multiple collision lines 302 will be aligned with the circuit trace 306 in a matching pitch configuration. However, if the semiconductor device dies 304 are spaced more uniformly, the multiple collision lines 302 will be aligned with the semiconductor device dies 304 in a matching pitch configuration. The matching pitch configuration can make two of the components basically remain stationary between two transfer operations, and at the same time, adjust the third component as needed. For example, if the multiple collision lines 302 are aligned with the circuit traces 306 in a matched pitch configuration, the semiconductor device die 302 may be the only component that needs to be adjusted for transfer. Therefore, there is no need to move the transfer mechanism, wafer tape, and product substrate to a position aligned with the three components, and only one component (for example, a wafer with semiconductor device dies arranged on it) needs to be adjusted between two transfer operations. Tape) to ensure that all three components are fully aligned. As described above, the guide head can be attached, and the multiple collision lines 302 can be arranged in the matching pitch configuration shown in FIG. 3 through the multiple holes of the guide head, thereby achieving the matching pitch configuration. Additionally, and/or alternatively, in one embodiment, a guide head that can be adjusted between a matching pitch and a multi-pitch configuration can be used without the need to replace the guide head. Further, in an embodiment, the plurality of collision wires 302 may be attached to the transfer mechanism to arrange the plurality of collision wires 302 in a matching pitch configuration.

在一則實施例中,可至少部分根據產品襯底上的電路跡之節距和/或晶圓膠帶上的半導體器件晶粒之節距,選擇多節距或匹配節距配置。附加地,且/或可替代地,在一則實施例中,可將所述多條衝撞線分組,以多匹配配置佈置第一部分衝撞線佈置,以匹配節距配置佈置第二部分衝撞線。在一則實施例中,所述直接轉移裝置可自動切換導向頭,將多條衝撞線配置為多節距或匹配節距配置。附加地,且/或可替代地,操作人員可更改點陣轉移頭上的導向頭,以將針佈置在預期配置下。In one embodiment, a multi-pitch or matching pitch configuration can be selected based at least in part on the pitch of the circuit traces on the product substrate and/or the pitch of the semiconductor device die on the wafer tape. Additionally, and/or alternatively, in one embodiment, the plurality of collision lines may be grouped, the first partial collision line arrangement may be arranged in a multi-matching configuration, and the second partial collision line arrangement may be arranged in a matching pitch configuration. In one embodiment, the direct transfer device can automatically switch the guide head, and configure multiple collision lines in a multi-pitch or matching-pitch configuration. Additionally, and/or alternatively, the operator can modify the guide head on the dot matrix transfer head to place the needle in the desired configuration.

上述過程如圖4所示。為了便於說明,所述過程400至少一部分係由直接轉移裝置100進行。然而,在一則實施例中,所述過程400可由另一個裝置和/或外部控制器、計算資源或操作人員進行。應注意的是,任何一個和/或所有步驟皆可由操作人員進行。但由於本申請的性質及產品部件的尺寸和預期工作速度的原因,這些步驟最好由電子裝置的處理功能來完成。附加地,且/或可替代地,在一則實施例中,任何一個和/或所有步驟可完全自動化,並由直接轉移裝置100進行。The above process is shown in Figure 4. For ease of description, at least a part of the process 400 is performed by the direct transfer device 100. However, in an embodiment, the process 400 may be performed by another device and/or an external controller, computing resource, or an operator. It should be noted that any and/or all steps can be performed by the operator. However, due to the nature of the application, the size of the product components and the expected working speed, these steps are best performed by the processing function of the electronic device. Additionally, and/or alternatively, in one embodiment, any and/or all steps may be fully automated and performed by the direct transfer device 100.

在步驟402中,確定一個所述部件的節距。例如,半導體器件晶粒和/或電路跡。即,確定各個半導體器件晶粒和/或各片電路跡之間的間隔。In step 402, the pitch of one of the components is determined. For example, semiconductor device dies and/or circuit traces. That is, the interval between each semiconductor device die and/or each circuit trace is determined.

在步驟404中,至少部分根據確定的半導體器件晶粒和/或電路跡之節距,確定如何配置多條衝撞線。在這種實施例中,可確定將多條衝撞線配置為匹配節距配置還是多節距配置。該確定步驟可至少部分根據哪種配置,可更有效地將半導體器件晶粒從晶圓膠帶轉移至產品襯底上。In step 404, it is determined how to configure multiple collision lines based at least in part on the determined semiconductor device die and/or circuit trace pitch. In such an embodiment, it can be determined whether the multiple collision lines are configured in a matching pitch configuration or a multi-pitch configuration. The determining step can be based at least in part on which configuration can more effectively transfer the semiconductor device die from the wafer tape to the product substrate.

在步驟406中,所述多條衝撞線配置為匹配節距配置或多節距配置。在一個替代實施例中,所述衝撞線可配置為完全不同的配置(例如,圓形圖案、混合圖案等)。因此,可透過附著導向頭,將所述多條衝撞線佈置在特定配置下,從而佈置多條衝撞線。In step 406, the multiple collision lines are configured in a matching pitch configuration or a multi-pitch configuration. In an alternative embodiment, the collision line may be configured in a completely different configuration (for example, a circular pattern, a mixed pattern, etc.). Therefore, the plurality of collision lines can be arranged in a specific configuration by attaching the guide head, thereby arranging the plurality of collision lines.

圖5圖解了多節距配置中設置的多條衝撞線502之俯視示意圖,以及根據一則實施的可轉移半導體器件晶粒504直接轉移裝置100的範例運動。圖5圖解了使用多節距點陣轉移頭代替按一下打線轉移機構,或是採用固定衝撞線的多衝撞線機構之可能優勢。例如,圖5顯示了在半導體器件晶粒504和電路跡506的間隔不均勻之情況下,以多節距配置佈置多條衝撞線502的優勢。以一條緊跟另一條的方式間隔所述多條衝撞線502,可增加衝撞線與至少一種其他部件對準的機率。在某些實例中,可增加衝撞線與兩種其他部件對準的機率,以便進行轉移操作。例如,位置A和B代表無需對任何部件進行任何調整,便可進行轉移操作的位置。在一則實施例中,所述轉移機構可同時轉移多個半導體器件晶粒504。位置C可代表可能需要調整轉移頭和/或另一個部件的位置。在該範例中,所述轉移機構可能需要對點陣轉移頭和晶圓膠帶進行輕微調整,以在位置C進行轉移操作。在一則實施例中,所述轉移機構可優先進行只需進行輕微調整的轉移操作。然後,進行需要進行大幅調整的轉移操作。例如,在一則實施例中,所述轉移機構可在位置A、B和C轉移半導體器件晶粒504。然後,對下一行進行較大幅度的調整(或「跳動」)並調整部件,以在位置D完成轉移操作。下文參照圖7 對該過程進行了進一步說明。FIG. 5 illustrates a schematic top view of a plurality of collision lines 502 arranged in a multi-pitch configuration, and an exemplary movement of the transferable semiconductor device die 504 direct transfer apparatus 100 according to an implementation. Figure 5 illustrates the possible advantages of using a multi-pitch dot matrix transfer head instead of the one-click wire transfer mechanism, or a multi-collision line mechanism with a fixed collision line. For example, FIG. 5 shows the advantage of arranging multiple collision lines 502 in a multi-pitch configuration when the distance between the semiconductor device die 504 and the circuit trace 506 is not uniform. Separating the multiple collision lines 502 in such a manner that one immediately follows the other can increase the chance that the collision lines align with at least one other component. In some instances, the chance of the collision line being aligned with the two other components can be increased to facilitate the transfer operation. For example, positions A and B represent positions where the transfer operation can be performed without any adjustment of any parts. In one embodiment, the transfer mechanism can transfer multiple semiconductor device dies 504 at the same time. Position C may represent a position where the transfer head and/or another component may need to be adjusted. In this example, the transfer mechanism may require slight adjustments to the dot matrix transfer head and wafer tape to perform the transfer operation at position C. In one embodiment, the transfer mechanism may preferentially perform transfer operations that only require slight adjustments. Then, carry out the transfer operation that requires substantial adjustment. For example, in one embodiment, the transfer mechanism may transfer semiconductor device die 504 at positions A, B, and C. Then, make a larger adjustment (or "bounce") to the next row and adjust the parts to complete the transfer operation at position D. This process is further explained with reference to Figure 7 below.

圖6圖解了匹配節距配置中設置的多條衝撞線602之俯視示意圖,以及根據一則實施例的可轉移半導體器件晶粒604直接轉移裝置100的範例運動。圖6顯示了在半導體器件晶粒604或電路跡606的間隔基本均勻之情況下,以匹配節距配置佈置多條衝撞線602的優勢。在圖6所示的特定範例中,所述電路跡606的間隔相對均勻,所述多條衝撞線602與其對準。然而,在一則實施例中,所述多條衝撞線602可與半導體器件晶粒604對準。如圖6所示,將所述多條衝撞線602與電路跡606對準,可減少完成半導體器件晶粒604轉移所需的調整量。例如,圖6中的位置A和C顯示了無需進行任何調整,即可立即完成轉移的位置。在位置B,一個半導體器件晶粒604的輕微調整,係完成半導體器件晶粒604轉移所需的唯一調整操作。如上文所述,轉移機構可優先進行只需進行輕微調整的轉移操作。然後,進行需要進行大幅調整的轉移操作。在一則實施例中,所述轉移機構可對慢速移動軸進行輕微調整,同時對快速移動軸進行大幅調整,以「跳」到位置D。6 illustrates a schematic top view of a plurality of collision lines 602 arranged in a matching pitch configuration, and an exemplary movement of the direct transfer apparatus 100 for a transferable semiconductor device die 604 according to an embodiment. FIG. 6 shows the advantage of arranging multiple collision lines 602 in a matching pitch configuration when the spacing of the semiconductor device die 604 or the circuit trace 606 is substantially uniform. In the specific example shown in FIG. 6, the intervals of the circuit traces 606 are relatively uniform, and the multiple collision lines 602 are aligned therewith. However, in one embodiment, the multiple collision lines 602 may be aligned with the semiconductor device die 604. As shown in FIG. 6, aligning the multiple collision lines 602 with the circuit trace 606 can reduce the amount of adjustment required to complete the transfer of the semiconductor device die 604. For example, positions A and C in Figure 6 show the positions where the transfer can be completed immediately without any adjustments. At position B, the slight adjustment of a semiconductor device die 604 is the only adjustment operation required to complete the transfer of the semiconductor device die 604. As mentioned above, the transfer mechanism can give priority to transfer operations that require only minor adjustments. Then, carry out the transfer operation that requires substantial adjustment. In one embodiment, the transfer mechanism can make slight adjustments to the slow-moving axis, and at the same time make large adjustments to the fast-moving axis to "jump" to position D.

圖7圖解了根據本申請的一則實施例的確定轉移半導體器件晶粒直接轉移裝置100所進行的調整方法700。為了便於說明,所述過程700至少一部分係由直接轉移裝置100進行。然而,在一則實施例中,所述過程700可由其他裝置和/或外部控制器或計算資源進行。應注意的是,任何一個和/或所有步驟皆可由操作人員進行。但由於本申請的性質及產品部件的尺寸和預期工作速度的原因,這些步驟最好由電子裝置的處理功能來完成。附加地,且/或可替代地,在一則實施例中,任何一個和/或所有步驟可完全自動化,並由直接轉移裝置100進行。FIG. 7 illustrates an adjustment method 700 performed by the device 100 for determining the direct transfer of semiconductor device die according to an embodiment of the present application. For ease of description, at least a part of the process 700 is performed by the direct transfer device 100. However, in an embodiment, the process 700 may be performed by other devices and/or external controllers or computing resources. It should be noted that any and/or all steps can be performed by the operator. However, due to the nature of the application, the size of the product components and the expected working speed, these steps are best performed by the processing function of the electronic device. Additionally, and/or alternatively, in one embodiment, any and/or all steps may be fully automated and performed by the direct transfer device 100.

所述方法700(及本文所述的每個過程)顯示為邏輯流程圖,其中每個操作代表可由硬體、軟體或其組合實施的一系列操作。在軟體的場境中,所述操作代表存儲於一或多個電腦可讀介質的電腦可執行指令,所述指令由一或多個處理器執行時,執行所述操作。一般來說,電腦可執行指令包括進行特定功能,或是採用特定抽象資料類型的常式、程式、物件、元件、資料結構等。The method 700 (and each process described herein) is shown as a logical flow chart, where each operation represents a series of operations that can be implemented by hardware, software, or a combination thereof. In the context of software, the operations represent computer-executable instructions stored in one or more computer-readable media. When the instructions are executed by one or more processors, the operations are performed. Generally speaking, computer executable instructions include routines, programs, objects, components, data structures, etc. that perform specific functions or use specific abstract data types.

所述電腦刻度介質可包括非暫時性電腦刻度存儲介質,可包括硬碟、磁片、光碟、CD-ROM、DVD、唯讀記憶體(ROM)、隨機存取記憶體(RAM)、EPROMS、EEPROMS、快閃記憶體、磁卡或光學卡、固態記憶體裝置,或適用於存儲電子指令的其他類型的存儲介質。此外,在某些實施例中,所述電腦可讀介質可包括電腦可讀暫時訊號(壓縮或非壓縮形式)。電腦可讀訊號的範例(無論是否用載體進行調製)包括但不限於,指示託管或執行電腦程式的電腦系統可透過配置進行存取的訊號,包括透過 Internet 或其他網路下載的訊號。最後,除非另有說明,否則不應認為操作的描述順序具有限制性。任何數量的所述操作,皆能以任何順序組合且/或並列組合,以實施過程。The computer calibration medium may include non-transitory computer calibration storage media, which may include hard disks, floppy disks, optical disks, CD-ROMs, DVDs, read-only memory (ROM), random access memory (RAM), EPROMS, EEPROMS, flash memory, magnetic or optical cards, solid-state memory devices, or other types of storage media suitable for storing electronic instructions. In addition, in some embodiments, the computer-readable medium may include a computer-readable temporary signal (compressed or uncompressed). Examples of computer-readable signals (regardless of whether they are modulated by a carrier) include, but are not limited to, signals that instruct computer systems hosting or executing computer programs to be accessed through configuration, including signals downloaded through the Internet or other networks. Finally, unless otherwise stated, the order in which the operations are described should not be considered restrictive. Any number of the operations can be combined in any order and/or in parallel to implement the process.

在702中,裝置可確定一或多個部件的位置。在一則實施例中,所述裝置可確定每個部件的位置。上文使用的術語「部件」包括但不限於,轉移頭(例如,點陣轉移頭)、晶圓膠帶和佈置在晶圓膠帶上的各個半導體器件晶粒,以及產品襯底和產品襯底上的各片電路跡或預期轉移位置。因此,在步驟702中,所述裝置可確定這些部件中的每個部件位置。更特別地,在步驟702中,所述裝置可確定轉移頭正下方的位置,如圖2-5所示。所述裝置可確定每條衝撞線的位置,並可確定將多片電路跡和多個半導體器件晶粒佈置在周圍哪個位置。可在完成任何轉移操作之前,完成步驟702,使轉移裝置定位電路跡和半導體器件晶粒的位置並繪圖。在這種實施例中,所述裝置知曉電路跡和半導體器件晶粒的位置,只需確定轉移頭相對於其他部件的已知位置之相對位置。然而,在另一則實施例中,所述裝置可即時確定部件的位置。即,所述轉移頭在襯底上方移動時,一或多個感測器可進行「預測」,確定轉移過程完成時部件的位置。In 702, the device can determine the location of one or more components. In one embodiment, the device can determine the location of each component. The term "component" used above includes, but is not limited to, transfer head (for example, dot matrix transfer head), wafer tape and each semiconductor device die arranged on the wafer tape, as well as the product substrate and the product substrate Each piece of circuit trace or expected transfer position. Therefore, in step 702, the device may determine the position of each of these components. More specifically, in step 702, the device can determine the position directly below the transfer head, as shown in Fig. 2-5. The device can determine the position of each collision line, and can determine where to arrange the multiple circuit traces and the multiple semiconductor device dies around. Before any transfer operation is completed, step 702 can be completed to enable the transfer device to locate the circuit trace and the position of the semiconductor device die and draw. In this embodiment, the device knows the positions of the circuit traces and semiconductor device dies, and only needs to determine the relative position of the transfer head with respect to the known positions of other components. However, in another embodiment, the device can instantly determine the location of the component. That is, when the transfer head moves over the substrate, one or more sensors can "predict" and determine the position of the part when the transfer process is completed.

在步驟704中,所述裝置可確定是否有無需進行任何調整,即可進行轉移操作的任何位置。即,一旦所述轉移頭移動至特定位置,可確定是否有衝撞線、半導體器件晶粒和轉移位置(例如電路跡,本文作為範例轉移位置)充分對準的任何位置,以完成半導體器件晶粒的轉移。如上文所述,衝撞線、半導體器件晶粒和電路跡無需通過中心軸完全對準。然而,在一則實施例中,所述裝置可確定其是否在特定容限閾值的範圍內對準。可根據最終產品品質的限制條件,確定這種容限閾值。如果所述裝置確定這三個部件在閾值範圍內充分對準,所述過程將繼續進行步驟706。In step 704, the device can determine whether there is any position where the transfer operation can be performed without any adjustment. That is, once the transfer head moves to a specific position, it can be determined whether there is any position where the collision line, the semiconductor device die and the transfer position (such as the circuit trace, as an example transfer position in this article) are sufficiently aligned to complete the semiconductor device die Transfer. As mentioned above, the collision line, semiconductor device die, and circuit trace do not need to be completely aligned through the central axis. However, in one embodiment, the device can determine whether it is aligned within a certain tolerance threshold. This tolerance threshold can be determined according to the limiting conditions of the final product quality. If the device determines that the three components are sufficiently aligned within the threshold range, the process will continue to step 706.

在步驟706中,所述裝置可驅動與半導體器件晶粒和電路跡充分對準的至少一條和/或全部衝撞線。例如,如果所述裝置確定第一、第三和第四衝撞線與其他部件充分對準,所述轉移頭可同時或按順序驅動第一、第三和第四衝撞線。In step 706, the apparatus may drive at least one and/or all collision lines that are sufficiently aligned with the semiconductor device die and circuit traces. For example, if the device determines that the first, third, and fourth collision lines are sufficiently aligned with other components, the transfer head can drive the first, third, and fourth collision lines simultaneously or sequentially.

一旦所述裝置轉移了無需調整即可轉移的所有半導體器件晶粒,所述裝置可在步驟708中,確定當前位置是否有可以轉移的其他半導體器件晶粒。如果未透過輕微調整即可轉移的其他半導體器件晶粒,所述轉移頭可移動至下一個位置。或者,如果已轉移了半導體器件晶粒的整個晶圓膠帶,所述過程將在步驟710完成後結束。然而,如果仍有需要轉移的半導體器件晶粒,所述過程可從步驟702重新開始,如步驟710至步驟702的可選箭頭所示。可替代地,由於所述裝置確定了部件的位置,並在未調整之情況下轉移了可能的半導體器件晶粒,所述裝置可跳過步驟702和704。由於不進行調整之情況下,沒有其他的可能轉移位置,可按步驟704後的「否」路徑執行。在這種實施例中,步驟708後的「是」路徑可在步驟712後進行,如圖6所示。Once the device has transferred all semiconductor device dies that can be transferred without adjustment, the device may determine in step 708 whether there are other semiconductor device dies that can be transferred at the current location. If other semiconductor device dies can be transferred without slight adjustment, the transfer head can move to the next position. Alternatively, if the entire wafer tape of the semiconductor device die has been transferred, the process will end after step 710 is completed. However, if there are still semiconductor device dies that need to be transferred, the process can be restarted from step 702, as indicated by the optional arrows from step 710 to step 702. Alternatively, since the device determines the position of the component and transfers possible semiconductor device die without adjustment, the device can skip steps 702 and 704. Since there is no other possible transfer position without adjustment, it can be executed according to the "No" path after step 704. In this embodiment, the "yes" path after step 708 can be performed after step 712, as shown in FIG.

回到步驟704,如果所述裝置確定這三個部件在閾值範圍內未充分對準,所述過程將繼續進行步驟712。在步驟712中,所述裝置可確定需要最少調整量的半導體器件轉移位置。因此,所述裝置將確定需要最少移動量、能以最少時間量完成的下一個轉移操作。然而,在一則實施例中,在步驟712中,所述裝置可確定能夠優化在指定位置(即,晶圓膠帶的橫截面上)完成剩餘轉移操作所需的調整量的一系列移動。Returning to step 704, if the device determines that the three components are not sufficiently aligned within the threshold range, the process will proceed to step 712. In step 712, the apparatus may determine the transfer position of the semiconductor device that requires the least amount of adjustment. Therefore, the device will determine the next transfer operation that requires the least amount of movement and can be completed in the least amount of time. However, in one embodiment, in step 712, the device may determine a series of movements that can optimize the amount of adjustment required to complete the remaining transfer operation at the specified position (ie, the cross section of the wafer tape).

在步驟714中,所述裝置可調整一或多個部件,使三個部件充分對準,以完成轉移操作。在上文所述的多節距配置中,所述裝置最多可調整全部三個部件。所述裝置可在多節距配置中同時調整全部三個部件,以限制三個部件對準所需的任何一個部件之移動距離。因此,縮短了兩次轉移操作之間的時間。然而,所述裝置可將一或多個部件保持靜止。相對於第一部件移動一或多個其他部件,與圖4所示的範例類似。在上文所述的匹配節距配置中,所述裝置可將其中兩個部件保持靜止,僅小幅調整另一個部件,與圖5所示的範例類似。In step 714, the device may adjust one or more components so that the three components are fully aligned to complete the transfer operation. In the multi-pitch configuration described above, the device can adjust up to all three components. The device can simultaneously adjust all three components in a multi-pitch configuration to limit the movement distance of any one component required for the alignment of the three components. Therefore, the time between two transfer operations is shortened. However, the device can hold one or more components stationary. Moving one or more other components relative to the first component is similar to the example shown in FIG. 4. In the above-mentioned matching pitch configuration, the device can keep two of the components stationary and only slightly adjust the other component, similar to the example shown in FIG. 5.

在步驟716中,一旦完成調整,轉移了至少一個半導體器件晶粒,所述裝置可確定進行調整之後,是否有可以轉移的其他半導體器件晶粒。In step 716, once the adjustment is completed and at least one semiconductor device die is transferred, the apparatus can determine whether there are other semiconductor device die that can be transferred after the adjustment is performed.

在步驟718中,所述裝置可驅動與半導體器件晶粒和電路跡充分對準的至少一條和/或全部衝撞線。In step 718, the apparatus may drive at least one and/or all collision lines that are sufficiently aligned with the semiconductor device die and circuit traces.

所述過程可返回步驟708,確定與轉移頭接近的位置是否有其他要轉移的半導體器件晶粒。The process may return to step 708 to determine whether there are other semiconductor device die to be transferred at a position close to the transfer head.

如上文所述,在一則實施例中,所述裝置可優先進行不同移動軸上的大幅和小幅調整。例如,在步驟714中進行的小幅調整(或所需的調整距離低於預定距離閾值的調整),可在裝置的慢速移動軸上進行,大幅調整(或所需的調整距離高於預定距離閾值的調整。例如,切換列,或是將轉移頭移動至步驟710的下一個位置)可在快速移動軸上進行。如此一來,即可優化裝置的能力,縮短兩次轉移操作之間的時間。然而,在一則實施例中,所述過程能以相反方式進行,在快速移動軸上進行小幅移動,在慢速移動軸上進行大幅移動。在需要進行大量小幅調整,進行小幅調整所需的總時間大於進行大幅調整所需的時間之情況下,這種方式具有優勢。應注意的是,在本申請的特定範例中,「小幅」和「大幅」移動可為微米級,「快速」和「慢速」移動可為毫秒級。例如,小幅調整可約為0.45mm+/-50微米或以下,大幅調整可約為2mm。此外,「快速」移動可為0.1至10毫秒,而慢速移動可為10至30毫秒。所述數量僅為範例,並不限制所述的功能或動作。 總結As mentioned above, in one embodiment, the device can prioritize large and small adjustments on different moving axes. For example, the small adjustment performed in step 714 (or the adjustment where the required adjustment distance is lower than the predetermined distance threshold) can be performed on the slow moving axis of the device, and the large adjustment (or the required adjustment distance is higher than the predetermined distance) The adjustment of the threshold. For example, switching columns, or moving the transfer head to the next position in step 710) can be performed on the fast moving axis. In this way, the capacity of the device can be optimized and the time between two transfer operations can be shortened. However, in one embodiment, the process can be performed in the opposite way, with small movements on the fast moving axis and large movements on the slow moving axis. This method has advantages when a large number of small adjustments are required, and the total time required for small adjustments is greater than the time required for large adjustments. It should be noted that in the specific example of this application, "small" and "large" movements can be in the order of micrometers, and "fast" and "slow" movements can be in the order of milliseconds. For example, a small adjustment may be about 0.45mm +/-50 microns or less, and a large adjustment may be about 2mm. In addition, the "fast" movement can be 0.1 to 10 milliseconds, and the slow movement can be 10 to 30 milliseconds. The number described is only an example, and does not limit the functions or actions described. to sum up

上文以結構特徵/或方法行為的特有語言,對多則實施例進行了說明。但應理解的是,權利要求並不限於所述的特定特徵或行為。相反,所述特徵和行為是實施所聲明主題的說明性形式。此外,本文使用的術語「可」係指一或多則實施例,而非所有實施例中使用的特定特徵之可能性。In the above, a number of embodiments have been described in terms of structural features/or method behavior. However, it should be understood that the claims are not limited to the specific features or behaviors described. Rather, the described features and behaviors are illustrative forms of implementing the claimed subject matter. In addition, the term "may" used herein refers to one or more embodiments, not the possibility of specific features used in all embodiments.

100、200、300、500、600:直接轉移裝置 102:晶圓膠帶 104:產品襯底 106:產品襯底輸送機構 108:晶圓膠帶輸送機構 110:產品襯底框架 112:晶圓膠帶框架 114:轉移機構(點陣轉移頭) 116:導向頭 118(1)、118(2)、118(n)、202、302、502、602:衝撞線 120:孔 122:促動器 124、204、304、504、604:半導體器件晶粒 126、206、306、506、606:電路跡 400、700:方法(過程) 402、404、406、702、704、706、708、710、712、714、716、718:步驟100, 200, 300, 500, 600: direct transfer device 102: Wafer tape 104: product substrate 106: Product substrate conveying mechanism 108: Wafer tape conveying mechanism 110: product substrate frame 112: Wafer tape frame 114: Transfer mechanism (dot matrix transfer head) 116: guide head 118(1), 118(2), 118(n), 202, 302, 502, 602: collision line 120: hole 122: Actuator 124, 204, 304, 504, 604: semiconductor device die 126, 206, 306, 506, 606: circuit trace 400, 700: method (process) 402, 404, 406, 702, 704, 706, 708, 710, 712, 714, 716, 718: steps

參考附圖進行了詳細說明。在附圖中,參考數字最左邊的數字表示該參考數字第一次出現的圖。不同附圖中使用的相同參考數字表示相似或相同的項目。此外,可認為附圖對單一圖中的單一部件相對尺寸提供了近似描述。然而,附圖並未按比例繪製,單一圖中和不同圖之間單一部件的相對尺寸,可能與圖示有所不同。特別地,某些圖可將部件顯示為特定尺寸或形狀。而在其他圖中,為了清晰起見,相同部件的比例可能較大或具有不同形狀。Detailed description is given with reference to the drawings. In the drawings, the leftmost number of the reference number indicates the figure where the reference number first appears. The use of the same reference numbers in different drawings indicates similar or identical items. In addition, the drawings may be considered to provide an approximate description of the relative dimensions of a single component in a single figure. However, the drawings are not drawn to scale, and the relative dimensions of a single part between a single drawing and different drawings may be different from the drawings. In particular, certain drawings may show parts as specific sizes or shapes. In other figures, for clarity, the proportions of the same parts may be larger or have different shapes.

圖1是處於轉移前位置直接轉移裝置的一則實施例之示意圖。Figure 1 is a schematic diagram of an embodiment of a direct transfer device in a pre-transfer position.

圖2圖解了多節距配置直接轉移裝置及電路跡和半導體器件晶粒之俯視示意圖。Figure 2 illustrates a schematic top view of a multi-pitch configuration direct transfer device, circuit traces and semiconductor device dies.

圖3圖解了匹配節距轉移裝置及電路跡和半導體器件晶粒之俯視示意圖。Figure 3 illustrates a schematic top view of a matching pitch transfer device, circuit traces and semiconductor device dies.

圖4圖解了確定直接轉移裝置的多條衝撞線配置方法。Figure 4 illustrates the method of determining the multiple collision lines of the direct transfer device.

圖5圖解了多節距配置中設置的多條衝撞線之俯視示意圖,以及根據本申請的一則實施例的可轉移半導體器件晶粒轉移裝置之範例運動。FIG. 5 illustrates a schematic top view of multiple collision lines arranged in a multi-pitch configuration, and an exemplary movement of a transferable semiconductor device die transfer apparatus according to an embodiment of the present application.

圖6圖解了匹配節距配置中設置的多條衝撞線之俯視示意圖,以及根據本申請的一則實施例的可轉移半導體器件晶粒轉移裝置之範例運動。FIG. 6 illustrates a schematic top view of a plurality of collision lines arranged in a matching pitch configuration, and an exemplary movement of a transferable semiconductor device die transfer apparatus according to an embodiment of the present application.

圖7圖解了根據本申請的一則實施例的確定轉移半導體器件晶粒轉移裝置所進行的調整方法。FIG. 7 illustrates an adjustment method for determining a die transfer device for transferring a semiconductor device according to an embodiment of the present application.

100:直接轉移裝置 100: Direct transfer device

102:晶圓膠帶 102: Wafer tape

104:產品襯底 104: product substrate

106:產品襯底輸送機構 106: Product substrate conveying mechanism

108:晶圓膠帶輸送機構 108: Wafer tape conveying mechanism

110:產品襯底框架 110: product substrate frame

112:晶圓膠帶框架 112: Wafer tape frame

114:轉移機構(點陣轉移頭) 114: transfer mechanism (dot transfer head)

116:導向頭 116: guide head

118(1)、118(2)、118(n):衝撞線 118(1), 118(2), 118(n): collision line

120:孔 120: hole

122:促動器 122: Actuator

124:半導體器件晶粒 124: Semiconductor device die

126:電路跡 126: circuit trace

Claims (20)

一種裝置,可用於將多個半導體器件晶粒中的一個半導體器件晶粒從第一襯底直接轉移至第二襯底;該第一襯底具有第一側和第二側,該半導體器件晶粒佈置在所述第一襯底的所述第一側;該裝置包含: 第一框架,用於保持所述第一襯底; 第二框架,用於將所述第二襯底保持在與所述第一襯底之所述第一側相鄰的位置;以及 轉移機構,包括多條衝撞線,與所述第一框架相鄰佈置,在朝向所述第一襯底的所述第二側的方向上延伸,其中,該多條衝撞線佈置為多節距配置,該多節距配置將多條衝撞線互相均勻間隔。A device that can be used to directly transfer one semiconductor device die among a plurality of semiconductor device die from a first substrate to a second substrate; the first substrate has a first side and a second side, and the semiconductor device die The particles are arranged on the first side of the first substrate; the device includes: A first frame for holding the first substrate; A second frame for holding the second substrate at a position adjacent to the first side of the first substrate; and The transfer mechanism includes a plurality of collision lines arranged adjacent to the first frame and extending in a direction toward the second side of the first substrate, wherein the plurality of collision lines are arranged in multiple pitches Configuration, the multi-pitch configuration evenly spaced multiple collision lines from each other. 如請求項1之裝置,進一步包含導向頭,該導向頭經組態成用以將所述多條衝撞線佈置成第一矩陣配置。The device of claim 1, further comprising a guide head configured to arrange the plurality of collision lines in a first matrix configuration. 如請求項2之裝置,其中,該第一矩陣配置為m xn 矩陣,mn 包括任何實數。Such as the device of claim 2, wherein the first matrix is configured as an m x n matrix, and m and n include any real numbers. 如請求項1之裝置,其中,該裝置包括用於確定一或多個部件之間間隔的一或多個感應器,該部件至少包括所述多條衝撞線、所述半導體器件晶粒和所述第二襯底上之電路跡。The device of claim 1, wherein the device includes one or more inductors for determining the interval between one or more components, and the component includes at least the plurality of collision lines, the semiconductor device die, and the The circuit traces on the second substrate. 如請求項2之裝置,其中,該導向頭為第一導向頭,經組態成以與第二導向頭互換。Such as the device of claim 2, wherein the guiding head is the first guiding head and is configured to be interchangeable with the second guiding head. 如請求項5之裝置,其中,該第二導向頭經組態成將所述多條衝撞線佈置成第二矩陣配置,該第二矩陣配置與所述第一矩陣配置不同。The device of claim 5, wherein the second guiding head is configured to arrange the plurality of collision lines in a second matrix configuration, the second matrix configuration being different from the first matrix configuration. 如請求項1之裝置,其中,該多條衝撞線經組態以配置成基本上圓形圖案。The device of claim 1, wherein the plurality of collision lines are configured to be configured in a substantially circular pattern. 如請求項1之裝置,其中,該多條衝撞線經組態以配置成匹配節距配置。Such as the device of claim 1, wherein the multiple collision lines are configured to match the pitch configuration. 一種直接轉移裝置,可用於將半導體器件晶粒從第一襯底轉移至佈置在第二襯底上的電路跡上;該第一襯底具有第一側和第二側,該半導體器件晶粒佈置在所述第一襯底的所述第一側;該直接轉移裝置包含: 點陣轉移頭,包括: 衝撞線外殼,以及 多條衝撞線,佈置在所述衝撞線外殼內,並且向所述衝撞線外殼外部延伸,所述多條衝撞線佈置為矩陣配置,所述矩陣配置為匹配節距配置。A direct transfer device can be used to transfer semiconductor device die from a first substrate to a circuit trace arranged on a second substrate; the first substrate has a first side and a second side, and the semiconductor device die Arranged on the first side of the first substrate; the direct transfer device includes: Lattice transfer head, including: Impact line housing, and A plurality of collision lines are arranged in the collision line housing and extend to the outside of the collision line housing, the plurality of collision lines are arranged in a matrix configuration, and the matrix configuration is a matching pitch configuration. 如請求項9之直接轉移裝置,其中,該匹配節距配置包括所述多條衝撞線與所述半導體器件晶粒或所述電路跡其中之一的佈局對準佈置。The direct transfer device of claim 9, wherein the matching pitch configuration includes a layout alignment arrangement of the plurality of collision lines and the semiconductor device die or one of the circuit traces. 如請求項10之直接轉移裝置,其中,至少部分基於所述半導體器件晶粒還是所述電路跡的間隔更均勻之一者,來對準所述多條衝撞線。The direct transfer device of claim 10, wherein the plurality of collision lines are aligned based at least in part on the semiconductor device die or the one of the more evenly spaced circuit traces. 如請求項9之直接轉移裝置,進一步包含導向頭,該導向頭經組態成用以匹配節距配置方式固定多條衝撞線。For example, the direct transfer device of claim 9 further includes a guide head configured to match the pitch configuration to fix multiple collision lines. 如請求項12之直接轉移裝置,其中,該導向頭為第一導向頭,經組態成以與第二導向頭互換,該第二導向頭經組態成用於以多節距配置方式固定多條衝撞線。For example, the direct transfer device of claim 12, wherein the guiding head is the first guiding head and is configured to be interchangeable with the second guiding head, and the second guiding head is configured to be fixed in a multi-pitch configuration Multiple collision lines. 如請求項9之直接轉移裝置,其中,該直接轉移裝置經組態成用以在所述多條衝撞線與匹配節距配置下的電路跡對準時,調整所述半導體器件晶粒相對於所述多條衝撞線和電路跡的位置。The direct transfer device of claim 9, wherein the direct transfer device is configured to adjust the semiconductor device die relative to all the semiconductor device dies when the multiple collision lines are aligned with the circuit traces in the matching pitch configuration. Describe the positions of multiple collision lines and circuit traces. 一種裝置,可用於將半導體器件晶粒從晶圓膠帶直接轉移至產品襯底上的電路跡上;該裝置包含: 第一框架,用於保持所述晶圓膠帶,所述晶圓膠帶具有第一側和第二側,所述半導體器件晶粒佈置在所述晶圓膠帶的所述第一側; 第二框架,用於將所述產品襯底保持於所述晶圓膠帶的所述第一側相鄰;以及 固定在多條衝撞線第一端的點陣轉移頭內的多條衝撞線,所述多條衝撞線固定在點陣轉移頭內,使得所述多條衝撞線配置成匹配節距配置。A device that can be used to directly transfer semiconductor device die from wafer tape to circuit traces on the product substrate; the device includes: A first frame for holding the wafer tape, the wafer tape having a first side and a second side, and the semiconductor device die is arranged on the first side of the wafer tape; A second frame for holding the product substrate adjacent to the first side of the wafer tape; and The multiple collision lines are fixed in the dot matrix transfer head at the first end of the multiple collision lines, and the multiple collision lines are fixed in the dot matrix transfer head, so that the multiple collision lines are configured to match the pitch configuration. 如請求項15之裝置,其中,該第一框架和該第二框架分別用於拉伸所述晶圓膠帶和所述產品襯底。The device of claim 15, wherein the first frame and the second frame are used to stretch the wafer tape and the product substrate, respectively. 如請求項15之裝置,其中,該匹配節距配置包括m xn 矩陣配置。Such as the device of claim 15, wherein the matching pitch configuration includes an m x n matrix configuration. 如請求項17之裝置,其中,所述m xn 配置經組態成以與所述電路跡之間的間隔基本匹配。The device of claim 17, wherein the m x n configuration is configured to substantially match the interval between the circuit traces. 如請求項15之裝置,進一步包含用經組態以與所述第二導向頭互換的第一導向頭,該第二導向頭用於以多節距配置方式佈置所述多條衝撞線。The device of claim 15, further comprising a first guide head configured to be interchangeable with the second guide head, and the second guide head is used for arranging the multiple collision lines in a multi-pitch configuration. 如請求項15之裝置,其中,該點陣轉移頭經組態成可在所述匹配節距與多節距配置之間調節。The device of claim 15, wherein the dot matrix transfer head is configured to be adjustable between the matching pitch and the multi-pitch configuration.
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