TW202018959A - Cut solar cell, method for manufacturing the same and solar cell module - Google Patents

Abstract

A cut solar cell includes: a silicon substrate having a front surface, a back surface and a plurality of side surfaces, wherein the side surfaces are connected between the front and back surfaces; a passivation layer covering the front surface, the back surface and at least one of the side surfaces; a first patterned electrode passing through the passivation layer to connect the front surface and a first back sub-region of the back surface, and fully covering a first side surface of the side surfaces; and a second patterned electrode passing through the passivation layer to connect a second back sub-region of the back surface; wherein the surface electrical property of the front surface and the first back sub-region is a first electrical property, and the surface electrical property of the second back sub-region is a second electrical property, which is different from the first electrical property.

Description

Sliced solar cell, manufacturing method thereof and solar cell module

The invention relates to a sliced solar cell, a method for manufacturing the same, and a solar cell module, and in particular to a sliced solar cell, which is connected to an emitter region and a surface electric field by a side connection electrode (surface field) two kinds of bus electrodes are set on the back.

Referring to FIG. 1, which briefly illustrates the battery cascading method in current mainstream solar cell modules, the front side 91 and the back side 92 of the solar cell 9 are respectively provided with bus electrodes 94 and 95 for connecting a conductive ribbon 93. However, the bus electrode 94 provided on the front side causes a small effective light receiving area of the battery. Furthermore, the connection structure between the solar cells 9 in the solar cell module, that is, the conductive soldering tape, the two sections are connected to the front side 91 and the back side 92 of two adjacent solar cells 9 respectively. Some parts need to be bent, which may cause pressure on the edge of the solar cell 9, which may affect the reliability of the solar cell module.

In order to improve the power generation efficiency, there are considerations for reducing the series resistance loss of the battery string, such as a half-cut solar cell module, which is to cut the solar cell in half and then connect the half-cut solar cell in series to form a module as shown in FIG. 1 In this way, the current flowing through the battery string can be reduced to reduce the loss caused by the series resistance, but it still has the reliability problem similar to the traditional module.

Another way to improve the power generation efficiency of the module is to use high-efficiency solar cells, and the current mainstream high-efficiency silicon crystal solar cell structure is a double-sided passivated silicon crystal solar cell, such as emitter passivation and rear electrode (Passivated Emitter and Rear Cell, PERC). Battery structure or emitter passivation and backside diffused (Passivated Emitter Rear Locally-diffused, PERL) batteries, etc. The common point of this type of solar cells is that the silicon substrate has a passivation layer on the front and back of the silicon crystal substrate, and the front and back One is the p-type doped surface, The other is an n-type doped surface. One of the two doped surfaces serves as the emitter and the other as the surface electric field. In addition, the two surfaces are each provided with a passivation layer that is connected to the emitter and the surface electric field. Electrode and surface electric field electrode, the two electrodes usually include corresponding bus electrodes (in this specification, they are called emitter bus electrodes and surface electric field bus electrodes), in addition, the front of such batteries There are also a plurality of carrier collection electrodes, which are a plurality of parallel thin wire electrodes connected to the bus electrode, also known as finger electrodes. The width of the bus electrode is much larger than the carrier collection electrode, which has a great influence on the effective light receiving area of the battery.

In order to increase the effective light-receiving area on the front of the battery, a metal-wrap-through (MWT) battery structure has been proposed, which differs from the aforementioned double-sided passivated silicon crystal solar cell in that the emitter bus electrode and The surface electric field bus electrodes are located on the back of the battery substrate. The front of the battery is only provided with a carrier collection electrode. The carrier collection electrode is connected to the bus electrode on the back of the battery through the via-hole of the substrate. In other words, the two The bus electrodes are located on the back of the battery substrate, so the effective light receiving area on the front is large, which can improve the power generation efficiency. However, the process of the metal-penetrating cell includes forming a through-hole of the substrate, and then doping the relevant emitter and surface electric field area, and the conductive material needs to be filled in the through-hole to connect the electrodes on the front and back, the process sequence, the process machine It is far more complicated than mainstream double-sided passivation batteries, and it is difficult to reduce manufacturing costs.

Therefore, there is a need for a solar cell and module structure that can simultaneously achieve the efficiency advantages of metal penetration batteries and half-cut battery modules, and a corresponding solar cell process that can mostly use the mainstream double-sided passivation battery process and equipment To reduce related R&D and manufacturing costs.

An object of the present invention is to provide a sliced solar cell, which is connected to an electrode by a side surface, so that two types of bus electrodes respectively connected to an emitter region and a surface field are provided on the back surface.

According to the above purpose, the present invention provides a sliced solar cell, comprising: a silicon crystal substrate having a front surface, a back surface and a plurality of side surfaces, the plurality of side surfaces each connecting the front surface and the back surface; a passivation layer covering the front surface , At least one of the back surface and the plurality of side surfaces; a first patterned electrode passing through the passivation layer and A first back surface sub-region connected to the front surface and the back surface and covering one of the side surfaces; and a second patterned electrode connected to a second back surface of the back surface through the passivation layer Sub-region; wherein, the surface electrical properties of the front surface and the first back surface sub-region are first electrical properties, and the surface electrical properties of the second back surface sub-region are second electrical properties different from the first electrical properties.

According to the sliced solar cell of the present invention, (1) has the advantage of having a metal penetrating cell, that is, two kinds of bus electrodes connecting the emitter and the surface electric field are located on the back side, so that the effective light receiving area on the front side of the solar cell can be increased. (2) It has the advantage of slicing solar cell strings. Compared with the traditional solar cell module, the whole solar cells are connected in series to form a battery string. The current of the battery string formed by the slicing solar cell stringing of the present invention is smaller. It can reduce the power loss from the series resistance, thus improving the power generation efficiency. (3) Both the emitter bus electrode and the surface electric field bus electrode are on the back of the battery, which will not cause the fragmentation problem caused by the pressure on the battery edge caused by the bending of the conductive welding tape.

Another object of the present invention is to provide a method for manufacturing a sliced solar cell, which uses a selective electrode manufacturing process to simultaneously form a carrier collection electrode on the front of the battery, a side connection electrode on the side of a slice of the battery, and Another carrier bus electrode located on the back of the battery.

According to the manufacturing method of the sliced solar cell of the present invention, most of its production equipment and processes are common to the current mainstream double-sided passivation solar cell production equipment and processes, and the manufacturing process is also simpler than metal through-type batteries, which is beneficial to reduce research and development, Cost of production.

1‧‧‧Slice solar cell

1c‧‧‧Slice solar cell

1’‧‧‧Battery semi-finished products

1c’‧‧‧semi-finished battery

1”‧‧‧ Motherboard

10‧‧‧Silicon substrate

100‧‧‧Main body

101‧‧‧Surface electric field layer

102‧‧‧Emitter layer

11‧‧‧Front

11”‧‧‧Motherboard front

111‧‧‧Silicon crystal surface area

12‧‧‧Back

12”‧‧‧Back of motherboard

1211‧‧‧The first back sub-region

12110‧‧‧The first silicon crystal back surface area

1212‧‧‧Second back area

12120‧‧‧Second silicon back surface area

13‧‧‧Side

131‧‧‧Slice side

131’‧‧‧Slice side

14a‧‧‧First patterned electrode

14b‧‧‧Second patterned electrode

141‧‧‧First electrode

142‧‧‧Second electrode

143‧‧‧The third electrode

1431‧‧‧

144‧‧‧The fourth electrode

145‧‧‧ fifth electrode

15‧‧‧passivation layer

151‧‧‧Front anti-reflection layer

152‧‧‧Backside passivation layer

153‧‧‧Front passivation layer opening

154‧‧‧Backside passivation layer opening

1541‧‧‧The opening of the first back passivation layer

1542‧‧‧Second backside passivation layer opening

2‧‧‧Solar battery module

21‧‧‧Electrical connection structure

23‧‧‧Packaging materials

24‧‧‧Back plate

25‧‧‧Front glass plate

8‧‧‧Cutting line

8’‧‧‧cutting line

9‧‧‧solar battery

91‧‧‧Front

92‧‧‧Back

93‧‧‧conductive soldering tape

94‧‧‧Bus electrode

95‧‧‧Bus electrode

S10~S20‧‧‧Step

S110~S130‧‧‧Step

FIG. 1 is a schematic cross-sectional view of a conventional solar cell string.

FIG. 2 is a schematic top view of a sliced solar cell according to an embodiment of the invention.

FIG. 3 is a schematic perspective view of a sliced solar cell according to an embodiment of the present invention.

4a is a schematic cross-sectional view of the sliced solar cell of FIG. 2 along section line A-A.

4b is a schematic cross-sectional view of the sliced solar cell of FIG. 2 along section line B-B.

5 is a schematic perspective view of a sliced solar cell according to another embodiment of the invention.

FIG. 6 shows a flowchart of the method for manufacturing a slicing solar cell according to the first embodiment of the present invention.

7 is a schematic cross-sectional view of the method for manufacturing a slicing solar cell according to the first embodiment of the present invention, which shows the preparation of a mother board of a semi-finished battery cell.

8 is a schematic top plan view of a motherboard of a semi-finished battery product according to an embodiment of the invention.

9 is a schematic bottom plan view of a motherboard of a semi-finished battery product according to an embodiment of the invention.

FIG. 10 is a schematic cross-sectional view of a motherboard of a semi-finished battery product according to an embodiment of the present invention, which shows the opening of a passivation layer.

FIG. 11 is a schematic top plan view of a motherboard of a battery semi-finished product according to an embodiment of the present invention, which shows the opening of the passivation layer.

FIG. 12 is a schematic bottom plan view of a motherboard of a semi-finished battery cell according to an embodiment of the present invention, which shows the opening of the passivation layer.

13 is a schematic cross-sectional view of a method for manufacturing a slicing solar cell according to a first embodiment of the present invention, which shows a cutting process.

14 is a schematic top plan view of a semi-finished battery product according to an embodiment of the invention.

15 is a schematic bottom plan view of a semi-finished battery according to an embodiment of the invention.

16 is a schematic cross-sectional view of a method for manufacturing a plurality of sliced solar cells according to the first embodiment of the present invention, which shows a selective electrode deposition process.

FIG. 17 is a schematic cross-sectional view of a method for manufacturing a plurality of sliced solar cells according to another embodiment of the present invention, which shows a cutting process and a selective electrode deposition process.

FIG. 18 shows a flowchart of a method for manufacturing a sliced solar cell according to a second embodiment of the invention.

FIG. 19 is a schematic cross-sectional view of a method for manufacturing a plurality of sliced solar cells according to a second embodiment of the present invention, which shows a cutting process and a selective electrode deposition process.

20 is a schematic cross-sectional view of a solar cell module according to an embodiment of the invention.

In order to make the above objects, features and characteristics of the present invention more obvious and understandable, the relevant embodiments of the present invention are described in detail below with reference to the drawings.

2 and 3 show a schematic top view and a bottom perspective view of a sliced solar cell according to an embodiment of the present invention, and FIGS. 4a and 4b show schematic cross-sectional views of a sliced solar cell according to an embodiment of the present invention. Please refer to FIG. 2, FIG. 3, FIG. 4a and FIG. 4b, the sliced solar cell 1 includes: a silicon crystal substrate 10, a passivation layer 15, a first patterned electrode 14a (including the first to third electrodes 141, 142) , 143) and a second patterned electrode 14b (including the fourth electrode 144). The silicon substrate 10 has a front surface 11 (that is, a light-receiving surface), a back surface 12 and a plurality of side surfaces 13. The plurality of side surfaces 13 are respectively connected to the front surface 11 and the back surface 12. The first patterned electrode 14a passes through the passivation layer 15 to connect to the first back surface sub-region 1211 of the front surface 11 and the back surface 12, and covers one of the plurality of side surfaces 13 (i.e., the sliced side surface) 131). The second patterned electrode 14b passes through the passivation layer 15 to connect to a second back surface sub-region 1212 of the back surface 12.

In detail, the first electrode 141 (that is, the side connection electrode) covers one of the side surfaces 13 (that is, the slice side 131). The second electrode 142 (ie, carrier collection electrode, such as a front finger electrode) is disposed on the front surface 11 and connected to the first electrode 141. The third electrode 143 (that is, the first electrical bus part may be one of an emitter bus electrode or a surface electric field bus electrode), but is disposed on the back surface 12 and is connected to the first electrode 141. The fourth electrode 144 (that is, the back electrode, which may include an emitter bus electrode or another of the surface electric field bus electrodes, to And its corresponding carrier collection electrode, such as a back finger electrode), is disposed on the back surface 12 and is not connected to the third electrode 143. In this embodiment, the passivation layer 15 covers at least one side surface of the front surface 11, the back surface 12 and the plurality of side surfaces 13. For example, when the front surface 11, the back surface 12, and the other sides of the side surfaces 13 of the silicon substrate 10 are not covered by the first to fourth electrodes 141, 142, 143, and 144, the passivation layer 15 covered. It should be further noted that "covering" a surface means touching all of the surface; "covering" a surface means touching at least part of the surface. The aforementioned “first electrode 141 “covers up” the slice side surface 131 means that the first electrode 141 directly contacts and covers all of the slice side surface 131. The slicing side surface 131 is a side surface formed by a slicing process. Therefore, there is no passivation layer covering the entire exposed silicon crystal surface. The side surface is a straight line segment when viewed from the direction perpendicular to the front surface of the substrate. An example of the slicing process will be introduced.

The surface electrical properties of the front surface 11 and the first back surface sub-region 1211 are first electrical properties, and the surface electrical properties of the second back surface sub-region 1212 are second electrical properties different from the first electrical properties. In detail, the second electrode 142 is connected to a front surface area 111 of the silicon crystal of the front surface 11 (for example, a surface electric field layer 101 is provided). The third electrode 143 is connected to a first silicon back surface area 12110 (for example, provided with a main body portion 100) of one of the first back surface sub areas 1211, and the electrical properties of the front surface 11 and the first back surface sub area 1211 the same. The fourth electrode 144 is connected to a second silicon back surface area 12120 (for example, provided with an emitter layer 102) of one of the second back surface sub-regions 1212, and the second back surface sub-region 1212 and the first back surface sub-region The electrical properties of 1211 are reversed. The first side (that is, the slice side 131) and the first back sub-region 1211 have the same electrical properties. Furthermore, part of the first backside sub-region 1211 is covered by the passivation layer 15 and the rest is covered by the third electrode 143; and part of the second backside sub-region 1212 is covered by the passivation layer 15 and the rest is covered by The fourth electrode 144 is covered.

FIG. 5 shows a schematic perspective view of a sliced solar cell according to another embodiment of the invention. The first patterned electrode 14a includes the third electrode 143 (that is, the first electrical bus) on the back surface 12, and the first electrode 141 (that is, the side connection electrode) on the side surface 13, the The third electrode 143 has multiple unconnected Each segment 1431 is connected to the first electrode 141. Compared to the connected third electrode 143 of FIG. 3, for a solar cell in which the emitter layer is provided on the back side, the third electrode 143 of FIG. 5 with a non-connected segmented design can expand the emitter layer. Distribution area helps to improve battery efficiency.

FIG. 6 shows a flowchart of the method for manufacturing a slicing solar cell according to the first embodiment of the present invention. The manufacturing method of the sliced solar cell includes the following steps: In step S110, prepare a mother board of a semi-finished battery cell. Please refer to FIG. 7, which shows a schematic cross-sectional view of the motherboard of the semi-finished battery. The mother board 1" of the semi-finished battery includes: a silicon crystal substrate 10, having a mother board front 11", a mother board back 12", and a plurality of sides 13, the sides 13 connecting the mother board front 11" and the mother The back surface 12" of the board; and a passivation layer 15 covering the front surface 11" of the mother board, the back surface 12" of the mother board and the side surfaces 13. The mother board 1" can be manufactured by the manufacturing process and production equipment of ordinary PERC or PERL solar cells .

For example, the passivation layer 15 may include a front anti-reflection layer 151 and a back passivation layer 152. The front anti-reflection layer 151 is located on the front surface 11 ″ of the motherboard, and the back passivation layer 152 is located on the rear surface 12 ″ of the motherboard. The front anti-reflection layer 151 may be a layer body with reduced reflectance of incident light, and may be a single-layer or multi-layer structure, which may also have a passivation effect. The back surface passivation layer 152 may also have a single-layer or multi-layer structure and have a passivation effect. The front anti-reflective layer 151 and the back passivation layer 152 are not usually formed at the same time. Furthermore, the materials and structures of the front anti-reflection layer and the back passivation layer are usually different due to the corresponding electrical properties of the covered surface. For example, silicon oxide, silicon nitride and aluminum oxide. The front anti-reflective layer 151 and the back passivation layer 152 will cover the side of the silicon substrate 10 during the formation process, that is, one of them or together form the part of the passivation layer 15 on the side of the motherboard 1" .

The silicon crystal substrate 10 can convert photovoltaic energy into electrical energy by a photovoltaic effect, such as a silicon substrate having a PN junction (P/N junction) or a PIN junction (PIN junction), such as a single crystal silicon or polycrystalline silicon substrate . The silicon crystal substrate 10 has an emitter layer 102 and a surface electric field layer 101. The main body of the silicon substrate 10 The portion 100 and the surface electric field layer 101 may be of the first conductivity type, the emitter layer 102 may be of the second conductivity type and located in the silicon crystal substrate 10 near the back surface 12, and the surface electric field layer 101 is located in the silicon crystal The substrate 10 is located near the front surface 11" of the motherboard. Please refer to FIGS. 8 and 9, which show schematic top and bottom plan views of the motherboard 1" of the semi-finished battery. Reference number 8 shows the future cutting line position.

Take the case where the semi-finished product of the n-type solar cell substrate is used as the mother board: (1) The surface electric field layer 101 can be doped by phosphorus diffusion or ion implantation. (2) The emitter layer 102 can be doped by boron diffusion or ion distribution. (3) The front anti-reflection layer 151 and the back passivation layer 152 can be manufactured according to the processes of the front emitter passivation and back partial diffusion (PERL) solar cell front anti-reflection layer and back passivation layer, but the two surface electrical properties of the back The shape and position of the area must be determined according to the cutting line of the subsequent slicing process.

10-12, the passivation layer 15 on the front surface 11" of the motherboard is perforated so that the passivation layer 15 on the front surface 11 has a front surface passivation layer opening 153 to expose the front surface 11" of the motherboard The front surface area 111 of the silicon crystal (for example, the surface electric field layer 101 is provided). The passivation layer 15 on the back surface 12" of the mother board is also perforated, so that the passivation layer 15 on the back surface 12" of the mother board has first and second back surface passivation layer openings 1541, 1542, respectively exposing the mother board The first silicon back surface area 12110 of the first back surface sub-area 1211 of the back surface 12" (for example, provided with the main body portion 100) and the second silicon crystal back surface area 12120 of the second back surface sub-area 1212 (for example, provided with the emitter Layer 102). Reference number 8 shows the position of the cutting line in the future, and the position of the aforementioned opening pattern must be determined according to the position of the cutting line.

In step S120, a cutting process is performed. Please refer to FIG. 13, FIG. 11 and FIG. 12, the cutting process includes: cutting the mother board 1 ″ along a cutting line 8 to obtain at least one battery semi-finished product 1 ′. For example, a laser plus a sliver step can be used to complete the process Cutting process. Please refer to FIG. 14 and FIG. 15, the cutting line 8 separates the mother board front face 11", mother board back face 12", first back face sub-area 1211 and second back face sub-area 1212 The front surface 11, the back surface 12, the first back surface sub-region 1211 and the second back surface sub-region 1212 of the two battery semi-finished products 1', and the battery semi-finished product 1'has a first side that exposes the battery semi-finished product 1'due to the cutting process (That is, the side 131 of the slice). The slicing side 131 is a side formed by a slicing process, so there is no passivation on it The layer is covered by the entire exposed silicon crystal surface, and when viewed from the direction perpendicular to the front surface of the substrate, the side surface is a straight line segment. In this embodiment, the mother board 1" is divided into two semi-finished batteries 1'. The semi-finished battery 1'formed has only one sliced side 131, and the other sides are still covered by the passivation layer 15.

In step S130, an electrode process is performed. The electrode process may be a selective electrode deposition process. In this specification, the selective electrode deposition process means that the electrode is not substantially deposited on the passivation layer, but only deposited on the surface of the silicon crystal substrate exposed by the opening of the passivation layer (such as the aforementioned silicon crystal positive Surface area or silicon back surface area). 16 and 15, the selective electrode deposition process includes: forming a first electrode 141, a second electrode 142, and a third electrode 143 connected to each other on the slice side surface 131 of the semi-finished battery 1', The silicon front surface area 111, the first silicon back surface area 12110; and forming a fourth electrode 144 on the second silicon back surface area 12120 of the semi-finished battery 1', the fourth electrode 144 and the third The electrodes 143 are not connected, so as to complete the sliced solar cell 1, wherein the first patterned electrode 14a includes first to third electrodes 141, 142, 143, and the second patterned electrode 14b includes a fourth electrode 144. In this embodiment, the fourth electrode 144, the first electrode 141, the second electrode 142, and the third electrode 143 can be formed in the same electrode deposition process.

For example, the selective electrode deposition process may include a selective electroless plating step and first and second direct plating steps. The selective electroless plating step means that the plating rate of the electroless plating process on the surface of the solar cell substrate 10 (such as the silicon substrate) is much greater than the plating rate of the electroless plating process on the surface of the passivation layer 15, even if the solar cell The front surface 11, back surface 12 and passivation layer 15 of the substrate 10 may be in contact with the plating solution at the same time, but during this process, a plating layer (ie, a seed layer) is substantially formed only on the exposed front surface of the silicon crystal substrate 10 11 and the back surface 12, and the deposition amount of the plating layer on the passivation layer 15 is zero or so small that no additional steps are required for removal. For example, Taiwan Patent Application No. 107128048 discloses that the selective electroless plating step can be a gold immersion process. For example, the invention can make the slice by immersing the battery semi-finished product 1'in the solution of the gold immersion process by a clamping jig The side surface 131, the silicon crystal front surface area 111, the first silicon crystal back surface area 12110 and the second silicon crystal back surface area 12120 (ie, the area to be plated) are in contact with the solution, and the solution of the gold immersion process is used to provide Gold ions are deposited as gold particles as a seed layer. The components of the solution in the gold immersion process include a chlorogold compound and a surface treatment agent. The gold compound selected from chlorine gold chloride (AuCl ₃ or AuCl ₄ ^-), chloroauric acid (HAuCl _4), potassium gold chloride group (KAuCl ₄₎ and sodium chloroaurate (NaAuCl ₄₎ composed of the At least one of them.

The first direct plating step is to form a first plating layer (such as a nickel layer, not shown) on the first plating layer by electroplating the seed layer. For example, the direct plating step refers to the slicing side surface 131 of the battery semi-finished product 1', the silicon crystal front surface area 111, the first silicon crystal back surface area 12110 and the second silicon crystal back surface area 12120 (i.e. Plating area) Immersed in the relevant processing solution (containing nickel ions) of the electroplating process, and then directly contact the area to be plated with a plurality of plating probes (not shown), and apply a bias voltage to electroplat a nickel layer On the area to be plated, the nickel layer covers the gold on the slice side surface 131, the silicon front surface area 111, the first silicon back surface area 12110 and the second silicon back surface area 12120 particle. The second direct plating process forms a second plating layer (such as a copper layer, not shown) on the first plating layer (such as a nickel layer).

The second electrode 142 is connected to the front surface area 111 of the silicon crystal of the front surface 11. The third electrode 143 is connected to the first silicon back surface region 12110 of the first back surface sub-region 1211, and the front surface 11 and the first back surface sub-region 1211 have the same electrical properties. The fourth electrode 144 is connected to the second silicon back surface region 12120 of the second back surface sub-region 1212, the first back surface sub-region 1211 and the second back surface sub-region 1212 are not connected, and the second back surface sub-region 1212 and the first back surface sub-area 1211 are electrically opposite. The slice side surface 131 and the first back surface sub-region 1211 have the same electrical properties.

In another embodiment, the passivation layer opening pattern may be performed after the slicing process, that is, after slicing the mother board 1" as shown in FIG. 7, the passivation layer opening process is performed on the individual battery semi-finished products 1'.

In another embodiment, the fourth electrode 144 may be formed by an independent electrode process. For example, the fourth electrode 144 may be formed by screen printing conductive paste and then sintering, and the first to third electrodes 141, 142 and 143 is formed by the aforementioned selective electrode deposition process. In addition, the independent electrode process of the fourth electrode 144 can be It is performed after the slicing process, that is, on the individual battery semi-finished products 1', respectively, or before the slicing process, that is, after performing the independent electrode process on the mother board 1", then slicing.

Referring again to FIG. 5, the third electrode 143 has a plurality of unconnected segments 1431, and each segment 1431 is connected to the first electrode 141.

According to the slicing solar cell and its manufacturing process of the present invention, (1) is similar to the MWT cell, there is no bus electrode on the front of the cell, and the effective light receiving area is large. (2) The connection of the side connection electrode, the front carrier collecting electrode and the bus electrode corresponding to the front carrier electrode can be completed in one step, which is relatively simplified compared to the MWT battery manufacturing process. (3) When preparing the mother board of the semi-finished battery of the present invention, the current PERC/PERL process and equipment can be directly used, which can reduce R&D and production costs.

Referring to FIG. 17, in another embodiment, in step S120, the cutting process further includes: cutting the mother board 1" along another cutting line 8'to obtain another battery semi-finished product 1c', wherein the battery The semi-finished product 1c' exposes the first and second sides (that is, the two slicing sides 131, 131') due to the cutting process, wherein the first and second sides are all exposed silicon crystal surfaces. In step S130, the The selective electrode deposition process further includes: forming another first electrode 141, another second electrode 142, and another third electrode 143 connected to each other on the slicing side surface 131 of the battery semi-finished product 1c', and the front surface of the silicon crystal Region 111 and the first silicon crystal back surface region 12110; forming a further fourth electrode 142 on the second silicon crystal back surface region 12120 of the battery semi-finished product 1c', the further fourth electrode 142 and the further third The electrode 143 is not connected; and a fifth electrode 145 is formed on the slicing side surface 131' of the semi-finished battery 1c', the fifth electrode 145 is connected to the further second electrode 142, so as to complete a slicing solar cell 1c, wherein The first patterned electrode 14a (more including the fifth electrode 145) also covers the second side (ie, the slice side 131'). In this embodiment, the first electrode 141 and the second electrode 142 And the third electrode 143, the fourth electrode 144 and the fifth electrode 145 can be formed in the same electrode deposition process.

Compared with the divided two sliced solar cells of the present invention, the divided three sliced solar cells of the present invention have the sliced solar cells connected in series The operating current of the pool string will drop slightly.

FIG. 18 shows a flowchart of a method for manufacturing a sliced solar cell according to a second embodiment of the invention. The manufacturing method of the sliced solar cell includes the following steps: Please refer to FIG. 19, in step S10, prepare a battery semi-finished product 1', the battery semi-finished product 1'includes; a silicon crystal substrate 10, has a front surface 11, a back surface 12 and A plurality of side surfaces 13 connecting the front surface 11 and the back surface 12; and a passivation layer 15 covering at least one of the front surface 11, the back surface 12 and the plurality of side surfaces 13, wherein the plurality of side surfaces 13 includes a first side surface ( That is, the slice side surface 131), the slice side surface 131 are all exposed silicon crystal surfaces. The semi-finished battery 1'can be obtained by performing a slicing process on a mother board 1". The position of the slicing side 131 corresponds to the position of one of the cutting lines 8 of the slicing process, as shown in FIG. 13. Please refer to FIG. 19 again. The back surface 12 includes a first back surface sub-region 1211 and a second back surface sub-region 1212. The surface electrical properties of the front surface 11 and the first back surface sub-region 1211 are first electrical properties, and the surface electrical properties of the second back surface sub-region 1212 The passivation layer 15 has a front passivation layer opening 153 and a back passivation layer opening 154, the front passivation layer opening 153 exposes a silicon crystal front surface region 111 of the front side 11, the back passivation layer The opening 154 exposes a first silicon crystal back surface area 12110 of one of the first back surface sub-regions 1211. The silicon crystal front surface area 111 and the first silicon crystal back surface area 12110 both adjoin the slice side surface 131.

In step S20, an electrode process is performed, including: forming a first patterned electrode 14a (which includes a first patterned electrode 14a (which includes the first silicon crystal front surface area 1110, the first silicon crystal back surface area 12110, and the slice side surface 131 First to third electrodes 141, 142, 143), and a second patterned electrode 14b (which includes a fourth electrode 144) connected to the second back surface sub-region 1212 is formed, wherein the first patterned electrode 14a is via Formed by a selective electrode process, the first patterned electrode 14a and the second patterned electrode 14b are separated from each other. The selective electrode process of the second embodiment may be similar to the selective electrode process of the first embodiment, and will not be described in detail.

In this embodiment, in step S10, the backside passivation layer opening 154 further exposes a second silicon crystal back surface area 12120 of the second backside sub-region 1212, the first silicon crystal back surface area 12110 and the second The silicon back surface regions 12120 are separated from each other In step S20, the second patterned electrode 14b is connected to the second silicon back surface area 12120. The second patterned electrode 14b is also formed by the selective electrode process. The second patterned electrode 14b covers the second silicon back surface area 12120. Another method for forming the second patterned electrode 14b is to first screen print a conductive paste layer (not shown) on the second silicon back surface area 12120, and then perform a sintering process.

In another embodiment, it is not necessary to expose the back surface passivation layer opening 154 in step S10 to expose the second silicon back surface area 12120, and in step S20 first screen print a conductive material having the ability to burn through the passivation layer 15 A paste layer (not shown) is formed on the passivation layer 15 of the back surface 12, and then a sintering process is performed to form the second patterned electrode 14b connected to the second silicon crystal back surface area 12120.

Please refer to FIG. 20, which shows a schematic cross-sectional view of a solar cell module according to an embodiment of the present invention. The solar cell module 2 includes multiple sliced solar cells 1 and multiple electrical connection structures 21. The sliced solar cells 1 are the sliced solar cells mentioned above. The electrical connection structures 21 (for example, conductive ribbons) are used to electrically connect the third electrode 143 of the previous slicing solar cell 1 to the fourth electrode 144 of the next slicing solar cell 1, so that two or two Sexually connected to the sliced solar cells 1. The solar cell module 2 further includes a front glass plate 25, a back plate 24 and a packaging material 23. The back plate 24 is arranged with respect to the front glass plate 25. The sliced solar cells 1 are located between the front glass plate 25 and the back plate 24. The packaging material 23 is also located between the front glass plate 25 and the back plate 24 and covers the sliced solar cells 1.

According to the solar cell module of the present invention, (1) If the electrical connection structure is formed by welding using a traditional conductive welding tape, the solar cell string does not need to be turned over during string welding; there is also no conductive welding tape contact The problem of stress on the edge of the battery. (2) It has the advantages of half-cut or multi-cut solar cell modules to increase the total power generation of the module. (3) The solar cell with no bus electrode on the front has high power generation efficiency.

In summary, it only describes the preferred embodiments or examples of the technical means adopted by the present invention to solve the problem, and is not intended to limit the scope of the patent implementation of the present invention. That is, where the meaning of the patent application scope of the present invention is consistent, or according to the text The equal changes and modifications made in the scope of the invention patent are all covered by the scope of the invention patent.

1‧‧‧solar battery

10‧‧‧Solar cell substrate

100‧‧‧Main body

101‧‧‧Surface electric field layer

102‧‧‧Emitter layer

11‧‧‧Front

111‧‧‧Silicon crystal surface area

12‧‧‧Back

1211‧‧‧The first back sub-region

12110‧‧‧The first silicon crystal back surface area

1212‧‧‧Second back area

12120‧‧‧Second silicon back surface area

13‧‧‧Side

131‧‧‧Slice side

14a‧‧‧First patterned electrode

14b‧‧‧Second patterned electrode

141‧‧‧First electrode

142‧‧‧Second electrode

143‧‧‧The third electrode

144‧‧‧ Fourth electrode

15‧‧‧passivation layer

Claims (11)

A sliced solar cell, comprising: a silicon crystal substrate with a front face, a back face and a plurality of side faces, the plurality of side faces are respectively connected to the front face and the back face; a passivation layer covering the front face, the back face and the plurality of side faces At least one; a first patterned electrode that passes through the passivation layer to connect to a first back surface sub-region of the front surface and the back surface and covers one of the plurality of side surfaces; and a second pattern Electrode, which passes through the passivation layer and connects to one of the second back surface sub-regions of the back surface; wherein, the surface electrical properties of the front surface and the first back surface sub-region are first electrical properties, and the surface of the second back surface sub-region The electrical property is a second electrical property different from the first electrical property. The sliced solar cell as described in item 1 of the scope of the patent application, wherein the surface electrical properties of the first side surface are the same as those of the first back surface sub-region. The sliced solar cell as described in item 2 of the patent application range, wherein the first patterned electrode includes a first electrical busbar portion on the back surface, a side surface on the side surface is connected to the electrode, the first electrical The bus section has a plurality of unconnected segments, and each segment is connected to the side connection electrode. A solar cell module includes: a plurality of sliced solar cells, each of which is a silicon crystal solar cell as described in any one of patent application items 1 to 3; and a plurality of electrical connection structures, which are sequentially connected to each of the multiple Sliced solar cells. A method for manufacturing a sliced solar cell, including the following steps: Step (a): preparing a semi-finished battery cell, the semi-finished battery cell includes; a silicon crystal substrate having a front surface, a back surface, and a plurality of sides connecting the front surface and the back surface; and A passivation layer covering at least one of the front surface, the back surface and the plurality of side surfaces, wherein: the plurality of side surfaces includes a first side surface, all of the first side surfaces are exposed The surface of the silicon crystal; the back surface includes a first back surface sub-region and a second back surface sub-region, the surface electrical properties of the front surface and the first back surface sub-region are first electrical properties, and the surface electrical properties of the second back surface sub-region The property is the second electrical property; and the passivation layer has a front passivation layer opening and a back passivation layer opening, the front passivation layer opening exposes a front surface area of the silicon crystal on the front surface, and the back passivation layer opening exposes the first back surface A first silicon crystal back surface area of one of the sub-regions, the first silicon crystal front surface area and the first silicon crystal back surface area are adjacent to the first side surface; and step (b): performing an electrode process, including: forming a cover A first patterned electrode that fills the first silicon crystal front surface area, the first silicon crystal back surface area, and the first side surface, and forms a second patterned electrode connected to the second back surface sub-area, wherein: The first patterned electrode is formed through a selective electrode process, and the first patterned electrode and the second patterned electrode are separated from each other. The method for manufacturing a sliced solar cell as described in item 5 of the patent application scope, wherein in step (a), the semi-finished battery cell is obtained by performing a slicing process on a mother board, and the position of the first side corresponds to one of the slicing processes Cutting line position. The method for manufacturing a sliced solar cell as described in item 5 of the patent application scope, wherein in step (a), the backside passivation layer opening further exposes a second silicon back surface area of one of the second backside sub-regions, the first silicon The crystal back surface area and the second silicon crystal back surface area are separated from each other, and in step (b), the second patterned electrode is connected to the second silicon crystal back surface area. The method for manufacturing a sliced solar cell as described in item 7 of the patent scope, wherein in step (b), the second patterned electrode is also formed by the selective electrode process, and the second patterned electrode covers the second Silicon back surface area. The method for manufacturing a sliced solar cell as described in item 7 of the patent application scope, wherein in step (b), the second patterned electrode is formed by first screen printing a conductive paste layer on the second silicon crystal back surface Area, and then a sintering process. The method for manufacturing a sliced solar cell as described in item 5 of the patent application scope, wherein in step (b), the second patterned electrode is formed by first screen printing a conductive paste layer on the passivation layer on the back surface , And then a sintering process. The method for manufacturing a sliced solar cell as described in item 5 of the patent application scope, wherein in step (a), the plurality of side surfaces include a second side surface, all of which are bare silicon crystal surfaces, and in step (b) ), the first patterned electrode also covers the second side.

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