TW202015320A - Method for solving surge at output end of dc-dc step-down converter - Google Patents

Abstract

A DC-DC step-down converter, which is configured for converting an input voltage to an output voltage across a load, includes a first switch, a second switch, a storage capacitor, a first diode, a second diode, a storage inductor, and an output capacitor. When the first switch is on and the second switch is off, the input voltage enables energy to be transferred and stored in the storage capacitor, the storage inductor, and the output capacitor, so that the voltages across the load and the storage capacitor are both equal to the output voltage. When the first and second switches are off, the storage inductor releases the stored energy and produces the output voltage across the output capacitor and the load. When the first switch is off and the second switch is on, the storage capacitor releases the stored energy to the storage inductor and the load; meanwhile, the output capacitor determines whether or not to release the stored energy to the load based on a voltage across the load, for the purpose of making the voltage across the load be equal to the output voltage.

Description

DC-DC buck converter

The invention is a DC-DC step-down converter, especially a DC-DC step-down converter that can provide a wider step-down range.

In circuit system design, a DC-DC buck converter is often required to convert the DC main power supply with a larger voltage value to a lower voltage value for other components on the circuit, such as the DC main power supply of the computer motherboard. After being stepped down, it is converted into a low DC voltage, which is used by the central processing unit (CPU) and dynamic random access memory (DRAM).

Referring to the first figure, it is a traditional DC-DC buck converter that receives an input voltage and converts it into an output voltage for a load. The DC-DC buck converter includes a switch, a diode, and an inductor , And an output capacitor, when the switch is on, the energy of the input voltage is transferred to the inductor, the capacitor and the load and stored in the inductor, when the switch is off, the inductor releases the stored Energy and provide the output voltage to the output capacitor and the load. The voltage gain ratio of the output voltage to the input voltage is D, where D is a duty cycle of the switch.

However, the voltage gain ratio of the conventional DC-DC buck converter is relatively high, and the operable buck range is limited.

Therefore, the object of the present invention is to provide a DC-DC step-down converter that provides a wider step-down range.

Therefore, the DC-DC buck converter of the present invention receives an input voltage and converts the input voltage into an output voltage to a load, and includes a first switch, a second switch, a storage capacitor, and a first The diode, a second diode, a storage inductor, and an output capacitor.

The first switch has a first terminal that receives the positive pole of the input voltage, and a second terminal, and the first switch is controlled to switch between a conducting state and a non-conducting state. The second switch has a first end electrically connected to the second end of the first switch, and a second end, and the second switch is controlled to switch between a conducting state and a non-conducting state.

The storage capacitor has a first terminal electrically connected to the second terminal of the first switch, and a second terminal.

The first diode has an anode electrically connected to the second end of the storage capacitor, and a cathode electrically connected to the second end of the second switch. The second diode has an anode that receives the negative electrode of the input voltage, and a cathode that is electrically connected to the anode of the first diode.

The storage inductor has a first end electrically connected to the cathode of the first diode, and a second end. The output capacitor has a first end electrically connected to the second end of the storage inductor, and a second end electrically connected to the anode of the second diode, and the output capacitor is connected in parallel with the load.

Further, when the first changeover switch is in the on state and the second changeover switch is in the off state, the energy of the input voltage is transmitted and stored to the storage capacitor, the storage inductor, and the output capacitor, so that the load and The voltage across the storage capacitor is the output voltage. When the first switch and the second switch are in a non-conducting state, the storage inductor releases the stored energy and provides the output voltage to the output capacitor and the load. When the first switch is in a non-conducting state and the second switch is in a conducting state, the storage capacitor releases stored energy and transmits it to the storage inductor and the load, and the output capacitor releases storage according to the voltage across the load The energy is transferred to the load, so that the load across voltage is the output voltage.

Further, the voltage gain ratio of the output voltage to the input voltage is D/2, where D is a duty cycle between the first switch and the second switch switched between the conducting state and the non-conducting state, and D Between 0 and 1.

Further, the DC-DC buck converter further includes a control unit that outputs a first pulse modulation signal and a second pulse modulation signal, the first switch receives the first pulse modulation signal and Controlled by the first pulse wave modulation signal to switch between a conducting state and a non-conducting state, the second switching switch receives the second pulse wave modulation signal and is controlled by the second pulse wave modulation signal to switch to Between the conducting state and the non-conducting state.

Further, the first switch and the second switch are two N-type metal oxide semiconductor field effect transistors, respectively.

According to the above technical features, the following effects can be achieved:

1. By the switching of the first switch and the second switch, in coordination with whether the first diode and the second diode are conducting, the energy of the input voltage is transmitted and stored in the storage capacitor, The storage inductor, the output capacitor, the storage capacitor, or the storage inductor release the stored energy to the load, so that the DC-DC buck converter of the present invention has a lower voltage gain when stepping down and can operate Wider buck range.

2. By storing or releasing energy from the output capacitor, the output voltage received by the load is more stable.

Based on the above technical features, the main functions of the DC-DC buck converter of the present invention will be clearly shown in the following embodiments.

See FIG. Second, the present invention is a DC - DC buck converter is adapted to receive a one case input-output unit 1 to an input voltage V _in, and the input voltage V _in is converted into an output voltage V _o to a load embodiment R the input voltage V _in is a DC voltage, the output voltage V _o is also a DC voltage, the DC - DC buck converter comprises a first switching switches S _1, a second switch S _2, a storage capacitor C ₁ , a first diode D ₁ , a second diode D ₂ , a storage inductor L, an output capacitor C _o , and a control unit 2.

The first switch S ₁ is an N-type metal oxide semiconductor field effect transistor, and has a first terminal that receives the positive electrode of the input voltage V _in and a second terminal, and is controlled to switch to the on state and between the non-conducting state, wherein the first end of the first switch S ₁ is a drain, the second terminal is a source. The second switch S ₂ is also an N-type metal oxide semiconductor field effect transistor, and has a first end electrically connected to the second end of the first switch S ₁ and a second end, and is controlled to switch to a conducting state and a nonconducting state between, wherein the first end of the second switch S ₂ is a drain, the second terminal is a source.

The storage capacitor C ₁ has a first terminal electrically connected to the second terminal of the first switch S ₁ and a second terminal.

The first diode D ₁ has an anode electrically connected to the second end of the storage capacitor C ₁ , and a cathode electrically connected to the second end of the second switch S ₂ . The second diode D ₂ has an anode receiving the negative voltage of the input voltage V _{in and} a cathode electrically connected to the anode of the first diode D ₁ .

The storage inductor L has a first end electrically connected to the cathode of the first diode D ₁ and a second end.

The output capacitor C _o has a first end electrically connected to the second end of the storage inductor L, and a second end electrically connected to the anode of the second diode D ₂ . The load R is electrically connected to the first end and the second end of the output capacitor C _o to receive the output voltage V _o .

The control unit 2 outputs a first pulse wave modulation signal and a second pulse wave modulation signal. The first switch S ₁ is switched to receive the first pulse modulation signal of the first pulse modulation signal and by controlling to switch between a conducting state and a nonconducting state. The second switch S ₂ receives the second pulse modulation signal and is controlled by the second pulse modulation signal to switch between a conducting state and a non-conducting state. The switching timing diagram of the first switch S ₁ and the second switch S ₂ will be further described below in four stages.

See FIG. Third, the operation timing chart of the present embodiment, wherein the parameter representative of a control voltage V _GS1 of the first pulse modulation signal to the first switch if the switch S ₁ is turned on, but also the first switch S ₁ is switched Gate-source signal, parameter v _GS2 represents the voltage of the second pulse modulation signal that controls whether the second switch S ₂ is turned on, and is also the gate-source signal of the second switch S ₂ , parameter i _L represents the current flowing through the storage inductor L, the parameters i _S1 and i _S2 respectively represent the current flowing through the first switch S ₁ and the second switch S ₂ , and the parameters i _D1 and i _D2 represent the current flowing through the The current of the first diode D ₁ and the second diode D ₂ , the parameter T _S represents the cycle time of the first pulse modulation signal or the second pulse modulation signal, and the parameter D is the first The switch S ₁ and the second switch S ₂ switch between a conductive state and a non-conductive state, and D is between 0 and 1.

Referring to the fourth to sixth figures, it is a circuit diagram of the four-stage operation of this embodiment, in which the conducting or active components are indicated by solid lines, and the non-conducting or non-functional elements are indicated by broken lines.

The first stage (time: t ₀ -t ₁ ):

See FIG third and fourth diagram, wherein the first switch S ₁ of the gate - source signal v _GS1 is greater than zero and the first switch S ₁ is turned on state, the gate of the second switch S ₂ - The source signal v _{GS2 is} equal to zero and the second switch S ₂ is in a non-conducting state, and the second diode D ₂ is in a non-conducting state.

The current path in the first stage is shown by the arrow in the fourth diagram. The output energy of the input unit 1 is transferred to the storage capacitor C ₁ through the first switch S ₁ , and then transferred to the storage inductor L, the output capacitor Co, and the load R through the first diode D ₁ , and The storage capacitor C ₁ , the storage inductor L, and the output capacitor C _o store energy, and the voltage across the storage capacitor C ₁ is represented as V _c1 , and the voltage across the output capacitor C _o and the load R is the output voltage V _o , then the voltage across the storage inductor L v _L is equal to V _in -V _c1 -V _o , and the current i _L flowing through the storage inductor _L increases linearly, then the current flowing through the first switch S ₁ i _S1 , the current i _D1 flowing through the first diode D ₁ also increases linearly. When the time is t ₁ and the first switch S ₁ is controlled to switch to a non-conducting state, the first phase ends.

The second stage (time: t ₁ -t ₂ ):

See FIG third and fifth FIG, wherein the first switch S ₁ of the gate - source signal v _GS1, the second switch S ₂ of the gate - source signal v _GS2 is equal to zero, the first switch S _{1. The} second switch S _{2 is in} a non-conductive state, and the currents i _S1 and i _S2 flowing through the first switch S ₁ and the second switch S ₂ are zero, and the storage capacitor C _{1 has} no effect.

The current path in the second stage is shown by the arrow in the fifth diagram. The storage inductor L releases the stored energy to the output capacitor C _o and the load R, so that the output voltage C _o and the load R are both the output voltage V _o , at this time, the storage inductor L v _L is equal to -Vo, because the storage inductor L releases energy, therefore, the current i _L flowing through the storage inductor L decreases linearly, so that the first diode D ₁ and the second diode The currents i _D1 and i _{D2 of} D ₂ also decrease linearly. When the time is t ₂ and the second switch S ₂ is controlled to be turned on, the second phase ends.

The third stage (time: t ₂ -t ₃ ):

Referring to the third and sixth figures, wherein the gate-source signal v _{GS1 of} the first switch S ₁ is equal to zero and is non-conductive, and the gate-source signal v _{GS2 of} the second switch S ₂ is greater than zero In the conductive state, the first diode D ₁ is not conductive.

The current path in the third stage is shown by the arrow in the sixth diagram. The storage capacitor C ₁ releases the stored energy to the storage inductor L and the load R through the second switch S ₂ , and the output voltage C _o of the output capacitor C _o is the output voltage V _o , and the output capacitor C _{o is} based on The voltage across the load R is transferred to the load R based on whether the stored energy is released, so that the voltage across the load R is the output voltage V _o , for example, when the voltage across the load R receives energy from the storage capacitor C ₁ When the output voltage V _o is increased but has not yet reached, the output capacitor C _o also releases the stored energy and transmits it to the load R, so that the voltage across the load R is the output voltage V _o . Therefore, the output capacitor C _o causes The voltage across the load R is stable equal to the output voltage _Vo . The voltage across the storage inductor L v _L is equal to V _c1 -V _o , and the current i _L flowing through the storage inductor _L increases linearly, then the current i _S2 flowing through the second switching switch S ₂ flows through the first The current i _{D2 of the} diode D ₂ also increases linearly. When the time is t ₃ , and the second switch S ₂ is controlled to be turned off, the third phase ends.

The fourth stage (time: t ₃ -t ₄ ):

Referring back to the third and fifth figures, the state of the fourth stage is the same as that of the second stage, in which the gate-source signal v _{GS1 of} the first switch S _{1 and} the gate of the second switch S ₂ − The source signal v _{GS2 is} equal to zero, the first switch S ₁ and the second switch S ₂ are both in a non-conducting state, and the current i _S1 flowing through the first switch S ₁ and the second switch S ₂ , i _S2 is zero, and the storage capacitor C _{1 has} no effect.

The current path in the fourth stage is shown by the arrow in the fifth diagram, and the analysis process will not be repeated here. When the time is t ₄ , and the first changeover switch S ₁ is controlled to be turned on, the fourth phase ends, and returns to the first phase to start a new cycle.

In the first stage, second stage, third stage and fourth stage in accordance with the principles of the volt-second balance in the storage inductor L, the output voltage V _o can be obtained with the input voltage V _in voltage gain ratio D / 2.

The present invention operates when the input voltage V _in is 100 volts and the duty cycle D is about 0.24, and an analog waveform diagram of the output voltage V _o of 12 volts and a full-load output power of 50 W is obtained, as shown in the seventh to tenth diagrams Show.

Refer to the seventh figure for the analog waveforms of the input voltage V _in , the storage capacitor cross voltage V _C1 , and the output voltage V _o . The horizontal axis represents time scale of 10ms / div, the vertical axis represents voltage scale is 20V / div, the input voltage V _in is equal to 100V, the voltage V _C1 across the storage capacitor is equal to 50V, and the output voltage V _o is equal to 12V. From this figure, it can be verified that the present invention can convert a high DC voltage to a low DC voltage, and indeed it can achieve the effect of making the step-down voltage range wider.

See FIG Eighth, for the first switch S ₁ of the gate - source signal v _GS1, the second brake switch S ₂ - _L v analog source signal _GS2, and the storage voltage across inductor L v Waveform. The horizontal axis is time and the scale is 20 μs/div, and the vertical axis is voltage and the scale is v _L :20V/div. Wherein, when the first switch S ₁ is at ON state, the second switch S ₂ is a non-conducting _{state, v L = V in -V c1} -V o = 38V. When the first switch S ₁ and the second switch S ₂ are both in a non-conducting state, v _L =-V _o =-12V. When the first switch S ₁ is switched to non-conducting state, the second switch S ₂ is turned _{state, v L = V c1 -V o} = 38V.

Referring to the ninth figure, the simulated waveforms of the currents i _L , i _S1 , and i _S2 flowing through the storage inductor L, the first switch S ₁ , and the second switch S ₂ . The horizontal axis is time and the scale is 20 μs/div, and the vertical axis is current and the scale is 2.5 A/div.

Referring to the tenth figure, the simulated waveforms of the currents i _D1 and i _D2 flowing through the first diode D ₁ and the second diode D ₂ . The horizontal axis is time and the scale is 20 μs/div, and the vertical axis is current and the scale is 2.5 A/div. From the display of the above analog waveforms, it is verified that the buck conversion process of the present invention is consistent with the foregoing analysis.

In summary, the above embodiments have the following advantages:

1. By the switching of the first switch S ₁ and the second switch S ₂ , in accordance with whether the first diode D ₁ and the second diode D ₂ are conducting, the input unit 1 transmits energy The storage capacitor C ₁ , the storage inductor L, the output capacitor C _o , the storage capacitor C ₁ , or the storage inductor L are used to release the stored energy to the load R, so that the DC-DC buck converter of the present invention It has a lower voltage gain when stepping down, and can operate a wider step-down range, where the voltage gain is D/2, D is the responsibility of the first switch S ₁ and the second switch S ₂ cycle.

2. By storing or releasing energy by the output capacitor C _o , the output voltage V _o received by the load R is more stable.

The above advantages can indeed achieve the purpose of cost invention.

Based on the description of the above embodiments, the operation, use and effects of the present invention can be fully understood. However, the above-mentioned embodiments are only preferred embodiments of the present invention, and cannot be used to limit the implementation of the present invention. The scope, that is, simple equivalent changes and modifications made in accordance with the scope of the present invention's patent application and the description of the invention, is within the scope of the present invention.

(1): Input unit (2): Control unit (V _in ): Input voltage (V _o ): Output voltage (R): Load (S ₁ ): First switch (S ₂ ): Second switch ( C ₁ ): Storage capacitor (D ₁ ): First diode (D ₂ ): Second diode (L): Storage inductance (C _o ): Output capacitance (v _GS1 ): Gate of the first switch _-Source signal (v _GS2 ): Gate of the second switch-Source signal (i _L ): Current flowing through the storage inductor (i _S1 ): Current flowing through the first switch (i _S2 ): Flow Current of the second switch (i _D1 ): current flowing through the first diode (i _D2 ): current flowing through the second diode (T _s ): the first pulse modulation signal, or the second The cycle time of the pulse modulation signal (D): the duty cycle of the first switch and the second switch (v _L ): the voltage across the storage inductor (V _C1 ): the voltage across the storage capacitor

[Figure 1] is a circuit diagram of a conventional DC-DC buck converter.

[Second figure] is a circuit diagram of an embodiment of the DC-DC buck converter of the present invention.

[Third figure] is an operation timing chart of the embodiment.

[Fourth figure] is a circuit diagram of this embodiment operating in a first stage.

[Fifth figure] is a circuit diagram of this embodiment operating in a second stage and a fourth stage.

[Sixth figure] is a circuit diagram of this embodiment operating in a third stage.

[Seventh figure] is the operation of this embodiment when an input voltage is 100V, an output voltage is 12V, and a full-load output power is 50W, the output voltage is, the voltage across the storage capacitor, and an analog of the input voltage Waveform.

[Figure 8] is the operation of this embodiment when the input voltage is 100V, the output voltage is 12V, and the full-load output power is 50W, a gate-source signal of a first switch and a second switch A gate-source signal, and a simulated waveform diagram of the voltage across the storage inductor.

[Figure 9] is the operation of the embodiment when the input voltage is 100V, the output voltage is 12V, and the full-load output power is 50W, the current flowing through the storage inductor, the current flowing through the first switch, and An analog waveform diagram of the current flowing through the second switch.

[Figure 10] is the operation of this embodiment when the input voltage is 100V, the output voltage is 12V, and the full-load output power is 50W, the current flowing through a first diode and the second diode An analog waveform of the body's current.

(1): Input unit

(2): Control unit

(V _in ): input voltage

(V _o ): output voltage

(R): load

(S ₁ ): the first switch

(S ₂ ): Second switch

(C ₁ ): storage capacitor

(D ₁ ): the first diode

(D ₂ ): Second diode

(L): storage inductance

(C _o ): output capacitance

(i _L ): current flowing through the storage inductor

(i _S1 ): current flowing through the first switch

(i _S2 ): current flowing through the second switch

(i _D1 ): current flowing through the first diode

(i _D2 ): current flowing through the second diode

(v _L ): Transformer voltage of storage inductor

(V _C1 ): voltage across storage capacitor

Claims (5)

A DC-DC step-down converter receives an input voltage and converts the input voltage into an output voltage to a load, and the DC-DC step-down converter includes: a first changeover switch having a function of receiving the input voltage A first end of the positive electrode, and a second end, and the first switch is controlled to switch between a conducting state and a non-conducting state; a second switch has a second electrically connected to the first switch A first end of the terminal, and a second end, and the second switch is controlled to switch between a conducting state and a non-conducting state; a storage capacitor has a first terminal electrically connected to the second end of the first switch One end, and a second end; a first diode having an anode electrically connected to the second end of the storage capacitor, and a cathode electrically connected to the second end of the second switch; a second diode , An anode having a negative electrode receiving the input voltage, and a cathode electrically connected to the anode of the first diode; a storage inductor having a first end electrically connected to the cathode of the first diode, and a A second end; and an output capacitor having a first end electrically connected to the second end of the storage inductor and a second end electrically connected to the anode of the second diode, and the output capacitor is connected in parallel with the load. The DC-DC buck converter as described in item 1 of the patent application scope, wherein, when the first switch is in a conducting state and the second switch is in a non-conducting state, the energy of the input voltage is transmitted and stored To the storage capacitor, the storage inductor, and the output capacitor, the voltage across the load and the storage capacitor is the output voltage. When the first switch and the second switch are in a non-conducting state, the storage inductor The stored energy is released, and the output voltage is provided to the output capacitor and the load. When the first switch is in a non-conducting state and the second switch is in a conducting state, the storage capacitor releases the stored energy and transmits it to the storage Inductance and the load, the output capacitance is transferred to the load according to whether the load across voltage is to release stored energy, so that the load across voltage is the output voltage. The DC-DC buck converter as described in item 1 of the patent application scope, wherein the voltage gain ratio of the output voltage to the input voltage is D/2, where D is the first switch and the second switch The switch is switched between a conducting state and a non-conducting state, and D is between 0 and 1. The DC-DC buck converter as described in item 1 of the patent application scope further includes a control unit that outputs a first pulse modulation signal and a second pulse modulation signal, and the first switch receives the The first pulse wave modulation signal is controlled by the first pulse wave modulation signal to switch between a conducting state and a non-conducting state, and the second switching switch receives the second pulse wave modulation signal and receives the second pulse wave modulation signal The wave modulation signal is controlled to switch between the conducting state and the non-conducting state. The DC-DC buck converter as described in item 1 of the patent application scope, wherein the first switch and the second switch are respectively two N-type metal oxide semiconductor field effect transistors.

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