TW202013489A - Manufacturing method for forming a recess in a semiconductor structure - Google Patents

Abstract

The invention provides a method of fabricating a semiconductor recess. First, a substrate is provided, a first oxide layer is formed on the substrate, and then a first etching step is performed to remove a portion of the substrate and the first oxide layer, and a first recess is formed in the substrate, and a first pull-back step of removing a portion of the first oxide layer and a portion of the substrate, and forming a rounding portion at each of the top end portions of the sidewalls of the first recess. The first pull-back step comprises immersed in a diluted hydrofluoric acid (DHF) solution, immersed in a mixed solution of sulfuric acid and hydrogen peroxide (SPM solution), and a RCA high temperature standard cleaning (SC-1) step.

Description

Manufacturing method of groove in semiconductor structure

The present invention relates to the field of semiconductor manufacturing processes, in particular to a method for improving the quality of grooves used for shallow trench isolation and other components in semiconductor structures.

In the semiconductor manufacturing process, grooves are often formed in the substrate to define fin structures or active regions of transistors. However, the quality of the groove formation will affect the yield of other subsequent semiconductor devices. For example, in order to cover the surface of the substrate more completely with other material layers formed later to reduce the peeling condition, the vertical included angle of the groove boundary is often chamfered to form a rounded shape. In this way, the possibility of the material layer peeling off when the subsequent material layer is formed on the substrate (especially the area near the boundary of the active region) can be reduced.

However, to chamfer the groove boundary to form rounded corners, an additional etching process is required, and during the etching process, the risk of the semiconductor groove being over-etched may also be increased.

The invention provides a method for manufacturing a semiconductor groove. First, provide a substrate, form a first oxide layer on the substrate, then perform a first etching step, remove part of the substrate and the first oxide layer, and form a first groove in the substrate, and proceed In a first pull-back step, a portion of the first oxide layer and a portion of the substrate are removed, and a rounded portion is formed on the top portions of the two sidewalls of the first groove, wherein the first step of retracting includes Sequential immersion in a diluted hydrofluoric acid (DHF) solution, immersion in a mixed solution of sulfuric acid and hydrogen peroxide (SPM solution) and a RCA high temperature standard cleaning (SC-1) step.

The present invention is characterized in that when forming a groove for accommodating, for example, a shallow trench isolation, in addition to the commonly used immersion in hydrofluoric acid solution and RCA standard cleaning steps, an additional immersion in SPM is performed between the two steps The step of the solution, forming an oxide layer in the groove of the semiconductor structure to protect the bottom surface and the side wall of the groove, reducing the damage caused by the subsequent RCA standard cleaning step to the inside of the groove, and improving the subsequent isolation of the shallow trench formed in the groove Of quality. In addition, since the semiconductor structure of the present invention has formed a rounded portion at the boundary of the active area, each material layer formed in the active area can completely cover the surface of the substrate, and it is less prone to peeling.

In order to enable those of ordinary skill in the art of the present invention to further understand the present invention, the preferred embodiments of the present invention are specifically enumerated below, and in conjunction with the accompanying drawings, the composition of the present invention and the desired effects are described in detail .

For the convenience of description, the drawings of the present invention are only schematic diagrams to make it easier to understand the present invention, and the detailed proportions thereof can be adjusted according to design requirements. As described in the text, the relative relationship of the relative elements in the figure should be understood by those skilled in the art as it refers to the relative position of the objects, so they can be turned over to present the same components, which should belong to the The scope of disclosure is described here first.

Please refer to FIG. 1 to FIG. 6, which are schematic diagrams illustrating the structure of the semiconductor groove of the present invention. As shown in FIG. 1, the manufacturing steps of the semiconductor structure 1 of the present invention include providing a substrate 10, such as a silicon substrate, a germanium substrate or a silicon germanium substrate, etc. An oxide layer 12 and a nitride are also formed on the substrate 10 Layer 14. The oxide layer 12 includes silicon oxide, for example, and the nitride layer 14 includes silicon nitride.

Next, as shown in FIG. 2, a first etching step E1 is performed, a part of the nitride layer 14, the oxide layer 12 and the substrate 10 are removed, and a groove 16 is formed in the substrate 10. It is worth noting that the groove 16 has two vertical side walls 16A, and two right-angled portions 16B at the top portions of the two side walls 16A. In addition, the opening width W1 of the groove 16 is defined. The opening width of the nitride layer 14 and the oxide layer 12 is also equal to W1.

As shown in FIG. 3, a first retreat step P1 is performed to remove part of the nitride layer 14 and expand the opening of the nitride layer 14. That is to say, in FIG. 3, after performing the first retreat step P1, the opening width W2 of the nitride layer 14 will be greater than the opening width W1 of the groove 16 in FIG.

As shown in FIGS. 4 to 6, a second retreat step is performed to partially remove the oxide layer 12 and form a rounded structure on the top of the left and right sides of the groove. In detail, the second retreat step of this embodiment includes three different steps in sequence, namely the immersion diluted hydrofluoric acid (DHF) etching step P2 shown in FIG. 4; the immersion sulfuric acid shown in FIG. 5 and Hydrogen peroxide mixed solution (SPM solution) step P3; and RCA high temperature standard cleaning (SC-1) step P4 shown in FIG. 6. As shown in FIG. 4, step P2 is performed to immerse the semiconductor structure 1 in a hydrofluoric acid solution. The temperature of the solution in the immersion step is 15°C to 30°C, but the present invention is not limited to this. During the immersion in hydrofluoric acid, the oxide layer 12 will be partially removed to expose the right-angled portions 16B at the left and right ends of the groove 16.

In general, to cut off the right-angled part 16B to form a rounded part, an RCA standard cleaning (SC-1) step, for example, immersion in ammonium hydroxide (NH ₄ OH), hydrogen peroxide (H ₂ O ₂ ) in a mixed solution with water and heated to 65°C to 85°C. The above-mentioned mixed solution of ammonium hydroxide (NH ₄ OH), hydrogen peroxide (H ₂ O ₂ ) and water can also be called APM solution, and the process of immersing in the APM solution as a whole is called RCA standard clean step (RCA standard clean step) , SC-1). In an RCA standard cleaning step, the substrate 10 may be partially removed, and the right-angled portion 16B may be chamfered to become rounded. However, the applicant found that if the RCA standard cleaning step is performed immediately after the step in Figure 4 is completed, although rounded corners can be formed on the tops of both sides of the groove, the RCA standard cleaning step has a strong etching ability, so it will It will affect both the bottom and the side wall of the groove, so that the side wall of the groove becomes uneven, which in turn affects the quality of other semiconductor devices formed subsequently.

In order to avoid the problem that the sidewall of the groove becomes uneven, in the present invention, after the step of immersing the semiconductor structure 1 in the DHF solution shown in FIG. 4, as shown in FIG. 5, the RCA standard cleaning step is not directly performed, and Step P3 is performed to soak the semiconductor structure 1 in an SPM solution, that is, a mixed solution of sulfuric acid and hydrogen peroxide. The ambient temperature during soaking is approximately 110°C to 150°C. The applicant found that the hydrogen peroxide in the SPM solution will form an oxide layer 20 on the bottom surface of the groove 16 and the side wall 16A. This oxide layer 20 is beneficial to protect the bottom surface of the groove 16 and the side wall 16A from subsequent etching The step was destroyed.

Finally, as shown in Figure 6, perform step P4, which is a high temperature RCA standard cleaning step (also known as standard cleaning step SC-1), that is, immersion in ammonium hydroxide (NH ₄ OH), hydrogen peroxide ( H ₂ O ₂ ) in a mixed solution with water, and the heating temperature is about 65°C to 100°C. Since the oxide layer 20 has been formed in the groove 16, ammonium hydroxide (NH ₄ OH) will not easily damage the bottom surface of the groove 16 and the side wall 16A. During the high temperature RCA standard cleaning step, the oxide layer 20 will be gradually removed. It is also worth noting that the right angle portion 16B is etched at a faster rate, so the right angle portion 16B of the semiconductor structure 1 will also be removed, so that The transformation into a rounded portion 16. Therefore, the completed semiconductor structure 1 includes the groove 16, and the tops of both sides of the groove 16 have rounded portions 16C. In this embodiment, the temperature of the high-temperature RCA standard cleaning step is approximately between 65°C and 100°C, which is slightly higher than the normal standard cleaning step (the general temperature is approximately 65°C to 80°C) for more effective removal Oxidized layer 20. However, the invention is not limited to this, the temperature of the RCA standard cleaning step can still be adjusted according to actual needs.

In the subsequent steps, structures such as a liner layer and shallow trench isolation may be newly formed in the groove 16, and the substrates on both sides of the groove 16 may be used as the active area of the semiconductor device, and for example, electrical Elements of crystals. These technical contents belong to known technologies in the art, and will not be described in detail here.

It is worth noting that in the present invention, when performing the second retreat step (Figure 4 to Figure 6), there are three different steps, which are the dip diluted hydrofluoric acid (DHF) etching shown in Figure 4 Step P2; Step P3 of the mixed solution of sulfuric acid and hydrogen peroxide (SPM solution) shown in Figure 5; and Step P4 of RCA high temperature standard cleaning (SC-1) shown in Figure 6. Preferably, the above three steps are performed in sequence, and not simultaneously.

The present invention is characterized in that when forming a groove for accommodating, for example, a shallow trench isolation, in addition to the commonly used immersion in hydrofluoric acid solution and RCA standard cleaning steps, an additional immersion in SPM is performed between the two steps The step of the solution, forming an oxide layer in the groove of the semiconductor structure to protect the bottom surface and the side wall of the groove, reducing the damage caused by the subsequent RCA standard cleaning step to the inside of the groove, and improving the subsequent isolation of the shallow trench formed in the groove Of quality. In addition, since the semiconductor structure of the present invention has formed a rounded portion at the boundary of the active area, each material layer formed in the active area can completely cover the surface of the substrate, and it is less prone to peeling. The above are only the preferred embodiments of the present invention, and all changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the present invention.

1: Semiconductor structure 10: Substrate 12: Oxide layer 14: Nitride layer 16: Groove 16A: Side wall 16B: Right angle portion 16C: Rounded portion 20: Oxide layer E1: Etching step P1: First retreat step P2: Immersion hydrogen Fluoric acid (DHF) etching step P3: immersion of sulfuric acid and hydrogen peroxide mixed solution (SPM solution) step P4: RCA high temperature standard cleaning (SC-1) step W1: width W2: width

Figures 1 to 6 are schematic diagrams showing the structure of the semiconductor groove of the present invention.

1: Semiconductor structure

10: base

12: oxide layer

14: Nitride layer

20: oxide layer

P3: Soaking the mixed solution of sulfuric acid and hydrogen peroxide (SPM solution)

Claims (11)

A method for manufacturing a groove in a semiconductor structure, including: providing a substrate, forming a first oxide layer on the substrate; performing a first etching step, removing a portion of the substrate and the first oxide layer, and placing the substrate on the substrate Forming a first groove; and performing a first pull-back (pull-back) step to remove part of the first oxide layer and part of the substrate, and form a rounded corner at the top portions of both side walls of the first groove Part, wherein the first withdrawal step includes the steps of immersing in a diluted hydrofluoric acid (DHF) solution, immersing in a mixed solution of sulfuric acid and hydrogen peroxide (SPM solution), and a RCA high temperature standard cleaning (SC-1) step. The method as described in item 1 of the patent application scope, wherein a second oxide layer is formed in the first groove during the step of immersing in the SPM solution. As in the method described in item 2 of the patent application scope, after performing the RCA high temperature standard cleaning step, the second oxide layer is removed. The method as described in item 1 of the patent application scope, further comprising forming a nitride layer on the first oxide layer. As described in item 4 of the patent application scope, before the first retreat step is performed, a second retreat step is further included, wherein the nitride layer is partially removed during the second retreat step. The method as described in item 1 of the patent application scope, wherein the temperature in the step of immersing in a diluted hydrofluoric acid solution is 15°C to 30°C. The method according to item 1 of the patent application scope, wherein the temperature in the step of immersing in the SPM solution is between 110°C and 150°C. The method as described in item 1 of the patent application scope, wherein the temperature of the RCA high temperature standard cleaning step is between 65°C and 100°C. The method as described in item 1 of the patent application scope, wherein the rounded portion is formed during the RCA high temperature standard cleaning step. The method according to item 1 of the patent application scope, wherein the step of immersing in the mixed solution of sulfuric acid and hydrogen peroxide is performed after the step of immersing in a diluted hydrofluoric acid (DHF) solution. The method as described in item 1 of the patent application scope, wherein the RCA high temperature standard cleaning (SC-1) step is performed after the step of soaking in the sulfuric acid and hydrogen peroxide mixed solution.

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