TW201947873A - Amplifier - Google Patents

Abstract

The purpose of the present invention is to simplify adjustment of a gain of an amplifier. In a first transistor, an applied input signal is input to a gate terminal and an electric current according to the input signal flows. A load part is connected to a drain terminal of the first transistor. In a second transistor, a gate terminal is connected to the load part and an electric current according to change of voltage of the drain terminal of the first transistor flows. To a first resistance, a source terminal of the first transistor and a drain terminal of the second transistor are connected in common and electric currents from the first transistor and the second transistor flow. A third transistor feeds an electric current substantially equal to that of the second transistor. To an output terminal, the electric current fed from the third transistor is output.

Description

Amplifier

This disclosure relates to amplifiers. In detail, it is an amplifier for detecting noise and the like.

Previously, electronic devices were used to mitigate the effects of noise. For example, an imaging element used in a camera or the like is configured by arranging pixels generating image signals in a two-dimensional shape. At the time of shooting, since a plurality of pixels simultaneously generate image signals, the load variation becomes large, and the power supply voltage of the power supply circuit that supplies power to the imaging element varies. If the image signal generated in the pixel changes due to the change in the power supply voltage, it will be in a state where noise is mixed in the image signal, and the image quality is reduced. Therefore, the power supply voltage fluctuation detection is performed, and based on the detected power supply voltage fluctuation, an imaging element that compensates for the fluctuation of the image signal is used.

The compensation of the change of the image signal can be performed when the image signal output from the pixel is converted into a digital image signal by analog-digital conversion. For example, a change in the power supply voltage is detected by an amplifier connected to the power supply through a coupling capacitor, and a reference signal used for analog-to-digital conversion is adjusted according to the detected change in the power supply voltage. An image pickup device that removes the influence of fluctuations in power supply voltage by performing such processing is proposed (for example, refer to Patent Document 1).
[Prior technical literature]
[Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2018-019335

[Problems to be solved by the invention]

In the above-mentioned prior art, in an amplifier that detects a change in power supply voltage, the amount of change in power supply voltage is applied as an input signal to the gate of a MOS (metal-oxide-semiconductor) transistor. A constant current circuit is connected to the drain terminal of the MOS transistor to be supplied with a drain current. A current equivalent to the difference between the drain current of the input signal amplified by the MOS transistor and the current supplied by the constant current circuit is output through the current mirror circuit. The output current is a signal (output current) that detects the amount of fluctuation in the power supply voltage as the input signal. In the aforementioned prior art, the fluctuation of the power supply voltage is compensated by adjusting the waveform of the reference signal according to the output current.

However, in the above-mentioned prior art, the gain when the input signal is amplified in the amplifier depends on the transconductance (gm) of the MOS transistor, so it is difficult to adjust the gain. Therefore, there is a problem that the reference signal cannot be adjusted sufficiently, and the influence of noise on the image signal becomes large.

The present invention has been made in view of the above-mentioned problems, and its purpose is to simplify the adjustment of the gain of the amplifier.
[Technical means to solve the problem]

The present disclosure was made in order to eliminate the above-mentioned problems. A first aspect of the amplifier includes: an input terminal to which an input signal is applied; and a low-band amplifier circuit including: a first transistor, which is at a gate terminal The terminal is input with the applied input signal and supplies a current corresponding to the input signal to the source terminal; the load section is connected to the drain terminal of the first transistor; and the second transistor is connected to the gate terminal. The load unit flows a current corresponding to a change in the voltage of the drain terminal of the first transistor; the first resistor is connected in common to the source terminal of the first transistor and the drain terminal of the second transistor; A current flows from the first transistor and the second transistor; and a third transistor supplies a current approximately equal to that of the second transistor; a high-frequency amplifier circuit including: a constant current circuit; and a fourth transistor. A crystal is connected in series to the input terminal and the constant current circuit to pass a bias current of the constant current circuit; a first capacitor is connected in parallel to the constant current circuit so that the input signal The AC signal in the current flows through the fourth transistor; and a fifth transistor that forms a current mirror circuit with the fourth transistor and supplies a current corresponding to the current flowing in the fourth transistor; and an output terminal , Which outputs the current supplied from the third transistor and the fifth transistor.

Furthermore, in this first aspect, a second resistor connected to the output terminal to convert the output current into a voltage may be further provided.

In the first aspect, the low-frequency amplifier circuit may further include: a second capacitor connected between the input terminal and a gate terminal of the first transistor; and a bias circuit that connects A bias voltage is supplied to the gate terminal of the first transistor.

In the first aspect, the load unit may be configured by a constant current circuit.

Further, in the first aspect, the constant current circuit, which may be the high-frequency amplifier circuit, is configured by a current mirror circuit that flows a current corresponding to the current flowing through the third transistor, and the third transistor passes through The high-frequency amplifier circuit supplies a current to the output terminal.

In the first aspect, the low-frequency amplifier circuit may further include a sixth transistor that is connected to the first transistor in an overlapping manner.

In the first aspect, the low-frequency amplifier circuit may further include a second constant-current circuit that supplies a bias current to the first transistor.

An input signal is applied to the gate terminal of the first transistor connected to the load terminal at the drain terminal and the first resistor connected to the source terminal. Since the gate terminal of the second transistor is connected to the load portion, a current corresponding to a change in the voltage of the drain terminal of the first transistor flows through the second transistor. The drain terminal of the second transistor is connected to the first resistor, and the output current of the second transistor is fed back to the first transistor in series. Therefore, when the offset voltage of the first transistor is ignored, the voltage of the input signal is approximately equal to the terminal voltage of the first resistor. That is, the current obtained by dividing the input signal by the resistance value of the first resistor is equal to the current of the drain terminal of the second transistor.

Since the current equal to the current of the drain terminal of the second transistor is supplied as the output current from the third transistor, the ratio of the obtained input voltage to the output current depends on the effect of the first resistance value. It is assumed that the gain adjustment does not depend on the gm of the first transistor.
[Effect of the invention]

According to the present disclosure, an excellent effect of simplifying the adjustment of the gain of the amplifier is exerted.

Next, an embodiment (hereinafter, referred to as an embodiment) for implementing the present disclosure will be described with reference to the drawings. In the following drawings, the same or similar symbols are attached to the same or similar parts. However, the drawing is a schematic diagram, and the ratio of dimensions of each part may not be consistent with the real thing. In addition, it is a matter of course that the drawings have different dimensional relationships or ratios. The description of the embodiment will be performed in the following order.
1. First embodiment
2. Second Embodiment
3. Third Embodiment
4. Fourth Embodiment

<1. First Embodiment>
[Composition of imaging element]
FIG. 1 is a diagram showing a configuration example of an imaging device to which the present disclosure can be applied. The imaging device 1 in the figure includes a pixel array section 2, a control section 3, an analog-to-digital conversion section (AD conversion section) 4, a reference signal generation section 5, a power supply 6, a noise detection section 7, and an addition section 8. The noise detection unit 7 applies an amplifier 100 described later.

The pixel array unit 2 is configured by arranging the pixels 21 in a two-dimensional grid shape. Here, the pixel 21 is a person that generates an image signal corresponding to the irradiated light. The pixel 21 is provided with a photodiode that performs photoelectric conversion of the irradiated light and a pixel circuit that generates an image signal from a charge generated by the photoelectric conversion. In the pixel array section 2, the signal lines 11 and 12 are arranged in an XY matrix, and are wired to the pixels 21. The signal line 11 is a signal line that transmits a control signal of the pixel 21. The signal lines 11 are arranged in each column of the pixels 21 arranged in the pixel array section 2, and a common wild line is arranged in the pixels 21 arranged in a column. The signal line 12 is a signal line that transmits an image signal generated by the pixel 21. The signal lines 12 are arranged in each row of the pixels 21 arranged in the pixel array section 2, and a common wildcard line is arranged in the pixels 21 arranged in a row. The pixel 21 performs photoelectric conversion based on a control signal from a control section 3 described later, and outputs the generated image signal to the signal line 12.

The control unit 3 generates a control signal of the pixel 21. The control unit 3 transmits a control signal to each pixel 21 via a signal line 11.

The AD conversion section 4 is an AD converter that converts an analog image signal generated by the pixel 21 into a digital image signal. The AD conversion section 4 is provided, for example, in each row of the pixel array section 2 and is connected to each signal line 12. In this figure, one AD conversion unit 4 is described as an example. The AD conversion unit 4 includes a comparison unit 41, a counting unit 42, and a holding unit 43. The comparison unit 41 compares an analog image signal with a reference signal. Here, the reference signal refers to a signal that becomes a reference for AD conversion. As the reference signal, a signal having a voltage-slope change can be used. The comparison unit 41 outputs the comparison result to the counting unit 42. The counting unit 42 measures the time from the start of comparison to the output of the comparison result in the comparison unit 41 and outputs the measurement result. The measurement can be performed by counting the clock signals. The holding unit 43 holds the measurement result of the counting unit 42 as a digital image signal. The holding unit 43 outputs the held digital image signals at a specific timing. The output digital image signal becomes the output signal of the imaging element 1. Details of the AD conversion by the AD conversion section 4 will be described later.

The reference signal generation unit 5 is a person who generates a reference signal. The generated reference signal is supplied to a adding section 8 described later via a signal line 13.

The power source 6 supplies power to the imaging element 1. The power source 6 supplies power to the control unit 3 and the like via a power line 14.

The noise detection unit 7 detects noise from the image pickup device 1. The noise detection unit 7 detects a change in the power supply voltage of the power supply 6 as noise. As described above, a plurality of pixels 21 are arranged in the pixel array section 2 and these are driven by a common control signal. The load voltage at this time changes the power supply voltage of the power supply 6. As a result of the change in the power supply voltage, the analog image signal output from the pixel 21 also changes. That is, noise overlaps the image signal. The noise detection section 7 is connected to the power supply line 14, and the noise detection section 7 detects a variation amount of the power supply voltage. The detected fluctuation amount of the power supply voltage is supplied to the adding unit 8 through the signal line 15.

The adding section 8 adds the reference signal generated by the reference signal generating section 5 and the amount of change in the power supply voltage detected by the noise detection section 7. Thereby, the reference signal generated by the reference signal generating section 5 is corrected. The corrected reference signal is supplied to the comparison unit 41 via the signal line 16.

In this way, by performing AD conversion based on the modified reference signal, the variation of the image signal can be cancelled and the influence of noise can be reduced.

[AD conversion]
FIG. 2 is a diagram showing an example of AD conversion according to the embodiment of the present disclosure. This figure is a diagram showing a case of AD conversion of an image signal in the imaging element 1 described in FIG. 1. In the figure, the “output image signal of the pixel 21” represents an analog image signal output from the pixel 21 and represents a signal transmitted by the signal line 12. The “reference signal” indicates a reference signal input to the comparison section 41 and indicates a signal transmitted through the signal line 16. The reference signal may be a signal having a ramp-down voltage. The “comparison unit 41 output” indicates an output signal from the comparison unit 41. “Counting section 42 output” indicates a digital signal output from the counting section 42. The “holding section 43 output” indicates a digital signal held and output by the holding section 43. "Power supply voltage" indicates the power supply voltage of the power supply 6 and the voltage of the power supply line 14.

The AD conversion of the imaging element 1 will be described. As an initial state, the reference signal generating section 5 outputs a maximum voltage, and the comparing section 41 outputs a logic "0". The counting section 42 is initialized to "n". First, at T1, an analog image signal is output from the pixel 21 under the control of the control unit 3. After a certain settling time has elapsed, in T2, the output of the reference signal is started, and the comparison between the image signal and the reference signal using the analog of the comparison section 41 is started. Further, the counting (down counting) by the counting section 42 is started. As shown in the figure, at the start of AD conversion, the voltage of the reference signal is higher than the voltage of the analog image signal, so the comparison unit 41 outputs a value of "0".

Next, in T3, when the voltage of the reference signal is lower than the voltage of the analog image signal, the output of the comparison section 41 is changed to a value "1". That is, the comparison result is output. In response to this, the counting section 42 stops counting and outputs the count value to the holding section 43. In this way, the counting section 42 measures the time from the start of the AD conversion to the output of the comparison result of the comparison section 41. Since the measured time is proportional to the voltage of the image signal, AD conversion can be performed by outputting a digital signal corresponding to the measured time. Specifically, the complement of the digital signal held by the holding unit 43 may be a digital image signal.

However, when the power supply voltage drops like the one-dot chain line in the figure, the output image signal of the pixel 21 also drops as indicated by the one-dot chain line. At this time, by reducing the voltage of the reference signal similarly, the influence on the comparison result of the comparison unit 41 can be removed. In this way, by adjusting the reference signal according to the fluctuation of the power supply voltage, the influence of the fluctuation (noise) of the power supply voltage can be reduced.

[Composition of amplifier]
FIG. 3 is a circuit diagram showing a configuration example of an amplifier according to the first embodiment of the present disclosure. The amplifier 100 shown in the figure includes an input terminal 101, a low-band amplifier circuit 103, a high-band amplifier circuit 104, an output terminal 102, and a resistor 132.

The input terminal 101 is a terminal to which an input signal is applied. A power supply line 14 is connected to the input terminal 101 and a power supply voltage from a power supply 6 is applied.

The low-band amplifying circuit 103 is a circuit that amplifies mainly low-band signal components in an input signal from the input terminal 101. The low-frequency amplifier circuit 103 amplifies the voltage of the input signal, converts it into a current, and outputs it to the output terminal 102.

The high-band amplifying circuit 104 is a circuit that amplifies mainly high-band signal components in an input signal from the input terminal 101. Similar to the low-band amplifying circuit 103, the high-band amplifying circuit 104 also amplifies the input signal, converts it into a current, and outputs the current to the output terminal 102.

The output terminal 102 is an output terminal of the amplifier 100. The output terminal 102 is supplied with output currents from the low-band amplifier circuit 103 and the high-band amplifier circuit 104. The signal terminal 15 is connected to the output terminal 102.

The resistor 132 is a resistor that converts the current output from the output terminal 102 into a voltage. One end of the resistor 132 is connected to the output terminal 102, and the other end is grounded. The current from the low-frequency amplifier circuit 103 and the high-frequency amplifier circuit 104 flows through the resistor 132 in common. In this way, the low-band amplifier circuit 103 and the high-band amplifier circuit 104 are connected in parallel between the input terminal 101 and the output terminal 102.

In this figure, the reference signal generating unit 5 described in FIG. 1 is further described. The reference signal generating unit 5 is configured by a current source that supplies a current to the resistor 132. By changing the supply current to the resistor 132 in a ramp shape, a reference signal in which the voltage is ramped can be output to the signal line 15. As described above, since the output current of the amplifier 100 further flows through the resistor 132, the reference signal is added to the resistor 132 and the amount of change in the power supply voltage detected by the amplifier 100 is added. The resistor 132 is configured in the adding section 8 described in FIG. 1.

The low-band amplifier circuit 103 includes MOS transistors 111 to 113, resistors 131, capacitors 141 and 142, a constant current circuit 153, and a bias circuit 105. As the MOS transistor 111, an n-channel MOS transistor can be used. As the MOS transistors 112 and 113, p-channel MOS transistors can be used. Hereinafter, the gate terminal, the drain terminal, and the source terminal of the MOS transistor are simply referred to as a gate electrode, a drain electrode, and a source electrode, respectively. The bias circuit 105 includes a switch 151 and a voltage source 152. A power line Vdd is arranged in the low-band amplifier circuit 103. The power line Vdd is connected to a power source different from the power source 6 described in FIG. 1 and is supplied with power. In addition, the power line Vdd may be connected to the input terminal 101 to supply the power of the low-band amplifier circuit 103 from the power source 6 in FIG. 1.

The MOS transistor 111 is an example of the first transistor described in the technical solution. The MOS transistor 112 is an example of the second transistor described in the technical solution. The MOS transistor 113 is an example of the third transistor described in the technical solution. The constant current circuit 153 is an example of a load unit described in the technical solution. The resistor 131 is an example of the first resistor described in the technical solution. The resistor 132 is an example of the second resistor described in the technical solution.

One terminal of the capacitor 141 is connected to the input terminal 101, and the other terminal is connected to the gate of the MOS transistor 111 and one terminal of the switch 151. A voltage source 152 is connected to the other end of the switch 151. The source of the MOS transistor 111 is connected to the drain of the MOS capacitor 112 and one terminal of the resistor 131. The other end of the resistor 131 is grounded. The constant-current circuit 153 and the capacitor 142 connected in parallel are connected between the power line Vdd and the drain of the MOS transistor 111. The drain of the MOS transistor 111 is further connected to the gate of the MOS transistor 112 and the gate of the MOS transistor 113. The sources of the MOS transistor 112 and the MOS transistor 113 are commonly connected to the power line Vdd. The drain of the MOS transistor 113 is connected to the output terminal 102.

The capacitor 141 is a coupling transistor that connects the MOS transistor 111 to the input terminal 101. The transistor 141 transmits an AC signal in the input signal to the gate of the MOS transistor 111.

The MOS transistor 111 is a transistor that amplifies an input signal. Power is supplied to the drain of the MOS transistor 111 via the constant current circuit 153, and a resistor 131 is connected to the source. A drain current corresponding to an input signal input through the capacitor 141 flows through the MOS transistor 111.

The constant current circuit 153 supplies a specific current to the MOS transistor 111. The constant current circuit 153 operates as a load of the MOS transistor 111. A capacitor 142 is connected in parallel to the constant current circuit 153. The capacitor 142 limits the capacitor of the low-band amplifier circuit 103 to the high-band bandwidth by reducing the load impedance of the high-band MOS transistor 111.

The bias circuit 105 is a circuit that supplies a bias voltage to the gate of the MOS transistor 111. As described above, the bias circuit 105 is composed of the switch 151 and the voltage source 152. The voltage source 152 is a voltage source that supplies a bias voltage to the MOS transistor 111. Through the bias voltage supplied from the voltage source 152, a drain current approximately equal to the output current of the constant current circuit 153 flows through the MOS transistor 111. The switch 151 is a switch that applies a bias voltage from the voltage source 152 to the gate of the MOS transistor 111. When the switch 151 is in the on state, the bias voltage is charged to the input capacitance (Cgs) of the capacitor 141 and the MOS transistor 111. Thereafter, by making the switch 151 non-conductive, the input impedance of the low-band amplifier circuit 103 can be increased. Generally, the switch 151 can be turned on to charge the Cgs with a bias voltage, and the switch 151 can be turned off when detecting noise (for example, the variation of the power supply voltage described in FIG. 2). During noise detection, the amplifier 100 can have a high input impedance to reduce errors.

The configuration of the bias circuit 105 is not limited to this example. For example, a resistor having a relatively high resistance value may be used instead of the switch 151.

The MOS transistor 112 is a transistor whose gate is connected to a constant current circuit 153 constituting a load of the drain of the MOS transistor 111, and which passes a drain current corresponding to the drain voltage of the MOS transistor 111. The drain current of the MOS transistor 112 is supplied to a resistor 131 connected to the source of the MOS transistor 111. That is, the MOS transistor 112 amplifies the change in the drain voltage of the MOS transistor 111 and converts it into a change in current, and feeds it back to the source of the MOS transistor 111. Therefore, the voltage Vgs between the gate and the source of the MOS transistor 111 is maintained at a substantially fixed voltage, which can reduce the apparent input capacitance of the MOS transistor. Thereby, the capacitance of the capacitor 141 can be reduced, and the exclusive area of the amplifier 100 can be reduced.

The MOS transistor 113 is a transistor that supplies a current to the output terminal 102. The gate of the MOS transistor 113 is connected to the gate of the MOS transistor 112, and the source of the MOS transistor 113 is connected to the power line Vdd like the MOS transistor 112. By making the characteristics of the MOS transistors 112 and 113 consistent, the MOS transistor 113 can supply a sink current that is substantially the same as the drain current of the MOS transistor 112.

The drain current of the MOS transistor 113 flows through the resistor 132 through the output terminal 102 and is converted into an output voltage. As described above, since the drain current of the MOS transistor 113 and the drain current of the MOS transistor 112 are approximately equal, the change (ΔVo) of the output voltage Vo of the low-band amplifier circuit 103 can be expressed by the following formula.
ΔVo = ΔIo × R132 = ΔIs × R132
Here, ΔIo and ΔIs represent changes in the output current and the source current of the MOS transistor 111, respectively. R132 represents the resistance value of the resistor 132.

On the other hand, the change (ΔVi) of the input voltage Vi of the low-band amplifier circuit 103 can be expressed by the following formula.
ΔVi = ΔIs × R131
Here, R131 represents the resistance value of the resistor 131. The gain G of the low-band amplifier circuit 103 is expressed by the following formula.
G = ΔVo / ΔVi = R132 / R131
That is, the gain of the low-band amplifier circuit 103 is determined by the ratio of the resistors 131 and 132. It is possible to simplify the adjustment of the gain of the low-band amplifier circuit 103 corresponding to the level of the input signal, that is, the voltage of the detected noise. In addition, since the gain does not depend on the gm of the MOS transistor 111, unevenness in the gain of the low-band amplifier circuit 103 can be reduced.

Furthermore, the gain can be adjusted by adjusting the ratio of the gm of the MOS transistors 112 and 113. This is because the same gate voltage is applied to the MOS transistors 112 and 113, so the drain current corresponding to the gm ratio of the MOS transistor 112 flows through the MOS transistor 113 as an output current. When the resistor 132 is omitted and the amplifier 100 is set as an amplifier in a current output form, the gain can be adjusted better by adjusting the gm ratio of the MOS transistors 112 and 113.

The high-band amplifier circuit 104 includes MOS transistors 114 and 115, a constant current circuit 154, and a capacitor 143. For the MOS transistors 114 and 115, p-channel MOS transistors can be used.

The sources of the MOS transistor 114 and the MOS transistor 115 are commonly connected to the input terminal 101. The constant current circuit 154 and the capacitor 143 connected in parallel are connected between the drain of the MOS transistor 114 and the ground. A drain of the MOS transistor 114 is further connected to a gate of the MOS transistor 114 and a gate of the MOS transistor 115. The drain of the MOS transistor 115 is connected to the output terminal 102.

The MOS transistor 114 is an example of the fourth transistor described in the technical solution. And an example of the fifth transistor described in the MOS transistor 115 series technical solution. The capacitor 143 is an example of the first capacitor described in the technical solution.

The constant current circuit 154 is a circuit that causes a specific current to flow through the drain of the MOS transistor 114. Through the constant current circuit 154, a specific bias current flows from the input terminal 101 to the MOS transistor 114.

The capacitor 143 is a capacitor that bypasses the AC signal in the input signal by the constant current circuit 154. By connecting the capacitor 143 to the drain of the MOS transistor 114, the AC signal of the input signal flows through the MOS transistor 114.

The MOS transistor 115 is a transistor whose drain is connected to the output terminal 102 and forms a current mirror circuit with the MOS transistor 114. A drain current of approximately the same value as that of the MOS transistor 114 flows through the MOS transistor 115. That is, a current substantially the same as an AC signal flowing through the MOS transistor 114 through the capacitor 143 also flows in the MOS transistor 115. This AC signal is supplied to the output terminal 102. Thereby, the high-band amplification circuit 104 can detect a signal having a frequency corresponding to the capacitance of the capacitor 143 from the input signal and output it. By selecting the capacitance of the capacitor 143, the band adjustment of the high-band amplifier circuit 104 can be easily performed. In addition, since the capacitor 143 is connected to a different node from the output terminal 102, the capacitance of the capacitor 143 can be separated from the capacitance of the output terminal 102 of the high-frequency amplifier circuit 104. The capacitance observed from the output side of the high-frequency amplifier circuit 104 can be reduced, and the stabilization time of the reference signal generated by the reference signal generating section 5 can be shortened. Can produce high-precision reference signals.

In addition, the gain of the high-band amplifier circuit 104 can be adjusted by changing the mirror ratio of the current mirror. For example, by connecting the MOS transistor 115 in parallel to the mirror destination MOS transistor 115, the current supplied to the output terminal 102 can be increased, and the gain can be made to a value greater than 1.

[Frequency characteristics of amplifier]
FIG. 4 is a diagram showing an example of the characteristics of the amplifier according to the first embodiment of the present disclosure. This figure is a diagram showing the frequency characteristics of the amplifier 100. The horizontal axis and vertical axis of the graph represent frequency and gain, respectively. A curve 301 in the figure is a curve showing characteristics of the amplifier 100. The low-frequency band in the figure is mainly a band region in which the input signal is amplified by the low-band amplifier circuit 103, and the high-frequency band is mainly the band region in which the input signal is amplified by the high-band amplifier circuit 104. The gain 302 of the amplifier 100 in the figure can be performed by adjusting the ratio of the resistors 131 and 132 or the ratio of the gm of the MOS transistors 112 and 113 illustrated in FIG. 3. In addition, the gain 303 of the high frequency band in the figure can be adjusted by changing the mirror ratio of the MOS transistors 115 and 114 described in FIG. 3. The crossover frequencies of the high frequency band and the low frequency band can be changed by adjusting the capacitances of the capacitors 142 and 143 in FIG. 3.

For example, when the capacitor 142 is omitted in the low-band amplifier circuit 103, the gain 302 of the low-band amplifier circuit 103 can be set to a characteristic extending to a high frequency band.

The configuration of the amplifier 100 is not limited to this example. For example, a configuration in which any one of the low-band amplifier circuit 103 and the high-band amplifier circuit 104 is omitted may be adopted.

As described above, the amplifier 100 according to the first embodiment of the present disclosure can adjust the gain of the low frequency band by changing the ratio of the resistors 131 and 132 or the ratio of the gm of the MOS transistors 112 and 113. In addition, the gain of the high frequency band can be adjusted by changing the mirror ratio of the MOS transistors 114 and 115. Thereby, the adjustment of the gain corresponding to the detected noise can be simplified, and the influence of the noise on the image signal can be reduced.

<2. Second Embodiment>
In the amplifier 100 of the first embodiment described above, the low-band amplifier circuit 103 and the high-band amplifier circuit 104 are connected in parallel. On the other hand, the amplifier 100 according to the second embodiment of the present disclosure is different from the first embodiment in that the low-band amplifier circuit 103 and the high-band amplifier circuit 104 are cascade-connected.

[Composition of amplifier]
FIG. 5 is a circuit diagram showing a configuration example of an amplifier according to a second embodiment of the present disclosure. The amplifier 100 shown in the figure is different from the amplifier 100 described in FIG. 3 in that a MOS transistor 117 is provided instead of the constant current circuit 154 and further includes a MOS transistor 116. For the MOS transistors 116 and 117, n-channel MOS transistors can be used.

The drain of the MOS transistor 113 is connected to the drain and gate of the MOS transistor 116 and the gate of the MOS transistor 117. The sources of the MOS transistors 116 and 117 are grounded. The drain of the MOS transistor 117 is connected to one end of the capacitor 143, the drain and gate of the MOS transistor 114, and the gate of the MOS transistor 115. Since the wiring of other components is the same as that of the amplifier 100 described in FIG. 3, the description is omitted.

The MOS transistors 116 and 117 constitute a current mirror circuit. A current supplied from the MOS transistor 113 flows through the MOS transistor 116, and the same current flows through the MOS transistor 117. That is, the output current of the low-band amplifier circuit 103 becomes the bias current of the MOS transistor 114 of the high-band amplifier circuit 104. As a result, the output of the low-band amplifier circuit 103 is transmitted to the high-band amplifier circuit 104, and the low-band amplifier circuit 103 and the high-band amplifier circuit 104 are connected in cascade. By using the output current of the low-band amplifier circuit 103 as the bias current of the MOS transistor 114 of the high-band amplifier circuit 104, the current consumption of the amplifier 100 can be reduced. In addition, since only the output current of the high-frequency amplifier circuit 104 is supplied to the resistor 132, the resistance value of the resistor 132 can be increased. Therefore, the output current of the reference signal generating section 5 can be reduced.

Furthermore, the current mirror circuit including the MOS transistors 116 and 117 is an example of the current mirror circuit described in the technical solution.

Since the configuration of the amplifier 100 other than that is the same as that of the amplifier 100 described in the first embodiment of the present disclosure, the description is omitted.

As described above, the amplifier 100 according to the second embodiment of the present disclosure reduces the output current by connecting the low-band amplifier circuit 103 and the high-band amplifier circuit 104 in cascade. This can reduce the power consumption of the amplifier 100.

<3. Third Embodiment>
The amplifier 100 of the first embodiment described above is amplified using the MOS transistor 111 only in the initial stage of the low-band amplifier circuit 103. On the other hand, the amplifier 100 according to the third embodiment of the present disclosure is different from the first embodiment described above in that a circuit using a plurality of MOS transistors is combined.

[Composition of amplifier]
FIG. 6 is a circuit diagram showing a configuration example of an amplifier according to a third embodiment of the present disclosure. The amplifier 100 shown in the figure is different from the amplifier 100 described in FIG. 3 in that it further includes MOS transistors 118 to 120 and a bias circuit 106. For the MOS transistors 119 and 120, p-channel MOS transistors can be used. For the MOS transistor 118, an n-channel MOS transistor can be used. The bias circuit 105 and the high-frequency amplifier circuit 104 are briefly described.

The drain of the MOS transistor 111 is connected to the source of the MOS transistor 118 and the drain of the MOS transistor 120. The drain of the MOS transistor 118 is connected to one of the drain of the MOS transistor 119, the gate of the MOS transistor 112, the gate of the MOS transistor 113, and the capacitor 142. The source of the MOS transistor 119 is connected to one end of the resistor 133, and the other end of the resistor 133 is connected to the power line Vdd. The source of the MOS transistor 120 is connected to one end of the resistor 134, and the other end of the resistor 134 is connected to the power line Vdd. Gates of the MOS transistors 118 to 120 are connected to the bias circuit 106, respectively. Since the wiring of other components is the same as that of the amplifier 100 described in FIG. 3, the description is omitted.

The bias circuit 106 supplies a bias voltage to the gates of the MOS transistors 118 to 120.

The MOS transistor 118 is a transistor that is connected to the MOS transistor 111 in a superimposed manner. By connecting the MOS transistor 118 to the drain of the MOS transistor 111, the input capacitance of the MOS transistor 111 can be reduced, and the capacitance of the capacitor 141 can be reduced.

In addition, the MOS transistor 119, the resistor 133, and the bias circuit 106 connected in series are specific constitutions of the constant current circuit 153 described in FIG. The constant current circuit adjusts its internal resistance by flowing a specific current. Specifically, by adjusting the internal resistance of the MOS transistor 119 and adjusting the voltage applied to the MOS transistor 111, the current flowing through the MOS transistor 111 is kept constant. By connecting a resistor (resistor 133) in series to the source of the MOS transistor 119 constituting such a constant current circuit, the apparent gm of the MOS transistor 119 can be reduced. This reduces noise.

On the other hand, since the MOS transistors 119, 118, and 111 are connected in series, when the power supply voltage of the power line Vdd is low, the current supplied to the MOS transistor 111 may be insufficient. Therefore, a MOS transistor 120 and a resistor 134 connected in series are added to supply a constant current to the drain of the MOS transistor 111. That is, a current is supplied to the MOS transistor 111 by bypassing the MOS transistor 118 and the like that are superimposed and connected. This can make up for the insufficient current supply of the MOS transistor 111. The resistance values of the resistors 133 and 134 can be amplified, and noise can be reduced.

In addition, the MOS transistor 120 and the resistor 134 connected in series are examples of the second constant current circuit described in the technical solution.

Since the configuration of the amplifier 100 other than that is the same as that of the amplifier 100 described in the first embodiment of the present disclosure, the description is omitted.

As explained above, the amplifier 100 according to the third embodiment of the present disclosure can be configured to have a low input capacitance by arranging MOS transistors 118 connected in layers. This can reduce the capacitance of the capacitor 141. Furthermore, by further arranging a constant current circuit, noise can be reduced.

<4. Fourth Embodiment>
The amplifier 100 of the first embodiment described above uses MOS capacitors 112 and 113 connected in parallel. On the other hand, the amplifier 100 according to the fourth embodiment of the present disclosure is different from the first embodiment in that a current mirror is added.

[Composition of amplifier]
FIG. 7 is a circuit diagram showing a configuration example of an amplifier according to a fourth embodiment of the present disclosure. The amplifier 100 shown in the figure is different from the amplifier 100 described in FIG. 3 in that it further includes a MOS transistor 121. As the MOS transistor 121, a p-channel MOS transistor can be used.

The source of the MOS transistor 112 is connected to the drain and gate of the MOS transistor 121 and the gate of the MOS transistor 113. The source of the MOS transistor 121 is connected to the power line Vdd. The other components of the amplifier 100 are the same as those of the amplifier 100 described in FIG. 3, so the description is omitted.

The MOS transistor 121 and the MOS transistor 112 are connected in series and the MOS transistors 121 and 113 are connected with a current mirror. Thereby, a drain current substantially the same as the drain current of the MOS transistor 112 can be caused to flow in the MOS transistor 113. The gain can be easily adjusted when the variation in gm of the MOS transistors 112 and 113 is large by different manufacturing processes.

Since the configuration of the amplifier 100 other than that is the same as that of the amplifier 100 described in the first embodiment of the present disclosure, the description is omitted.

As described above, the amplifier 100 according to the fourth embodiment of the present disclosure can adjust the gain by a circuit using a current mirror.

Finally, the description of each of the above embodiments is an example of the present disclosure, and the present disclosure is not limited to the above embodiments. Therefore, it is a matter of course that various changes can be made in accordance with the design and the like without departing from the scope of the technical idea of the present disclosure, in addition to the embodiments described above.

In addition, the present technology can also adopt the following configuration.
(1) An amplifier having:
An input terminal to which an input signal is applied;
Low-frequency amplifier circuit, which has:
The first transistor is input with the applied input signal at the gate terminal and flows a current corresponding to the input signal;
A load section connected to the drain terminal of the first transistor;
A second transistor, which is connected to a gate terminal to the load section and flows a current corresponding to a change in the voltage of the drain terminal of the first transistor;
A first resistor connected in common to a source terminal of the first transistor and a drain terminal of the second transistor to flow a current from the first transistor and the second transistor; and a third transistor, which Supply a current substantially equal to the above second transistor;
High-frequency band amplifying circuit having:
Constant current circuit
A fourth transistor, which is connected in series with the input terminal and the constant current circuit, and passes a bias current of the constant current circuit;
A first capacitor is connected in parallel with the constant current circuit to allow an AC signal in the input signal to flow through the fourth transistor; and a fifth transistor constitutes a current mirror circuit with the fourth transistor and supplies the current mirror A current corresponding to a current flowing in the fourth transistor; and an output terminal that outputs a current supplied through the third transistor and the fifth transistor.
(2) The amplifier according to the above (1), further comprising a second resistor connected to the output terminal to convert the output current into a voltage.
(3) The amplifier according to (1) or (2) above, wherein the low-frequency amplifier circuit further includes:
A second capacitor is connected between the input terminal and the gate terminal of the first transistor; and a bias circuit that supplies a bias voltage to the gate terminal of the first transistor.
(4) The amplifier according to any one of (1) to (3) above, wherein the load section is composed of a constant current circuit.
(5) The amplifier according to any one of the above (1) to (4), wherein the constant current circuit of the high-frequency amplifier circuit is a current mirror circuit that flows a current corresponding to a current flowing through the third transistor. Constitute,
The third transistor supplies a current to the output terminal through the high-band amplifier circuit.
(6) The amplifier according to any one of (1) to (5), wherein the low-frequency amplifier circuit further includes a sixth transistor, which is connected to the first transistor in a superimposed manner.
(7) The amplifier according to the above (6), wherein the low-frequency amplifier circuit further includes a second constant current circuit that supplies a bias current to the first transistor.

1‧‧‧ camera element

2‧‧‧ pixel array section

3‧‧‧Control Department

4‧‧‧AD Conversion Department

5‧‧‧Reference signal generation unit

6‧‧‧ Power

7‧‧‧Noise detection department

8‧‧‧ Addition Department

11‧‧‧ signal line

12‧‧‧ signal line

13‧‧‧ signal line

14‧‧‧Power cord

15‧‧‧ signal line

16‧‧‧ signal line

21‧‧‧ pixels

41‧‧‧Comparison

42‧‧‧Counting Department

43‧‧‧holding department

100‧‧‧ amplifier

101‧‧‧input

102‧‧‧output

103‧‧‧Low-band amplifier circuit

104‧‧‧High frequency amplifier circuit

105‧‧‧ bias circuit

106‧‧‧ bias circuit

111 ～ 121‧‧‧MOS transistor

131 ～ 134‧‧‧Resistance

141 ～ 143‧‧‧Capacitors

151‧‧‧Switch

152‧‧‧Voltage source

153, 154‧‧‧ constant current circuit

301‧‧‧curve

302‧‧‧Gain in low frequency band

303‧‧‧High-band gain

Vdd‧‧‧ Power Cord

FIG. 1 is a diagram showing a configuration example of an imaging device to which the present disclosure can be applied.

FIG. 2 is a diagram showing an example of AD conversion in this embodiment.

FIG. 3 is a circuit diagram showing a configuration example of an amplifier according to the first embodiment of the present disclosure.

FIG. 4 is a diagram showing an example of the characteristics of the amplifier according to the first embodiment of the present disclosure.

FIG. 5 is a circuit diagram showing a configuration example of an amplifier according to a second embodiment of the present disclosure.

FIG. 6 is a circuit diagram showing a configuration example of an amplifier according to a third embodiment of the present disclosure.

FIG. 7 is a circuit diagram showing a configuration example of an amplifier according to a fourth embodiment of the present disclosure.

Claims (7)

An amplifier having: An input terminal to which an input signal is applied; Low-frequency amplifier circuit, which has: The first transistor is input with the applied input signal at the gate terminal and flows a current corresponding to the input signal; A load section connected to the drain terminal of the first transistor; A second transistor, which is connected to the load portion at the gate terminal and flows a current corresponding to a change in the voltage of the drain terminal of the first transistor; A first resistor connected in common to the source terminal of the first transistor and the drain terminal of the second transistor to flow a current from the first transistor and the second transistor; and A third transistor, which supplies a current substantially equal to the current of the second transistor; High-frequency band amplifying circuit having: Constant current circuit A fourth transistor, which is connected in series to the input terminal and the constant current circuit, and passes a bias current of the constant current circuit; A first capacitor connected in parallel with the constant-current circuit so that the AC signal in the input signal flows through the fourth transistor; and A fifth transistor that forms a current mirror circuit with the fourth transistor and supplies a current corresponding to the current flowing in the fourth transistor; and The output terminal outputs a current supplied from the third transistor and the fifth transistor. The amplifier according to claim 1, further comprising a second resistor connected to the output terminal and converting the output current into a voltage. As in the amplifier of claim 1, wherein The low-frequency amplifier circuit further includes: A second capacitor connected between the input terminal and the gate terminal of the first transistor; and The bias circuit supplies a bias voltage to a gate terminal of the first transistor. As in the amplifier of claim 1, wherein The load section is composed of a constant current circuit. As in the amplifier of claim 1, wherein The constant current circuit of the high-band amplifier circuit is configured by a current mirror circuit that flows a current corresponding to the current flowing through the third transistor. The third transistor supplies a current to the output terminal through the high-band amplifier circuit. As in the amplifier of claim 1, wherein The low-frequency amplifier circuit further includes a sixth transistor that is connected to the first transistor in a stacked manner. As in the amplifier of claim 6, wherein The low-frequency amplifier circuit further includes a second constant current circuit that supplies a bias current to the first transistor.