TW201929030A - Plasma processing apparatus and measurement circuit - Google Patents

Abstract

A plasma processing apparatus 10 includes a chamber 17 in which an internal space is provided and a target object carried into the internal space is processed with plasma in the internal space; a high frequency power source 14 configured to supply a high frequency power for plasma generation within the chamber 17; a matching circuit 15 configured to match an impedance of the plasma within the chamber 17 with an impedance of the high frequency power source 14; a signal synchronizer 20 configured to calculate the impedance of the plasma within the chamber 17; a control amount calculator 12 configured to control a frequency and a magnitude of the high frequency power, and an impedance of the matching circuit 15 based on the impedance calculated by the signal synchronizer 20. Further, the signal synchronizer 20 and the control amount calculator 12 are provided on a single substrate 11.

Description

Plasma processing device and measuring circuit

Various aspects and embodiments of the present invention relate to a plasma processing apparatus and a measurement circuit.

In the etching process of a semiconductor wafer using a plasma, the key is to control the holes or trenches formed by etching into a desired shape. The shape of the holes or grooves formed by etching is affected by the ratio of free radicals to ions in the plasma, and the like. The ratio of free radicals to ions in the plasma is controlled by, for example, the magnitude or frequency of radio frequency power supplied to the plasma. In addition, by performing pulse modulation on the RF power supplied to the plasma, the ratio of free radicals to ions in the plasma can also be accurately controlled.

The application of pulse-modulated RF power to the plasma requires rapid impedance matching between the RF power source and the plasma in conjunction with the rapid rise and fall caused by the pulse modulation. As a method of quickly performing impedance matching, it is discussed to quickly perform impedance matching between the RF power source and the plasma by adjusting the frequency of the RF power source.
[Prior technical literature]
[Patent Literature]

[Patent Document 1] Japanese Patent Application Laid-Open No. 10-64696
[Patent Document 2] Japanese Patent Laid-Open No. 2017-73247

[Problems to be Solved by the Invention]

However, depending on the processing conditions or the state of the chamber, the plasma may misfire or become unstable. In the conventional plasma processing device, the radio frequency power supply performs power control and matching frequency control, and the matcher performs impedance control. The radio frequency power supply and the matcher do not work together but independently perform processing operations. Therefore, the control performed by the radio frequency power supply and the matcher may interfere with each other. As a result, controlled oscillations are induced, causing the plasma to misfire or become unstable.

As one of the methods to solve the above-mentioned problems, for example, a method of applying a filter to a sensory measurement for each control to reduce the control is considered. However, if this method is used, depending on the conditions, it may be unavoidable to control the oscillation. Furthermore, in the conventional plasma processing apparatus, since the matching process requires time, if the radio frequency power is modulated by a short-period pulse, the matching process may not be completed during the pulse-on period, resulting in a residual reflected wave. Therefore, when pulse modulation is performed in a plurality of plasma processing apparatuses, the degree of reflected waves cannot be controlled, and mechanical errors may occur.

Therefore, even in the case of using radio-frequency power modulated by a short-term pulse, a plasma processing device that can complete impedance matching processing in a short time and can quickly ignite a stable plasma is required.
[Means for solving problems]

One aspect of the present invention is a plasma processing apparatus including a chamber, a power supply unit, a matching circuit, a first calculation unit, and a control circuit. The chamber has a space inside, and the to-be-processed body moved into the space is processed by the plasma generated in the space. The power supply unit supplies radio frequency power for generating plasma in the chamber. The matching circuit matches the impedance between the plasma in the chamber and the power supply unit. The first calculation unit calculates the impedance of the plasma in the chamber. The control circuit controls the frequency of the radio frequency power supplied to the chamber, the magnitude of the radio frequency power, and the impedance of the matching circuit based on the impedance calculated by the first calculation unit. The first calculation unit and the control circuit are provided on a single substrate.
[Inventive effect]

According to various aspects and embodiments of the present invention, even in the case of using radio frequency power modulated by a short-term pulse, the impedance matching process can be completed in a short time, and the stabilized plasma can be quickly made. ignition.

In one embodiment, the plasma processing apparatus disclosed in the present invention includes a chamber, a power supply unit, a matching circuit, a first calculation unit, and a control circuit. The chamber has a space inside, and the to-be-processed body moved into the space is processed by the plasma generated in the space. The power supply unit supplies radio frequency power for generating plasma in the chamber. The matching circuit matches the impedance between the plasma in the chamber and the power supply unit. The first calculation unit calculates the impedance of the plasma in the chamber. The control circuit controls the frequency of the radio frequency power supplied to the chamber, the magnitude of the radio frequency power, and the impedance of the matching circuit based on the impedance calculated by the first calculation unit. The first calculation unit and the control circuit are provided on a single substrate.

The plasma processing apparatus disclosed in the present invention may include a first measurement unit connected to a node between the matching circuit and the chamber and measuring a voltage and a current of radio frequency power supplied to the chamber in one embodiment. . The first calculation unit can calculate the impedance of the plasma in the chamber based on the voltage and current of the radio-frequency power measured by the first measurement unit.

In one embodiment of the plasma processing apparatus disclosed in the present invention, the first calculation unit may include a first ADC (Analog to Digital Converter); a second ADC; a second calculation unit; and 3Calculation section. The first ADC converts the voltage of the RF power supplied into the chamber into a digital signal. The second ADC converts the current of the RF power supplied into the chamber into a digital signal. The second calculation unit calculates individual phases and amplitudes of voltages and currents converted into digital signals. The third calculation unit calculates the impedance of the plasma in the chamber based on the phase difference and amplitude ratio of the voltage and current converted into digital signals.

Furthermore, in one embodiment of the plasma processing apparatus disclosed in the present invention, the first calculation unit may include a signal generator, a first phase adjustment unit, and a second phase adjustment unit. The signal generator generates a sampling clock used by each of the first ADC and the second ADC. The first phase adjustment unit adjusts the phase of the sampling clock input to the first ADC based on the phase of the voltage with respect to the sampling clock. The second phase adjustment unit adjusts the phase of the sampling clock input to the second ADC based on the phase of the current with respect to the sampling clock.

Furthermore, in one embodiment of the plasma processing apparatus disclosed in the present invention, the first calculation unit may include a first amplifier, a second amplifier, a first gain adjustment unit, and a second gain adjustment unit. The first amplifier amplifies the voltage of the RF power supplied into the chamber, and then inputs the voltage to the first ADC. The second amplifier amplifies the current of the RF power supplied into the chamber, and inputs the current to the second ADC. The first gain adjustment unit adjusts the gain of the first amplifier based on the amplitude of the voltage calculated by the second calculation unit. The second gain adjustment unit adjusts the gain of the second amplifier based on the amplitude of the current calculated by the second calculation unit.

In one embodiment, the plasma processing apparatus disclosed in the present invention may further include a second measurement unit connected to a node between the power supply unit and the matching circuit, and measuring the output from the power supply unit to the matching circuit. Voltage and current of RF power. The first calculation unit may separately calculate the impedance of the plasma in the chamber using the voltage and current of the radio frequency power measured by the second measurement unit.

In addition, the measurement circuit disclosed in the present invention is used in a plasma processing apparatus for measuring the impedance of a plasma in a chamber. The plasma processing apparatus includes a chamber having a space inside, The to-be-processed object moved into the space is processed by the plasma generated in the space; the power supply unit supplies radio frequency power for generating plasma in the chamber; the matching circuit is provided in the chamber And a power supply unit; and a control circuit that controls the frequency of the radio frequency power supplied to the chamber by the power supply unit, the magnitude of the radio frequency power, and the impedance of the matching circuit. The measurement circuit and the control circuit are provided on one substrate. The measurement circuit includes a first ADC, a second ADC, an amplitude phase calculation unit, and an impedance calculation unit. The first ADC converts the voltage of the RF power supplied into the chamber into a digital signal. The second ADC converts the current of the RF power supplied into the chamber into a digital signal. The amplitude phase calculation unit calculates the phase and amplitude of each of the voltage and current converted into a digital signal. The impedance calculation unit calculates the impedance of the plasma in the chamber based on the phase difference and amplitude ratio of the voltage and current converted into digital signals.

Hereinafter, examples of the plasma processing apparatus and the measurement circuit disclosed in the present invention will be described in detail based on the drawings. Moreover, the plasma processing apparatus and the measurement circuit disclosed in the present invention are not limited by the following embodiments.
[Example 1]

[Configuration of Plasma Processing Apparatus 10]
FIG. 1 is a block diagram showing an example of a plasma processing apparatus according to the first embodiment. The plasma processing apparatus 10 includes, for example, as shown in FIG. 1, a signal synchronization processing unit 20, a control amount calculation unit 12, a control signal generation unit 13, a radio frequency power source 14, a matching circuit 15, a power sensor 16, and a chamber 17. In this embodiment, the signal synchronization processing unit 20, the control amount calculation unit 12, and the control signal generation unit 13 are mounted on a single substrate 11.

The radio frequency power source 14 includes an oscillator 140 and an amplifier 141. The oscillator 140 cooperates with a control signal output from the control signal generating section 13 to generate a radio frequency signal. The amplifier 141 amplifies the power of the radio frequency signal generated by the oscillator 140 to match the gain of the control signal output from the control signal generating section 13. The radio frequency power amplified by the amplifier 141 is supplied to the chamber 17 via the matching circuit 15. The radio frequency power source 14 is an example of a power supply unit.

The chamber 17 has a space therein, and a processing object such as a semiconductor wafer is accommodated in the space. The inside of the chamber 17 is adjusted to a predetermined vacuum degree by an exhaust device (not shown), and a processing gas is supplied into the chamber 17 from a gas supply source (not shown). Then, the radio frequency power output from the radio frequency power source 14 is supplied to the chamber 17 via the matching circuit 15, whereby the plasma of the processing gas is generated in the chamber 17, and the generated plasma is applied to the chamber. The object in 17 is subjected to a predetermined process such as etching.

The matching circuit 15 matches the impedance of the RF power source 14 with the impedance of the chamber 17 containing the plasma. The matching circuit 15 has an inductor and a plurality of variable capacitors therein, and controls the capacitance of each variable capacitor in accordance with a control signal output from the control signal generating section 13. In addition, the matching circuit 15 may include a variable inductor whose inductance can be changed. The input impedance of the matching circuit 15 varies according to the state of the plasma generated in the chamber 17. The matching circuit 15 controls the capacitance of each variable capacitor in cooperation with the control signal output from the control signal generating section 13, thereby matching the output impedance of the RF power source 14 with the input impedance of the matching circuit 15.

The power sensor 16 is connected to a node between the matching circuit 15 and the chamber 17 in a transmission path of radio frequency power output from the RF power source 14 and then supplied to the chamber 17 through the matching circuit 15. The power sensor 16 measures the voltage and current of the radio-frequency power supplied to the chamber 17 via the matching circuit 15, and then outputs the measurement results of the voltage and current to the signal synchronization processing unit 20. The power sensor 16 is an example of a first measurement unit.

The signal synchronization processing unit 20 calculates the voltage of the plasma generated in the chamber 17 based on the measurement results of the voltage and current of the RF power output from the power sensor 16 and the control signal output from the control signal generation unit 13. The impedance of the impedance chamber 17. Then, the signal synchronization processing unit 20 outputs the calculated impedance of the chamber 17 to the control amount calculation unit 12. The signal synchronization processing unit 20 is an example of a first calculation unit.

The control amount calculation unit 12 calculates the current input impedance of the matching circuit 15 based on the impedance of the chamber 17 calculated by the signal synchronization processing unit 20. Then, the control amount calculation section 12 calculates control amounts of various parameters such as the frequency of the radio frequency power, the magnitude of the radio frequency power, and the capacitance of each variable capacitor in the matching circuit 15 so that the input impedance of the matching circuit 15 approaches the target input impedance (for example, 50Ω).

Among them, the input impedance Z1 of the matching circuit 15 is calculated using the frequency of the radio frequency power, the magnitude of the radio frequency power, and the capacitance of each variable capacitor in the matching circuit 15 such as x _n by using the following standard formula (1), for example. .
Z1 = f (x ₁ , x ₂ ,…, x _n )… (1)

Moreover, among the parameters x _n , parameters other than the frequency of the RF power, the magnitude of the RF power, and the capacitance of each variable capacitor of the matching circuit 15 may include, for example, the temperature or pressure in the chamber 17 and supply to the chamber. The type of gas in 17 and so on.

The control amount calculation unit 12 uses the above-mentioned standard formula (1) to calculate the control amount of each parameter x _n so that the input impedance of the matching circuit 15 approaches the target input impedance. In this embodiment, the control amount calculation section 12 calculates the control amount of the radio frequency power, the magnitude of the radio frequency power, and the capacitance of the variable capacitor of each of the matching circuits 15 respectively. The control amount calculation unit 12 outputs the calculated control amounts to the control signal generation unit 13.

The control signal generating section 13 generates each control signal for the frequency of the radio frequency power output from the control amount calculation section 12, the magnitude of the radio frequency power, and the control amount of the capacitance of the variable capacitor of each of the matching circuits 15. Then, the control signal generating section 13 outputs the generated control signals to the oscillator 140, the amplifier 141, and the matching circuit 15, respectively. The control amount calculation unit 12 and the control signal generation unit 13 are examples of a control circuit.

However, the impedance of the plasma varies depending on the state of the plasma in the chamber 17 from before the plasma is ignited to when the plasma is stable after the ignition. Therefore, using the above-mentioned standard formula (1), if the input impedance of the matching circuit 15 is changed to the target input impedance at one go, the control may be excessively controlled and control oscillation may occur. Therefore, in this embodiment, a predetermined trajectory until the input impedance of the matching circuit 15 reaches the target input impedance is defined on the Smith chart. Then, the control amount calculation unit 12 finds the impedance on the trajectory that brings the current input impedance of the matching circuit 15 close to the target input impedance. Then, the control amount calculation unit 12 calculates the control amount of each parameter using the above-mentioned standard formula (1), so as to set the current input impedance of the matching circuit 15 to the found impedance. Thereby, the control amount calculation unit 12 suppresses the control oscillation, and at the same time, matches the output impedance of the radio frequency power source 14 and the input impedance of the matching circuit 15 in a short time.

In addition, the control amount calculation unit 12 controls the input impedance of the matching circuit 15 along a trajectory that has been defined in advance on the Smith chart. Therefore, even in a different plasma processing apparatus 10, the same method can be used. The input impedance of the matching circuit 15 is changed. Therefore, the difference in the time required for the matching process can be reduced between the different plasma processing apparatuses 10.

Further, the control amount calculation unit 12 shares the impedance of the chamber 17 calculated by the signal synchronization processing unit 20, and calculates the control of the frequency of the radio frequency power, the magnitude of the radio frequency power, and the capacitance of the variable capacitor of each of the matching circuits 15. the amount. Thereby, the control amount calculation unit 12 can adjust the input impedance of the matching circuit 15 based on the impedance of the chamber 17 measured at the same timing. Therefore, control oscillation can be suppressed, and plasma generation can be stabilized.

In addition, the control amount calculation unit 12 calculates control amounts of parameters such as the frequency of the RF power, the magnitude of the RF power, and the capacitance of the variable capacitor of each of the matching circuits 15 using the above-mentioned standard formula (1). Therefore, compared with a case where each parameter is calculated individually, control oscillation can be suppressed. Thereby, the input impedance of the matching circuit 15 can be converged to the target input impedance in a short time.

Furthermore, in this embodiment, the signal synchronization processing section 20, the control amount calculation section 12, and the control signal generation section 13 are mounted on a single substrate 11. Therefore, compared with the signal synchronization processing section 20 and the control amount calculation section 12, When the control signal generation unit 13 is mounted on a substrate different from each other, communication between the substrates becomes unnecessary. Thereby, it is possible to reduce the delay of the control signal due to the communication between the substrates, and the control amount calculation unit 12 and the control signal generation unit 13 can perform higher-speed control based on the signal output from the signal synchronization processing unit 20. Therefore, the processing operation of adjusting the input impedance of the matching circuit 15 can be accelerated.

[Configuration of Signal Synchronization Processing Unit 20]
FIG. 2 is a block diagram showing an example of the signal synchronization processing section 20. The signal synchronization processing unit 20 includes an amplitude phase calculation unit 21, an amplitude phase calculation unit 22, a PLL (Phase Locked Loop) 23, a phase difference calculation unit 24, and an impedance calculation unit 25.

The PLL 23 generates a clock signal having a frequency in accordance with a control signal output from the control signal generating section 13. The control signal output from the control signal generating section 13 is a digital chirp for setting a frequency. Then, the PLL 23 outputs the generated clock signals to the amplitude phase calculation unit 21 and the amplitude phase calculation unit 22, respectively. PLL23 is an example of a signal generator.

The amplitude and phase calculation unit 21 calculates the amplitude and phase of the voltage output from the power sensor 16, outputs the calculated voltage phase to the phase difference calculation unit 24, and outputs the calculated voltage amplitude to the impedance calculation unit 25. The amplitude and phase calculation unit 21 includes: an amplifier 210; an ADC 211; a displacement unit 212; a phase shifter 213; a multiplier 214; a multiplier 215; Phase calculation unit 219.

The amplifier 210 amplifies the amplitude of the voltage output from the power sensor 16 with a gain instructed by the amplitude calculation unit 218. The ADC 211 converts the waveform of the voltage of the analog signal amplified by the amplifier 210 into a digital signal at the timing of the clock signal output from the displacement unit 212. The shift unit 212 shifts the phase of the clock signal output from the PLL 23 in accordance with the control signal output from the phase calculation unit 219. The amplifier 210 is an example of a first amplifier, the ADC 211 is an example of a first ADC, and the displacement section 212 is an example of a first phase adjustment section.

The multiplier 214 multiplies the signal output from the ADC 211 by a clock signal having a frequency of 1/2 of the frequency of the clock signal output from the displacement unit 212, and then outputs the multiplied result toward the LPF 216. The multiplication result output from the multiplier 214 is an I (In phase) component of the voltage signal output from the power sensor 16. The LPF 216 removes the high-frequency components of the multiplication result output from the multiplier 214, and outputs the signals from which the high-frequency components have been removed to the amplitude calculation unit 218 and the phase calculation unit 219, respectively.

The phase shifter 213 shifts the phase of the clock signal output from the shifting section 212 by 90 degrees. The multiplier 215 multiplies the signal output from the ADC 211 by a clock signal having a frequency of 1/2 of the frequency of the clock signal output from the phase shifter 213, and then outputs the multiplied result toward the LPF 217. The multiplication result output from the multiplier 215 is the Q (Quadrature phase, quadrature phase) component of the voltage signal output from the power sensor 16. The LPF 217 removes the high-frequency components of the multiplication result output from the multiplier 215, and outputs the signals from which the high-frequency components have been removed to the amplitude calculation unit 218 and the phase calculation unit 219, respectively.

The phase calculation unit 219 calculates the phase of the voltage based on the magnitude of the signal of the I component of the voltage output from the LPF 216 and the magnitude of the signal of the Q component of the voltage output from the LPF 217. The phase calculation unit 219 calculates the phase of the voltage based on a CORDIC (Coordinate Rotation Digital Computer) algorithm, for example. Then, the phase calculation unit 219 holds the calculated phase.

Then, the phase calculation unit 219 calculates a phase control 値 for the phase of the clock signal output from the PLL 23 so that the calculated phase becomes a predetermined 値 (for example, 0 degrees). Then, the phase calculation unit 219 outputs the calculated control chirp toward the displacement unit 212. As a result, the shift unit 212 shifts the phase of the clock signals outputted to the phase shifter 213 and the multiplier 214, and the phase of the voltage found by the signals output from the LPF 216 and LPF 217 becomes a predetermined value. When the phase of the voltage becomes a predetermined value, the phase calculation unit 219 outputs the phase of the held voltage to the phase difference calculation unit 24 and instructs the amplitude calculation unit 218 to output the amplitude of the voltage. Here, the case where the phase of the voltage becomes a predetermined value represents that the phase of the clock signal whose phase is shifted by the displacement unit 212 is synchronized with the phase of the voltage. The phase of the clock signal whose phase is shifted is synchronized with the phase of the voltage by the displacement unit 212, whereby the amplitude of the voltage can be accurately calculated. Hereinafter, a case where the phase of the clock signal whose phase is shifted by the displacement unit 212 is synchronized with the phase of the voltage will be described as a case where the voltage amplitude calculation result and the phase calculation result are synchronized.

The amplitude calculation unit 218 monitors the amplitude of each signal output from the LPF 216 and the LPF 217, and adjusts the gain of the instruction amplifier 210 so that the signal having the larger amplitude becomes the amplitude within a predetermined range. When the amplitude calculation unit 218 outputs an amplitude upon receiving an instruction from the phase calculation unit 219, among the signals output from LPF216 and LPF217, the amplitude of the larger amplitude signal is used as the amplitude of the voltage amplitude. Output to the impedance calculation unit 25. The amplitude calculation unit 218 and the phase calculation unit 219 are examples of a second calculation unit.

The amplitude and phase calculation unit 22 calculates the amplitude and phase of the current output from the power sensor 16, outputs the calculated current phase to the phase difference calculation unit 24, and outputs the calculated current amplitude to the impedance calculation unit 25. The amplitude phase calculation unit 22 includes an amplifier 220, an ADC 221, a displacement unit 222, a phase shifter 223, a multiplier 224, a multiplier 225, an LPF 226, an LPF 227, an amplitude calculation unit 228, and a phase calculation unit 229.

The amplifier 220 amplifies the amplitude of the current output from the power sensor 16 with a gain instructed from the amplitude calculation unit 228. The ADC 221 converts the waveform of the current of the analog signal amplified by the amplifier 220 into a digital signal at the timing of the clock signal output from the displacement section 222. The shift unit 222 shifts the phase of the clock signal output from the PLL 23 in accordance with the control signal output from the phase calculation unit 229. The amplifier 220 is an example of a second amplifier, the ADC 221 is an example of a second ADC, and the displacement section 222 is an example of a second phase adjustment section.

The multiplier 224 multiplies the signal output from the ADC 221 by a clock signal having a frequency which is 1/2 of the frequency of the clock signal output from the displacement unit 222, and then outputs the multiplied result toward the LPF 226. The multiplication result output from the multiplier 224 is the I component of the signal of the current output from the power sensor 16. The LPF 226 removes high-frequency components of the multiplication result output from the multiplier 224, and outputs signals from which the high-frequency components have been removed to the amplitude calculation unit 228 and the phase calculation unit 229, respectively.

The phase shifter 223 shifts the phase of the clock signal output from the shifting section 222 by 90 degrees. The multiplier 225 multiplies the signal output from the ADC 221 by a clock signal having a frequency of 1/2 of the frequency of the clock signal output from the phase shifter 223, and then outputs the multiplication result toward the LPF 227. The multiplication result output from the multiplier 225 is the Q component of the signal of the current output from the power sensor 16. The LPF 227 removes the high-frequency components of the multiplication result output from the multiplier 225, and outputs the signals from which the high-frequency components have been removed to the amplitude calculation unit 228 and the phase calculation unit 229, respectively.

The phase calculation unit 229 calculates the phase of the current based on the magnitude of the signal of the I component of the current output from the LPF 226 and the magnitude of the signal of the Q component of the current output from the LPF 227. The phase calculation unit 229 calculates the phase of the current based on, for example, a CORDIC algorithm. Then, the phase calculation unit 229 holds the calculated phase.

Then, the phase calculation unit 229 calculates a phase control 値 for the phase of the clock signal output from the PLL 23 so that the calculated phase becomes a predetermined 値 (for example, 0 degrees). Then, the phase calculation unit 229 outputs the calculated control chirp toward the displacement unit 222. As a result, the shift section 222 shifts the phase of the clock signals outputted to the phase shifter 223 and the multiplier 224, and the phase of the current found by the signals output from the LPF226 and LPF227 becomes a predetermined value. When the phase of the current is a predetermined value, the phase calculation unit 229 outputs the phase of the held current to the phase difference calculation unit 24 and instructs the amplitude calculation unit 228 to output the amplitude of the current. Here, the case where the phase of the current becomes a predetermined value represents that the phase of the clock signal whose phase is shifted by the displacement section 222 is synchronized with the phase of the current. The phase of the clock signal whose phase is shifted is synchronized with the phase of the current by the displacement unit 222, whereby the amplitude of the current can be accurately calculated. Hereinafter, the case where the phase of the clock signal whose phase is shifted by the displacement unit 222 is synchronized with the phase of the current will be described as a case where the amplitude calculation result of the current and the phase calculation result are synchronized.

The amplitude calculation unit 228 monitors the amplitude of each signal output from the LPF 226 and the LPF 227, and adjusts the gain of the instruction amplifier 220 so that the signal having the larger amplitude becomes an amplitude within a predetermined range. When the amplitude calculation unit 228 outputs an amplitude upon receiving an instruction from the phase calculation unit 229, among the signals output from LPF226 and LPF227, the amplitude of the larger amplitude signal is used as the amplitude of the current amplitude. Output to the impedance calculation unit 25. The amplitude calculation unit 228 and the phase calculation unit 229 are examples of a second calculation unit.

The phase difference calculation unit 24 calculates a phase difference between the voltage and the current based on the phase of the voltage output from the amplitude phase calculation unit 21 and the phase of the current output from the amplitude phase calculation unit 22. Then, the phase difference calculation unit 24 outputs the calculated phase difference to the impedance calculation unit 25.

The impedance calculation unit 25 calculates an amplitude ratio of the voltage and the current based on the amplitude of the voltage output from the amplitude and phase calculation unit 21 and the amplitude of the current output from the amplitude and phase calculation unit 22. Then, the impedance calculation unit 25 calculates the impedance based on the calculated amplitude ratio and the phase difference output from the phase difference calculation unit 24. Then, the impedance calculation unit 25 outputs the calculated impedance to the control amount calculation unit 12.

However, in the amplitude and phase calculation unit 21 of this embodiment, the phase calculation unit 219 feeds back the control signal 朝向 toward the displacement unit 212 so that the phase of the calculated voltage becomes a predetermined value (for example, 0 degrees). Thereby, the phases of the voltages output from the LPF 216 and the LPF 217 can be made to conform to a predetermined range, and the accuracy of the amplitude of the voltage detected by the amplitude calculation unit 218 can be improved. Similarly, the amplitude and phase calculation unit 22 can improve the accuracy of the amplitude of the current detected by the amplitude calculation unit 228. Thereby, the accuracy of the impedance calculated by the signal synchronization processing unit 20 can be improved.

Further, the amplitude calculation unit 218 monitors the amplitude of each signal output from the LPF 216 and the LPF 217, and adjusts the gain of the instruction amplifier 210 so that the signal having the larger amplitude becomes an amplitude within a predetermined range. Thereby, the voltage range can be automatically adjusted even when the voltage measured by the power sensor 16 is used in a case where the impedance is different from a predetermined impedance such as 50 Ω. Therefore, the voltage amplitude can be calculated more accurately. Similarly, the amplitude calculation unit 228 adjusts the gain of the instruction amplifier 220 so that the signal having the larger amplitude becomes the amplitude within a predetermined range. Thereby, the range of the current can be automatically adjusted even when the current measured by the power sensor 16 is used in the case where the impedance is different from a predetermined impedance such as 50 Ω, so that the amplitude of the current can be calculated more accurately.

In addition, the clock signal generated by one PLL 23 is used in common in each part of the signal synchronization processing section 20, so that the timing inconsistency of each block in the signal synchronization processing section 20 can be reduced, and the voltage can be calculated more accurately And the amplitude and phase of the current. This improves the accuracy of the impedance calculation.

In addition, the PLL 23 generates a clock signal based on the control signal that has been output from the control signal generating unit 13. Therefore, it is possible to generate a clock signal with less degree of frequency inconsistency with the frequency of the RF power output from the RF power source 14. Therefore, the amplitude and phase of the voltage and current can be accurately calculated. This improves the accuracy of the impedance calculation.

FIG. 3 is a diagram showing an example of an equivalent circuit of the plasma processing apparatus 10 according to the first embodiment. In this embodiment, the power sensor 16 is connected to a node between the matching circuit 15 and the cavity 17 in a transmission path of the RF power output from the RF power source 14 and then supplied to the cavity 17 through the matching circuit 15. Therefore, the signal synchronization processing unit 20 can measure the impedance of the chamber 17 including the plasma based on the measurement value obtained by the power sensor 16.

Among them, for example, as shown in FIG. 4, when the power sensor is connected to a node between the RF power source 14 and the matching circuit 15, the impedance measured based on the measurement 得到 obtained by the power sensor becomes the impedance of the matching circuit 15. And the combined impedance of the impedance of the chamber 17 containing the plasma. FIG. 4 is a diagram showing an example of an equivalent circuit of the plasma processing apparatus 10 of Comparative Example 1. FIG.

Therefore, in the example of FIG. 4, based on the measured impedance, the impedance of the matching circuit 15 and the impedance of the chamber 17 including the plasma are estimated separately. Because it is not easy to estimate each impedance correctly, the estimation result contains a certain degree of error. In the plasma processing apparatus 10 of Comparative Example 1 shown in FIG. 4, there are two errors, that is, the impedance of the matching circuit 15 and the impedance of the chamber 17 containing the plasma.

In contrast, in the plasma processing apparatus 10 of this embodiment, as shown in FIG. 3, the impedance of the chamber 17 containing the plasma is calculated based on the measurement 値 of the power sensor 16. Then, the current input impedance of the matching circuit 15 is estimated based on the circuit model of the matching circuit 15. Although it is not easy to correctly calculate the current input impedance of the matching circuit 15, there is only one error factor, that is, the impedance of the matching circuit 15. Therefore, compared with the plasma processing apparatus 10 of the comparative example 1 shown in FIG. 4, an error factor can be reduced.

The structure of the matching circuit 15 is simpler than the structure of the chamber 17. Therefore, the estimation of the impedance of the matching circuit 15 has fewer errors than the estimation of the impedance of the chamber 17 including the plasma. Therefore, the plasma processing apparatus 10 of this embodiment can calculate the impedance of the matching circuit 15 and the impedance of the chamber 17 containing the plasma more accurately than the plasma processing apparatus 10 of Comparative Example 1.

[Match processing]
FIG. 5 is a flowchart showing an example of impedance matching processing. When the plasma processing apparatus 10 generates a plasma in the chamber 17, the matching processing shown in this flowchart is performed.

First, the power sensor 16 measures the voltage and current of radio frequency power supplied to the chamber 17 via the matching circuit 15 (S10). Then, the power sensor 16 outputs the measurement results of the voltage and current to the signal synchronization processing unit 20.

Then, the signal synchronization processing unit 20 calculates the plasma-containing plasma generated in the chamber 17 based on the measurement results of the voltage and current of the RF power output from the power sensor 16 and the control signal output from the control signal generation unit 13. The impedance of the chamber 17 (S11). Then, the signal synchronization processing unit 20 outputs the calculated impedance of the chamber 17 to the control amount calculation unit 12.

Then, the control amount calculation unit 12 calculates the current input impedance of the matching circuit 15 based on the impedance of the chamber 17 calculated by the signal synchronization processing unit 20. Then, the control amount calculation unit 12 determines whether or not the current input impedance of the matching circuit 15 is a distance target 値 within a predetermined range (S12). In the case where the current input impedance of the matching circuit 15 is a distance from the target and is within a predetermined range (S12: Yes), the matching processing shown in this flowchart ends.

In addition, when the current input impedance of the matching circuit 15 is not within a predetermined range from the target (S12: No), the control amount calculation unit 12 calculates the frequency of the RF power, the magnitude of the RF power, and the matching circuit 15 The capacitance of each of the variable capacitors makes the input impedance of the matching circuit 15 close to the target input impedance (S13). Then, the control amount calculation unit 12 outputs the calculated control amounts to the control signal generation unit 13.

Then, the control signal generating section 13 generates a control signal for the frequency of the RF power output from the control amount calculating section 12, the magnitude of the RF power, and the control amount of the capacitance of each variable capacitor in the matching circuit 15 (S14). Then, the control signal generation unit 13 outputs the generated control signals to the oscillator 140, the amplifier 141, and the matching circuit 15 (S15). Then, the processing shown in step S10 is executed again.

Among them, when the frequency of the RF power, the size of the RF power, and the control amount of the capacitance of each variable capacitor in the matching circuit 15 are not affected by the control amounts of other parameters, but are calculated independently, the control amounts of these parameters are simultaneously When applied, control oscillations may occur. Therefore, in the case where the control amount of any parameter is applied, the control of other parameters will be fixed.

Specifically, for example, as shown in FIG. 6, during the period from time 0 to time t, the amount of control of the amount of radio frequency power is applied, and the frequency of the radio frequency power or the impedance of the matching circuit 15 is fixed. In the period from time t ₁ to time t _{2 and} the period from time t ₃ to time t ₄ , the amount of control of the frequency of the radio frequency power is applied, and the magnitude of the radio frequency power or the impedance of the matching circuit 15 is fixed. In the period from time t ₂ to time t _{3 and} the period from time t ₄ to time t ₅ , the control amount of the impedance of the matching circuit 15 is applied, and the frequency or magnitude of the RF power is fixed. FIG. 6 is a diagram showing an example of a matching process in Comparative Example 2. FIG. In the Smith chart in this case, the locus of the input impedance of the matching circuit 15 is, for example, as shown in FIG. 7. FIG. 7 is a diagram showing an example of changes in the input impedance of the matching circuit 15 of Comparative Example 2. FIG.

In this way, in the case where the control amount of each parameter is independently calculated without being affected by the control amount of other parameters, it is difficult to apply the control amount of each parameter at the same time. Therefore, the time required for the impedance matching process becomes longer. If the number of parameters increases, the time required for the impedance matching process becomes longer.

In contrast, in the plasma processing apparatus 10 of this embodiment, the control amounts of the parameters such as the frequency of the RF power, the size of the RF power, and the capacitance of each variable capacitor in the matching circuit 15 are based on the above-mentioned standard formula (1 ), Considering the balance with other parameters. Therefore, even if the control amount of each parameter is applied at the same time, the possibility of control oscillation is low. Therefore, for example, as shown in FIG. 8, the control amounts of a plurality of parameters can be applied simultaneously, and the time required for the impedance matching process can be made much shorter than that of the plasma processing apparatus 10 of Comparative Example 2. 8 is a diagram showing an example of a matching process in the first embodiment. In the Smith chart in this case, the locus of the input impedance of the matching circuit 15 is, for example, a solid line as shown in FIG. 9. FIG. 9 is a diagram showing an example of changes in the input impedance of the matching circuit 15.

However, the phase of the clock signal output from the phase shift unit 212 is delayed relative to the phase of the voltage measured by the power sensor 16, and the amplitude calculation result and the phase calculation result are not synchronized. Therefore, for example, as indicated by the dotted line in FIG. 9, the input impedance of the matching circuit 15 changes according to a trajectory that deviates from a desired trajectory (for example, a trajectory with a solid line with four corners added in FIG. 9). In the case where the phase delay is small (for example, in the case of radio frequency power of several MHz to several tens of MHz, for example, about 1 μs), the input impedance of the matching circuit 15 changes, for example, in accordance with the trajectory shown by the dotted triangle in FIG. In the case where the phase delay is relatively large (for example, when the radio frequency power is several tens to several tens of MHz, for example, it is about 10 μs), the input impedance of the matching circuit 15 is, for example, as shown by a circular dotted line in FIG. 9. Track changes. In this way, the larger the phase delay of the clock signal output from the phase shifting section 212 with respect to the phase of the voltage measured by the power sensor 16, the larger the error of the impedance calculated by the signal synchronization processing section 20 becomes. Thereby, the deviation between the trajectory of the change in the input impedance of the matching circuit 15 and the desired trajectory becomes larger. Therefore, it becomes difficult to stably control the plasma.

In contrast, in the amplitude phase calculation unit 21 of this embodiment, the phase calculation unit 219 returns the calculated phase to the phase shift unit 212. This allows the amplitude and phase calculation unit 21 to adjust the phase delay of the phase of the clock signal output from the phase shift unit 212 with respect to the phase of the voltage measured by the power sensor 16 and enables the amplitude calculation result and the phase calculation result. Synchronize. The amplitude phase calculation unit 22 can also perform the same function. Thereby, the signal synchronization processing unit 20 can accurately calculate the amplitude and phase of the voltage and current measured by the power sensor 16. Then, the plasma processing apparatus 10 can precisely control the change of the impedance of the plasma in the chamber 17 so that the change of the input impedance of the matching circuit 15 becomes a desired trajectory. Thereby, the plasma can be stably controlled.

Furthermore, in this embodiment, since the control amounts of the parameters can be applied at the same time, the time required for the impedance matching process can be shortened. In addition, since the control amount of each parameter can be applied at the same time, even if the number of parameters is too large, the time required for impedance matching processing is substantially unchanged.

The first embodiment has been described above. As explained in the above description, if the plasma processing apparatus 10 according to the present embodiment, the impedance matching process can be ended in a short time, and the stabilized plasma can be quickly ignited.
[Example 2]

In the first embodiment, the current impedance of the matching circuit 15 is estimated based on the voltage and current of the radio frequency power measured by the power sensor 16 connected to the node between the matching circuit 15 and the chamber 17. In comparison, in Embodiment 2, the power sensor 18 connected to the node between the RF power source 14 and the matching circuit 15 is also used to estimate the current impedance of the matching circuit 15. Thereby, the current impedance of the matching circuit 15 can be more accurately estimated, and the impedance matching process can be performed more quickly.

[Plasma processing device 10]
FIG. 10 is a block diagram showing an example of a plasma processing apparatus 10 according to the second embodiment. The plasma processing apparatus 10 includes, for example, as shown in FIG. 10: a signal synchronization processing unit 20-1; a signal synchronization processing unit 20-2; a control amount calculation unit 12; a control signal generation unit 13; a radio frequency power source 14; a matching circuit 15; The sensor 16; the chamber 17; and the power sensor 18. In this embodiment, the signal synchronization processing unit 20-1, the signal synchronization processing unit 20-2, the control amount calculation unit 12, and the control signal generation unit 13 are mounted on a single substrate 11. In addition, in the following, when the general term is used without distinguishing between the signal synchronization processing units 20-1 and 20-2, only the signal synchronization processing unit 20 will be described. In addition, in each block of the plasma processing apparatus 10 shown in FIG. 10, the blocks with the same symbols as those shown in FIG. 1 have the same functions as the blocks described in FIG. 1, except for the parts described below. Therefore, repeated description is omitted.

The power sensor 16 outputs the measurement results of the voltage and current to the signal synchronization processing unit 20-1. The power sensor 18 is connected to a node between the radio frequency power source 14 and the matching circuit 15 in a radio frequency power transmission path between the radio frequency power source 14 and the matching circuit 15. The power sensor 18 measures the voltage and current of the radio frequency power output from the radio frequency power source 14, and outputs the measurement results of the voltage and current to the signal synchronization processing unit 20-2. The power sensor 18 is an example of a second measurement unit.

The signal synchronization processing unit 20-1 calculates the plasma generated in the chamber 17 based on the measurement results of the voltage and current of the RF power output from the power sensor 16 and the control signal output from the control signal generation unit 13. Impedance of the chamber 17. Then, the signal synchronization processing unit 20-1 outputs the calculated impedance of the chamber 17 to the control amount calculation unit 12.

The signal synchronization processing unit 20-2 calculates the combined impedance of the matching circuit 15 and the chamber 17 based on the measurement results of the voltage and current of the RF power output from the power sensor 18 and the control signal output from the control signal generation unit 13. . Then, the signal synchronization processing unit 20-2 outputs the calculated combined impedance to the control amount calculation unit 12. The internal configuration of each of the signal synchronization processing units 20-1 and 20-2 is the same as the configuration of the signal synchronization processing unit 20 of the first embodiment described with reference to FIG. 2, and therefore detailed descriptions are omitted.

The control amount calculation unit 12 calculates the current input impedance of the matching circuit 15 based on the impedance of the chamber 17 calculated by the signal synchronization processing unit 20-1 and the combined impedance calculated by the signal synchronization processing unit 20-2.

FIG. 11 is a diagram showing an example of an equivalent circuit of the plasma processing apparatus 10 according to the second embodiment. For example, as shown in FIG. 11, the signal synchronization processing unit 20-1 can calculate the impedance Z2 of the chamber 17 based on the voltage and current measured by the power sensor 16. The signal synchronization processing unit 20-2 can calculate the combined impedance of the impedance Z1 of the matching circuit 15 and the impedance Z2 of the chamber 17 based on the voltage and current measured by the power sensor 18. Then, the control amount calculation unit 12 can calculate the impedance Z1 of the matching circuit 15 by subtracting the impedance Z2 of the chamber 17 from the combined impedance of the impedance Z1 of the matching circuit 15 and the impedance Z2 of the chamber 17.

Among them, the signal synchronization processing unit 20-1 calculates the impedance Z2 of the chamber 17 based on the voltage and current measured by the power sensor 16, and the signal synchronization processing unit 20-2 is based on the voltage and current measured by the power sensor 18. The current is used to calculate the combined impedance of the matching circuit 15 and the chamber 17. Therefore, the impedance Z2 and the combined impedance can be calculated more accurately than when the impedance is estimated using a circuit model or the like. In particular, in this embodiment, since the signal synchronization processing units 20-1 and 20-2 having the internal structure described using FIG. 2 are used, the impedance Z2 and the combined impedance can be calculated very accurately.

In this embodiment, since the impedance Z2 and the combined impedance can be calculated very accurately, the impedance Z1 of the matching circuit 15 can be calculated very accurately by subtracting the impedance Z2 of the chamber 17 from the combined impedance.

[Hardware]
The signal synchronization processing unit 20, the control amount calculation unit 12, and the control signal generation unit 13 of the first embodiment described above are configured on a single substrate 11 and are executed by a computer 30 shown in FIG. 12, for example. FIG. 12 is a diagram showing an example of hardware of a computer 30 that executes the functions of the signal synchronization processing section 20, the control amount calculation section 12, and the control signal generation section 13.

The computer 30 has, for example, a memory 31, a processor 32, and an input / output interface 33 as shown in FIG. The input / output interface 33 transmits and receives signals between the RF power source 14, the matching circuit 15, the power sensor 16, and the power sensor 18. The memory 31 stores, for example, various programs or data for executing the functions of the signal synchronization processing unit 20, the control amount calculation unit 12, and the control signal generation unit 13. The processor 32 reads a program from the memory 31 and then executes the read program, thereby executing, for example, each function of the signal synchronization processing section 20, the control amount calculation section 12, and the control signal generation section 13.

Moreover, the programs, data, etc. in the memory 31 need not be stored in the memory 31 in the first place. For example, a program or data may be stored in a removable recording medium such as a memory card inserted in the computer 30, and the computer 30 may obtain the program or data from this type of removable recording medium and execute the program or data as appropriate. In addition, the computer 30 may appropriately obtain a program from a computer or server device, such as a stored program or data, via a wireless communication line, a public line, a network, a LAN, or a WAN, and execute the program.

[other]
The present invention is not limited to the embodiments described above, and various modifications can be made within the scope of the gist.

For example, in the first embodiment described above, the case where the radio frequency power generated by one radio frequency power source 14 is supplied to the chamber 17 is taken as an example for description, but the disclosed technology is not limited to this, and a plurality of radio frequency power sources may be used. 14 generates radio frequency power of different frequencies to the chamber 17. At this time, in the plasma processing apparatus 10, for each radio frequency power source 14 that generates radio frequency power of different frequencies, a signal synchronization processing section 20, a control amount calculation section 12, a control signal generation section 13, a matching circuit 15, and Power sensor 16.

The same is true in the second embodiment, in the case where radio frequency power of different frequencies generated by a plurality of radio frequency power sources 14 is supplied to the chamber 17, in the plasma processing device 10, for each radio frequency power source 14 that generates radio frequency power of different frequencies, respectively, A signal synchronization processing unit 20-1, a signal synchronization processing unit 20-2, a control amount calculation unit 12, a control signal generation unit 13, a matching circuit 15, a power sensor 16, and a power sensor 18 are provided.

Moreover, in each of the above-mentioned embodiments, in order to facilitate understanding of the signal synchronization processing unit 20 of the embodiment, each processing block included in the signal synchronization processing unit 20 is differentiated according to the functional category in accordance with the main processing content. Therefore, the disclosed technology is not limited by the method of distinguishing the processing block or the name of the method of distinguishing. In addition, each processing block provided by the signal synchronization processing unit 20 of each of the above embodiments may be subdivided into more processing blocks in accordance with the processing content, or a plurality of processing blocks may be integrated into one processing block. In addition, the processing executed by each processing block may be implemented by software processing, or may be implemented by dedicated hardware such as an ASIC (Application Specific Integrated Circuit).

10‧‧‧ Plasma treatment device

11‧‧‧ substrate

12‧‧‧Control amount calculation section

13‧‧‧Control signal generation unit

14‧‧‧RF Power

140‧‧‧ Oscillator

141‧‧‧amplifier

15‧‧‧ matching circuit

16‧‧‧ Power Sensor

17‧‧‧ chamber

18‧‧‧ Power Sensor

20‧‧‧Signal synchronization

21‧‧‧Amplitude and phase calculation unit

210‧‧‧ amplifier

211‧‧‧ADC

212‧‧‧Displacement

213‧‧‧ Phaser

214‧‧‧Multiplier

215‧‧‧Multiplier

216‧‧‧LPF

217‧‧‧LPF

218‧‧‧Amplitude calculation section

219‧‧‧phase calculation unit

22‧‧‧ Amplitude and Phase Calculation Unit

220‧‧‧amplifier

221‧‧‧ADC

222‧‧‧Displacement

223‧‧‧ Phase Shifter

224‧‧‧Multiplier

225‧‧‧Multiplier

226‧‧‧LPF

227‧‧‧LPF

228‧‧‧Amplitude calculation section

229‧‧‧phase calculation unit

23‧‧‧PLL

24‧‧‧ Phase difference calculation section

25‧‧‧Impedance calculation unit

[Fig. 1] Fig. 1 is a block diagram showing an example of a plasma processing apparatus of Example 1. [Fig.

[Fig. 2] Fig. 2 is a block diagram showing an example of a signal synchronization processing section.

3 is a diagram showing an example of an equivalent circuit of the plasma processing apparatus of the first embodiment.

FIG. 4 is a diagram showing an example of an equivalent circuit of a plasma processing apparatus of Comparative Example 1. FIG.

FIG. 5 is a flowchart showing an example of impedance matching processing.

FIG. 6 is a diagram showing an example of a matching process of Comparative Example 2. FIG.

FIG. 7 is a diagram showing an example of changes in input impedance of a matching circuit of Comparative Example 2. FIG.

FIG. 8 is a diagram showing an example of a matching process in the first embodiment.

[Fig. 9] Fig. 9 is a diagram showing an example of changes in input impedance of a matching circuit.

[Fig. 10] Fig. 10 is a block diagram showing an example of a plasma processing apparatus according to a second embodiment.

[Fig. 11] Fig. 11 is a diagram showing an example of an equivalent circuit of a plasma processing apparatus according to a second embodiment.

[Fig. 12] Fig. 12 is a diagram showing an example of hardware of a computer that realizes the functions of a signal synchronization processing unit, a control amount calculation unit, and a control signal generation unit.

Claims (7)

A plasma processing device includes: The chamber has a space inside, and processes the object to be moved into the space by the plasma generated in the space; A power supply unit that supplies radio frequency power for generating plasma in the chamber; A matching circuit that matches the impedance between the plasma in the cavity and the power supply unit; A first calculation unit that calculates the impedance of the plasma in the chamber; and A control circuit for controlling the frequency of the radio frequency power supplied to the chamber, the magnitude of the radio frequency power, and the impedance of the matching circuit based on the impedance calculated by the first calculation unit, The first calculation unit and the control circuit are provided on a single substrate. If the plasma processing device of claim 1 further includes: A first measurement unit connected to a node between the matching circuit and the chamber, and measuring a voltage and a current of the radio frequency power supplied to the chamber, The first calculation unit calculates the impedance of the plasma in the chamber based on the voltage and current of the radio frequency power measured by the first measurement unit. A plasma processing apparatus as claimed in claim 1 or 2, wherein The first calculation unit includes: The first ADC (Analog to Digital Converter) converts the voltage of the RF power supplied into the cavity into a digital signal; A second ADC that converts a current of radio frequency power supplied into the chamber into a digital signal; A second calculation unit that calculates a phase and an amplitude of each of the voltage and the current converted into a digital signal; The third calculation unit calculates the impedance of the plasma in the chamber based on the phase difference and amplitude ratio of the voltage and the current converted into a digital signal. The plasma processing apparatus of claim 3, wherein The first calculation unit includes: A signal generator that generates sampling clocks for each of the first ADC and the second ADC; A first phase adjustment unit that adjusts a phase of the sampling clock input to the first ADC based on a phase of the voltage with respect to the sampling clock; and The second phase adjustment unit adjusts the phase of the sampling clock input to the second ADC based on the phase of the current with respect to the sampling clock. A plasma processing device as claimed in item 3 or 4, wherein The first calculation unit includes: A first amplifier that amplifies the voltage of the radio frequency power supplied to the chamber, and then inputs the voltage to the first ADC; A second amplifier that amplifies the current of the radio frequency power supplied into the chamber, and then inputs the current to the second ADC; A first gain adjustment unit that adjusts the gain of the first amplifier based on the amplitude of the voltage calculated by the second calculation unit; and The second gain adjustment unit adjusts the gain of the second amplifier based on the amplitude of the current calculated by the second calculation unit. If the plasma processing device of any one of claims 1 to 5, further includes: A second measurement unit connected to a node between the power supply unit and the matching circuit, and measuring a voltage and a current of radio frequency power output from the power supply unit toward the matching circuit, The first calculation unit calculates the impedance of the plasma in the chamber using the voltage and current of the radio frequency power measured by the second measurement unit. A measuring circuit is used in a plasma processing device for measuring the impedance of the plasma in the cavity. The plasma processing device has: A chamber having a space inside and processing a body to be moved into the space by a plasma generated in the space; A power supply unit that supplies radio frequency power for generating plasma in the chamber; A matching circuit provided between the chamber and the power supply section; and A control circuit that controls the frequency of the RF power supplied to the chamber by the power supply unit, the magnitude of the RF power, and the impedance of the matching circuit, This measurement circuit is provided on one substrate together with the aforementioned control circuit, and has: A first ADC that converts a voltage of radio frequency power supplied into the cavity into a digital signal; A second ADC that converts a current of radio frequency power supplied into the chamber into a digital signal; An amplitude and phase calculation unit that calculates the amplitude and phase of each of the voltage and the current that have been converted into digital signals; and The impedance calculation unit calculates the impedance of the plasma in the chamber based on the phase difference and amplitude ratio of the voltage and the current that have been converted into digital signals.