TW201914012A - Schottky barrier diodes and manufacturing methods thereof - Google Patents

Abstract

A schottky barrier diode includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a buffer structure, a first via, a schottky electrode, and an ohmic electrode. The first and second semiconductor layers are formed on a substrate. The buffer structure is between the substrate and the first semiconductor layer. The third semiconductor layer is between the first semiconductor layer and the buffer structure. The first via goes through at least the first and the second semiconductor layers. The schottky electrode and the ohmic electrode are separately formed on the second semiconductor layer, while part of the ohmic electrode is formed inside the first via. The ohmic electrode is electrically connected to the second semiconductor layer, and to, through the first via, the third semiconductor layer.

Description

Schottky diode and related manufacturing methods

The present specification relates to an element structure and a manufacturing method of a Schottky diode, and more particularly to an element structure of a Schottky diode made of a Gallium Nitride (GaN) semiconductor material.

A Schottky diode is a semiconductor element formed by contacting a semiconductor layer with a base metal. The junction between the metal and the semiconductor layer has a rectifying function and is called a Schottky junction. Moreover, this junction provides a low energy barrier to the free carrier of the Schottky diode compared to the PN junction. Therefore, compared to a PN junction diode, the forward voltage of the Schottky diode, that is, the voltage required to turn on the diode, is relatively low. In addition, the switching speed of the Schottky diode is faster than that of the PN junction diode. Therefore, Schottky diodes are often used in applications that are very concerned about switching losses. For example, it is like a switching mode power supply.

Many electronic components have been fabricated using III-V semiconductors. Such an electronic component is generally composed of a nitride semiconductor of a Group III element, and is therefore also referred to as a III-Nitride semiconductor device. Group III nitride semiconductor devices tend to enjoy large energy band-gap and relatively high breakdown voltage characteristics, and are therefore particularly suitable for high voltage and high temperature operation. At present, Schottky diodes made of III-V gallium nitride semiconductor materials have low on-resistance and high breakdown voltage. When used in a switching power supply, it can improve its energy conversion efficiency.

1 is a cross-sectional view of a conventional Schottky diode 10 based on a III-V gallium nitride semiconductor material, and gallium nitride is abbreviated as GaN. In FIG. 1, a plurality of GaN semiconductor layers are sequentially stacked on a substrate 12, including a buffer structure 14, a channel layer 16, and a barrier layer 18. A Schottky junction having a rectifying effect is formed between the Schottky electrode 20 and the barrier layer 18, and an ohmic junction having no rectifying effect is formed between the ohmic electrode 22 and the barrier layer 18. Because of the difference in materials, the channel layer 16 and the barrier layer 18 respectively have different energy band-gaps, thereby forming a heterojunction between the two and causing two-dimensional electron gas ( Generation of 2-dimensional electron gas, 2DEG)17. The current path Pth1 when the Schottky diode 10 is turned on is also shown in FIG. As shown by the current path Pth1, when the Schottky diode 10 is turned on, current can flow from the Schottky electrode 20, through the barrier layer 18 below the Schottky electrode 20, and then along the two-dimensional electron gas 17 Below the ohmic electrode 22, then over the barrier layer 18, and to the ohmic electrode 22.

However, the conventional Schottky diode 10 has only a single current path Pth1, so when operating at a high current, the single current path Pth1 may cause current crowding, which makes the Schottky diode Part of the body 10 generates unnecessary heat locally, wasting electrical energy. In addition, the conventional Schottky diode 10 also has a crystal electrode trapped on the surface of the barrier layer 18 to generate a virtual electrode or a crystal defect in the channel layer 16 due to defects in the surface of the barrier layer 18. Capturing part of the two-dimensional electron gas causes the current value of the Schottky diode 10 to drop drastically after the operation period, causing its on-resistance to rise. This phenomenon is called current collapse.

Embodiments of the present invention provide a Schottky diode including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a buffer structure, a first via, a Schottky electrode, and an ohmic electrode . The first semiconductor layer and the second semiconductor layer are formed on a substrate. The buffer structure is formed between the substrate and the first semiconductor layer. The third semiconductor layer forms between the first semiconductor layer and the buffer structure. The second through hole penetrates at least the second semiconductor layer and the first semiconductor layer. The Schottky electrode and the ohmic electrode are formed separately on the second semiconductor layer. The ohmic electrode is also formed in the second through hole. The ohmic electrode is electrically connected to the second semiconductor layer and is electrically connected to the third semiconductor layer through the second through hole.

The embodiment of the invention further provides a method for manufacturing a Schottky diode, comprising the steps of sequentially forming a buffer structure, a third semiconductor layer, a first semiconductor layer and a second semiconductor layer on a substrate. Patterning the first semiconductor layer and the second semiconductor layer to form a second via, the second via penetrates at least the first semiconductor layer and the second semiconductor layer; forming a Schottky electrode And forming an ohmic electrode on the second semiconductor layer and in the second via. The ohmic electrode is electrically connected to the second semiconductor layer and is electrically connected to the third semiconductor layer through the second through hole.

In the present specification, there are some identical symbols, which indicate elements having the same or similar structures, functions, and principles, and those having general knowledge in the industry can be inferred from the teachings of the present specification. For the sake of simplicity of the description, elements of the same symbols will not be repeated.

An embodiment of the present invention provides a Schottky diode having at least two current paths between its Schottky electrode and its ohmic electrode during conduction, which can effectively reduce current 壅Squeeze, avoid the phenomenon of energy consumption or failure caused by current collapse.

2 is a Schottky diode 60 implemented in accordance with the present invention. In FIG. 2, a buffer structure 64, a conductive layer 66, a channel layer 68, and a barrier layer 70 are sequentially stacked on the substrate 62. Because of the difference in materials, the channel layer 68 and the barrier layer 70 respectively have different energy band gaps, forming a heterojunction between the two, and resulting in the generation of the two-dimensional electron gas 69.

2 also shows that portions of channel layer 68 and barrier layer 70 are removed to form perforations 78. The perforations 78 penetrate the channel layer 68 and the barrier layer 70. The side wall 79 of the perforation 78 is covered with an insulating layer 76. The perforations 78 in the cross-sectional view of Fig. 2, in an opposite top view, may have a circular pattern, may have a rectangular pattern, or have an arbitrary pattern.

The Schottky electrode 72 is formed on the barrier layer 70 separated from the ohmic electrode 74.

The Schottky electrode 72 may be a metal layer formed in a predetermined range on the barrier layer 70. A Schottky junction having a rectifying effect is formed between the Schottky electrode 72 and the barrier layer 70.

The ohmic electrode 74 can be another metal layer formed in the via 78 and on a portion of the barrier layer 70. In FIG. 2, the ohmic electrode 74 is uniformly conformed to the surface of the perforation 78 to form a metal layer that is not filled with the perforations 78. The metal layer may have a uniform thickness or a thicker or thinner metal layer formed on the barrier layer 70 than formed in the via 78. In another embodiment, the ohmic electrode 74 completely fills the perforations 78. An ohmic junction having no rectifying effect is formed between the ohmic electrode 74 and the barrier layer 70. At the bottom 77 of the perforation 78, another ohmic junction having no rectifying effect is formed between the ohmic electrode 74 and the conductive layer 66. Therefore, the ohmic electrode 74 is electrically connected to the barrier layer 70 and electrically connected to the conductive layer 66 through the through holes 78.

The Schottky diode 60 of Figure 2 shows at least two current paths Pth2 and Pth3 when the Schottky diode 60 is turned on. As shown in FIG. 2, the current path Pth2 starts from the Schottky electrode 72, passes through the barrier layer 70, the two-dimensional electron gas 69, the barrier layer 70, and reaches the ohmic electrode 74. The current path Pth3 begins at the Schottky electrode 72 and sequentially passes through the barrier layer 70, the channel layer 68, the conductive layer 66, and reaches the ohmic electrode 74 at the bottom 77 of the via 78. When the Schottky diode 60 is operated at a high current, the current can be dispersed to the current paths Pth2 and Pth3, reducing the chance of current collapse, current collapse, etc., and also reducing the interior of the Schottky diode 60. Effective resistance.

The insulating layer 76 is formed between the sidewall 79 of the via 78 and the ohmic electrode 74 for preventing the ohmic electrode 74 from directly contacting the barrier layer 70 or the channel layer 68 through the sidewall 79, thereby causing the current path Pth2 of the two-dimensional electron gas 69 to be short-circuited. The ohmic electrode 74 is not directly in contact with the side wall 79 of the through hole 78, but the present invention is not limited thereto. Other alternative embodiments for achieving this object are also within the scope of the present invention, for example, the insulating layer 76 may be replaced by a hole. That is, there is a spacing between the ohmic electrode 74 and the sidewall of the via 78 to achieve the purpose that the ohmic electrode 74 does not directly contact the sidewall 79 of the via 78.

FIG. 3 shows a method 80 of making a Schottky diode 60. 4A through 4D are cross-sectional views of the Schottky diode 60 at various stages of the fabrication method 80, respectively.

The step 82 in the fabrication method 80 is to sequentially form a buffer structure 64, a conductive layer 66, a channel layer 68, and a barrier layer 70 on the substrate 62, as shown in FIG. 4A.

The substrate 62 may be made of tantalum, sapphire (Al 2 O 3 ) or tantalum carbide (SiC). In an embodiment, the substrate 62 is a crucible substrate. Compared with the sapphire substrate or the tantalum carbide substrate, the germanium substrate has the advantages of high heat conduction and good heat dissipation, and is suitable for high-power components. Moreover, when the substrate 62 is a germanium substrate, the Schottky diode 60 can be integrated with the semiconductor device, such as an N-type, P-type or complementary MOS device, on the same substrate, for example, The germanium semiconductor element on which the ion cloth value or the epitaxial process is formed on the substrate is integrated on the substrate 62.

The GaN-based GaN-based semiconductor material and the material used as the substrate 62 tend to have different lattice constants and thermal expansion coefficients. Therefore, a buffer structure 64 can be provided to reduce the strain caused by the coefficient of thermal expansion and also to reduce the lattice defects that may occur due to lattice constant mismatch. The buffer structure 64 can be a simple single layer of a single substance or a composite layer composed of a plurality of layers. For example, the buffer structure 64 may be formed by alternately stacking Al _x Ga _1-x N layers and GaN layers. In a preferred embodiment, the layer of buffer structure 64 adjacent to substrate 62 may be selected from materials having a lattice constant similar to the lattice constant of substrate 62, and the layer of buffer structure 64 adjacent to conductive layer 66 may be selected from a lattice constant. A material similar to the lattice constant of the conductive layer 66. The buffer structure 64 includes one or more nucleation layers near the substrate 62 side, and the lattice constant of the nucleation layer material is close to the lattice constant of the substrate 62. For example, the nucleation layer may be composed of aluminum nitride (AlN) and has a thickness of between 50 nm and 500 nm. In a preferred embodiment, the nucleation layer can be a composite layer such as a low temperature process AlN (thickness about 40 nm) and a high temperature process AlN (thickness about 150 nm).

In the embodiment, the buffer structure 64 is composed of a plurality of Al _x Ga _1-x N layers, and the composition of x is between 1 and 0, and the total thickness thereof is between 0.5 μm and 5.5 μm. It is 1 μm. In the embodiment, the x composition of the Al _x Ga _1-x N layer of the buffer structure 64 is gradually changed from the substrate 62 to the conductive layer 66, for example, from the substrate 62 up to the conductive layer 66 by Al _0.7. The Ga _0.3 N layer, the Al _0.4 Ga _0.7 N layer, and the Al _0.1 Ga _0.9 N layer are three layers to form a buffer structure 64. The buffer structure 64 can have carbon doping with a carbon doping concentration greater than 1E+18 cm ^-3 . The carbon doping can make the buffer structure 64 have a high impedance, prevent the charge in the conductive layer 66 from passing through the buffer structure 64 and cause a punch through leakage phenomenon, thereby enhancing the withstand voltage of the entire vertical direction of the element. In an embodiment, the upper and lower sides of the buffer structure 64 can withstand a voltage of 600V without collapse.

The conductive layer 66 may be an N-type GaN semiconductor layer. In the embodiment, the conductive layer 66 is a heavily doped N-type GaN semiconductor layer having a doping concentration of not less than 5E+16 cm ^-3 and a thickness of 500 nm. . Conductive layer 66 primarily provides a lateral current path.

Channel layer 68 and barrier layer 70 are formed on conductive layer 66. In one embodiment, the channel layer 68 is an N-type lightly doped GaN semiconductor layer having a doping concentration of 5E+17 cm ^-3 and a thickness between 500 nm and 1500 nm. In the ㄧ embodiment, GaN The semiconductor layer may be 1000 nm; the barrier layer 70 is composed of a semiconductor layer of undoped Al _z Ga _1-z N wherein 0.4 ≧ z > 0.1, and in the ㄧ embodiment, z may be 0.21. The thickness of the barrier layer 70 is between 15 nm and 30 nm. In the embodiment, the barrier layer 70 may have a thickness of 26 nm. In one embodiment, the barrier layer 70 further includes a cap layer made of undoped GaN, which is located on the outermost surface of the barrier layer 70 and may have a thickness of 2 nm. In the heterojunction between the barrier layer 70 and the channel layer 68, the sum of the polarization directions of the epitaxial layer structure causes the band to be twisted to form a quantum well below the Fermi level. A two-dimensional electron gas 69 is thus produced.

Step 84 is to pattern the barrier layer 70 and the channel layer 68, i.e., remove the barrier layer 70 and the channel layer 68 in the selected region to form the vias 78, as shown in Figure 4B. From another perspective, the perforations 78 penetrate the barrier layer 70 and the channel layer 68. In FIG. 4B, sidewalls 79 of vias 78 expose barrier layer 70 and via layer 68, while bottom 77 of vias 78 expose conductive layer 66.

Step 86 is to form an insulating layer 76 on the sidewall 79 of the via 78 for preventing the ohmic electrode 74 from passing through the sidewall 79, forming a contact with the barrier layer 70 or the channel layer 68, such as leakage current contact, low resistance contact, such as : Ohmic contact, as shown in Figure 4C. The material of the insulating layer 76 may be cerium oxide, AlN, tantalum pentoxide (Ta ₂ O ₅ ), titanium dioxide (TiO ₂ ), hafnium oxide (HfO ₂ ), zirconium dioxide (ZrO ₂ ), and aluminum oxide. (Al ₂ O ₃ ), lanthanum oxide (La ₂ O ₃ ), antimony trioxide (Pr ₂ O ₃ ) or other high-k insulating material. For example, a uniform thickness of insulating layer can be formed in the barrier layer 70 and the via 78, and then the etch back is such that the insulating layer remains only on the sidewall 79 of the via 78.

Step 88 is to form the ohmic electrode 74 in a predetermined position on the barrier layer 70 and the via 78, as shown in FIG. 4D. The ohmic electrode 74 forms an ohmic contact with the barrier layer 70 and also forms an ohmic contact with the conductive layer 66 exposed by the bottom 77 of the via 78. The material of the ohmic electrode 74 may be an alloy of titanium (Titanium, Ti), aluminum (Aluminum, Al), nickel (nickel, Ni), gold (gold), or a plurality of metal layers.

Step 90 is to form a Schottky electrode 72 at a predetermined position on the barrier layer 70, and the Schottky electrode 72 forms a Schottky contact with the barrier layer 70, as shown in FIG. The material of the Schottky electrode 72 may be a refractory metal or a compound thereof, such as tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), tungsten. (tungsten, W), or tungsten silicide (WSi ₂ ), nickel (nickel, Ni), gold (gold), platinum (platinum, Pt), alloys of several metals, or several metals The layers are stacked. In an embodiment, the material of the Schottky electrode and the material of the ohmic electrode may be the same material, such as titanium nitride. For example, titanium nitride may be formed on the predetermined position of the barrier layer 70 and in the via 78, and an ohmic contact is formed with the semiconductor layer through an annealing process to form titanium nitride at a predetermined position of the barrier layer 70. And forming a Schottky contact with the semiconductor layer.

In the fabrication method 80 of FIG. 3, the ohmic electrode 74 is formed first (step 88), and then the Schottky electrode 72 is formed (step 90), but the invention is not limited thereto. In another embodiment, steps 88 and 90 in fabrication method 80 may be mutually exclusive, that is, the formation of Schottky electrode 72 is earlier than the formation of ohmic electrode 74. 4E shows a cross-sectional view of the Schottky diode 60 when the Schottky electrode 72 has been formed and the ohmic electrode 74 has not been formed.

Figure 5 is a Schottky diode 30 implemented in accordance with the present invention. The Schottky diodes 30 of FIG. 5 and the Schottky diodes 60 of FIG. 2 are identical or similar to each other and can be understood from the previous description and will not be repeated.

In contrast to the Schottky diode 60 of FIG. 2, the Schottky diode 30 of FIG. 5 has an additional number of perforations 32 that penetrate the channel layer 68 and the barrier layer 70. Similar to the perforations 78, in an opposite top view, the perforations 32 may have a circular pattern, may have a rectangular pattern, or have an arbitrary pattern.

The side wall 33 of the perforation 32 is covered with an insulating layer 34. The material of the insulating layer 34 may be the same as that of the insulating layer 76. For example, the insulating layer 34 and the insulating layer 76 are produced in exactly the same process.

The Schottky electrode 36 can be a metal layer formed in the via 32 and on a portion of the barrier layer 70. In FIG. 5, the Schottky electrode 36 completely fills the perforations 32. In another embodiment, the Schottky electrode 36 conformally forms a metal layer on the surface of the perforation 32 without filling the perforations 32. The metal layer may have a uniform thickness or a thick or thin metal layer formed on the barrier layer 70 than formed in the through hole 32. A Schottky junction having a rectifying effect is formed between the Schottky electrode 36 and the barrier layer 70. At the bottom 31 of the perforation 32, another Schottky junction having a rectifying effect is formed between the Schottky electrode 36 and the conductive layer 66. The material of the Schottky electrode 36 can be the same as that of the Schottky electrode 72.

The Schottky diode 30 of Fig. 5 shows that there are at least two current paths Pth4 and Pth5 when the Schottky diode 30 is turned on. As shown in FIG. 5, the current path Pth4 starts from the Schottky electrode 36, passes through the barrier layer 70, the two-dimensional electron gas 69, the barrier layer 70, and reaches the ohmic electrode 74. The current path Pth5 begins at the Schottky electrode 72, passes through the bottom 31 of the perforation 32, passes laterally through the conductive layer 66, and reaches the ohmic electrode 74 in the via 78. When the Schottky diode 30 is in high current operation, the current can be dispersed to the current paths Pth4 and Pth5, reducing the chance of energy dissipation or failure caused by current collapse, avoiding current collapse, etc., reducing the Schottky diode The internal equivalent resistance of body 30.

The insulating layer 34 is formed between the sidewall 33 of the through hole 32 and the Schottky electrode 36 for preventing the Schottky electrode 36 from directly contacting the barrier layer 70 or the channel layer 68 through the sidewall 33, thereby causing a current of the two-dimensional electron gas 69. The path Pth4 is shorted. Based on the purpose that the Schottky electrode 36 is not in direct contact with the side wall 33 of the perforation 32, the invention is not limited thereto, and other alternative embodiments for achieving this object are also within the scope of the invention, for example, the insulating layer 34 may also be replaced by a hole. That is, there is a spacing between the Schottky electrode 36 and the sidewalls of the perforations 32 to achieve the purpose that the Schottky electrode 36 does not directly contact the sidewalls 33 of the perforations 32.

FIG. 6 shows a method 40 of making a Schottky diode 30. 7A through 7D are cross-sectional views of the Schottky diode 30 at various stages of the fabrication method 40, respectively. The manufacturing method 40 of FIG. 6 and the manufacturing method 80 of FIG. 3 are the same or similar to each other, and can be understood from the previous description, and will not be repeated. 7A is a cross-sectional view after completion of step 82; FIG. 7B corresponds to a cross-sectional view after completion of step 42; FIG. 7C corresponds to a cross-sectional view after completion of step 86; and FIG. 7D corresponds to a cross-sectional view after completion of step 88.

Figure 6 replaces steps 84 and 90 of Figure 3 with steps 42 and 44, respectively. Step 42 is to remove the barrier layer 70 and the channel layer 68 in the selected region to simultaneously form the vias 78 and 32, as shown in Figure 7B. Referring to FIG. 7C, step 86 is to form insulating layers 76 and 34 on sidewalls 79 and 33 of vias 78 and 32 for preventing ohmic electrode 74 from penetrating through sidewall 79 to form contact with barrier layer 70 or channel layer 68, such as Leakage current contact, low resistance contact, such as ohmic contact; and prevention of the Schottky electrode 36 from passing through the sidewall 33, forming a contact with the barrier layer 70 or the channel layer 68, such as a Schottky contact. The material and formation of the insulating layer 34 are the same as those of the insulating layer 76 and will not be repeated. Next, in steps 88 and 44, a predetermined position of the ohmic electrode 74 and the Schottky electrode 36 on the barrier layer 70 and the conductive layers of the barrier layer 70 and the bottom 77 of the via 70 are formed in the vias 78 and 32, respectively. 66 forms an ohmic contact, and the Schottky electrode 36 forms a Schottky contact with the barrier layer 70 and the conductive layer 66 of the bottom 31 of the via 32, as shown in FIG.

In the fabrication method 40 of FIG. 6, the ohmic electrode 74 is formed first, and then the Schottky electrode 36 is formed, but the present invention is not limited thereto. In another embodiment, steps 88 and 44 in fabrication method 40 may be mutually offset, that is, the formation of Schottky electrode 36 is earlier than the formation of ohmic electrode 74. 7E shows a cross-sectional view of the Schottky diode 30 when the Schottky electrode 36 has been formed and the ohmic electrode 74 has not been formed.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10, 30, 60‧‧‧ Schottky diodes

12, 62‧‧‧ base

14, 64‧‧‧ buffer structure

16, 68‧‧‧ channel layer

17, 69‧‧‧Two-dimensional electronic gas

18, 70‧‧‧ barrier layer

20, 36, 72‧‧‧ Schottky electrodes

22, 74‧‧‧ Ohmic electrodes

31, 77‧‧‧ bottom

32, 78‧‧‧ perforation

33, 79‧‧‧ side wall

34, 76‧‧‧Insulation

40, 80‧‧‧How to make

42, 44, 82, 84, 86, 88, 90 ‧ ‧ steps

66‧‧‧Transmission layer

Pth1, Pth2, Pth3, Pth4, Pth5‧‧‧ current path

1 is a cross-sectional view of a conventional Schottky diode.

2 is a Schottky diode implemented in accordance with the present invention.

Figure 3 shows a method of making the Schottky diode of Figure 2.

4A to 4E are cross-sectional views of the Schottky diode of Fig. 2 at different stages of fabrication, respectively.

Figure 5 is another Schottky diode implemented in accordance with the present invention.

Figure 6 shows a method of making the Schottky diode of Figure 5.

7A to 7E are cross-sectional views of the Schottky diode of Fig. 5 at different stages of fabrication, respectively.

Claims (10)

A Schottky Barrier Diode includes: a first semiconductor layer and a second semiconductor layer formed on a substrate; a buffer structure formed between the substrate and the first semiconductor layer a third semiconductor layer forming the first semiconductor layer and the buffer structure; a first through hole penetrating at least the second semiconductor layer and the first semiconductor layer; and a Schottky electrode and an ohmic electrode Separatingly formed on the second semiconductor layer, the ohmic electrode is also formed in the first through hole; wherein the ohmic electrode is electrically connected to the second semiconductor layer and penetrates the first through hole, and is electrically Connected to the third semiconductor layer. The Schottky diode of claim 1, wherein the first through hole comprises a side wall covered with an insulating layer. The Schottky diode of claim 1, wherein a heterojunction is formed between the first semiconductor layer and a second semiconductor layer to cause a two-dimensional electron gas. The Schottky diode of claim 1, further comprising: a second through hole penetrating at least the second semiconductor layer and the first semiconductor layer, wherein the Schottky electrode is formed Among the second through holes, and forming a Schottky contact with the third semiconductor layer. The Schottky diode of claim 4, wherein the second through hole comprises a side wall covered with an insulating layer. A method for manufacturing a Schottky diode includes the steps of: sequentially forming a buffer structure, a third semiconductor layer, a first semiconductor layer, and a second semiconductor layer on a substrate; patterning the first a semiconductor layer and the second semiconductor layer to form a first via, the first via penetrates at least the first semiconductor layer and the second semiconductor layer; forming a Schottky electrode on the second semiconductor layer; And forming an ohmic electrode on the second semiconductor layer and the first through hole; wherein the ohmic electrode is electrically connected to the second semiconductor layer, and is electrically connected to the third through the first through hole Semiconductor layer. The manufacturing method of claim 6, wherein the first through hole comprises a sidewall, and before the forming the ohmic electrode, the manufacturing method comprises the steps of: forming an insulating layer covering the first through hole a sidewall; wherein the ohmic electrode cannot form an ohmic contact with the first semiconductor layer and the second semiconductor layer through the sidewall. The manufacturing method of claim 7, wherein the step of patterning the first semiconductor layer and the second semiconductor layer further comprises forming a second via, wherein the Schottky electrode is located in the second semiconductor On the layer and in the second perforation. The manufacturing method of claim 8, wherein the second through hole comprises a sidewall, and before the forming the Schottky electrode, the manufacturing method comprises the steps of: forming an insulating layer covering the second through hole The side wall. The manufacturing method of claim 6, wherein a heterojunction is formed between the first semiconductor layer and the second semiconductor layer to cause a two-dimensional electron gas.