TW201911588A - Solar cell and manufacturing method thereof - Google Patents

Abstract

An objective of the present invention is to provide a technique capable of increasing the open circuit voltage of the solar cell. A solar cell includes a semiconductor layer, a first impurity layer, a tunnel layer containing oxygen, a second impurity layer, and an electrode. The tunnel layer is disposed between the semiconductor layer and the first impurity layer, the second impurity layer is disposed between the semiconductor layer and the tunnel layer, and the electrode is connected to the first impurity layer. The tunnel layer and the first impurity layer contain the same impurity as the impurity of the second impurity layer, and the concentration of the impurity of the tunnel layer is higher than the concentration of each of the first impurity layer and the second impurity layer.

Description

 Solar cell and method of manufacturing same  

The invention relates to a solar cell and a method of manufacturing the same

In terms of a typical solar cell, there is a crystalline solar cell. A crystalline solar cell is a substrate using single crystal germanium or polycrystalline germanium, and in particular, a solar cell using a single crystal germanium substrate has high conversion efficiency. In the crystallization solar cell, a passivation technique is widely used for the improvement of the open circuit voltage (also referred to as "open circuit voltage"). Specifically, a very thin oxide film is formed on the surface of the substrate, and an antimony doped layer is disposed thereon. The thin oxide film functions as a tunnel oxide layer. A small number of carriers are repelled back to the substrate side by the electric field effect of the band barrier layer formed by the tunnel oxide layer and the doped layer. Thereby, since the recombination of a small number of carriers is suppressed, a higher open circuit voltage exceeding 700 mV can be obtained. On the other hand, since the transport of the majority carriers can be smoothly performed by the tunneling effect, the increase in the series resistance due to the tunneling oxide layer can be avoided. From the above description, a high open circuit voltage and a fill factor can be achieved by the passivation technique.

The technique disclosed in Non-Patent Document 1 sequentially forms a tunneling oxide layer and a phosphorus-doped germanium layer on the back surface of the n-type germanium substrate, and then heat-treats at a temperature of more than 600 ° C and less than 1000 ° C. Thereafter, the back electrode is directly formed on the entire surface of the phosphorus doped layer. As a formation of the electrode, a seed layer of Ti/Pd/Ag is thermally evaporated, and then silver plating is performed.

Patent Document 1 discloses a configuration in which a plurality of portions included in a conductive type region such as an emitter region sandwich a tunnel oxide layer. According to such a configuration, it is possible to minimize the recombination and improve the electrical connection with the electrodes.

 (previous technical literature)    (Patent Literature)  

Patent Document 1: Japanese Laid-Open Patent Publication No. 2014-204128

 (Non-patent literature)  

Non-Patent Document 1: F. Feldmann et al., "Passivated rear contacts for high-efficiency n-type Si Solar Cells providing high interface passivation quality and excellent transport characteristics", Solar Energy Materials & Solar Cells 120, (2014), p .270-274

However, the technique disclosed in Non-Patent Document 1 uses an evaporation method and a plating method to form an electrode for collecting a photocurrent on a doped layer which is tunnel-engaged together with a tunnel oxide layer. However, in such a technique, when there is a recombination level at the interface between the substrate and the tunneling oxide layer, there is a possibility that the open circuit voltage is lowered.

On the other hand, as shown in Patent Document 1, a plurality of portions included in the conductive type region sandwich the tunnel oxide layer, and a low concentration doping layer between the substrate and the tunnel oxide layer is used. Generate an electric field effect. By this electric field effect, the field number carrier is kept away from the level of the interface between the substrate and the tunneling oxide layer, so the open circuit voltage is improved. However, it is difficult to ensure the stabilization of the doping concentration and the in-plane uniformity in the doped layer of a low concentration. Moreover, when the doping concentration of the low-concentration doped layer is too high, the Auger recombination increases and the open circuit voltage decreases. Conversely, when the doping concentration of the low-concentration doped layer is too low, the electric field effect is weak, and the interface The recombination will increase and the open circuit voltage will decrease. Therefore, in the configuration in which the doping concentration of the low-concentration doping layer cannot be stabilized, there is a problem that the high open circuit voltage cannot be maintained.

The present invention has been made in view of the above conventional problems, and an object thereof is to provide a technique capable of increasing an open circuit voltage.

The solar cell of the present invention includes: a semiconductor layer; a first impurity layer; a tunneling layer disposed between the semiconductor layer and the first impurity layer and containing oxygen; and a second impurity layer disposed in the foregoing Between the semiconductor layer and the tunneling layer; and an electrode connected to the first impurity layer; the tunneling layer and the first impurity layer containing the same impurity as the impurity of the second impurity layer, the tunneling layer The concentration of the impurities is higher than the concentration of the impurities of each of the first impurity layer and the second impurity layer.

According to the invention, the tunneling layer and the first impurity layer contain the same impurities as the impurities of the second impurity layer, and the concentration of the impurities in the tunneling layer is greater than the concentration of the impurities in each of the first impurity layer and the second impurity layer. high. According to this configuration, since the concentration of the impurities of the second impurity layer can be made uniform, the open circuit voltage can be increased.

The object, features, aspects and advantages of the present invention will become more apparent from the aspects of the appended claims.

100‧‧‧Semiconductor layer

101‧‧‧ impurity diffusion source

102‧‧‧NSG film

103‧‧‧ impurity diffusion layer

104‧‧‧ Tunneling oxide layer

105‧‧‧Amorphous layer

108‧‧‧ dielectric layer

109‧‧‧Anti-reflection film

110‧‧‧Photometric surface electrode

110G‧‧‧ gate electrode

111‧‧‧Back electrode

111G‧‧‧ gate electrode

114‧‧‧ Tunneling oxide layer

115‧‧‧ Crystalline film layer

116‧‧‧Doped layer

117‧‧‧Protective film

110B‧‧‧ bus bar electrode

120‧‧‧ Single crystal germanium substrate

120A‧‧‧Glossy surface

120B‧‧‧Back

Fig. 1 is a plan view schematically showing a configuration of a solar cell of the first embodiment.

Fig. 2 is a cross-sectional view schematically showing the configuration of a solar cell of the first embodiment.

Fig. 3 is a flow chart showing a method of manufacturing the solar cell of the first embodiment.

Fig. 4 is a cross-sectional view showing a method of manufacturing the solar cell of the first embodiment.

Fig. 5 is a cross-sectional view showing a method of manufacturing the solar cell of the first embodiment.

Fig. 6 is a cross-sectional view showing a method of manufacturing the solar cell of the first embodiment.

Fig. 7 is a cross-sectional view showing a method of manufacturing the solar cell of the first embodiment.

Fig. 8 is a cross-sectional view showing a method of manufacturing the solar cell of the first embodiment.

Fig. 9 is a cross-sectional view showing a method of manufacturing the solar cell of the first embodiment.

Fig. 10 is a view showing the relationship between the sheet resistance of the doped layer of the solar cell and the open circuit voltage.

Fig. 11 is a view showing the sheet resistance of the doped layer of the solar cell.

Fig. 12 is a view showing an open circuit voltage of the solar cell of the first embodiment.

Fig. 13 is a cross-sectional view schematically showing the configuration of a solar cell of the second embodiment.

Fig. 14 is a flow chart showing a method of manufacturing the solar cell of the second embodiment.

Fig. 15 is a cross-sectional view showing a method of manufacturing a solar cell of the second embodiment.

Fig. 16 is a cross-sectional view showing a method of manufacturing a solar cell of the second embodiment.

Fig. 17 is a view showing an open circuit voltage of the solar cell of the second embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the drawings are schematically displayed, and the relationship between the size and the position of the image displayed by each of the different drawings is not necessarily correctly described, but may be appropriately changed. In the following description, the same components are denoted by the same reference numerals, and the names and functions of the components are the same. As a result, a detailed description of the constituent elements will be omitted. In addition, in the description, there are cases where a specific position and direction such as "upper", "lower", "side", "bottom", "table", or "back" are used. In order to facilitate the easy understanding of the contents of the embodiment, the user is not related to the position and direction at the time of actual use.

 <Embodiment 1>  

Hereinafter, a method of manufacturing a solar cell and a solar cell according to Embodiment 1 of the present invention will be described.

 <For the composition of solar cells>  

Fig. 1 is a plan view schematically showing a configuration of a solar cell of the first embodiment. Fig. 2 is a cross-sectional view taken along line A-A' in Fig. 1.

Before explaining the detailed manufacturing method of the solar cell according to the first embodiment of the present invention, an outline of the configuration and manufacturing method of the solar cell will be described. As shown in FIGS. 1 and 2, the solar cell of the first embodiment is a semiconductor substrate in which an n-type single crystal germanium substrate 120 having a light receiving surface 120A and a rear surface 120B is used as a crystal system.

As shown in Fig. 2, the solar cell of the first embodiment has various constituent elements formed on the single crystal germanium substrate 120. Specifically, the solar cell of FIG. 2 includes an n-type semiconductor layer 100, a p-type impurity diffusion layer 103, a dielectric layer 108, an anti-reflection film 109, a light-receiving surface electrode 110, and a back surface electrode 111 belonging to an electrode. a tunneling oxide layer 114 belonging to the tunneling layer containing oxygen and an n-type dopant (impurity), an n-type crystalline thin film layer 115 belonging to the first impurity layer, and an n-type belonging to the second impurity layer Doped layer 116.

The tunnel oxide layer 114 is provided between the semiconductor layer 100 and the crystalline thin film layer 115. The tunnel oxide layer 114 is formed from the tunnel oxide layer 104 (FIG. 6) formed on the back surface 120B of the single crystal germanium substrate 120 as will be described later. The crystalline thin film germanium layer 115 is formed from an n-type amorphous germanium layer 105 (Fig. 6) formed on the lower surface of the tunnel oxide layer 104 and containing an n-type dopant, as will be described later.

For example, the crystal-based thin film layer 115 is formed by activating the n-type dopant contained in the amorphous germanium layer 105 and performing heat treatment for crystallizing a part or the whole of the amorphous germanium layer 105. At this time, the n-type dopant contained in the amorphous germanium layer 105 is moved or diffused to the tunnel oxide layer 104 to form a tunnel oxide layer 114 containing an n-type dopant.

The doped layer 116 is disposed between the semiconductor layer 100 and the tunnel oxide layer 114. The tunneling oxide layer 114 contains the same dopant as the dopant of the doped layer 116, and the crystalline thin film germanium layer 115 contains the same dopant as the dopant of the doped layer 116. As a result, the dopant concentration of the crystalline thin film layer 115 is lower than the dopant concentration of the tunnel oxide layer 114, and the dopant concentration of the tunnel oxide layer 114 is more than that of the doped layer 116. The concentration of debris is also high. Furthermore, the dopant concentration of the doped layer 116 is lower than the dopant concentration of the crystalline thin film germanium layer 115.

After the formation of the tunnel oxide layer 114 or the like, the n-type dopant of the tunnel oxide layer 114 is moved and diffused to the single crystal germanium substrate 120 by heat treatment. Thereby, the doping layer 116 described above is formed at a boundary portion between the single crystal germanium substrate 120 and the tunnel oxide layer 114. Further, a portion other than the doped layer 116 among the single crystal germanium substrates 120 is substantially the semiconductor layer 100. In other words, by forming the tunneling oxide layer 114 adjacent to the single crystal germanium substrate 120, the dopant of the tunneling oxide layer 114 is thermally diffused to the single crystal germanium substrate 120, and the single crystal germanium substrate is formed. A portion of the portion 120 adjacent to the tunneling oxide layer 114 is formed with a doped layer 116, and a portion other than the portion is formed with the semiconductor layer 100.

The solar cell of the first embodiment configured as described above has a laminated structure of the tunneling oxide layer 114, the crystalline thin film layer 115, and the doping layer 116. According to such a configuration, the electric field effect of the energy barrier layer and the doping layer 116 formed by the tunnel oxide layer 114 can retain a minority carrier in the semiconductor layer 100, thereby suppressing the recombination of minority carriers. (Also known as "recombination"), the result is an increase in the open circuit voltage. In addition, the collection efficiency of most carriers can be improved.

Next, the constituent elements remaining in the solar cell of Fig. 2 will be described. The impurity diffusion layer 103, the dielectric layer 108, and the anti-reflection film 109 are disposed on the light-receiving surface 120A side of the single crystal germanium substrate 120, that is, on the upper side of the semiconductor layer 100. The light-receiving surface electrode 110 having the gate electrode 110G and the bus bar electrode 110B ( FIG. 1 ) is disposed on the impurity diffusion layer 103 so as to protrude from the anti-reflection film 109 through the through holes of the dielectric layer 108 and the anti-reflection film 109 . Upper surface. On the other hand, the back surface electrode 111 having the gate electrode 111G and the bus bar electrode (not shown) is disposed on the lower surface of the crystal thin film layer 115 so as to protrude from the crystal thin film layer 115.

When the tunneling oxide layer 114 does not contain a dopant, or the dopant concentration of the tunneling oxide layer 114 is lower than the dopant concentration of the doping layer 116, the dopant concentration of the doping layer 116 becomes uneven. . Therefore, there is a possibility that the open circuit voltage is lowered and the solar cell characteristics are lowered.

On the other hand, as described above, in the method of manufacturing a solar cell according to the first embodiment, the tunneling oxide layer 114 containing a dopant serves as a dopant supply source for forming the doping layer 116, and the tunneling oxide is formed. The dopant concentration of layer 114 is also higher than the dopant concentration of doped layer 116. Thereby, the dopant concentration of the doping layer 116 can be made uniform at a low concentration. As a result, as will be described in detail later, a high open circuit voltage can be obtained, and solar cell characteristics can be improved.

 <Manufacturing method>  

Hereinafter, a method of manufacturing the solar cell of the first embodiment will be described in detail with reference to FIGS. 3 to 9. Fig. 3 is a flow chart showing a method of manufacturing the solar cell of the first embodiment. In addition, FIG. 4 to FIG. 9 are cross-sectional views illustrating a method of manufacturing the solar cell of the first embodiment.

 <Step S1>  

First, the single crystal germanium substrate 120 is prepared as illustrated in Fig. 4 . The single crystal germanium substrate 120 is produced by cutting and slicing a silicon ingot using a mechanical cutting method by a wire saw or the like. The surface of the single crystal germanium substrate 120 thus manufactured may be contaminated or left with a flaw.

By the wet etching treatment using an alkaline solution such as a sodium hydroxide solution and an additive, contamination of the surface of the single crystal germanium substrate 120 or the like is removed, and a minute unevenness (not shown) called a texture structure is used. A structure is formed on the surface.

The light incident on the single crystal germanium substrate 120 is multi-reflected on the surface by the minute uneven structure on the surface of the single crystal germanium substrate 120. Therefore, the reflection loss of light can be reduced. Further, as a result of an increase in the absorption light due to an increase in the length of the optical path, an increase in the short-circuit current can be expected.

After the texture structure is formed, for example, RCA cleaning, SPM (Sulfuric Acid Hydrogen Peroxide Mixture, Sulphuric Acid) is used for a cleaning method in which a thick chemical solution obtained by adding a base or a solution of hydrogen peroxide to a base or an acid is used at a high temperature. The hydrogen peroxide mixture is washed or washed with HPM (Hydrochloric Acid Hydrogen Peroxide Mixture), and the deposits caused by organic substances or metal contamination adhering to the surface of the single crystal germanium substrate 120 are removed.

 <Step S2>  

Next, as illustrated in FIG. 4, the light-receiving surface 120A of the single crystal germanium substrate 120 forms a p-type impurity diffusion source 101 and an impurity diffusion layer 103.

Boron is formed on the single crystal germanium substrate 120, for example, by a gas phase reaction using BBr _{3 or} a vapor phase method using an atmospheric pressure chemical vapor deposition (APCVD) method such as B ₂ H ₆ . A doped glass (Boron Silicate Glass: BSG) film is used as the impurity diffusion source 101. Thereafter, the impurity diffusion layer 103 is formed by thermally diffusing boron in the impurity diffusion source 101 to the single crystal germanium substrate 120 in a diffusion furnace.

Further, boron may be driven into the surface of the single crystal germanium substrate 120 by ion implantation, and then boron may be thermally diffused in a diffusion furnace, thereby forming the impurity diffusion layer 103 instead of the above-described formation. In this case, the sheet resistance of the impurity diffusion layer 103 formed can be set to 50 Ω/sq or more and less than 150 Ω/sq. The sheet resistance is designed in consideration of the recombination of minority carriers in the diffusion layer, light absorption, and contact resistance with electrodes.

As described above, when APCVD is used to form the impurity diffusion source 101 composed of the BSG film, the BSG film is mainly formed on the light receiving surface 120A of the single crystal germanium substrate 120. However, in this case, the BSG film is slightly entangled and formed on the end face of the single crystal germanium substrate 120 and the back surface 120B of the single crystal germanium substrate 120. Therefore, after the BSG film is formed, it is preferable to remove the unnecessary BSG which is wound around the end face of the single crystal germanium substrate 120 and the back surface of the single crystal germanium substrate 120 by using, for example, 0.5% or more and 1.0% or less of hydrofluoric acid. membrane.

Further, in order to protect the BSG film from being affected by hydrofluoric acid, a barrier layer composed of a thermal oxide film or a nitride film may be formed on the upper surface of the BSG film before the use of hydrofluoric acid. Then, the BSG film formed on the back surface 120B of the single crystal germanium substrate 120 is removed by hydrofluoric acid, or the BSG film formed on the end surface of the single crystal germanium substrate 120 is removed side by side with a treating agent such as hydrofluoric acid or sodium hydroxide.

The above-described nitride film can be formed by, for example, a plasma CVD method using decane gas, nitrogen gas, ammonia gas or the like. The barrier layer such as the nitride film also functions as a barrier layer when it is used for heat treatment for activating dopants to be described later. Therefore, when a barrier layer such as a nitride film is formed, the thickness thereof is preferably, for example, 50 nm or more.

Further, the thickness of the BSG film belonging to the impurity diffusion source 101 is, for example, 30 nm or more and less than 150. When the thickness of the BSG film belonging to the impurity diffusion source 101 is too thin, it becomes impossible to function as a diffusion source of the p-type impurity. On the other hand, when the thickness of the BSG film belonging to the impurity diffusion source 101 is too thick, it is difficult to form the BSG film and remove the unnecessary BSG film.

As illustrated in FIG. 4, after the impurity diffusion source 101 is formed, it is preferable to form the non-doped silica glass (NSG) film 102 as a dielectric film on the impurity diffusion source 101.

The NSG film 102 functions as a cap layer, and suppresses the detachment of boron in the impurity diffusion source 101 composed of the BSG film into the gas phase. Thereby, boron of the impurity diffusion source 101 is efficiently diffused to the single crystal germanium substrate 120. Further, the NSG film 102 also functions as a barrier layer when it is used for heat treatment for dopant activation of the amorphous germanium layer 105 (Fig. 6) to be described later.

The film thickness of the NSG film 102 is, for example, 100 nm or more and less than 500 nm. When the thickness of the NSG film 102 is too thin, it does not function as a coating layer or functions as a diffusion barrier layer. On the other hand, when the thickness of the NSG102 film is too thick, it is difficult to form an NSG film and remove an unnecessary NSG film.

 <Step S3>  

Next, as shown in FIG. 5, a tunnel oxide layer 104 is formed on the back surface 120B of the single crystal germanium substrate 120.

For example, a dielectric material such as a tantalum oxide film or an aluminum oxide film can be used as the material of the tunnel oxide layer 104. The formation of the tantalum oxide film is performed, for example, by immersing the back surface 120B of the single crystal germanium substrate 120 in ozone water. In this case, it is necessary to control the ozone concentration and the immersion time to obtain an oxide film of a desired thickness.

In addition to the above methods, the formation of the tantalum oxide film can also be performed by thermal oxidation, nitric acid oxidation, plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (Atomic Layer Deposition: ALD), A method such as an ultraviolet (UV) irradiation method or an ozone irradiation method.

The film thickness of the tunneling oxide layer 104 is, for example, 0.5 nm or more and less than 5 nm. When the film thickness of the tunnel oxide layer 104 is too thin, not only a majority of carriers but also a few carriers pass through the oxide layer 104. As a result, the open circuit voltage is lowered due to an increase in recombination. On the other hand, when the film thickness of the tunnel oxide layer 104 is too thick, the tunneling of most carriers is hindered. As a result, electrical characteristics are deteriorated due to an increase in series resistance.

 <Step S4>  

Next, as illustrated in FIG. 6, an n-type amorphous germanium layer 105 is formed under the tunnel oxide layer 104. The amorphous germanium layer 105 doped with phosphorus is formed by a chemical vapor deposition method such as PECVD using SiH ₄ or PH ₃ .

The film thickness of the amorphous germanium layer 105 is, for example, 5 nm or more and less than 100 nm. When the film thickness of the amorphous germanium layer 105 is too thin, the electric field effect becomes weak. As a result, the electrical resistance in the tunnel junction layer increases, and the repulsive effect of a minority carrier becomes small, so that the characteristics of the amorphous germanium layer 105 are deteriorated. On the other hand, when the film thickness of the amorphous germanium layer 105 is too thick, thermal deformation becomes large. As a result, the passivation effect of the ruthenium layer is lowered as compared with the case where the film thickness of the amorphous ruthenium layer 105 is in the correct range.

 <Step S5>  

Thereafter, the structure illustrated in Fig. 6 is heat-treated to obtain the structure illustrated in Fig. 7. In the case of an example of the heat treatment, the single crystal germanium substrate 120 subjected to the above steps is placed in a horizontal quartz furnace, nitrogen gas is introduced, the temperature is raised to 800 ° C, and the temperature is maintained for 1 minute, and then the temperature is lowered to 700 ° C. The temperature was maintained for another 30 minutes. After that, the temperature was lowered to room temperature and taken out from the quartz furnace. While maintaining the temperature of 800 ° C, a part or the whole of the amorphous germanium layer 105 is crystallized to form a crystalline thin film layer 115. The film thickness of the crystal thin film ruthenium layer 115 is, for example, 5 nm or more and less than 100 nm. While maintaining the temperature of 800 °C, the n-type dopant in the amorphous germanium layer 105 is activated to lower the sheet resistance. In parallel with this, the n-type dopant contained in the amorphous germanium layer 105 diffuses into the tunnel oxide layer 104 to form a tunneling oxide layer 114 containing the dopant.

Then, while maintaining the temperature of 700 ° C, the n-type dopant in the tunnel oxide layer 114 is diffused to the single crystal germanium substrate 120 at a low concentration to form the doped layer 116.

In the first embodiment, the dopant concentration in the doped layer 116 is lower than the dopant concentration in the tunnel oxide layer 114. As described above, the uniformity of the n-type dopant concentration of the doped layer 116 can be improved by diffusion of the low concentration n-type dopant from the tunneling oxide layer 114 to the doped layer 116.

Although an example of the heat treatment conditions has been described above, it is not limited thereto, and it can be carried out under other conditions. Among them, the holding temperature at the time of heat treatment is preferably 400 ° C or more and less than 900 ° C for the reasons described below.

When the heat treatment temperature is too low, the crystallization of the amorphous ruthenium layer 105 cannot be sufficiently promoted, and the crystal thin film ruthenium layer 115 cannot be sufficiently formed. As a result, the electric field effect on the back surface 120B is lowered, and a high passivation effect cannot be obtained. Furthermore, since the amorphous germanium layer 105 has a relatively high electrical resistance, there is a tendency to hinder the transport of most carriers. When the heat treatment temperature exceeds 400 ° C, hydrogen starts to be detached from the amorphous ruthenium layer 105, which promotes crystallization.

When the heat treatment temperature is too low, other problems may occur in addition to the above problems. That is, there is a problem that the n-type dopant does not sufficiently move from the amorphous germanium layer 105 to the tunnel oxide layer 104. In this case, since the tunnel oxide layer 104 is difficult to function as a dopant supply source for forming the doping layer 116, the doping layer 116 cannot be formed.

On the other hand, when the heat treatment temperature is too high, such as more than 900 ° C, the passivation effect starts to decrease remarkably. As a result, the open circuit voltage is lowered. This is because the n-type dopant is excessively diffused from the tunneling oxide layer 114 to the single crystal germanium substrate 120 by the heat treatment at a high temperature, and the doping concentration of the doping layer 116 becomes too high to make the minority carrier Compounding will increase.

Further, the method of forming the crystal thin film germanium layer 115, the tunneling oxide layer 114, and the doping layer 116 is not limited to the above method. For example, after forming the undoped (intrinsic) amorphous germanium layer, the n-type dopant may be doped and diffused to form a crystalline thin film germanium layer 115. Specifically, in step S4, an amorphous germanium layer is formed by a chemical vapor deposition method such as PECVD using SiH ₄ . Thereafter, in step S5, phosphorus belonging to the n-type dopant is diffused into the non-doped amorphous germanium layer by gas phase reaction and thermal diffusion of POCl ₃ or phosphorus implantation and thermal diffusion. The crystal thin film layer 115, the tunnel oxide layer 114, and the doping layer 116 may be formed by heat treatment.

In addition, in other formation methods, the crystalline thin film layer 115 can also be processed in one step by using a Low Pressure Chemical Vapor Deposition (LPCVD) method such as SiH _{4 or} PH ₃ . form. In this case, the formation of the crystalline thin film layer 115 can be performed at a temperature of, for example, 500 ° C or higher without passing through the formation of the amorphous germanium layer 105. Further, the heat treatment after the film formation of the crystalline thin film layer 115 may be carried out as needed.

Furthermore, in other formation methods, tunneling can be performed by using a gas phase reaction and thermal diffusion of POCl ₃ or phosphorus implantation and thermal diffusion immediately after the tunnel oxide layer 104 is formed. Oxide layer 114. Further, it is also possible to form the crystalline thin film layer 115 in a manner of performing heat treatment after forming the amorphous germanium layer 105, and diffuse phosphorus belonging to the n-type dopant from the tunnel oxide layer 114 to the single crystal germanium substrate 120 to form. Doped layer 116.

Furthermore, in other formation methods, a certain degree of doping may be formed by gas phase reaction and thermal diffusion of POCl ₃ or phosphorus implantation and thermal diffusion before forming the tunnel oxide layer 104. Layer 116.

 <Step S6>  

Next, as illustrated in Fig. 8, the BSG film and the NSG film 102 belonging to the impurity diffusion source 101 formed on the light-receiving surface 120A of the single crystal germanium substrate 120 are completely removed by using hydrofluoric acid, and the p-type impurity diffusion layer 103 is exposed. . This step S6 can also be performed before the heat treatment step of step S5.

In the case where step S6 is performed before step S5, it is possible to prevent boron from diffusing into the ambient gas from the BSG film belonging to the impurity diffusion source 101 at the heat treatment of step S5, preventing the boron from adhering to the amorphous germanium layer 105, and preventing diffusion to non-distribution. Inside the wafer layer 105. However, in this case, at the heat treatment of step S5, phosphorus belonging to the n-type dopant may diffuse from the amorphous germanium layer 105 into the ambient gas and diffuse into the p-type impurity diffusion layer 103.

As shown in the first embodiment, when the NSG film 102 belonging to the cover layer is formed on the upper surface of the BSG film belonging to the impurity diffusion source 101, the possibility that the boron of the impurity diffusion source 101 diffuses into the amorphous germanium layer 105 is more amorphous. The possibility that the phosphorus of the germanium layer 105 diffuses into the impurity diffusion layer 103 is also low. Therefore, in such a case, it is preferable to perform the step S6 of removing the BSG film and the NSG film 102 belonging to the impurity diffusion source 101 after the heat treatment in the step S5.

 <Step S7>  

Next, as illustrated in FIG. 9, the dielectric layer 108 is formed on the upper surface of the impurity diffusion layer 103, which is the light receiving surface 120A of the single crystal germanium substrate 120, and the antireflection film 109 is formed on the upper surface of the dielectric layer 108.

As the dielectric layer 108, an oxide film such as a hafnium oxide film can be used. Further, as the dielectric layer 108, a dielectric layer such as an aluminum oxide film formed by an atomic layer deposition (ALD) method or a CVD method can be used. In particular, since the aluminum oxide film has a negative fixed charge, the p-type impurity diffusion layer 103 can exhibit an excellent passivation effect. The film thickness of the dielectric layer 108 is, for example, 2 nm or more and less than 50 nm.

A tantalum nitride film formed by, for example, a plasma CVD method is used as the anti-reflection film 109 formed on the upper surface of the dielectric layer 108. The film thickness of the anti-reflection film 109 is designed to correspond to the film thickness of the thickness of the dielectric layer 108, and is a film thickness which is most suitable for the solar spectrum, for example, a film thickness of 30 nm or more and less than 80 nm.

 <Step S8>  

Finally, the light-receiving surface electrode 110 is formed on the light-receiving surface 120A of the single crystal germanium substrate 120. Further, a back surface electrode 111 is formed on the lower surface of the crystal thin film layer 115. Thereby, the solar cell exemplified in FIGS. 1 and 2 is formed.

In the formation of the light-receiving surface electrode 110, a paste containing metal particles and glass particles is applied onto the upper surface of the anti-reflection film 109 by a coating method such as a screen printing method to form a comb-like pattern. Then, the light-receiving surface electrode 110 is formed by drying it. The content of the glass particles is 0.5% by weight or more and 10.0% by weight or less, preferably 1.0% by weight or more and 13.0% by weight or less based on the weight of the metal particles.

The drying of the above paste is carried out, for example, in a drying oven at 200 ° C for about 10 minutes. After drying, the light-receiving surface electrode 110 is heat-treated at a high temperature of about 800 ° C to be fired. At this time, the glass particles in the light-receiving surface electrode 110 are etched into the anti-reflection film 109 and the dielectric layer 108 by firing on the light-receiving surface 120A side. Thereby, the through holes exposing the impurity diffusion layer 103 are formed on the anti-reflection film 109 and the dielectric layer 108, and the light-receiving surface electrode 110 is electrically connected to the impurity diffusion layer 103 through the through-hole.

In the formation of the back surface electrode 111, a paste containing metal particles, which does not contain glass particles, is applied to the lower surface of the crystal film layer 115 to form a comb-like pattern, for example, by a coating method such as a screen printing method. It is dried and fired at a high temperature. Thereby, the back surface electrode 111 electrically connected to the crystalline thin film layer 115 is formed. Further, the drying of the paste and the high-temperature firing may be carried out simultaneously with the drying of the light-receiving surface electrode 110 and the high-temperature firing. Further, the back surface electrode 111 may be formed by a sputtering method using a metal thin film without screen printing, or may be formed by a plating method.

In order to achieve a low contact resistance between the back electrode 111 and the crystalline thin film layer 115, the dopant concentration in the crystalline thin film layer 115 may be increased. For example, the dopant concentration in the crystalline thin film 系 layer crystal thin film layer 115 may be set to 1 × 10 ²⁰ (atm/cm ³ ) or more.

For the doped layer 116, the manner of reducing the dopant concentration can suppress the recombination of a minority carrier at the doped layer 116, and a higher Voc can be obtained. On the other hand, once the dopant concentration of the doping layer 116 is set to a high concentration capable of achieving a low degree of contact with the electrode, that is, 1×10 ²⁰ (atm/cm ³ ) or more, tunneling is formed. The oxide layer 114 becomes meaningless. Therefore, the dopant concentration of the doped layer 116 is set to be lower than the dopant concentration of the crystalline thin film germanium layer 115.

 <Summary of Embodiment 1>  

In the case of the solar cell of the solar cell of the first embodiment (hereinafter referred to as "the case of the related solar cell") (hereinafter referred to as "the related manufacturing method"), for example, the following may be used. Shower. That is, in terms of the related manufacturing method, a method is considered in which the formation of the tunneling oxide layer 104 is completely formed by thermal diffusion using POCL ₃ and washing by fluoric acid. After the n-type doped layer 116 is formed, the tunnel oxide layer 104 and the amorphous germanium layer 105 are formed, and then the amorphous germanium layer is changed into the crystalline thin film germanium layer 115 by heat treatment at 600 ° C for 30 minutes. It is explained herein that although the doping layer 116 is necessary in terms of generating an electric field, when the dopant concentration of the doping layer 116 is too high, since the recombination is increased, the related manufacturing method is to dope the doping layer 116. The concentration of the substance is slightly lowered.

Fig. 10 is a graph showing changes in the open circuit voltage Voc of the solar cell when the sheet resistance of the doped layer 116 is changed. Voc becomes the highest when the sheet resistance is 230 Ω/sq. This Fig. 10 is a view showing the relationship between the in-plane average value of the sheet resistance of the doped layer 116 of the solar battery cell and the open circuit voltage Voc, but it is expected that the sheet resistance has an in-plane distribution when leaving the sheet of 230 Ω/sq. In the region of the resistor, the open circuit voltage Voc is lowered. Therefore, it is expected that the sheet resistance is uniformly 230 Ω/sq in the plane.

Fig. 11 is a view showing the relationship between the in-plane average value, the in-plane maximum value, and the in-plane minimum value of the sheet resistance of the doped layer 116 for the related solar cell and the solar cell of the present embodiment. After forming the doped layer, the tunneling oxide layer, and the crystalline thin film layer on the back side, the sheet resistance at 25 in-plane is measured, and the average value (bar graph of FIG. 11) and the maximum value are shown. 11) max), minimum value (min of Fig. 11). The related manufacturing method is that the maximum value of the sheet resistance is 370 Ω/sq, and it can be seen that the sheet resistance is significantly higher, that is, a region where the amount of diffusion of phosphorus is very small. This is because the POCL ₃ vapor does not easily reach a portion of the single crystal germanium substrate 120 under the diffusion condition that the sheet resistance of the doped layer 116 is a high resistance (low phosphorus concentration) of more than 200 Ω/sq.

On the other hand, in the manufacturing method of the first embodiment, the maximum value of the sheet resistance is suppressed. This is because phosphorus in the tunnel oxide layer 104 serves as a diffusion source, and phosphorus is uniformly supplied to the single crystal germanium substrate 120, and a portion having a high sheet resistance does not occur.

Fig. 12 is a view showing the results of comparison between the open circuit voltage Voc of the solar cell of the related art and the open circuit voltage Voc of the solar cell of the first embodiment. According to the manufacturing method of the first embodiment, the dopant concentration and the sheet resistance of the doping layer 116 can be made uniform, and as a result, a solar cell having an open circuit voltage Voc higher than the related solar cell of, for example, about 4 mV can be obtained.

According to the first embodiment, the dopant concentration of the doped layer 116 is lower than the dopant concentration of the crystalline thin film layer 115. Thereby, since the minority carrier can be suppressed from being recombined in the doping layer 116 and its interface, the open circuit voltage can be increased.

 <Embodiment 2>  

Fig. 13 is a cross-sectional view schematically showing the configuration of a solar cell of the second embodiment. The solar cell of the second embodiment differs from the solar cell of the first embodiment (Fig. 2) in the following points.

A protective film 117 belonging to the dielectric film is added, and the protective film 117 is disposed on the surface of the crystalline thin film layer 115 opposite to the semiconductor layer 100. The back surface electrode 111 is connected to the doping layer 116 via a through hole provided in the protective film 117, the crystalline thin film layer 115, and the tunneling oxide layer 114. The thickness of the doped layer 116 is greater than the thickness of the crystalline thin film layer 115.

 <Manufacturing method>  

Hereinafter, a method of manufacturing a solar cell according to the second embodiment will be described in detail with reference to Figs. 14 to 16. Fig. 14 is a flow chart showing a method of manufacturing the solar cell of the second embodiment. In addition, Fig. 15 and Fig. 16 are cross-sectional views showing a method of manufacturing the solar cell of the second embodiment.

In the method for producing a solar cell according to the second embodiment, a portion different from the method for producing a solar cell according to the first embodiment will be mainly described below.

 <Steps S11 to S14>  

In steps S11 to S14, the same steps as steps S1 to S4 shown in Fig. 3 are performed.

 <Step S15>  

After the structure shown in FIG. 6 is formed in step S14, the structure illustrated in FIG. 7 is obtained by performing the same heat treatment as that in step S5 in this step S15. In one example of the heat treatment, the single crystal germanium substrate 120 subjected to the above steps is placed in a horizontal quartz furnace, nitrogen gas is introduced, the temperature is raised to 800 ° C, and the temperature is maintained for 1 minute, and then the temperature is lowered to 750 ° C. Maintain the temperature for 30 minutes. After that, the temperature was lowered to room temperature and taken out from the quartz furnace. While maintaining the temperature at 800 °C, a part or the whole of the amorphous germanium layer 105 is crystallized to form a crystalline thin film layer 115. The film thickness of the crystal thin film ruthenium layer 115 is, for example, 5 nm or more and less than 100 nm. While maintaining the temperature of 800 ° C, the sheet resistance is lowered by the activation of the n-type dopant in the amorphous germanium layer 105. In parallel with this, the n-type dopant contained in the amorphous germanium layer 105 diffuses into the tunnel oxide layer 104 to form a tunneling oxide layer 114 containing the dopant.

Then, while maintaining 750 ° C, the n-type dopant in the tunnel oxide layer 114 is diffused to the single crystal germanium substrate 120 at a low concentration to form the doped layer 116.

In the second embodiment, the thickness of the doped layer 116 is made thicker than the thickness of the crystalline thin film layer 115 by maintaining the temperature at 750 °C. Such a configuration can be formed by the heat treatment described above, but a method other than the heat treatment described above can be used. The thickness of the doped layer 116 is thicker than the thickness of the crystalline thin film layer 115, and the relationship with the back electrode will be described later.

 <Steps S16 to S17>  

Next, in step S16, by performing the same steps as step S6 shown in Fig. 3, the same structure as that exemplified in Fig. 8 can be obtained. Then, in step S17, by performing the same steps as step S7 shown in Fig. 3, the same configuration as that exemplified in Fig. 9 can be obtained.

 <Step S18>  

Next, as illustrated in Fig. 15, a protective film 117 is formed on the lower surface of the crystal thin film layer 115 on the back surface 120B side of the single crystal germanium substrate 120. The material of the protective film 117 is, for example, tantalum nitride, hafnium oxide, tantalum oxynitride, amorphous germanium, microcrystalline germanium or telluride or the like. The protective film 117 is desirably higher in hardness than the crystalline film thin layer 115. In order to perform the step of screen printing the material of the back electrode onto the protective film 117 in the next step, the crystalline film layer 115 is protected from substantial damage caused by contact with the screen or friction. .

Further, when the protective film 117 contains sufficient hydrogen, the hydrogen is detached when the electrode is fired. As a result, the dangling bond in the crystalline thin film layer 115 and the dangling bond at the interface between the tunnel oxide layer 114 and the doped layer 116 are caused by hydrogen detached from the protective film 117. End. As a result, the passivation effect of the crystalline film thin layer 115 and the passivation effect of the tunnel oxide layer 114 can be improved. Therefore, it is expected that the hydrogen concentration in the protective film 117 is higher than the hydrogen concentration in the crystalline film thin layer 115.

 <Step S19>  

Next, as shown in FIG. 16, the material of the light-receiving surface electrode 110 is formed on the upper surface of the anti-reflection film 109 on the light-receiving surface 120A side of the single crystal germanium substrate 120. Further, a material of the back surface electrode 111 is formed on the lower surface of the protective film 117. For example, a paste containing metal particles and glass particles is applied to the upper surface of the anti-reflection film 109 and the lower surface of the protective film 117 by a coating method such as a screen printing method. Then, after drying in a drying oven of, for example, 200 ° C for 10 minutes, heat treatment is performed at a high temperature of 800 ° C, and firing is performed to form the light-receiving surface electrode 110, the back surface electrode 111, and the solar cell exemplified in FIG.

In the second embodiment, the back surface electrode 111 is connected to the crystal thin film layer 115 through the protective film 117. The penetration of the protective film 117 applies a fire-through effect. In other words, the glass particles contained in the back surface electrode 111 are used to partially etch and penetrate the protective film 117 during electrode firing, thereby connecting the back surface electrode 111 to the crystalline film thin layer 115. Similarly, in the electrode firing, the glass particles contained in the back surface electrode 111 partially etch and penetrate the crystalline film thin layer 115 and the tunnel oxide layer 114, and the back surface electrode 111 is connected to the doping. Layer 116.

 <Summary of Embodiment 2>  

First, the significance of the thickness of the doped layer 116 being thicker than the thickness of the crystalline thin film layer 115 will be described. In terms of the above-described burn-through effect, in general, the depth of etching by the glass particles is uneven. Due to the unevenness, the portion of the back surface electrode 111 to reach the crystalline thin film layer 115, the portion to reach the tunnel oxide layer 104, the portion to reach the doped layer 116, and the portion to reach the semiconductor layer 100 become a mixture. status. If the back surface electrode 111 has a portion reaching the semiconductor layer 100, a very large number of defect levels are formed at the interface between the back surface electrode 111 and the semiconductor layer 100, and a minority carrier generated in the semiconductor layer 100 may be defective due to the defect level. And extinguished, and the open circuit voltage Voc is lowered.

Therefore, in the second embodiment, the thickness of the doping layer 116 is made thicker than the crystalline thin film layer 115. According to such a configuration, the tip end portion of the etching which can be adjusted by the glass particles becomes in the doped layer 116. Thereby, since the back surface electrode 111 can be suppressed from reaching the semiconductor layer 100, the fall of the open circuit voltage Voc can be suppressed.

Further, a portion where the doping layer 116 is connected to the back surface electrode 111 also forms a defect level at the interface. However, an internal electric field due to the dopant is formed inside the doped layer 116, and a minority carrier generated inside the semiconductor layer 100 is subjected to a repulsive force from the internal electric field without approaching the defect level of the interface. Therefore, the elimination of a few carriers is less, and the reduction of the open circuit voltage Voc can be reduced.

Fig. 17 is a graph showing the results of comparison between the open circuit voltage Voc of the solar cell and the open circuit voltage Voc of the solar cell of the second embodiment. According to the solar cell of the second embodiment, the protective effect of the protective film 117 and the effect of suppressing the elimination of a small number of carriers at the interface can be obtained. Therefore, the open circuit voltage Voc can be increased by, for example, about 7 mV.

According to the second embodiment, the back surface electrode 111 is connected to the doping layer 116 through the through holes provided in the protective film 117, the crystal thin film layer 115, and the tunnel oxide layer 114. Thereby, the contact resistance can be stably reduced, and therefore, the FF and the fill factor can be improved.

Further, the present invention can be freely combined with the respective embodiments within the scope of the invention, or the embodiments can be modified and omitted as appropriate.

The invention has been described in detail above, and the invention described above is exemplified in all aspects, and the invention is not limited thereto. It can be understood that there are numerous morphological variations that are not illustrated, without departing from the scope of the invention.

Claims (7)

 A solar cell comprising: a semiconductor layer; a first impurity layer; a tunneling layer disposed between the semiconductor layer and the first impurity layer and containing oxygen; and a second impurity layer disposed on the semiconductor layer And the electrode is connected to the first impurity layer; the tunneling layer and the first impurity layer contain the same impurity as the impurity of the second impurity layer, and the impurity of the tunneling layer The concentration is higher than the concentration of the impurities of each of the first impurity layer and the second impurity layer.    The solar cell according to claim 1, wherein the concentration of the impurity of the second impurity layer is lower than the concentration of the impurity of the first impurity layer.    The solar cell according to claim 1 or 2, wherein the electrode contains glass particles.    The solar cell according to claim 1 or 2, wherein the electrode is connected to the second impurity layer through a through hole provided in the first impurity layer and the tunneling layer.    The solar cell according to claim 1 or 2, wherein the thickness of the second impurity layer is thicker than the thickness of the first impurity layer.    The solar cell according to claim 1 or 2, further comprising a dielectric film disposed on a surface of the first impurity layer opposite to the semiconductor layer.    A method of manufacturing a solar cell according to the first or second aspect of the invention, comprising: forming the tunneling layer adjacent to the semiconductor substrate, and thermally diffusing impurities of the tunneling layer to In the semiconductor substrate, the second impurity layer is formed in a portion of the semiconductor substrate adjacent to the tunneling layer, and the semiconductor layer is formed in a portion other than the semiconductor layer.