TW201908838A - Pixel array substrate - Google Patents

Abstract

An active device array substrate including a substrate, first signal lines, second signal lines, third signal lines and active devices is provided. The first signal lines, the second signal lines, the third signal lines and the active devices are disposed on the substrate. Each of the first signal lines has a jumper wire bridge structure which includes a first line and a second line disposed on the same film layer, and a third line disposed on another film layer. The second signal lines are intersected with the first signal lines and the third signal lines. Each of the second signal lines is electrically connected to one of the first signal lines. Each active device is connected to one second signal line and one third signal line.

Description

Pixel array substrate

The present invention relates to a pixel array substrate, and more particularly to a pixel array substrate having a jumper bridge structure.

In order to reduce the width of the side border of the display device, a circuit design employs a means of connecting lateral signal lines to longitudinal selection lines and arranging longitudinal selection lines within the display area. However, such a line design causes the distribution of the longitudinal lines to become dense, which may cause the line to generate an unnecessary short circuit or break due to foreign matter in the process.

The present invention provides a pixel array substrate whose design of the selection line helps to reduce the probability of line defects or line defects caused by short circuit.

A pixel array substrate of the present invention includes a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of third signal lines, and a plurality of active components. The first signal line, the second signal line, the third signal line, and the active component are disposed on the substrate. The first signal line includes a jumper bridge structure. The jumper bridging structure includes a first line segment and a second line segment located in the same film layer, and a third line segment located in another film layer. Both ends of the second line segment are respectively connected to the first line segment and the third line segment. The second signal lines are electrically connected to different first signal lines. The second line segment of the jumper bridge structure is located between two adjacent second signal lines, and the first line segment of the jumper bridge structure intersects the third line segment of the adjacent two second signal lines. The third signal line intersects the second signal line. Each active component is electrically connected to one of the second signal lines and one of the third signal lines.

In an embodiment of the invention, the first line segment and the third line segment of the jumper bridge structure are the same as the film layer of the third signal line.

In an embodiment of the invention, the film layer of the second line segment of the jumper bridge structure is the same as the film layer of the second signal line.

In an embodiment of the invention, the pixel array substrate further includes an insulating layer. The insulating layer is disposed between the first line segment and the film layer of the second line segment and the film layer of the second line segment, and the two ends of the second line segment respectively pass through a first contact window and a second contact window penetrating the insulating layer. Connect the first line segment and the second line segment.

In an embodiment of the invention, the pixel array substrate further includes a plurality of pixel electrodes. Each active component includes a gate, a channel layer, a source and a drain. The area of the gate overlaps with the area of the channel layer, the source and the drain are connected to the channel layer, one of the gate and the source is connected to one of the second signal lines, and the other is connected to one of the third signal lines. And the drain is connected to one of the pixel electrodes.

In an embodiment of the invention, one of the third signal lines and one of the first signal lines are respectively located on two sides of one of the pixel electrodes.

In an embodiment of the invention, the second line segment of the jumper bridge structure of the first one of the first signal lines includes a central portion and two end portions at both ends of the central portion, and the central portion and one of the third signal lines The distance is greater than the distance between the two end portions and one of the third signal lines.

In an embodiment of the invention, one of the third signal lines is located between one of the first signal lines and one of the pixel electrodes.

In an embodiment of the invention, the pixel array substrate further includes a plurality of common electrodes, and an area of the common electrode overlaps an area of the pixel electrode.

In an embodiment of the invention, the pixel array substrate further includes a plurality of auxiliary electrodes. The area of the auxiliary electrode overlaps with the area of the common electrode. Each common electrode is located between one of the auxiliary electrodes and one of the pixel electrodes, and one of the auxiliary electrodes is electrically connected to the drain.

In an embodiment of the invention, the pixel array substrate further includes a plurality of common electrode connection lines. The common electrode connection line connects the common electrodes, and one of the common electrode connection lines intersects the first line segment of one of the jumper bridge structures.

In an embodiment of the invention, the film layers of the first line segment and the third line segment are located between the film layer of the second line segment and the substrate.

In an embodiment of the invention, the first line segment, the second line segment and the third line segment of the jumper bridge structure have the same material.

In an embodiment of the invention, the extending directions of the first signal line and the third signal line are parallel to each other.

Based on the above, in the pixel array structure of the present invention, the first signal line is designed by using a jumper bridge to increase the spacing between adjacent lines of the same film layer, thereby avoiding line defects or pictures caused by foreign materials causing line short circuit. Anomalies.

The above described features and advantages of the invention will be apparent from the following description.

1 is a top plan view of a pixel array substrate in accordance with an embodiment of the invention. Referring to FIG. 1 , the pixel array substrate 10 includes a substrate 100 , a plurality of first signal lines 110 , a plurality of second signal lines 120 , a plurality of third signal lines 130 , and a plurality of active elements 140 . The first signal line 110, the second signal line 120, the third signal line 130, and the active device 140 are all disposed on the substrate 100 to form the pixel array substrate 10. The extending direction D1 of the first signal line 110 and the extending direction D3 of the third signal line 130 extend substantially in the longitudinal direction of the drawing, and the extending direction D2 of the second signal line 120 extends substantially in the lateral direction of the drawing. Therefore, the second signal line 120 intersects the first signal line 110 and also intersects the third signal line 130, and the extending direction D1 can be parallel to the extending direction D3. Each active component 140 can be connected to one of the second signal lines 120 and one of the third signal lines 130. In addition, the pixel array substrate 10 may further include a plurality of pixel electrodes 150 and a common electrode line 160. Each of the pixel electrodes 150 is connected to one of the active elements 140, and the common electrode line 160 can traverse the pixel electrodes 150.

In this embodiment, each of the first signal lines 110 includes a jumper bridge structure J1, and the jumper bridge structure J1 includes, for example, a first line segment 112, a second line segment 114, and a third line segment 116. The first line segment 112, the second line segment 114 and the third line segment 116 are sequentially connected along the extending direction D1 of the first signal line 110, and the two ends of the second line segment 114 are respectively associated with the first line segment 112 and the third line segment 116. Electrical connection.

Further, the second line segment 114 of the jumper bridge structure J1 is located between the adjacent two second signal lines 120, and the first line segment 112 and the third line segment 116 of the jumper bridge structure J1 respectively intersect the two adjacent lines The second signal line 120. At the same time, the film layer of the second line segment 114 may be different from the film layer of the third signal line 130. Therefore, although the second line segment 114 and the third signal line 130 are adjacent lines, since the two lines are formed by different film layers, the probability of short circuit between the two lines can be reduced, and the yield of the pixel array substrate 10 is improved. . For example, when the substrate 100 is a plastic substrate, since the plastic substrate may contain impurities or foreign matter may be contaminated thereon, adjacent lines may be formed by the same film layer, and adjacent lines may easily occur due to such impurities or foreign matter. Short circuit. However, the jumper bridge structure J1 of the present embodiment is designed to help avoid the above situation, thereby improving the yield of the pixel array substrate 10.

Each of the second signal lines 120 can be electrically connected to one of the first signal lines 110, and the second signal lines 120 can be respectively connected to different first signal lines 110. The driving circuit (not shown) of the pixel array substrate 10 can input a corresponding signal to the first signal line 110, and the first signal line 110 can transmit the received signal to the corresponding second signal line 120. . Thus, the signal transmission of the second signal line 120 is mainly realized by the circuit inside the pixel array substrate 10, and the area of the side frame region of the pixel array substrate 10 is not required, so that the design of the side narrow frame can be provided.

Each active component 140 can be a three-terminal component that includes a gate G, a source S, and a drain D. The gate G is connected to one of the third signal lines 130, the source S is connected to one of the second signal lines 120, and the drain D is connected to one of the pixel electrodes 150. That is, the third signal line 130 can be regarded as a gate line or a scan line, and the second signal line 120 can be regarded as a data line, but is not limited thereto. In other embodiments, the gate G can be connected to one of the second signal lines 120, and the source S can be connected to one of the third signal lines 120, so that the second signal line 120 can be regarded as a gate line or a scan. The line and the third signal line 130 can be regarded as a data line.

2 is a schematic diagram of an embodiment of a region R1 of the pixel array substrate of FIG. 1. Referring to FIG. 1 and FIG. 2 simultaneously, the region R1 generally shows a layout design of a single pixel structure, but the pixel structure layout design presented in FIG. 2 is for illustrative purposes only and is not intended to limit the present invention. In the region R1, the active device 140 may be a thin film transistor. The active device 140 includes a channel layer C in addition to the gate G, the source S and the drain D, and the channel layer C is made of a semiconductor material. Used to control the electrical characteristics of the active component 140. The common electrode line 160 includes a common electrode 162 and a common electrode connection line 164 that connects the common electrode 162. Specifically, the common electrode 162 may be a portion where the common electrode line 160 is widened and the area of each common electrode 162 is correspondingly overlapped with the area of one pixel electrode 150, and the common electrode line 164 may be used to connect the common electrode 162 into a string. And each common electrode line 164 intersects the first line segment 112 of the at least one first signal line 110. In addition, the pixel array substrate 10 may further be provided with an auxiliary electrode 150' corresponding to each of the pixel electrodes 150, and the auxiliary electrode 150' may be electrically connected to the drain D. The area of the pixel electrode 150 and the area of the auxiliary electrode 150' overlap the area of the common electrode 162, thereby constituting a storage capacitor.

Fig. 3a is a schematic cross-sectional view taken along line X-X' of Fig. 2, Fig. 3b is a schematic cross-sectional view taken along line Y-Y' of Fig. 2, and Fig. 3c is a schematic cross-sectional view taken along line Z-Z' of Fig. 2. 2, FIG. 3b, the pixel array substrate 10 can be composed of a plurality of film layers stacked on the substrate 100. That is to say, the components of the pixel array substrate 10 can be formed by forming a material layer of the entire layer on the substrate 100 with a desired material, and then patterning the material layer according to the pattern required by each component to complete the required material. member. The method of forming the entire layer of the material layer may be a deposition method, a coating method, or the like. The method of patterning the material layer may include a photolithography method, a laser method, or the like. In other embodiments, the components may be fabricated in a printed manner.

Specifically, the first line segment 112 and the third line segment 116 of the first signal line 110, the third signal line 130, the gate G of the active device 140, and the auxiliary electrode 150' are made of the same film layer close to the substrate 100 (for example M1 conductive layer). The insulating layer I1 is disposed on the first line segment 112 and the third line segment 116 of the first signal line 110, the third signal line 130, the gate G of the active device 140, and the auxiliary electrode 150'. The channel layer C of the active device 140 is disposed on the insulating layer I1. The second line segment 114 of the first signal line 110, the source S and the drain D of the active device 140, and the common electrode line 160 are composed of another film layer (for example, an M2 conductive layer) different from the M1 conductive layer and disposed on the insulating layer. On the I1 and the channel layer C, the source S and the drain D of the active device 140 respectively contact the channel layer C, but the source S and the drain D of the active device 140 are not directly connected to each other. The insulating layer I2 is disposed on the channel layer C of the active device 140, the second line segment 114 of the first signal line 110, the source S and the drain D of the active device 140, the second signal line 120, and the common electrode line 160. The pixel electrode 150 is disposed on the insulating layer I2 and is made of another conductive film layer different from the M1 conductive layer and the M2 conductive layer. In this embodiment, the M1 conductive layer is located between the M2 conductive layer and the substrate 100, but the stacking order of the M1 conductive layer and the M2 conductive layer may be reversed. In addition, the material of the M1 conductive layer and the M2 conductive layer may be the same or different, and specifically includes a metal, a metal alloy, an organic conductive material, a conductive oxide, or a combination thereof, wherein the metal is, for example, aluminum, molybdenum, copper, etc. at normal temperature. It is a solid, stable, and conformable conductive metal material, but not limited to this.

As can be seen from Figures 3a and 3b, the first line segment 112 of the first signal line 110 is located on the same film layer as the third line segment 116, and the second line segment 114 is located on the other film layer. An insulating layer I1 is disposed between the film layers of the first line segment 112 and the third line segment 116 and the film layer of the second line segment 114. Both ends of the second line segment 114 of the first signal line 110 pass through the first contact window H1 and the second contact window H2 to connect to the first line segment 112 and the third line segment 116, respectively. The first contact window H1 and the second contact window H2 may be regarded as a structure that penetrates the insulating layer I1 such that the second line segment 114 of the first signal line 110 contacts the first line segment 112 and the third line segment 116.

In addition, the second signal line 120 can be the same film layer as the second line segment 114 of the first signal line 110, and can be connected to the third line segment 116 of the first signal line 110 through the third contact window H3. As a result, the second line segment 114 of the first signal line 110 is adjacent to the third signal line 130, but the two are located in different film layers and are not prone to unwanted short circuits. In addition, when the material of the M1 conductive layer and the M2 conductive layer are the same, the first line segment 112, the second line segment 114, and the third line segment 116 may be the same material, thereby reducing the first line segment 112, the second line segment 114, and the Contact impedance between the three line segments 116. In other words, the first signal line 110 has the jumper bridge structure J1 in addition to the short circuit between the ground lines, and can maintain good signal transmission quality without causing excessive load on the line due to the jumper bridge structure J1.

In FIG. 3c, the auxiliary electrode 150', the common electrode 162, and the pixel electrode 150 are sequentially stacked on the substrate 100 from bottom to top. In the present embodiment, the drain D of the active device 140 may be connected to the auxiliary electrode 150' through the fourth contact window H4 penetrating the insulating layer I1, and the pixel electrode 150 may be connected through the fifth contact window H5 penetrating the insulating layer I2. To the drain D of the active component 140. Therefore, the pixel electrode 150 and the auxiliary electrode 150' may have the same voltage with the common electrode 162 interposed therebetween, thereby forming a storage capacitor. However, in other embodiments, the auxiliary electrode 150' may be omitted.

4 is a partial top plan view of a pixel array substrate in accordance with another embodiment of the present invention, and FIG. 5 is a schematic view of a region R2 of the pixel array substrate of FIG. Referring to FIG. 4 and FIG. 5 , the pixel array substrate 20 includes a substrate 200 and a plurality of first signal lines 210 , a plurality of second signal lines 220 , a plurality of third signal lines 230 , and a plurality of active devices disposed on the substrate 200 . The element 240, the plurality of pixel electrodes 250 and the plurality of common electrode lines 260. The first signal line 210 is disposed substantially parallel to the third signal line 230. The second signal line 220 intersects the first signal line 210 and the third signal line 230, and each of the second signal lines 220 is electrically connected to one of the first signal lines 210. Each active component 240 is in one of the second signal lines 220, one of the third signal lines 230, and one of the pixel electrodes 250. The common electrode line 260 traverses the pixel electrode 25. In this embodiment, the connection relationship between the first signal line 210, the second signal line 220, the third signal line 230, the active device 240, the pixel electrode 250, the auxiliary electrode 250', and the common electrode line 260 is substantially similar to each other. In the foregoing embodiment, the connection relationship between the first signal line 110, the second signal line 120, the third signal line 130, the active device 140, the pixel electrode 150, the auxiliary electrode 150', and the common electrode line 160 is not described herein.

As can be seen from FIG. 5, the common electrode line 260 includes a common electrode 262 that overlaps the area of the pixel electrode 250 and a common electrode connection line 264 that connects the common electrode 262 in a string. In addition, the pixel array substrate 20 further includes an auxiliary electrode 250' that overlaps the area of the pixel electrode 250. In this manner, the auxiliary electrode 250', the common electrode 262, and the pixel electrode 250 are sequentially stacked on the substrate 200 to constitute a storage capacitor.

The active device 240 can be a thin film transistor including a gate G, a channel layer C, a source S and a drain D. In this embodiment, the gate G is connected to one of the third signal lines 230, the source S is connected to one of the second signal lines 220, and the drain D is connected to one of the pixel electrodes 250. In other embodiments, the gate G can be connected to one of the second signal lines 220, and the source S can be connected to one of the third signal lines 230. Each of the second signal lines 220 can be electrically connected to one of the first signal lines 210, and the number of the first signal lines 210 is not less than the number of the second signal lines 220, so that the second signal lines 220 can be respectively connected to different The first signal line 210.

In addition, each of the first signal lines 210 includes a jumper bridge structure J2, and the jumper bridge structure J2 includes, for example, a first line segment 212, a second line segment 214, and a third line segment 216. The first line segment 212, the second line segment 214 and the third line segment 216 are sequentially connected along the extending direction D1 of the first signal line 210, and the two ends of the second line segment 214 are respectively connected to the first line segment 212 and the third line segment 216. Electrical connection. In this embodiment, the stacking relationship and connection manner of the first line segment 212, the second line segment 214, and the third line segment 216 may refer to the first line segment 112, the second line segment 114, and the third line segment 116 of FIGS. 3a-3b. Therefore, it will not be repeated.

In this embodiment, the first signal line 210 and one of the third signal lines 230 are located on opposite sides of one of the pixel electrodes 250, and the second line segment 214 of the first signal line 210 is a bent line segment. The second line segment 214 may include a central portion 214A and two end portions 214B1 and 214B2, and the central portion 214A is located between the distal end portion 214B1 and the distal end portion 214B2. The central portion 214A can be further away from the corresponding one of the third signal lines 230 with respect to the two end portions 214B1 and 214B2. That is, the distance between the central portion 214A and the third signal line 230 is greater than the distance between the two end portions 214B1 and 214B2 and the third signal line 230. However, in other embodiments, the designer can adjust the distance between the central portion 214A and the third signal line 230 or the distance between the two end portions 214B1 and 214B2 and the third signal line 230, that is, the central portion 214A and the third signal, as needed. The distance of the line 230 may be different from the distance between the two end portions 214B1 and 214B2 and the third signal line 230. The central portion 214A and the distal end portion 214B1 may have a bending angle C1, and the central portion 214A and the distal end portion 214B2 may have a bending angle C2. However, in other embodiments, the second line segment 214 can be a curved line segment.

Under the design of the curved second line segment 214, the contours of the pixel electrode 250, the auxiliary electrode 250' and the common electrode 262 may be arranged to conform to the shape of the second line segment 214. That is, the edge of each of the pixel electrode 250, the auxiliary electrode 250', and the common electrode 262 adjacent to the first signal line 210 is not limited to be parallel to the extending direction D1 of the first signal line 210. As shown in Fig. 5, the respective areas of the pixel electrode 250, the auxiliary electrode 250' and the common electrode 262 are convex toward the direction away from the third signal line 230 in conformity with the bending of the second line segment 214. As a result, the layout area of the pixel electrode 250, the auxiliary electrode 250' and the common electrode 262 is more flexible. For example, the area of the pixel electrode 250, the auxiliary electrode 250', and the common electrode 262 may have a convex pattern as shown in FIG. 5 generally conforming to the bending of the second line segment 214, which helps to increase the storage capacitance. However, the edges of the pixel electrode 250, the auxiliary electrode 250' and the common electrode 262 adjacent to the first signal line 210 are also optionally parallel to the extending direction D1 of the first signal line 210 to obtain a relatively square pixel structure. The designer can determine the pattern design and area size of the pixel electrode 250, the auxiliary electrode 250' and the common electrode 262 according to their different needs.

In the above embodiment, the jumper bridge structures J1 and J2 are described as being disposed on the first signal line 110 or 210, but the present invention is not limited thereto. In other embodiments, the jumper bridge structures J1, J2 may be disposed on the third signal lines 130 and 230, and the first signal lines 110 and 120 have no jumper bridge structures J1, J2. In addition, in some embodiments, when the number of the first signal lines 110 or 210 is greater than the number of the third signal lines 130 or 230, two or more lines may be disposed next to each of the third signal lines 130 or 230. The first signal line 110 or 210. At this time, a part of the first signal line can be implemented by using the first signal line 110 of FIG. 2, and another part of the first signal line can be implemented by using the first signal line 210 of FIG.

For example, FIG. 6 is a schematic diagram of a partial region of a pixel array substrate. Referring to FIG. 6, the pixel array substrate 30 is substantially similar to the pixel array substrate 30 of FIG. 5. Therefore, the same components in the two embodiments will be denoted by the same reference numerals, and the components indicated by the same component symbols have the same. The arrangement relationship, functions, and features described in the detailed description of FIG. 5 will not be further described herein. However, the pixel array substrate 30 includes a first signal line 210, a second signal line 220, a third signal line 230, an active device 240, a pixel electrode 250, a capacitor electrode 262, and an auxiliary electrode 250'. A signal line 110.

Specifically, two first signal lines are disposed between the adjacent two third signal lines 230, which are the first signal line 110 and the first signal line 210, respectively. The first signal line 110 and the first signal line 210 are located between the pixel electrode 250 and one of the third signal lines 230. The first signal line 110 is located between the third signal line 230 and the first signal line 210. The first signal line 210 is located between the first signal line 110 and the pixel electrode 250. At this time, the first signal line 210 has a bent jumper bridge structure, and the first signal line 110 has a linear jumper bridge structure, and the first signal line 210 can be closer to the first signal line 110. The pixel electrode 250. Since the first signal line 110 and the first signal line 210 both have a jumper bridge structure, the separation distance between the members made of the same film layer can be increased to avoid an undesired short circuit. For example, the distance F between the third signal line 230 and the auxiliary electrode 250' of the same film layer at the jumper bridge structure corresponding to the first signal line 110 and the first signal line 210 can be significantly increased. In the case of a pixel array substrate having a display screen of 10.3 Å, a resolution of 1404 × 1872, and a pixel size of 112 μm × 112 μm, the above-mentioned distance F can reach about 27 μm, and an undesired short circuit is unlikely to occur.

In summary, the pixel array substrate of the embodiment of the present invention includes a first signal line having a jumper bridge structure, wherein the jumper bridge structure includes a first line segment, a second line segment, and a third line segment that are sequentially connected to each other. And the film layers of the first line segment and the third line segment are different from the film layer of the second line segment. As such, the pixel array substrate of the embodiment of the present invention helps to reduce unnecessary short circuits between lines of the same layer. In addition, the outline and area of the pixel electrode can be adjusted in accordance with the jumper bridge structure, and thus more flexible.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

10, 20, 30‧‧‧ pixel array substrate

100, 200‧‧‧ substrate

110, 210‧‧‧ first signal line

112, 212‧‧‧ first line segment

114, 214‧‧‧ second line

116, 216‧‧‧ third line segment

120, 220‧‧‧second signal line

130, 230‧‧‧ third signal line

140, 240‧‧‧ active components

150, 250‧‧‧ pixel electrodes

150', 250'‧‧‧ auxiliary electrode

160, 260‧‧‧ common electrode line

162, 262‧‧‧ common electrode

164, 264‧‧‧ common electrode connection line

214A‧‧‧Central Department

214B1, 214B2‧‧‧ end

C‧‧‧ channel layer

C1, C2‧‧‧ bend angle

D‧‧‧汲

D1, D2, D3‧‧‧ extension direction

F‧‧‧ distance

G‧‧‧ gate

H1~H5‧‧‧Contact window

I1, I2‧‧‧ insulation

J1, J2‧‧‧ Jumper Bridge Structure

R1, R2‧‧‧ area

S‧‧‧ source

X-X’, Y-Y’, Z-Z’‧‧‧ lines

1 is a top plan view of a pixel array substrate in accordance with an embodiment of the present invention. 2 is a schematic view of a region R1 of the pixel array substrate of FIG. 1. Fig. 3a is a schematic cross-sectional view taken along line X-X' of Fig. 2. Fig. 3b is a schematic cross-sectional view taken along line Y-Y' of Fig. 2. Figure 3c is a schematic cross-sectional view of the Z-Z' line of Figure 2. . 4 is a top plan view of a pixel array substrate in accordance with an embodiment of the present invention. FIG. 5 is a schematic view of a region R2 of the pixel array substrate of FIG. 4. Figure 6 is a schematic illustration of a partial region of a pixel array substrate.

Claims (10)

A pixel array substrate includes: a substrate; a plurality of first signal lines disposed on the substrate, wherein each of the first signal lines includes a jumper bridge structure, the jumper bridge structure includes a first line segment, a second line segment and a third line segment, the two ends of the second line segment are respectively connected to the first line segment and the third line segment, and the film layers of the first line segment and the third line segment are different from the second line segment a plurality of second signal lines are disposed on the substrate, the second signal lines are electrically connected to different first signal lines, wherein the second line segment is located between two adjacent second signal lines The first line segment and the third line segment intersect the two adjacent second signal lines; the plurality of third signal lines are disposed on the substrate, and the third signal lines intersect the second signal lines; And a plurality of active components disposed on the substrate, each of the active components being connected to one of the second signal lines and one of the third signal lines. The pixel array substrate of claim 1, wherein the first line segment and the third line segment have the same film layer as the third signal lines. The pixel array substrate of claim 1, wherein the film layer of the second line segment is the same as the film layer of the second signal lines. The pixel array substrate of claim 1, further comprising an insulating layer disposed between the first line segment and the film layer of the second line segment and the film layer of the second line segment, and the The two ends of the two line segments are respectively connected to the first line segment and the second line segment through a first contact window and a second contact window extending through the insulating layer. The pixel array substrate of claim 1, further comprising a plurality of pixel electrodes, wherein each of the active elements comprises a gate, a source/drain, and the gate and the source/drain The one is connected to one of the second signal lines, and the other is connected to one of the third signal lines, and each of the active elements is electrically connected to one of the pixel electrodes. The pixel array substrate of claim 5, wherein the one of the third signal lines and the one of the first signal lines are respectively located on opposite sides of the one of the pixel electrodes. The pixel array substrate of claim 6, wherein the second line segment of the one of the first signal lines comprises a central portion and two end portions at both ends of the central portion, and the central portion and the central portion thereof The distance of a third signal line is different from the distance between the two end portions and the one of the third signal lines. The pixel array substrate of claim 5, wherein the one of the third signal lines is located between one of the first signal lines and one of the pixel electrodes. The pixel array substrate of claim 1, wherein the film layer of the first line segment and the third line segment is located between the film layer of the second line segment and the substrate. The pixel array substrate of claim 1, wherein the first line segment, the second line segment and the third line segment have the same material.