TW201843927A - Predistorter for compensating linearity of amplifier - Google Patents

Abstract

The present invention discloses a predistorter for compensating linearity of a amplifier. The predistorter has a first capacitor and an impedance conversion circuit. A first end of the first capacitor is coupled to a first node of the amplifier. The impedance conversion circuit is configured to perform an impedance conversion to provide a variable capacitance. The impedance conversion circuit has a first bias input circuit and a bipolar junction transistor (BJT). The first bias input circuit is configured to receive a first input bias. A base of the BJT is coupled to an output end of the first bias input circuit and a second end of the first capacitor, a collector of the BJT is floating, and an emitter of the BJT is coupled to a second node of the amplifier.

Description

Pre-compensator for compensating the linearity of the amplifier

The present invention relates to a predistorter for compensating for linearity of an amplifier.

Linearity is a fundamental and important specification in a variety of different communication systems, whether transmitters or receivers. For the transmitter, the amplifier is an important and indispensable component, and the communication distance, communication quality and standby time are all inseparable from the amplifier.

Please refer to Figure 1 and Figure 2. 1 is a schematic diagram of an amplifier 100 in the prior art, and FIG. 2 is a diagram showing amplitude distortion (AM-AM Distortion) and phase distortion (AM-PM Distortion) of the amplifier 100. . The amplifier 100 is for amplifying the input signal Sin to generate an output signal Sout. The amplifier 100 includes a resistor Ra and a Bipolar Junction Transistor (BJT) T1. The emitter of the bipolar junction transistor T1 is coupled to the ground GND. The curve 101 in FIG. 2 is used to indicate the phase distortion of the amplifier 100, and the curve 102 is used to represent the amplitude distortion of the amplifier 100. The horizontal axis of the graph shown in Fig. 2 represents the output power Pout of the amplifier 100, and the vertical axis thereof represents the amplitude distortion and phase distortion of the amplifier 100, wherein the unit of amplitude distortion is "dB", and the unit of phase distortion is "degree". As can be seen from Fig. 2, the curve 101 is a notch upward curve, and the curve 102 is a notch downward curve, so the phase distortion of the amplifier 100 increases as the output power Pout increases, and the amplitude of the amplifier 100 The distortion decreases as the output power Pout increases. However, since the notches of the curves 101 and 102 are different in direction, it is difficult to improve the linearity of the amplifier 100.

An embodiment of the invention discloses a predistorter for compensating for linearity of an amplifier. The predistorter includes a first capacitor and an impedance conversion circuit. The first end of the first capacitor is coupled to the first node of the amplifier. An impedance conversion circuit is used to perform impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit and a bipolar junction transistor (BJT). The first bias input circuit is configured to receive the first bias voltage. The base of the bipolar junction transistor is coupled to the output end of the first bias input circuit and the second end of the first capacitor, and the collector of the bipolar junction transistor is floating, and the bipolar junction transistor is The emitter is coupled to the second node of the amplifier.

Another embodiment of the present invention discloses a predistorter for compensating for linearity of an amplifier. The predistorter includes a first capacitor and an impedance conversion circuit. The first end of the first capacitor is coupled to the first node of the amplifier. An impedance conversion circuit for performing impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit, a second bias input circuit, a first resistor, a second capacitor, and a field effect transistor. The first bias input circuit is configured to receive the first bias voltage. The second bias input circuit is configured to receive the second bias voltage. The gate of the field effect transistor is coupled to the output end of the first bias input circuit, and the first electrode of the source and the drain of the field effect transistor is coupled to the second end of the first capacitor and the first resistor The first end of the field effect transistor is coupled to the output end of the second bias input circuit, the first end of the second capacitor, and the second end of the first resistor, and The second end of the second capacitor is coupled to the second node of the amplifier.

Another embodiment of the present invention discloses a predistorter for compensating for linearity of an amplifier. The predistorter includes a first bias input circuit, a first capacitor, a second capacitor, and an impedance conversion circuit. The first bias input circuit is configured to receive the first bias voltage. The first end of the first capacitor is coupled to the output of the first stage circuit of the amplifier. The second end of the second capacitor is coupled to the input of the second stage circuit of the amplifier. An impedance conversion circuit is used to perform impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first resistor and a bipolar junction transistor. The second end of the first resistor is coupled to the reference potential. The base of the bipolar junction transistor is coupled to the output end of the first bias input circuit and the second end of the first capacitor, and the collector of the bipolar junction transistor is floating, and the bipolar junction transistor is The emitter is coupled to the first end of the first resistor and the first end of the second capacitor.

Another embodiment of the present invention discloses a predistorter for compensating for linearity of an amplifier. The predistorter includes a first bias input circuit, a second bias input circuit, a first capacitor, a second capacitor, and an impedance conversion circuit. The first bias input circuit is configured to receive the first bias voltage. The second bias input circuit is configured to receive the second bias voltage. The first end of the first capacitor is coupled to the output of the first stage circuit of the amplifier. The second end of the second capacitor is coupled to the input of the second stage circuit of the amplifier. An impedance conversion circuit is used to perform impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first resistor and a field effect transistor. The gate of the field effect transistor is coupled to the output end of the first bias input circuit, and the first electrode of the source and the drain of the field effect transistor is coupled to the output end of the second bias input circuit, first The second end of the capacitor and the first end of the first resistor, the source of the field effect transistor and the second electrode of the drain are coupled to the first end of the second capacitor and the second end of the first resistor.

Another embodiment of the present invention discloses a predistorter for compensating for linearity of an amplifier. The input signal is input to the amplifier via the signal amplification path and amplified by the amplifier. The predistorter is formed with a signal shunt path different from the signal amplification path. The predistorter includes a first capacitor and an impedance conversion circuit. The first capacitor is disposed on the signal shunt path, and the first end of the first capacitor is coupled to the first node of the amplifier. An impedance conversion circuit is used to perform impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit and a diode. The first bias input circuit is configured to input a first bias voltage. The diode is disposed on the signal shunt path, and the anode of the diode is coupled to the output end of the first bias input circuit and a second end of the first capacitor, and the cathode of the diode is coupled to the reference potential.

Another embodiment of the present invention discloses a predistorter for compensating for linearity of an amplifier. The predistorter includes a first capacitor and an impedance conversion circuit. The first end of the first capacitor is coupled to the output of the first stage circuit of the amplifier. An impedance conversion circuit is used to perform impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit and a diode. The first bias input circuit is configured to input a first bias voltage. The anode of the diode is coupled to the output end of the first bias input circuit and the second end of the first capacitor, and the cathode of the diode is coupled to the input end of the second stage circuit of the amplifier.

Please refer to FIG. 3, which is a schematic diagram of an amplifier 200 according to an embodiment of the present invention. The amplifier 200 can be a power amplifier, but the invention is not limited thereto. The amplifier 200 includes bi-carrier junction transistors T1 and T2, wherein the collector and emitter of the bipolar junction transistor T2 are coupled to each other such that the amplitude distortion and phase distortion of the amplifier 200 can follow the output of the amplifier 200. The power is simultaneously incremented or simultaneously decremented. Please refer to FIG. 3 and FIG. 4 at the same time. FIG. 4 is a diagram showing the relationship between the output power Pout of the amplifier 100 and the bias voltage VR of the collector of the bipolar junction transistor T2. Among them, when the output power Pout is incremented, the bias voltage VR will be decremented. However, when the bipolar junction transistor T2 is a heterojunction bipolar transistor (HBT) made of gallium arsenide (GaAs), the capacitance of the depletion region and the square root of the bias voltage VR In inverse proportion, the capacitance of the depletion region of the bipolar junction transistor T2 is less sensitive to the bias voltage VR and the impedance of the node B is lower. Therefore, the bipolar junction transistor T2 needs to have a sufficiently large volume so that the capacitance of the depletion region is not too small. However, increasing the volume of the bi-carrier junction transistor T2 may result in a lower gain and a smaller bandwidth of the amplifier 200.

Please refer to FIG. 5. FIG. 5 is a schematic diagram of a predistorter 300 for improving the linearity of the amplifier 250 according to an embodiment of the present invention. The amplifier 250 can be a power amplifier, but the invention is not limited thereto, and may be, for example, a low noise amplifier. In the present embodiment, the predistorter 300 and the amplifier 250 in Fig. 5 are represented by different means for convenience of explanation. However, it should be understood that the predistorter 300 can also be integrated into the amplifier 250 to become part of the amplifier 250. As shown, the predistorter 300 is coupled between the node N1 and the node N2, wherein the node N1 is an input terminal of the amplifier 250, and the node N2 is coupled to the reference potential Vref. In an embodiment of the invention, the reference potential Vref can be a ground potential, but the invention is not limited thereto. The amplifier 250 amplifies the input input signal Sin to produce an output signal Sout. The predistorter 300 is used to compensate for the linearity of the amplifier 250. The predistorter 300 compensates for the linearity of the amplifier 250 by compensating for amplitude distortion (AM-AM Distortion) and phase distortion (AM-PM Distortion) of the amplifier. Due to the action of the predistorter 300, the amplitude distortion and phase distortion of the amplifier 250 can be simultaneously increased or simultaneously decreased with the output power of the amplifier 250. In addition, the predistorter 300 can provide a variable capacitance value to adjust the linearity of the amplifier 250, and the variable capacitance value provided can avoid the amplifier 200 of FIG. 3 from being too large due to the depletion region capacitance. The problem of too low gain or too small bandwidth.

Please refer to FIG. 6. FIG. 6 is a circuit diagram of a pre-compensator 300 according to an embodiment of the present invention. The predistorter 300 is coupled between the node N1 and the node N2 and includes a capacitor C1 and an impedance conversion circuit 310. The node N1 is coupled to the base of the bipolar junction transistor T1, and the bipolar junction transistor T1 is the component of the amplifier 250 of FIG. The first end of the capacitor C1 is coupled to the first node N1 of the amplifier. The input signal Sin is input to the amplifier 250 via the signal amplification path L1 and then amplified to the output signal Sout, and the predistorter 300 is formed with a signal shunt path L2 different from the signal amplification path L1. Since the signal shunt path L2 of the predistorter 300 is different from the signal amplifying path L1, and the predistorter 300 isolates the DC signal by the capacitor C1 to reduce the influence on the signal amplifying path L1, the predistorter 300 can be in the pair. When the design of the original amplifier 250 has little influence, the linearity of the amplifier 250 is compensated. In addition, the impedance conversion circuit 310 is configured to perform impedance conversion to provide a variable capacitance value to the amplifier 250, thereby adjusting the linearity of the amplifier 250 by the variable capacitance value provided. The impedance conversion circuit 310 includes a bias input circuit 320 and a bipolar junction transistor (BJT) Q1. The bias input circuit 320 is configured to receive the bias voltage V1. Both the bipolar junction transistor Q1 and the capacitor C1 are disposed on the signal shunt path L2. The base of the bipolar junction transistor Q1 is coupled to the output end of the bias input circuit 320 and the second end of the capacitor C1. The collector of the bipolar junction transistor Q1 floats, and the bipolar junction is electrically connected. The emitter of the crystal Q1 is coupled to the node N2, and the node N2 is coupled to the reference potential Vref.

In another embodiment, the bipolar junction transistor Q1 can also be replaced with a diode. Please refer to FIG. 7. FIG. 7 is a circuit diagram of a predistorter 300' according to another embodiment of the present invention. The difference between the predistorters 300' and 300 is that the transistor Q1 of the predistorter 300 is replaced by the diode D1. The anode of the diode D1 corresponds to the base of the transistor Q1, and the cathode of the diode corresponds to the emitter of the transistor Q1. The diode D1 and the capacitor C1 are both disposed on the signal shunt path L2. The diode D1 occupies a larger layout area than the transistor Q1.

In one embodiment, the bias voltage V1 in FIGS. 6 and 7 is a constant voltage Vbias whose voltage value does not change with the input signal Sin or the input power of the amplifier 250. In an embodiment, the constant voltage Vbias may be selected from a plurality of voltages having a fixed voltage value. Please refer to FIG. 8. FIG. 8 is a diagram showing the relationship between the input power Pin of the amplifier 250 and the constant voltage Vbias. Among them, the constant voltage Vbias is selected from a plurality of voltages Vb1 to Vbn whose voltage values are fixed, and as can be seen from FIG. 7, the voltages Vb1 to Vbn do not change with the input power Pin of the amplifier 250. Due to the magnitude of the constant voltage Vbias (i.e., the bias voltage V1), the degree of linearity adjustment of the amplifier 250 can be affected. Therefore, by selecting an appropriate voltage from the voltages Vb1 to Vbn as the constant voltage Vbias, the linearity of the amplifier 250 can be fine-tuned to meet the design requirements of different amplifiers.

Please refer to Figure 6 again. In this embodiment, the bias voltage V1 is a positive voltage with a fixed voltage value, and since the collector of the bipolar junction transistor Q1 is floating, the bipolar junction transistor Q1 can be regarded as a forward biased. The diode has a clipping function. Please refer to FIG. 9 and FIG. 10, FIG. 9 is a waveform diagram of the input signal Sin, and FIG. 10 is a waveform diagram of the output signal Sout. For convenience of description, the input signal Sin is represented by a sine wave, but it should be noted that the present invention is not limited thereto, and the input signal Sin may be other radio frequency signals. Since the bipolar junction transistor Q1 has a chopping function, the peak of the output signal Sout does not exceed the upper limit VL1. Therefore, when the input signal Sin is a sine wave, the output signal Sout is not necessarily a sine wave. Since the bipolar junction transistor Q1 has a chopping function, the impedance Ron of the impedance conversion circuit 310 is affected. The variable capacitance value provided by the impedance conversion circuit 310 by performing impedance conversion is related to the impedance Ron. Please refer to FIG. 11 and FIG. 12, FIG. 11 is a diagram showing the relationship between the voltage VA in FIG. 6 and the output power Pout of the amplifier 250, and FIG. 12 is the impedance Ron of the impedance conversion circuit 310 and the output power of the amplifier 250. Diagram of Pout. Among them, as the output power Pout of the amplifier 250 increases, the voltage VA will decrease, and the impedance Ron will increase. Since the predistorter 300 has the above characteristics, the predistorter 300 is suitable for improving the problem of its amplitude distortion (AM-AM Distortion) while improving the linearity of the amplifier.

Referring again to FIG. 6, in another embodiment of the present invention, the bias input circuit 320 can include a resistor R2. The first end of the resistor R2 is used to input the bias voltage V1, and the second end of the resistor R2 is coupled to the output end of the bias input circuit 320. Resistor R2 has a fixed resistance, and the resistance of resistor R2 can be determined according to different amplifier design requirements. When the resistor R2 with a larger resistance value is selected, the impedance Ron is relatively larger; and when the resistor R2 having a smaller resistance value is selected, the impedance Ron is relatively smaller.

In some embodiments of the present invention, the bipolar junction transistor Q1 may be a heterojunction bipolar transistor (HBT). In other embodiments of the invention, the bipolar junction transistor Q1 may be a homojunction bipolar transistor.

Please refer to FIG. 13, which is a circuit diagram of a pre-compensator 400 according to an embodiment of the present invention. The predistorter 400 is also coupled between the node N1 and the node N2, and includes a capacitor C1 and an impedance conversion circuit 410. The first end of the capacitor C1 is coupled to the node N1. The impedance conversion circuit 410 is operative to perform impedance conversion to provide a variable capacitance value. The impedance conversion circuit 410 includes a bias input circuit 420, a bias input circuit 430, a resistor R1, a capacitor C2, and a field effect transistor M1. The bias input circuit 420 is used to input the bias voltage V1, and the bias input circuit 430 is used to input the bias voltage V2. The gate of the field effect transistor M1 is coupled to the output end of the bias input circuit 420. One of the source and the drain of the field effect transistor M1 is coupled to the second end of the capacitor C1 and the second resistor R1. At one end, the other of the source and the drain of the field effect transistor M1 is coupled to the output terminal of the bias input circuit 430, the first end of the capacitor C2, and the second end of the resistor R1, and the capacitor C2 The two ends are coupled to the node N2 of the amplifier, and the node N2 is coupled to the reference potential Vref.

In the present embodiment, the bias voltage V1 is a constant voltage Vbias whose voltage value does not change with the input signal Sin or the input power of the amplifier, and the bias voltage V2 is a voltage value thereof which is input with the input signal Sin or the amplifier. The voltage Vdet that changes in power. Please refer to Figure 14, Figure 14 is a diagram showing the relationship between the input power Pin of the amplifier and the voltage Vdet. When the input power Pin of the amplifier is larger, the voltage Vdet is also larger. The impedance conversion circuit 410 can also be regarded as a diode that is biased in the forward direction and has a function of clipping. The relationship between the voltage VA of the predistorter 400 and the output power Pout of the amplifier is also shown in FIG. 11, and the relationship between the impedance Ron of the predistorter 400 and the output power Pout of the amplifier is also shown in FIG. This is not repeated here. The variable capacitance value provided by the impedance conversion circuit 410 by performing impedance conversion is related to the impedance Ron.

The voltage Vdet described above can be generated by the bias dynamic adjustment circuit 500 of the predistorter 400. Please refer to FIG. 15. FIG. 15 is a circuit diagram of a bias dynamic adjustment circuit 500 according to an embodiment of the present invention. The bias dynamic adjustment circuit 500 is coupled to the input end of the amplifier (such as the node N1) for dynamically adjusting the magnitude of the voltage Vdet according to the input power of the amplifier. The input terminal 531 of the bias dynamic adjustment circuit 500 can be used to receive the input signal Sin, while the output 532 of the bias dynamic adjustment circuit 500 outputs the voltage Vdet. The bias dynamic adjustment circuit 500 includes a resistor-capacitor circuit 510, a transistor T, a resistor-capacitor circuit 520, and an operational amplifier OP1. The input end of the RC circuit 510 is coupled to the input terminal N1 of the amplifier. The transistor T can be a bipolar junction transistor. The collector (first end) of the bipolar junction transistor T is coupled to the system voltage Vbat, and the base (control terminal) of the bipolar junction transistor T is coupled to the output of the resistor-capacitor circuit 510, and the bipolar The emitter (second end) of the junction transistor T is coupled to the input of the RC circuit 520. The above system voltage Vbat is, for example, the output voltage of the battery, and the system voltage Vbat is usually higher than the reference potential Vref. The RC circuit 520 is coupled between the reference potential Vref and the emitter of the bipolar junction transistor T. The positive input terminal of the operational amplifier OP1 is coupled to the emitter of the bipolar junction transistor T. The negative input terminal of the operational amplifier OP1 is coupled to the output terminal of the operational amplifier OP1, and the output terminal of the operational amplifier OP1 outputs the voltage Vdet.

Referring again to FIG. 13, in an embodiment of the invention, bias input circuit 420 includes resistor R2 and bias input circuit 430 includes resistor R3. The first end of the resistor R2 is input to the bias voltage V1, and the second end of the resistor R2 is coupled to the output end of the bias input circuit 420. The first end of the resistor R3 is input with a bias voltage V2, and the second end of the resistor R3 is coupled to the output end of the bias input circuit 430.

Please refer to Fig. 16, which is an equivalent circuit diagram of the predistorter 300, 300' or 400 in Fig. 6, Fig. 7, or Fig. 13. Taking the predistorter 400 of FIG. 13 as an example, the predistorter 400 can be considered to be in parallel with the input stage circuit and the output stage circuit of the amplifier. The input stage circuit of the amplifier has an impedance IM1, and the output stage circuit of the amplifier has an impedance IM2. The predistorter 400 includes a capacitor C1 and an impedance conversion circuit 410. The impedance conversion circuit 410 is used to perform impedance conversion to provide a variable resistance R. Among them, the impedance Z is an intermediate stage matching impedance (interstage matching), which can be an inductor or a capacitor. A capacitor C2 exists between the emitter of the bipolar junction transistor Q1 and the reference potential Vref. The equivalent circuit diagrams of the predistorters 300 and 300' of Figs. 6 and 7 are similar to those of Fig. 16. In detail, after the capacitor C2 in FIG. 16 is removed, one end of the variable resistor R is directly coupled to the reference potential Vref, which is the pre-compensators 300 and 300' of FIGS. 6 and 7. Equivalent circuit diagram.

Compared with the above-mentioned impedance Ron, as the output power Pout increases, the impedance Ron of the predistorter according to another embodiment of the present invention decreases as the output power Pout increases. Please refer to Figure 6 again. When the bias voltage V1 in Fig. 6 is changed to the voltage Vdet whose voltage value changes with the input signal Sin or the input power of the amplifier, the impedance Ron decreases as the output power Pout increases. Please refer to Figure 17 and Figure 18. Fig. 17 is a graph showing the relationship between the voltage VA in Fig. 6 and the output power Pout of the amplifier when the bias voltage V1 is the voltage Vdet. Fig. 18 is a graph showing the relationship between the impedance Ron of the impedance converting circuit 310 and the output power Pout of the amplifier when the bias voltage V1 is the voltage Vdet. Among them, as the output power Pout of the amplifier 250 increases, the voltage VA will increase, and the impedance Ron will decrease. Therefore, the impedance characteristic of the predistorter 300 can be changed by setting the bias voltage V1 to the constant voltage Vbias or the voltage Vdet to adjust and compensate the linearity of the amplifier in different directions.

Similarly, when the bias voltage V1 of the predistorter 400 in FIG. 13 is the voltage Vdet and the bias voltage V2 is the constant voltage Vbias, the voltage VA of the predistorter 400 will follow the output power Pout of the amplifier 250. The increase and increase, and the impedance Ron of the predistorter 400 decreases as the output power Pout of the amplifier 250 increases. The impedance characteristic of the predistorter 400 can be changed by setting the bias voltage V1 to one of the constant voltage Vbias and the voltage Vdet and setting the bias voltage V2 to the other of the constant voltage Vbias and the voltage Vdet. The linearity of the amplifier is adjusted and compensated in different directions. Since the predistorter 400 has the above characteristics, when the bias voltage V1 is the constant voltage Vbias and the bias voltage V2 is the voltage Vdet (or when the bias voltage V1 is the voltage Vdet and the bias voltage V2 is the constant voltage Vbias), the front is placed. The compensator 400 is suitable for improving the problem of its amplitude distortion (AM-AM Distortion) while improving the linearity of the amplifier.

In order to facilitate switching between the constant voltage Vbias and the voltage Vdet, the pre-compensator 300 or 400 described above may further include a selection circuit 550. Please refer to FIG. 19 and FIG. 20, FIG. 19 is a schematic diagram of the selection circuit 550, and FIG. 20 is a schematic diagram of the pre-compensator 400 of FIG. 13 further including a bias dynamic adjustment circuit 500 and a selection circuit 550. The selection circuit 550 includes a first input terminal IN1, a second input terminal IN2, a first output terminal O1, a second output terminal O2, and a control terminal P1. The first input terminal IN1 is for receiving the constant voltage Vbias, the second input terminal IN2 is for receiving the voltage Vdet, the first output terminal O1 is coupled to the input end of the bias input circuit 420 to provide the bias voltage V1, and the second output terminal O2 The input terminal of the bias input circuit 430 is coupled to provide a bias voltage V2, and the control terminal P1 is configured to receive the selection control signal Sc. The selection circuit 550 couples the first input terminal IN1 to the first output terminal O1 and the second input terminal IN2 to the second output terminal when the control signal Sc is selected to be the first potential (eg, high potential). When the control signal Sc is selected to be the second potential (eg, low potential), the selection circuit 550 couples the first input terminal IN1 to the second output terminal O2, and couples the second input terminal IN2 to the first output. End O1. Thereby, the bias voltage V1 is determined to be a constant voltage Vbias or a voltage Vdet. When the bias voltage V1 is the constant voltage Vbias, the bias voltage V2 is the voltage Vdet; and when the bias voltage V1 is the voltage Vdet, the bias voltage V2 is the constant voltage Vbias. Therefore, by selecting the circuit 550, it is more convenient to switch between the constant voltage Vbias and the voltage Vdet.

The predistorters 300 and 400 in the above embodiments are disposed between the nodes N1 and N2 of the amplifier, wherein the node N1 can be the input of the amplifier, and the node N2 can be the reference potential Vref, as shown in FIG. However, the invention is not limited thereto. Please refer to FIG. 21 and FIG. 22, which are respectively used to illustrate different setting positions of the predistorter 300 and 400 of the present invention in the amplifier. In the embodiment of Fig. 21, the node N1 is one end of the bias circuit 582 of the amplifier 580, and the node N2 is coupled to the reference potential Vref. In the embodiment of FIG. 22, the node N1 is coupled to the output of the first stage circuit 630 of the amplifier 570, and the node N2 is coupled to the input of the second stage circuit 640 of the amplifier 570. The first stage circuit 630 and the second stage circuit 640 are used to perform two amplifications on the input signal Sin to output an output signal Sout.

Please refer to FIG. 23. FIG. 23 is a circuit diagram of the predistorter 600 according to an embodiment of the present invention. The predistorter 600 is coupled between the first stage circuit 630 and the second stage circuit 640 of the amplifier. The first stage circuit 630 and the second stage circuit 640 have impedances IM1 and IM2, respectively. The predistorter 600 includes a bias input circuit 620, a capacitor C1, a capacitor C2, and an impedance conversion circuit 610. The bias input circuit 620 is used to input a constant voltage Vbias. The first end of the capacitor C1 is coupled to the output of the first stage circuit 630 of the amplifier, and the second end of the capacitor C2 is coupled to the input of the second stage circuit 640 of the amplifier. The impedance conversion circuit 610 is configured to perform impedance conversion to provide a variable capacitance value Con, and may simultaneously provide a variable resistance R. The impedance conversion circuit 610 includes a resistor R1 and a bipolar junction transistor Q1. The second end of the resistor R1 is coupled to the reference potential Vref. The base of the bipolar junction transistor Q1 is coupled to the output end of the first bias input circuit 620 and the second end of the capacitor C1. The bipolar junction transistor Q1 The collector of the bipolar junction transistor Q1 is coupled to the first end of the resistor R1 and the first end of the capacitor C2. In this embodiment, the constant voltage Vbias is a positive voltage with a fixed voltage value, and since the collector of the bipolar junction transistor Q1 is floating, the bipolar junction transistor Q1 can be regarded as a forward biased. The diode has a chopping function. The linear compensation of the predistorter 600 is similar to the linear compensation of the predistorter 300, and can also be used to adjust the intermediate stage matching impedance for better linearity.

In another embodiment, the bipolar junction transistor Q1 of FIG. 23 can also be replaced with a diode. Please refer to Fig. 24, which is a circuit diagram of a predistorter 600' according to another embodiment of the present invention. The difference between the predistorters 600' and 600 is that the transistor Q1 of the predistorter 600 is replaced by the diode D1. The anode of the diode D1 corresponds to the base of the transistor Q1, and the cathode of the diode corresponds to the emitter of the transistor Q1. Compared with the transistor Q1 in Fig. 23, the diode D1 in Fig. 24 takes up a large layout area.

Please refer to FIG. 25. FIG. 25 is a circuit diagram of a pre-compensator 700 according to an embodiment of the present invention. The predistorter 700 is coupled between the first stage circuit 630 and the second stage circuit 640 of the amplifier. The first stage circuit 630 and the second stage circuit 640 have impedances IM1 and IM2, respectively. The predistorter 700 includes a bias input circuit 720, a bias input circuit 730, a capacitor C1, a capacitor C2, and an impedance conversion circuit 710. The bias input circuit 720 is used to input the bias voltage V1, and the bias input circuit 730 is used to input the bias voltage V2. The bias voltages V1 and V2 may be a constant voltage Vbias and a voltage Vdet, respectively. Wherein, when the bias voltage V1 is the constant voltage Vbias, the bias voltage V2 is the voltage Vdet; and when the bias voltage V1 is the voltage Vdet, the bias voltage V2 is the constant voltage Vbias. The first end of the capacitor C1 is coupled to the output end of the first stage circuit 630, and the second end of the capacitor C2 is coupled to the input end of the second stage circuit 640. The impedance conversion circuit 710 is used to perform impedance conversion to provide a variable capacitance value Con, and at the same time, a variable resistance R can be provided. The impedance conversion circuit 710 includes a resistor R1 and a field effect transistor M1. The gate of the field effect transistor M1 is coupled to the output end of the bias input circuit 720, and one of the source and the drain of the field effect transistor M2 is coupled to the output terminal of the bias input circuit 730 and the capacitor C1. The second end is opposite to the first end of the resistor R1, and the other of the source and the drain of the field effect transistor M2 is coupled to the first end of the capacitor C2 and the second end of the resistor R1. The linear compensation characteristic of the predistorter 700 is similar to the linear compensation characteristic of the predistorter 400. When the bias voltage V1 is the constant voltage Vbias and the bias voltage V2 is the voltage Vdet (or when the bias voltage V1 is the voltage Vdet and the bias voltage V2) For a constant voltage Vbias, the predistorter 700 is suitable for improving the problem of amplitude distortion while improving the linearity of the amplifier.

Please refer to Fig. 26, which is an equivalent circuit diagram of the predistorter 600, 600' or 700 in Fig. 23, Fig. 24 or Fig. 25. Taking the predistorter 600 of FIG. 23 as an example, the first stage circuit 630 and the second stage circuit 640 have impedances IM1 and IM2, respectively. The predistorter 600 is coupled between the first stage circuit 630 and the second stage circuit 640 of the amplifier, and includes a bias input circuit 620, a capacitor C1, a capacitor C2, and an impedance conversion circuit 610. The impedance conversion circuit 610 is configured to perform impedance conversion to provide a variable resistance R. Among them, the impedance Z is an intermediate stage matching impedance (interstage matching), which can be an inductor or a capacitor. Similarly, the equivalent circuit diagrams of the predistorters 600' and 700 of Figs. 24 and 25 are also as shown in Fig. 26.

The pre-compensator of the embodiment of the invention can compensate the linearity of the amplifier. The pre-compensator has an impedance conversion circuit for performing impedance conversion to provide a variable capacitance value, and can avoid the amplifier being too large, the gain is too low, or The bandwidth is too small. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100, 200, 250, 570, 580‧ ‧ amplifiers

101, 102‧‧‧ Curve

300, 300', 400, 600, 600', 700‧‧‧ pre-compensator

310, 410, 610, 710‧‧‧ impedance conversion circuit

320, 420, 430, 620, 720, 730 ‧ ‧ bias input circuit

500‧‧‧ bias dynamic adjustment circuit

510, 520‧‧‧resistive capacitor circuit

531‧‧‧ input

532‧‧‧output

550‧‧‧Selection circuit

582‧‧‧Bias circuit

630‧‧‧First stage circuit

640‧‧‧second level circuit

B, N1, N2‧‧‧ nodes

C1, C2‧‧‧ capacitor

Con‧‧‧Variable Capacitance Value

GND‧‧‧ ground terminal

L1‧‧‧ signal amplification path

L2‧‧‧ signal shunt path

IM1, IM2, Ron, Z‧‧‧ impedance

IN1‧‧‧ first input

IN2‧‧‧ second input

M1‧‧‧ field effect transistor

N3‧‧‧ Collector

O1‧‧‧ first output

O2‧‧‧ second output

OP1‧‧‧Operational Amplifier

P1‧‧‧ control terminal

Pin‧‧‧ input power

Pout‧‧‧ Output power

Q1, T, T1, T2‧‧‧ bipolar junction transistors

R‧‧‧Variable resistor

R1, R2, R3, Ra‧‧‧ resistance

Sc‧‧‧Select control signal

Sin‧‧‧ input signal

Sout‧‧‧ output signal

T‧‧‧O crystal; bipolar junction transistor

V1, V2, VR‧‧‧ bias

VA, Vb1 to Vbn, Vdet‧‧‧ voltage

Vbat‧‧‧ system voltage

Vbias‧‧‧ Constant voltage

VL1‧‧‧ upper limit

Vref‧‧‧ reference potential

Figure 1 is a schematic diagram of an amplifier in the prior art. Figure 2 is used to show the amplitude distortion and phase distortion of the amplifier. Fig. 3 is a schematic diagram of an amplifier according to an embodiment of the present invention. Fig. 4 is a graph showing the relationship between the output power of the amplifier of Fig. 3 and the bias voltage of the collector of the bipolar junction transistor. Fig. 5 is a schematic diagram of a predistorter for improving the linearity of an amplifier according to an embodiment of the present invention. Figure 6 is a circuit diagram of a pre-compensator according to an embodiment of the present invention. Figure 7 is a circuit diagram of a pre-compensator according to another embodiment of the present invention. Figure 8 is a plot of the input power of the amplifier versus the constant voltage Vbias. Fig. 9 is a waveform diagram of the input signal Sin of Fig. 6. Fig. 10 is a waveform diagram of the output signal Sout of Fig. 6. Figure 11 is a graph showing the relationship between the voltage VA in Fig. 6 and the output power of the amplifier. Figure 12 is a graph showing the relationship between the impedance Ron of the impedance conversion circuit and the output power of the amplifier. Figure 13 is a circuit diagram of a pre-compensator according to an embodiment of the present invention. Figure 14 is a plot of the input power of the amplifier versus the voltage Vdet. Fig. 15 is a circuit diagram of a bias dynamic adjustment circuit according to an embodiment of the present invention. Fig. 16 is an equivalent circuit diagram of the predistorter in Fig. 6, Fig. 7, or Fig. 13. Fig. 17 is a graph showing the relationship between the voltage VA in Fig. 6 and the output power of the amplifier when the bias voltage V1 is the voltage Vdet. Figure 18 is a graph showing the relationship between the impedance Ron in Fig. 6 and the output power of the amplifier when the bias voltage V1 is the voltage Vdet. Figure 19 is a schematic diagram of a selection circuit in accordance with an embodiment of the present invention. Fig. 20 is a view showing the predistorter of Fig. 13 further including a bias dynamic adjustment circuit and a selection circuit. 21 and 22 are respectively used to illustrate different positions of the predistorter of the present invention in the amplifier. Figure 23 is a circuit diagram of a pre-compensator according to an embodiment of the present invention. Figure 24 is a circuit diagram of a pre-compensator according to another embodiment of the present invention. Figure 25 is a circuit diagram of a pre-compensator according to an embodiment of the present invention. Figure 26 is an equivalent circuit diagram of the predistorter in Fig. 23, Fig. 24 or Fig. 25.

Claims (13)

A pre-compensator for compensating the linearity of an amplifier, the pre-compensator comprising: a first capacitor, a first end of the first capacitor coupled to a first node of the amplifier; An impedance conversion circuit for performing impedance conversion to provide a variable capacitance value, the impedance conversion circuit comprising: a first bias input circuit for inputting a first bias voltage; and a second bias input circuit for Inputting a second bias voltage; a first resistor; a second capacitor; and a field effect transistor; wherein a gate of the field effect transistor is coupled to an output end of the first bias input circuit, the field A first electrode of the source and a first electrode of the first transistor are coupled to a second end of the first capacitor and a first end of the first resistor, a source of the field effect transistor and a second electrode of the first capacitor is coupled to the output end of the second bias input circuit, a first end of the second capacitor, and a second end of the first resistor, and one of the second capacitors The second end is coupled to a second node of the amplifier. The pre-compensator according to claim 1, wherein the first node is an input of the amplifier, and the second node is coupled to a reference potential. The pre-compensator according to claim 1, wherein the first node is one end of a bias circuit of the amplifier, and the second node is coupled to a reference potential. The pre-compensator of claim 1, wherein the first node is coupled to an output of a first-stage circuit of the amplifier, and the second node is coupled to an input of a second-stage circuit of the amplifier . The pre-compensator according to claim 1, wherein one of the first bias voltage and the second bias voltage is a constant voltage, and the other of the first bias voltage and the second bias voltage The voltage value changes with the input power of the amplifier. The pre-compensator according to claim 1, further comprising: a selection circuit, comprising: a first input terminal for receiving a first voltage; and a second input terminal for receiving a second voltage; a first output end coupled to the input end of the first bias input circuit to provide the first bias voltage; a second output end coupled to the input end of the second bias input circuit to provide the a second bias voltage; and a control terminal for receiving a selection control signal; wherein the first voltage is a constant voltage, and the voltage value of the second voltage changes with an input power of the amplifier; wherein when the selection When the control signal is a first potential, the selection circuit couples the first input end to the first output end, and the second input end is coupled to the second output end; and when the selection control signal is selected When the second potential is a second potential, the selection circuit couples the first input end to the second output end, and couples the second input end to the first output end. The compensator according to claim 6 further includes a bias dynamic adjustment circuit coupled to the input end of the amplifier for dynamically adjusting the second voltage according to an input power of the amplifier. The pre-compensator according to claim 7, wherein the bias dynamic adjustment circuit comprises: a first resistor-capacitor circuit, an input end of the first resistor-capacitor circuit is coupled to an input end of the amplifier; a transistor, The first end of the transistor is coupled to a system voltage, and the control end of the transistor is coupled to the output end of the first resistor-capacitor circuit; a second resistor-capacitor circuit coupled to a reference potential and the Between the second ends of the crystals; and an operational amplifier, a first input end of the operational amplifier is coupled to the second end of the transistor, and a second input end of the operational amplifier is coupled to the operational amplifier An output terminal of the operational amplifier outputs the second voltage. A predistorter for compensating for linearity of an amplifier, the predistorter comprising: a first bias input circuit for inputting a first bias voltage; a first capacitor, the first capacitor a first end is coupled to the output of a first stage circuit of the amplifier; a second capacitor, a second end of the second capacitor is coupled to an input of a second stage circuit of the amplifier; An impedance conversion circuit for performing impedance conversion to provide a variable capacitance value, the impedance conversion circuit comprising: a first resistor, a second end of the first resistor coupled to a reference potential; and a bipolar junction a transistor, a base of the bipolar junction transistor is coupled to an output end of the first bias input circuit and a second end of the first capacitor, and an epipolar floating of the bipolar junction transistor An emitter of the bipolar junction transistor is coupled to a first end of the first resistor and a first end of the second capacitor. A predistorter for compensating linearity of an amplifier, the predistorter comprising: a first bias input circuit for inputting a first bias voltage; and a second bias input circuit for a first capacitor is coupled to a first capacitor of the first stage of the amplifier; a second capacitor, a second capacitor The end is coupled to the input end of a second stage circuit of the amplifier; and an impedance conversion circuit for performing impedance conversion to provide a variable capacitance value, the impedance conversion circuit comprising: a first resistor; a gate of the field effect transistor is coupled to the output end of the first bias input circuit, and a source of the field effect transistor and a first electrode of a drain are coupled to the first electrode An output end of the two bias input circuit, a second end of the first capacitor, and a first end of the first resistor, a source of the field effect transistor and a second electrode of a drain a first end of the second capacitor and a second end of the first resistor A pre-compensator for compensating for linearity of an amplifier, the pre-compensator comprising: a first capacitor, a first end of the first capacitor coupled to a first-stage circuit of the amplifier And an impedance conversion circuit for performing impedance conversion to provide a variable capacitance value, the impedance conversion circuit comprising: a first bias input circuit for inputting a first bias voltage; and a diode An anode of the diode is coupled to an output end of the first bias input circuit and a second end of the first capacitor, and a cathode of the diode is coupled to a second stage of the amplifier The input of the circuit. The pre-compensator according to any one of claims 1 to 11, wherein the first bias input circuit comprises a second resistor, and a first end of the second resistor inputs the first bias, the first A second end of the two resistors is coupled to the output end of the first bias input circuit. The pre-compensator according to claim 1 or 10, wherein the first bias input circuit comprises a second resistor, and the second bias input circuit comprises a third resistor; wherein the second resistor The first end of the second resistor is coupled to the output end of the first bias input circuit; and wherein a first end of the third resistor inputs the second bias, A second end of the third resistor is coupled to the output end of the second bias input circuit.