TW201839862A - Method to manufacture a substrate with a boron-doped surface - Google Patents

Abstract

Method to produce a substrate (W) with at least one, at least in subareas boron-doped surface comprising the following steps: - providing a substrate (W) which has been placed in a preparative step in a vacuum treatment system (I, II) and has been treated there by a PVD-process with a boron-containing first layer (1), - annealing the substrate to diffuse boron into the surface.

Description

 Method of manufacturing a substrate having a boron doped surface  

The present application refers to a method for manufacturing a substrate having a boron-doped surface according to the first aspect of the invention, a wafer according to the technical schemes 8 and 22, a sputtering process for depositing a boron-containing layer on the substrate according to the technical scheme 10, and a technique according to the technique Scheme 29 implements a vacuum processing system for the sputtering process.

Tantalum substrates can be fabricated for a variety of applications, such as in the form of wafers or thin film solar cells or tantalum substrates for other electronic components. Thus in at least one or the entire region of at least one surface of the tantalum substrate, regions or sub-regions are created which, for introduced doping elements and/or dopant concentrations, are different from adjacent regions or away from the surface Area. Thereby, a dopant such as phosphorus can be used to set a free negative charge, that is, an electron (n-type dopant). Alternatively, a dopant such as boron can be introduced to set a free positive charge, i.e., a hole (p-type dopant). By the potential associated with it, different functions can be implemented in the substrate according to each configuration. For example, solar cells often have a pre-doped (e.g., lightly p-doped) germanium substrate with a surface at its front side with an introduced n-doped n ⁺ region. Additional p-doped p ⁺ regions are foreseen on the opposite side.

The doped regions can be created, for example, by applying a bismuth pentoxide containing cerium oxide solution by spin coating (spin coating or spin processing), wherein each solution is applied to the center of the wafer surface and in subsequent rotations spread. The substrate is then dried by increasing the rotational speed and/or heating. This procedure is repeated for the opposite side of the cerium oxide solution having a complementary substance such as boron oxide, and then the double coated wafer can be annealed at, for example, 1010 ° C to form a diffusion region on both sides of the wafer. The production of solar cells by the above procedure is disclosed in WO 2011/061693 A2 and WO 2011/061694 A2. It should be noted that in each case, each solution must not be contaminated with a portion of the surface relative to the surface.

Each of the rotation procedures requires a plurality of process steps, and selection and control of parameters such as the concentration ratio in the solution, the rotational speed, and the resulting layer thickness are critical.

Accordingly, it is an object of the present method to provide a preferred repeatable method for fabricating a flat boron coated surface (essentially a two dimensional semiconductor substrate). In addition, multiple process steps should be reduced and hazardous chemicals should be avoided as much as possible, especially under ambient gas conditions.

The method of fabricating a boron doped surface at least in a sub-region includes the steps of providing a substrate that has been placed in a vacuum processing system in a preparation step and having been subjected to a vacuum processing system The PVD process or a paCVD process has a boron-containing first layer and the substrate is annealed to diffuse boron into the surface.

The substrate provided herein may include the steps of: introducing the substrate into a vacuum processing system and evacuating the vacuum processing system, configuring the substrate in a coating chamber of the vacuum processing system, and in the vacuum processing system A coating chamber is coated with a first layer containing boron by a PVD process or a paCVD process.

Annealing is performed in an annealing chamber of the vacuum processing system or in an annealing furnace outside the vacuum processing system.

A second coating comprising tantalum is applied between the coating and annealing in the vacuum processing system by a PVD or a paCVD process in a coating chamber.

Thereby, the substrate can be a wafer, in particular a germanium wafer, which is coated on a first surface, wherein a second surface opposite the first surface is protected from being in the first and/or The second coating is applied during deposition. This protection can be performed by a known device in a holding device of the vacuum system or, for example, by placing the surface of the substrate that should not be coated down on a fixture such as a coating system.

Thereby, in principle a phosphorous-containing third coating can be pre-coated on the second surface of the wafer or alternatively before annealing. In principle, the precoating is preferred, for example, the wafer can be annealed directly in the vacuum processing system. As a method of depositing the first and/or second layer, a PVD process can be employed, so that a sputtering process, especially a magnetron sputtering process, is preferably employed.

The present invention comprises a wafer, each having a boron-doped surface solar cell, and secondarily produced by the above method. In particular, a so-called double-sided solar cell can be produced which can receive light from the front side and the rear side, for example for generating an electric current.

The sputtering process is particularly suitable for producing a first boron-containing layer or boron-containing layer system on a flat semiconductor substrate, wherein the substrate is configured to oppose the boron-containing target, whereby the target comprises a covalent boron compound by A high frequency voltage is applied in an ambient gas containing at least one inert gas and/or a nitrogen-containing ambient gas to be sputtered. Covalent refers herein to a compound of boron and another element whereby the electronegativity difference between the boron and the second element of the compound is determined according to Pauling's law. 1.1, especially 1. The target is composed of a boron compound to be sputtered such as boron nitride (BN), preferably 99.0%, and particularly preferably 99.9%.

The boron nitride layer can be deposited by this sputtering process whereby the B/N ratio of the boron nitride layer is controlled using a nitrogen containing gas, particularly nitrogen. The BO _x N _y layer is deposited separately or additionally by sputtering the boron-containing target in an oxygen-containing ambient gas. The sputtering ambient gas for depositing the BO _x N _y layer preferably includes at least oxygen and an inert gas. Thereby forming a boron-containing layer system by a sputtering process, first depositing a BN coating by sputtering the boron-containing target in an ambient gas containing at least one inert gas and/or nitrogen, followed by The boron-containing target is sputtered in an oxygen ambient gas to deposit a BO _x N _y layer, which is additionally added with additional nitrogen, whereby the latter step preferably uses an inert gas in addition to oxygen. The inert gas can be helium, especially argon. Additional doses of nitrogen such as N ₂ gas or N _x O _y gas (e.g., N ₂ O, NO or NO ₂ ) may also be applied during this process step to control the graded N/O ratio. The target used herein may comprise or consist in particular of boron nitride. An alternative compound with minor differences in terms of electronegativity is boron carbide (BC). The thickness of the layer which is adjusted independently of the process is between 0.5 nm and 6 nm, in particular between 1 nm and 6 nm, whereby it is also between 2 nm and 5 nm, in particular between 1 nm and 2 nm, for example for photovoltaic cell applications. For this purpose, the sputtering process is most suitable because the structure of the coated surface is highly reproducible and has a small number of defects. The sheet resistance after annealing can also be defined by controlling the thickness of individual layers. Thereby, after annealing the thus coated wafer, the sheet resistance of the individual solar cells can be adjusted to be between 30 Ω and 100 Ω, which is measured by a four-point probe resistance measurement method.

In addition to the boron-containing layer (ie, the first boron-containing layer system), a second germanium-containing layer (ie, a second germanium-containing layer system) may be deposited, wherein the substrate is configured to be in a coating chamber of the coating processing system The germanium-containing target is opposed to thereby sputtering the target in an ambient gas comprising at least an inert gas and/or a reactive gas. In addition to the above reactive gases, nitrogen and/or oxygen can be used in particular. Thereby, a layer of cerium, lanthanum nitride, cerium oxide and/or cerium oxynitride can be deposited. It is preferred to deposit a tantalum nitride layer, especially a tantalum oxide layer. With the target material, tantalum, niobium nitride or tantalum oxide can be sputtered. The layer thickness of the second layer system can be adjusted to be between 10 and 20 nm. During the sputtering process for different target materials, such as 300mm diameter targets, the power of the adjustable operating target is between 0.1 and 10 KW, preferably between 2 and 4 KW, which can be reduced for other target sizes. The power per unit area. Here, the target is operated at a frequency between 2 and 30 MHz and including an endpoint value, preferably between 10 and 15 MHz, and an endpoint value, preferably at a frequency of 13,56 MHz. This process can achieve a production accuracy of 1/10 nm layer thickness. The thickness of the layer can be adjusted by sputtering time, and the sputtering time can be adjusted to be, for example, by a planar circular target having the above-described geometry, especially a magnetron target, with a sputtering power of 2 to 4 KW. 0.5 to 4 s.

The invention also includes a wafer having a layer system deposited on a first side of the wafer, the wafer comprising at least one boron-containing material deposited directly on the first surface and provided by the process described above and in the examples exemplified below level one. The first coating may be a boron carbide (BC) layer, but is preferably a boron nitride (BN) layer and/or a boron oxide (BO _x N _y ) layer. In a preferred embodiment, the first layer system is a BN layer, each consisting of a BN layer having a BO _x N _y layer deposited thereon. The layer transition in the first layer system, and the layer transition between the BN and BO _x N _y layers, can be implemented in a stepwise or better gradual manner.

In another embodiment of the invention, the layer system deposited on the wafer includes a second layer containing germanium deposited on the outside of the first layer opposite the wafer. The second layer may be a tantalum layer, but is preferably a tantalum oxide layer or a tantalum nitride layer. Alternatively, a mixed layer of a graded layer may be used, for example, from a nitrogen-containing region adjacent to the first boron-containing layer to The designed oxygen-containing zone at the surface has a layer of oxynitride containing nitrogen oxides between them. Thus, the second layer can also be a plurality of layers having at least one tantalum layer and/or tantalum oxide layer and/or tantalum nitride layer, whereby the layer transition can be in a continuous gradual or stepwise manner due to elemental composition. The wafer can be designed as a solar cell, especially a double-sided solar cell.

Thus, for example, the final annealing of the substrate of the germanium wafer occurs at a temperature from 850 ° C to 1200 ° C and an endpoint value, preferably 950 ° C. T _temper 1050 ° C. For example, a wafer coated as described above and designated as follows, was treated at 1025 ° C for 30 minutes in nitrogen. The individual higher temperatures can also be in the treatment period of slightly shorter to about 20 minutes, but can be selected for at least 15 minutes. If the process is to be specially controlled and carried out under the lowest possible induction heat tension, it may be annealed several times at a lower temperature for up to about one hour.

The present invention also includes a vacuum processing system that can be designed, for example, to have a plurality of process chambers that are adapted to coat the wafer of the present invention and produce the layer system of the present invention. The vacuum processing system includes at least one loading chamber to move one or more substrates in and out or out of the vacuum processing system, and at least one first coating chamber comprising at least one target, A covalent boron compound such as boron carbide (BC), or preferably boron nitride (BN), or a target composed of a boron compound is included. The target is thereby connected to the high frequency voltage source and configured to oppose the substrate holder. The vacuum processing system can include at least one second coating chamber downstream of the at least one first coating chamber, having a second target containing the tantalum, which is also coupled to the high frequency voltage and configured to oppose the substrate holder . The target may be, for example, a tantalum nitride (SiN) target or a tantalum oxide (SiO ₂ ) target, but a germanium (Si) target is particularly preferred. A gas supply source of inert gas and/or reactive gas is connected to each coating chamber. The reactive gas can be, for example, nitrogen or oxygen. The vacuum processing system is preferably designed as a multi-chamber coating system, which may be included in the loading chamber for pre-treating the substrate, for example as a heater and/or etching device. As the heater, radiant heater and/or heating substrate holder individual support regions, for example, a heating jig can be used. As the etching device, a substrate holder to which a radiation frequency is applied can be used. Separately or additionally, a gas inlet for the etching gas may be provided to obtain a very short cycle time, for example, the substrate may be heated in the loading chamber and in the first pretreatment chamber, whereby venting occurs, and in the subsequent A substrate or a plurality of substrates are etched in the second pretreatment chamber.

In an embodiment of the vacuum processing system downstream of the loading chamber, at least one or two pretreatment chambers are disposed, followed by one or two first coating chambers each including at least one boron-containing target, followed by one or Two second coating chambers each comprising at least one ruthenium containing target followed by a loading chamber or another loading chamber. In terms of path, the chambers of the vacuum processing system are located away from the loading chamber and are linear or annular near the center of the system. In the case of a closed configuration with an annular configuration and thus having a return from the loading chamber back to the loading chamber, there is no need for a second loading chamber for transferring the substrate out of the system, since the loading chamber can replace both functions of substrate in and out. . The linear configuration must have a second loading chamber. However, the second loading chamber also has a multi-chamber closed configuration of the vacuum processing system, such as a ring or a polygon, and thus has a multi-element shape, for example, which has advantages in that it requires a very short cycle time between chambers. As an example, the input load chamber can be used during the entire cycle time for the exhaust process, ultimately supported by the heater and/or the etch process. In addition, when the substrate is continuously under vacuum, the substrates (ie, wafers) may also be heated between the respective chambers, especially between the loading chamber and the pretreatment chamber, in the pretreatment chamber and the first coating chamber. It is heated between.

1‧‧‧ first layer (with p-doping, such as boron)

2‧‧‧Second layer (including substrate elements, such as 矽)

3‧‧‧ third layer (including p-dopings such as phosphorus)

5‧‧‧Bon-containing target

6‧‧‧矽 target

7‧‧‧Rotary table

7 _S1 , 7 ₁₂ ... 7 ₅₆ , 7 _6S ‧‧‧ Transmission path (served by rotary table 7)

8‧‧‧Processing system (or for transmission path 7)

8 _Z1 , 8 _SZ , 8 _Z1 ... 8 _6Z , 8 _ZS ‧‧‧Alternative transmission path (or serviced by processing system 8)

11‧‧‧Inert gas source

12‧‧‧Reactive gas source

13‧‧‧ gas pipeline

14‧‧‧Measuring system

15, 15'‧‧‧ high frequency power supply

16, 16', 16" ‧‧‧ substrate holder

17‧‧‧ etching device

18‧‧‧Control unit

10, 20‧‧ ‧ pretreatment room

30, 40‧‧‧ first coating room

50, 60‧‧‧ second coating room

I‧‧‧ Coating system (with chamber in a ring configuration)

II‧‧‧Coating system (with a linear configuration)

A, A’‧‧‧ layer system (on the first surface of W)

S‧‧‧Loading room

W‧‧‧Substrate (wafer)

D1, D2‧‧‧ diffusion zone

The invention will be exemplified below by way of drawings. Figures 1 through 5 show: Figure 1 is an annular coating system for carrying out the process of the invention.

Figure 2 is a linear in-line coating system for carrying out the method of the invention.

Figure 3 is a wafer surface with a two-layer coating.

Figure 4 is a double coated wafer.

Figure 5 is an annealed wafer.

The vacuum processing system I schematically illustrated in Fig. 1 is designed as a coating system comprising a loading chamber S and six processing chambers 10 to 60. One or more substrates, in particular wafers, may be picked up by a loading and unloading system in front of system I or at system I, as indicated by two arrows in opposite directions, for example from a transmission line through loading chamber S (not shown) Transfer to the pre-loading chamber where it is evacuated, after the completion of the process step, individually reversed in the pre-loading chamber and placed again by the loading and unloading system on the transmission line. This can also be performed by each of the two pre-loading chambers S', S" designed for feeding, respectively, using only a single pre-loading chamber S. In the pre-loading chamber, in addition to pumping, as needed The wafer may also be first heated to accelerate the venting, and then transferred to the first processing chamber 10 by, for example, a carousel cell along a transport path 7 _S1 , wherein the first and second heating The wafer is processed separately in the step. The wafer is further transported along the transport path 7 ₁₂ to 7 _6S in a similar manner, and returned to the preload chamber S along the individual processing chambers, preferably in a clockwise sequence, and subsequently transferred outwards and Place it again on the transmission line.

Alternatively, system I can be designed with a central processing system 8 that takes over the substrate from preload chamber S by an alternate transmission path 8 _SZ , and after one correspondence, after 1/7 turn as shown in this case, Handed over to the first room. The processing system can thus be designed such that two or more substrates can also be removed and/or returned to the processing chambers from the preload chamber along an alternate transmission path 8 _SZ , 8 _Z1 ... 8 _Z6 , 8 _ZS . An advantage of this alternative configuration is that the single chamber or the processing station can be more easily bypassed, but is more complicated in terms of mechanics and control, especially when, for example, all processing chambers and preloading chambers should be simultaneously loaded and unloaded. . In both embodiments, the substrate is held under vacuum from inward transfer until it is transferred out of the system. Preferably, the preloading chamber S and the single processing chambers 10 to 60 and the rotating table 7 or the processing system 8, each chamber including the rotating table or the processing system (not shown) can be separately pumped.

The processing chambers 10 and 20 can be designed as a pre-treatment chamber in which substrate evacuation is performed at a higher temperature, for example by an additional heating element. Further, the etching step may be performed in two chambers or only one chamber, for example, by an etching device disposed in each chamber. The processing chambers 30 to 60 are designed as coating chambers each having one or several sputtering targets 5, 6, whereby the processing chambers 30 and 40 in the present case comprise at least one boron-containing (e.g., boron nitride) target The material 5, and the processing chambers 50 and 60 are each provided with at least one germanium-containing (e.g., cerium oxide) target 6 to coat the substrate by sputtering. The coating system is configured to facilitate particularly short cycle times for individual operating speeds. Therefore, in the processing time of the processing chambers 10 to 60 for 1 to 3 seconds, the transfer time of each substrate from one chamber (preset or processing chamber) to the next chamber is performed at about 1 second transfer time therebetween. Hour 900, 1200 to 1800 wafer yields. Due to the individual dual processing chambers used for the pre-treatment step and the coating step, for example, it is even possible to apply a formally sensitive substrate even with a suitable high yield. Alternatively, as is well known to those of ordinary skill in the art, the system can be configured to have more (i.e., 8, 9, etc.) or fewer (i.e., only 3) processing chambers for each step. A single processing step (heating, etching, sputtering power) is performed at low or high lead-in power.

An alternative is shown in Figure 2, which is a similar configuration for a linear coating system II with respect to the functional sequence of a single processing chamber. The linear coating system II can be directly applied to a production line whereby the wafer is fed into the preload chamber S', passed through the subsequent processing chambers 10 to 60 in an individual clockwise manner, and then sent out for preloading. Outside the chamber S. This configuration is similar to the above, and additional chambers may be added or omitted as desired. Although in principle all coating steps can be performed on the processing chamber, it is preferably minimized due to economical processing benefits. The system is provided with at least one preloading chamber and two coating chambers, each having a boron nitride target and a tantalum target. When the substrate has been exhausted in a short time in the preload chamber and finally This also applies when etching, otherwise at least one pretreatment chamber should be provided. Furthermore, in Fig. 2, a gas supply source is shown to comprise two inert gas sources 11, two reactive gas sources 12 and at least one gas line 13 It has a metrology system 14 and a high frequency power supply 15 for powering the sputtering targets 5, 6, and a high frequency power supply 15' for powering the etching device 17, individually for use in the pretreatment chamber 20. High frequency power supply substrate holding The facultative gas line 13 to the pretreatment chambers 10, 20, preload chamber S', respectively, is shown in dashed lines. The individual devices and control unit 18 are provided for controlling a single system component (ie, a reference designation 5 To 8 and 11 to 16), and also to provide substrate holders 16, 16' for operating the coating system shown in Figure 1, but without defocusing, is not shown.

To manufacture the layers as shown in Figure 3, a commercial coating system from the Evatec AG company called Solaris S151 has been used, which is similar in design to the vacuum processing system I shown in Figure 1. Therefore, in the coating chambers 30 and 40, each of the BN targets has a diameter of 300 mm and a thickness of 6 mm, and each of the coating chambers 50 and 60 has been mounted with ruthenium (iridium oxide, SiN, respectively). Individual targets. Individual experiments using different targets in chambers 50 and 60 were also performed, i.e., Si targets or SiN targets in chamber 50, and Si targets or SiO ₂ targets in chamber 60.

Thereby, the following parameters are applied to the deposition of the boron-containing layer: the power of the 13,56 MHz RF supply for the sputtering source is 4 kW; the Ar treatment and the cleaning flow rate (that is, the argon flow rate during the standby operation) are each 68 sccm; BO _x Oxygen flow rate for the N _y layer: 50-20sccm (=10-40%)

The sputtering rate obtained by this is: BN is 0, 56-0, 63 nm/s and BO _x N _y is 1,28 nm/s.

The sputtering time on one side has been determined by in-situ measurement of the layer thickness, and the other side is controlled corresponding to the determined rate.

The parameters used to deposit the ruthenium containing layer from the ruthenium target are thus as follows.

The power of the DC pulse power source (100 kHz, 1.6 μs sampling rate) for the sputtering source is 6.5 kW; the Ar treatment and cleaning flow rate (that is, the argon flow rate in the standby mode) are each 40 sccm; the nitrogen flow rate for the SiN layer: 45 sccm (45%)

The SiN sputtering rate obtained thereby is 3.2 nm/s.

As the substrate 5" (吋), n pre-doped (n-type) germanium wafer is used, and 10 μm is first removed from the surface. Subsequently, it has been polished and cleaned by a so-called RCA process (American Radio Company's 2-step aqueous solution cleaning process). The substrate was etched with 1% hydrofluoric acid before coating the substrate, washed with DI water, and dried with nitrogen.

In Fig. 3, a wafer W surface of the present invention is shown having a layer system A deposited thereon, having a first boron-containing layer 1 and a second germanium-containing layer 2. Thereby the first layer 1 can be realized as a boron nitride (BN) or boron oxynitride (BON) layer, or can comprise individual mixed or gradient layers. Therefore, as an example, after depositing a boron nitride layer on the surface of the wafer, a layer having a higher oxygen concentration is deposited by adding oxygen to the processor body, thereby achieving a layer degradation caused by oxygen. Specific protection. The possibility of implementing two or more layers in the first layer in this figure is shown in dashed lines in the figure. Depositing a second ruthenium-containing coating in one or more processing chambers of the coating system by sputtering a material from a ruthenium, osmium oxide or ruthenium nitride target, and depositing the material on the first layer, Although this layer can be designed to have two or more layers. Deposition can be carried out in a manner known to add oxygen, nitrogen and/or an inert gas to achieve the desired layer composition. Although in the case of only the boron-containing layer system 1 without additional niobium-containing coating (ie, coating system 2), boron doping can generally be produced by subsequent annealing, but should be exposed on the surface of the layer (ie, individual layer system). Providing a second coating is particularly advantageous when the ambient gas is relatively long, that is, when the period between the coating process and the annealing process is long, since an extremely thin boron-containing (ie, boron nitride) layer is established for the environment. The gas is shock sensitive, which has the advantage that it does not change significantly even after storage for several days in ambient gas. The ruthenium-containing layer can thus act as a protective layer, ie against oxidation of the boron layer, debonding or other environmental gas conditions. Here two coating layer system A is used for subsequent fabrication of the p ⁺ region in diffusion region D1. Thereby, it has been shown that the SiN and SiO ₂ layers have particularly good protective properties as a top cover layer. According to the following example, the second surface of the wafer can be pre-coated.

Figure 4 shows a wafer W with a phosphorus-containing third layer 3 as a pre-coat on the second surface to create an n ⁺ region of the diffusion region D2. In addition, a boron-containing layer system A' is provided between the first and second coating layers, and a mixed layer M in a direction orthogonal to the surface of the wafer, which is a layer system having different compositions, that is, nitrogen, individual Oxygen concentration and / or boron and cesium concentration. This mixed layer M can be fabricated in chamber 40 or 50, which occurs, for example, when the individual flow rates of the reactive gases are changed and/or simultaneously from the co-sputtering of the respective boron-containing and tantalum targets. Alternatively, in the coating chamber 40 or 50, it is also possible to sputter from a boron-containing and cerium-containing target (i.e., from a boron boring target). In addition, the transition from the first layer containing boron to the second layer containing ruthenium may be a gradual or stepwise change. To ensure that the boron-containing layer is adequately protected from environmental gases, a thicker ruthenium-containing layer can be deposited followed by a very thin boron-containing layer. If the thickness of the boron-containing layer is between 1 and 6 nm, the thickness of the germanium-containing layer can be adjusted to be between 10 and 20 nm, whereby the facultative mixed layer can be adjusted, for example, between 0 and 10 nm. In principle, the first and second layer systems 1, 2 and the final additional mixed layer M may be adjacent to each other by a sputtering process or may be fabricated by a paCVD process. Thus, an RF voltage can be applied to the wafer in the coating chamber, i.e., on an RF fixture, while introducing process gases into the chamber. Precautions are required due to the toxicity and/or explosive nature of the process gases used, such as borane or decane. The second surface of the wafer is pre-coated with a third phosphorous-containing coating 3, and thus can be similarly coated by paCVD, that is, using pre-coating in the pretreatment chamber 20 or between the pretreatment chamber 20 and the coating chamber 30. The phosphorus-containing gas in the covering chamber is not discussed in depth here. In principle, individual post coatings can also be applied, whereby a spin coating which is not suitable for vacuum can also be applied.

Figure 5 shows wafers coated according to Figure 3 or Figure 4, respectively, which are pre-coated by an annealing step to produce diffusion regions D1 and D2, respectively. Thereby the first and second coatings are switched into boron-doped first p ⁺ diffusion regions D1 in the vicinity of the wafer surface region. Surprisingly, boron is used to form a proper diffusion profile independent of the additional tantalum coating and the resulting hybrid coating without leaving any residue on the wafer surface. This is in contrast to conventional spin coating, which often requires an additional surface treatment, ie a polishing step.

In the same annealing step, a second n ⁺ diffusion region D2 is also fabricated in a surface proximate to the second surface region. In order to temper more wafers at the same time in the annealing step of the vacuum processing system I, II in the annealing furnace or the annealing chamber (not shown) disposed between the final coating chamber 60 and the preload chambers S, S", the advantage is that The upper side of the first surface may be individually stacked with the underside of the other such that only surfaces having the same coating are in contact with each other, thereby preventing unwanted diffusion of phosphorus into the D1 region and diffusion of boron into the D2 region.

The present invention has been described with respect to the principles of the present invention in the present specification and drawings, and the present invention also includes any combination of the features and examples and embodiments herein, so that the features are not recited in detail, only Those of ordinary skill in the art will be able to understand this combination description without confusion.

Claims (25)

 A method of fabricating a substrate (W) having at least one boron-doped surface in at least a sub-region, comprising the steps of: providing a substrate (W) that has been placed in a vacuum process in a preparation step In the system (I, II), and having a first boron-containing first layer (1) processed by a PVD process in the vacuum processing system, the substrate is annealed to diffuse boron into the surface, wherein the PVD The process includes a sputtering process for depositing a first boron-containing layer or a boron-containing layer system (1) on a substrate in a first chamber of a vacuum processing system, wherein the first coating of a vacuum processing system The substrate in the cladding chamber is configured to oppose a boron-containing target (5) comprising a covalent boron compound and comprising an ambient gas comprising at least one inert gas and/or one reactive gas A high frequency voltage is applied thereto to be sputtered to individually adjust the layer thickness of the boron-containing layer or the boron-containing layer system to a range of 0.5 nm to 6 nm, particularly 1 nm to 6 nm.    The method of claim 1, wherein the annealing is performed in an annealing chamber of the vacuum processing system (I, II) or in an annealing furnace outside the vacuum processing system.    A method of claim 1 or 2, wherein a second coating comprising ruthenium is applied between coating and annealing in a PVD or a paCVD process in a coating chamber of the vacuum processing system.    The method of any one of claims 1 to 3, wherein the substrate is a wafer, in particular a wafer, coated on a first surface, wherein a second surface opposite the first surface The surface is protected from being coated during deposition of the first and/or second coating.    The method of claim 4, wherein the wafer is pre-coated on the second surface with a third phosphor-containing coating.    The method of any one of claims 1 to 5, wherein the boron-containing coating comprises a BN layer.    The method of claim 4, wherein a B/N ratio of the BN coating is adjusted using a nitrogen-containing gas, particularly nitrogen.   The method of any one of claims 1 to 7, wherein a BO _x N _y layer is deposited separately or additionally by sputtering the boron-containing target in an oxygen-containing ambient gas. The method of any one of claims 1 to 8, wherein first depositing a BN coating by sputtering the boron-containing target in an ambient gas comprising at least one inert gas and/or a nitrogen-containing gas, and subsequently borrowing A BO _x N _y layer is deposited by sputtering the boron-containing target in an additional oxygen-containing ambient gas, thereby producing the boron-containing layer system.  The method of any one of claims 1 to 9, wherein the boron-containing first target comprises boron nitride, and in particular the boron-containing first target is boron nitride.    The method of any one of claims 1 to 10, wherein the boron-containing layer or the boron-containing layer system has a thickness adjusted between 1 nm and 2 nm.    The method of any one of claims 5 to 11, wherein the thickness of the boron-containing layer or the boron-containing layer system is selected such that sheet resistance can be adjusted by tempering the coated wafer Resistance) is between 30Ω and 100Ω.    The method of any one of claims 1 to 12, wherein in addition to the first boron-containing layer or the boron-containing layer system, a second germanium-containing layer or a germanium-containing layer system is deposited, for which the substrate is a second coating chamber of the vacuum processing system is disposed opposite to a second target containing germanium, and sputtering the second target containing germanium in an ambient gas containing at least one inert gas and/or one reactive gas material.    The method of claim 13, wherein a layer of germanium, a layer of germanium nitride, a layer of germanium oxide, and/or a layer of nitrogen oxides are deposited.    The method of any one of claims 13 or 14, wherein a tantalum nitride target, a tantalum oxide target, preferably a tantalum target is sputtered to produce the second layer or the second layer system.    The method of any one of claims 13 or 15, wherein the second layer or the second layer system is deposited with a thickness of 10 to 20 nm.    The method of any one of claims 1 to 16, wherein the at least one of the two is operated at a frequency of 13,56 Hz between 2 and 30 MHz and including an endpoint value, preferably between 10 and 15 MHz and including an endpoint value. One and/or second target.    A wafer having a boron doped surface fabricated by the method of any one of claims 1 to 17.    The wafer of claim 18, wherein the wafer is a solar cell, preferably a double-sided solar cell.    A vacuum processing system for performing a sputtering method as claimed in claims 1 to 17, comprising a loading chamber (S, S', S") for inwardly and/or inwardly at least one wafer (17) Externally moving into or out of the vacuum processing system (I, II), and at least one first coating chamber (30, 40) connected to a gas supply source of inert gas and/or reactive gas, wherein In a coating chamber (30, 40), a boron-containing target (5) connected to a high-frequency voltage source (15) is disposed opposite to a substrate holder (16), the first target (5) Included is a covalent boron compound, and the system is operatively coupled to a control unit (18) that controls the system (I, II) such that a boron-containing coating disposed on a substrate (W) at the substrate holder A thickness of 0.5 nm to 6 nm (including two endpoint values) is deposited.   The vacuum processing system of claim 20, wherein the vacuum processing system (I, II) comprises a second coating chamber (50, 60) coupled to a gas supply source of inert gas and/or reactive gas and Downstream of the first coating chamber (30, 40), wherein in the second coating chamber (50, 60), a boron-containing second target (6) connected to a high-frequency voltage source (15) Arranged opposite a substrate holder (16'), the second target (6) preferably comprises a SiO ₂ target, a SiN target or especially a Si target, and the control unit (18) controls The system deposits at least one germanium containing layer on a substrate (W) disposed at the substrate holder (16').  A vacuum processing system according to any one of claims 20 to 21, wherein the loading chamber comprises a heating device for heating the at least one wafer and/or an etching device for processing the at least one wafer.    The vacuum processing system of any one of claims 20 to 22, wherein at least one pretreatment chamber is disposed between the loading chamber and the first coating chamber, the pretreatment chamber comprising a heater for heating the at least one wafer A heating device and/or an etching device for processing the at least one wafer.    A vacuum processing system according to any one of claims 20 to 23, wherein the vacuum processing system comprises one or two pretreatment chambers downstream of the loading chamber (S, S'), followed by one or two coating chambers Each of which comprises at least one boron-containing target, followed by one or two coating chambers each comprising at least one yttrium-containing target, followed by the loading chamber (S) or a further loading chamber (S").    A vacuum processing system according to any one of claims 20 to 24, wherein the chambers are configured in a straight line, a ring shape or a polygon shape.