TW201827874A - Optical module including silicon photonics chip and coupler chip - Google Patents

Optical module including silicon photonics chip and coupler chip Download PDF

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TW201827874A
TW201827874A TW107111907A TW107111907A TW201827874A TW 201827874 A TW201827874 A TW 201827874A TW 107111907 A TW107111907 A TW 107111907A TW 107111907 A TW107111907 A TW 107111907A TW 201827874 A TW201827874 A TW 201827874A
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wafer
coupler
waveguide
optical
calender
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TWI675229B (en
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馬克 伊皮踏克斯
周舒瓦 拉及福 闊爾內魯
喬L 奈特安格勒
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美商山姆科技公司
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Abstract

An optical module includes a waveguide interconnect that transports light signals; a Silicon Photonics chip that modulates the light signals, detects the light signals, or both modulates and detects the light signals; a coupler chip attached to the Silicon Photonics chip and the waveguide interconnect so that the light signals are transported along a light path between the Silicon Photonics chip and the waveguide interconnect; and one of the Silicon Photonics chip and the coupler chip includes first, second, and third alignment protrusions. The other of the coupler chip and the Silicon Photonics chip includes a point contact, a linear contact, and a planar contact. The point contact provides no movement for the first alignment protrusion. The linear contact provides linear movement for the second alignment protrusion. The planar contact provides planar movement for the third alignment protrusion.

Description

包含矽光晶片和耦合器晶片的光學模組  Optical module including a calender wafer and a coupler wafer  

本發明和光學模組有關。更明確的說,本發明和具有矽光裝置的光學模組有關。 The invention is related to an optical module. More specifically, the invention relates to an optical module having a neon device.

相關申請案  Related application  

本申請案於35 U.S.C.§119(e)的規範下主張下面申請案的權利:2015年3月12日提申的美國申請案第62/131,971號;2015年3月12日提申的美國申請案第62/131,989號;2015年3月13日提申的美國申請案第62/132,739號;2015年3月17日提申的美國申請案第62/134,166號;2015年3月17日提申的美國申請案第62/134,173號;2015年3月17日提申的美國申請案第62/134,229號;2015年5月7日提申的美國申請案第62/158,029號;以及2015年9月9日提申的美國申請案第62/215,932號。本文以引用的方式將美國申請案第62/131,971號、第62/131,989號、第62/131,739號、第62/134,166號、第62/134,173號、第62/134,229號、第62/158,029號、以及第62/215,932號中每一案的完整內容併入。 This application claims the benefit of the following application in the specification of 35 USC § 119(e): US Application No. 62/131,971, filed on March 12, 2015; US application filed on March 12, 2015 US Patent Application No. 62/132,739, filed on March 13, 2015; U.S. Application Serial No. 62/134,173, filed on March 17, 2015, and U.S. Application Serial No. 62/ 134, 229, filed on May 17, 2015; U.S. Application No. 62/215,932, filed on September 9. US Application Nos. 62/131,971, 62/131,989, 62/131,739, 62/134,166, 62/134,173, 62/134,229, 62/158,029 And the full content of each of the cases in No. 62/215,932 is incorporated.

使用光學互連取代電氣互連雖然可以達成顯著的增益頻寬以及頻寬密度(被傳收器佔用的表面積的Gb/s/m2);不過,光學互連已經存在於電信網路(跨海網路、大都會網路、...等)的心臟中,它們並未達到整合的程度,而且成本以及能量效率並不足以取代短程鏈路上的電氣互連。舉例來說,以垂直空 腔表面發射雷射(Vertical Cavity Surface Emitting Laser,VCSEL)為基礎的光學互連的價格仍然比電氣互連貴了十倍。應用大量製造技術以及低成本電子製程的概念已經可以將光功能整合至矽基板之中。被用來製造電子積體電路的基礎架構以及訣竅亦能夠套用於光積體電路,大幅地降低它們的成本。 The use of optical interconnects to replace electrical interconnects can achieve significant gain bandwidth and bandwidth density (Gb/s/m 2 of the surface area occupied by the receiver); however, optical interconnects already exist in telecommunications networks (cross In the heart of the sea network, metropolitan network, etc., they do not reach the level of integration, and the cost and energy efficiency are not enough to replace the electrical interconnection on the short-range link. For example, optical interconnects based on Vertical Cavity Surface Emitting Laser (VCSEL) are still ten times more expensive than electrical interconnects. The use of mass manufacturing techniques and the concept of low-cost electronic processes has enabled the integration of optical functions into germanium substrates. The infrastructure used to make electronic integrated circuits and the enthalpy can also be used in opto-integrator circuits, significantly reducing their cost.

大量的開發努力被聚焦在整合光功能於矽之中,但卻較少致力於將光從矽光元件處耦合至光纖。許多利用離散器件或積體電路的先前技術光學模組皆配備光纖尾纖(fiber pigtail)並且使用一主動對齊過程來對齊該光纖與雷射源或光偵測器。但是,該主動對齊過程經常依賴於利用多軸機器人來進行動態式或主動式對齊(舉例來說,利用電力或光電流回授)。一旦取得最佳的耦合信號便會利用雷射熔接或是UV(紫外光誘發)固化來固定該光纖。該光纖會被端點耦合(butt coupled)至一裝置或是被固定在一具有微透鏡的聚焦平面之中,該些微透鏡被用來將光耦合至該光纖之中/外面。 Much of the development effort has focused on integrating light into the ,, but less on coupling light from the illuminating element to the fiber. Many prior art optical modules that utilize discrete or integrated circuits are equipped with fiber pigtails and use an active alignment process to align the fibers with a laser source or photodetector. However, this active alignment process often relies on the use of multi-axis robots for dynamic or active alignment (for example, using power or photocurrent feedback). Once the best coupling signal is obtained, the fiber is fixed by laser welding or UV (ultraviolet light induced) curing. The fiber is butt coupled to a device or fixed in a focal plane having a microlens that is used to couple light into/outside the fiber.

主動式動齊有數項缺點。其為製程時間約1分鐘/部件(minute/part)的整體式製程,而且無法擴大至大量的光學埠。和將光耦合至矽光元件之中以及外面相關聯的費用對於以光為基礎的短程鏈路來說,商業存活性有限。因此,需要一種耐用、低成本的方法,用以將光耦合至矽光元件之中以及外面。 Active movement has several shortcomings. It is a one-piece process with a process time of about 1 minute/minute (part/part) and cannot be expanded to a large number of optical defects. The cost associated with coupling light into the neon light element and outside is limited in commercial survival for light-based short-range links. Therefore, there is a need for a durable, low cost method for coupling light into and out of the phosphor elements.

和長途電信中的情形雷同,用於光學互連的波長分工器(Wavelength Division Multiplexing,WDM)非常引人注目,因為其可減少光纖的數量、減少光纖對齊、並且降低和進行光纖佈線相關聯的成本。WDM技術會在單一光纖上多工處理位於不同波長處的數個光學信號。舉例來說,在O頻帶(O-band)中的寬鬆式WDM系統會使用波長為約1271nm、1291nm、1311nm、以及1331nm的四條通道。WDM可以讓此四條通道中的每一條通道在一束光纖上被同步傳輸,從而提高可利用的每條光纖頻寬。為使用WDM,必須在該光學鏈路的末端處提供多工/解多工,用以結合/分離該些不同波長的通道。因此,需要一 種耐用、低成本的方法,用以整合多工/解多工功能和矽光元件。 Similar to the situation in long-distance telecommunications, Wavelength Division Multiplexing (WDM) for optical interconnects is very attractive because it reduces the number of fibers, reduces fiber alignment, and reduces the associated fiber routing. cost. WDM technology multiplexes several optical signals at different wavelengths on a single fiber. For example, a loose WDM system in the O-band would use four channels with wavelengths of about 1271 nm, 1291 nm, 1311 nm, and 1331 nm. WDM allows each of the four channels to be simultaneously transmitted on a bundle of fibers, thereby increasing the bandwidth of each fiber available. In order to use WDM, multiplex/demultiplexing must be provided at the end of the optical link to combine/separate the channels of different wavelengths. Therefore, there is a need for a durable, low cost method for integrating multiplex/demultiplexing functions and calendering components.

為克服上面所述的問題,本發明的較佳實施例提供一種光學模組,其包含下面中的一或更多者:(1)動力對齊(kinematic alignment),其包含第一對齊突出部、第二對齊突出部、第三對齊突出部,以及對應的點接點、線接點、以及平面接點;(2)一耦合器晶片,其會改變由該些光信號所定義的一射束的剖面尺寸;(3)一耦合器晶片,其包含一多工器、一解多工器、或是一多工器以及一解多工器;(4)一分隔體,其被附接至一矽光晶片,其中,該分隔體會被陽極焊接至該矽光晶片;(5)一排列,其中,由該些光信號所定義的一射束的剖面尺寸較佳的係在位於該矽光晶片與該耦合器晶片之間的介面處為最大;(6)一排列,其中,由該些光信號所定義的一射束的剖面尺寸在該耦合器晶片的第一表面及第二表面處並不相同;(7)一互連波導管,其包含一光點尺寸轉換器區;(8)一互連波導管,其會與該矽光晶片形成斜角;(9)一耦合器晶片與一矽光晶片,它們被陽極焊接在一起;以及(10)一光偵測器,其被表面鑲嵌至該矽光晶片。本發明的較佳實施例還提供一種傳收器,其具有一鎖存器,用以讓該互連波導管可以脫離;本發明的較佳實施例還提供一種利用位在沒有彼此相向的兩塊基板的表面中的基準點來對齊該兩塊基板的方法;以及本發明的較佳實施例還提供製造光學模組的方法。 To overcome the above-described problems, a preferred embodiment of the present invention provides an optical module including one or more of the following: (1) a kinematic alignment including a first alignment protrusion, a second alignment protrusion, a third alignment protrusion, and corresponding point contacts, line contacts, and plane contacts; (2) a coupler chip that changes a beam defined by the optical signals Section size; (3) a coupler chip comprising a multiplexer, a demultiplexer, or a multiplexer and a demultiplexer; (4) a separator attached to a lithographic wafer, wherein the spacer is anodically soldered to the lithographic wafer; (5) an arrangement in which a cross-sectional dimension of a beam defined by the optical signals is preferably located at the dawn The interface between the wafer and the coupler wafer is maximum; (6) an arrangement in which a beam defined by the optical signals has a cross-sectional dimension at the first surface and the second surface of the coupler wafer Not identical; (7) an interconnected waveguide comprising a spot size converter zone; (8) one a waveguide that forms an oblique angle with the calendering wafer; (9) a coupler wafer and a calender wafer that are anodically bonded together; and (10) a photodetector that is surface mounted to The calendering wafer. The preferred embodiment of the present invention also provides a transceiver having a latch for allowing the interconnecting waveguide to be detached; a preferred embodiment of the present invention also provides for utilizing two positions that are not facing each other A method of aligning the two substrates with a reference point in the surface of the bulk substrate; and a preferred embodiment of the present invention also provides a method of fabricating the optical module.

根據本發明的一較佳實施例提供一種光學模組,其包含:一互連 波導管,其會傳輸光信號;一矽光晶片,其會調變該些光信號、偵測該些光信號、或是調變與偵測該些光信號;一耦合器晶片,其被附接至該矽光晶片及該互連波導管,俾使得該些光信號會沿著一介於該矽光晶片與該互連波導管之間的光路徑被傳輸;以及該矽光晶片與該耦合器晶片中的其中一者包含第一對齊突出部、第二對齊突出部、第三對齊突出部。該耦合器晶片與該矽光晶片中的另一者包含一點接點、一線接點、以及一平面接點。該點接點不提供該第一對齊突出部任何移動。該線接點提供該第二對齊突出部線性移動。該平面接點提供該第三對齊突出部平面移動。 According to a preferred embodiment of the present invention, an optical module includes: an interconnecting waveguide that transmits an optical signal; and a dimming chip that modulates the optical signals and detects the optical signals Or modulating and detecting the optical signals; a coupler chip attached to the fluorescent wafer and the interconnecting waveguide, such that the optical signals are along an optical wafer and A light path between the interconnected waveguides is transmitted; and one of the phosphor wafer and the coupler wafer includes a first alignment tab, a second alignment tab, and a third alignment tab. The coupler wafer and the other of the phosphor wafers include a point contact, a line contact, and a planar contact. The point contact does not provide any movement of the first alignment tab. The line contact provides linear movement of the second alignment tab. The planar contact provides a planar movement of the third alignment tab.

較佳的係,該些第一對齊突出部、第二對齊突出部、第三對齊突出部為由玻璃製成球體,它們位於被提供在該矽光晶片與該耦合器晶片中的其中一者之中的倒角錐體之中。該光學模組較佳的係進一步包含一分隔體,其被附接至該矽光晶片。該分隔體與該矽光晶片較佳的係被陽極焊接在一起。 Preferably, the first alignment protrusions, the second alignment protrusions, and the third alignment protrusions are spheres made of glass, which are located in one of the silicon wafer and the coupler wafer. Among the chamfer cones among them. Preferably, the optical module further includes a separator attached to the calendering wafer. Preferably, the separator and the calendering wafer are anodically welded together.

由該些光信號所定義的一射束的剖面尺寸較佳的係在位於該矽光晶片與該耦合器晶片之間的介面處為最大。由該些光信號所定義的一射束的剖面尺寸較佳的係一開始沿著該光路徑遞增並且接著沿著該光路徑遞減。 The cross-sectional dimension of a beam defined by the optical signals is preferably at a maximum at the interface between the calender wafer and the coupler wafer. Preferably, the cross-sectional dimension of a beam defined by the optical signals begins to increase along the optical path and then decreases along the optical path.

該矽光晶片與該耦合器晶片中的至少其中一者較佳的係包含一聚焦元件。該聚焦元件較佳的係一準直透鏡。該互連波導管較佳的係可以脫離該光學模組。該互連波導管包含一光點尺寸轉換器區。該矽光晶片較佳的係包含一光偵測器,其被鑲嵌至該矽光晶片的表面。該矽光晶片與該耦合器晶片較佳的係包含位於沒有彼此相向的表面上的多個基準點。 Preferably, at least one of the phosphor wafer and the coupler wafer comprises a focusing element. The focusing element is preferably a collimating lens. Preferably, the interconnecting waveguide can be detached from the optical module. The interconnected waveguide includes a spot size converter zone. Preferably, the phosphor wafer comprises a photodetector mounted to the surface of the calender wafer. Preferably, the lithographic wafer and the coupler wafer comprise a plurality of fiducials located on surfaces that are not facing each other.

根據本發明的一較佳實施例提供一種傳收器,其包含一根據本發明各種較佳實施例的光學模組以及一印刷電路板。該矽光晶片被連接至該印刷電路板。 In accordance with a preferred embodiment of the present invention, a transceiver is provided that includes an optical module and a printed circuit board in accordance with various preferred embodiments of the present invention. The calender wafer is connected to the printed circuit board.

該傳收器較佳的係進一步包含一殼體,用以封入該矽光晶片以及 該耦合器晶片。該傳收器較佳的係進一步包含一鎖存器,其會將該耦合器晶片固定在該殼體之中,其中,該耦合器晶片可以藉由解鎖該鎖存器而脫離該殼體。 Preferably, the transceiver further includes a housing for enclosing the phosphor wafer and the coupler wafer. Preferably, the transceiver further includes a latch that secures the coupler wafer within the housing, wherein the coupler wafer can be detached from the housing by unlocking the latch.

根據本發明的一較佳實施例提供一種光學模組,其包含:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;以及一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸。該耦合器晶片會改變由該些光信號所定義的一射束的剖面尺寸,而且該耦合器晶片包含一多工器、一解多工器、或是一多工器以及一解多工器。 According to a preferred embodiment of the present invention, an optical module includes: a silicon wafer including a waveguide that transmits an optical signal; and a coupler chip attached to the optical device The optical wafer, such that the optical signals are transmitted along an optical path between the phosphor wafer and the coupler wafer. The coupler chip changes a cross-sectional dimension of a beam defined by the optical signals, and the coupler chip includes a multiplexer, a demultiplexer, or a multiplexer and a demultiplexer .

該多工器、該解多工器、或是該多工器以及該解多工器較佳的係包含一埃謝勒格柵(Echelle Grating)、一陣列式波導管格柵、一方向耦合器、一分色濾光器,或是一共振干涉濾波器。該射束的剖面尺寸較佳的係在位於該矽光晶片與該耦合器晶片之間的介面處為最大。該射束的剖面尺寸較佳的係一開始沿著該光路徑遞增並且接著沿著該光路徑遞減。較佳的係,一光偵測器被表面鑲嵌至該矽光晶片或者被併入於該矽光晶片裡面。一光源較佳的係被併入於該矽光晶片裡面。該光學模組較佳的係進一步包含一位於該矽光晶片外面的光源,其中,來自該光源的光會被供應至該矽光晶片。該矽光晶片較佳的係包含一位於該光路徑之中的通孔。該矽光晶片與該耦合器晶片較佳的係彼此陽極焊接。 Preferably, the multiplexer, the demultiplexer, or the multiplexer and the demultiplexer comprise an Echelle grating, an array of waveguide gratings, and a directional coupling. , a dichroic filter, or a resonant interference filter. The cross-sectional dimension of the beam is preferably greatest at the interface between the calender wafer and the coupler wafer. Preferably, the beam has a cross-sectional dimension that initially increases along the optical path and then decreases along the optical path. Preferably, a photodetector is surface mounted to the phosphor wafer or incorporated into the calender wafer. A light source is preferably incorporated into the calender wafer. Preferably, the optical module further includes a light source located outside the calendering wafer, wherein light from the light source is supplied to the calendering wafer. Preferably, the phosphor wafer includes a via located in the optical path. Preferably, the calendering wafer and the coupler wafer are anodically welded to each other.

根據本發明的一較佳實施例提供一種光學模組,其包含:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;以及一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸。該光路徑包含該耦合器晶片的一第一表面以及該耦合器晶片的一第二表面。由該些光信號所定義的一射束的剖面尺寸在該第一表面及該第二表面處並不相同。 According to a preferred embodiment of the present invention, an optical module includes: a silicon wafer including a waveguide that transmits an optical signal; and a coupler chip attached to the optical device The optical wafer, such that the optical signals are transmitted along an optical path between the phosphor wafer and the coupler wafer. The optical path includes a first surface of the coupler wafer and a second surface of the coupler wafer. The cross-sectional dimension of a beam defined by the optical signals is not the same at the first surface and the second surface.

該矽光晶片與該耦合器晶片中的至少其中一者較佳的係包含一聚焦元件。該聚焦元件較佳的係一準直透鏡。 Preferably, at least one of the phosphor wafer and the coupler wafer comprises a focusing element. The focusing element is preferably a collimating lens.

根據本發明的一較佳實施例提供一種對齊兩塊基板的方法,其包含:提供一具有一第一基準點的第一基板以及一具有一第二基準點的第二基板,該些第一基準點與第二基準點位在彼此不相向的第一基板的表面與第二基板的表面;提供彼此反向的第一相機與第二相機,俾使得該第一相機看見該第一基準點並且該第二相機看見該第二基準點;以及藉由利用該些第一相機與第二相機來對齊該些第一基準點與第二基準點而對齊該些第一基板與第二基板。 According to a preferred embodiment of the present invention, a method for aligning two substrates includes: providing a first substrate having a first reference point and a second substrate having a second reference point, the first The reference point and the second reference point are on a surface of the first substrate and the surface of the second substrate that are not opposite to each other; providing a first camera and a second camera that are opposite to each other, such that the first camera sees the first reference point And the second camera sees the second reference point; and aligns the first substrate and the second substrate by aligning the first reference point and the second reference point by using the first camera and the second camera.

根據本發明的一較佳實施例提供一種光學模組,其包含:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;以及一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸。該耦合器晶片會改變由該些光信號所定義的一射束的剖面尺寸。該射束的剖面尺寸在位於該矽光晶片與該耦合器晶片之間的介面處為最大。 According to a preferred embodiment of the present invention, an optical module includes: a silicon wafer including a waveguide that transmits an optical signal; and a coupler chip attached to the optical device The optical wafer, such that the optical signals are transmitted along an optical path between the phosphor wafer and the coupler wafer. The coupler wafer changes the cross-sectional dimension of a beam defined by the optical signals. The cross-sectional dimension of the beam is greatest at the interface between the calender wafer and the coupler wafer.

根據本發明的一較佳實施例提供一種光學模組,其包含:一互連波導管,其會傳輸光信號;一矽光晶片,其會調變該些光信號、偵測該些光信號、或是調變與偵測該些光信號;以及一耦合器晶片,其被附接至該矽光晶片及該互連波導管,俾使得該些光信號會沿著一介於該矽光晶片與與該互連波導管之間的光路徑被傳輸。該互連波導管包含一光點尺寸轉換器區,其中,由該些光信號所定義的一射束的剖面尺寸會改變。 According to a preferred embodiment of the present invention, an optical module includes: an interconnecting waveguide that transmits an optical signal; and a dimming chip that modulates the optical signals and detects the optical signals Or modulating and detecting the optical signals; and a coupler wafer attached to the lithographic wafer and the interconnecting waveguide such that the optical signals are along a wadding wafer The optical path between the interconnected waveguide and the interconnect is transmitted. The interconnected waveguide includes a spot size converter region in which the cross-sectional dimensions of a beam defined by the optical signals are varied.

根據本發明的一較佳實施例提供一種光學模組,其包含:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;以及一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸。該耦合器晶片會改變由該些光信號所定義的一射束的剖 面尺寸。該耦合器晶片與該矽光晶片會被陽極焊接在一起。 According to a preferred embodiment of the present invention, an optical module includes: a silicon wafer including a waveguide that transmits an optical signal; and a coupler chip attached to the optical device The optical wafer, such that the optical signals are transmitted along an optical path between the phosphor wafer and the coupler wafer. The coupler wafer changes the cross-sectional dimension of a beam defined by the optical signals. The coupler wafer and the calendering wafer are anodically welded together.

根據本發明的一較佳實施例提供一種光學模組,其包含:一互連波導管,其會傳輸光信號;一矽光晶片,其會調變該些光信號、偵測該些光信號、或是調變與偵測該些光信號;以及一耦合器晶片,其被附接至該矽光晶片及該互連波導管,俾使得該些光信號會沿著一介於該矽光晶片與與該互連波導管之間的光路徑被傳輸。該互連波導管會與該矽光晶片形成斜角。 According to a preferred embodiment of the present invention, an optical module includes: an interconnecting waveguide that transmits an optical signal; and a dimming chip that modulates the optical signals and detects the optical signals Or modulating and detecting the optical signals; and a coupler wafer attached to the lithographic wafer and the interconnecting waveguide such that the optical signals are along a wadding wafer The optical path between the interconnected waveguide and the interconnect is transmitted. The interconnecting waveguide will form an oblique angle with the calendering wafer.

根據本發明的一較佳實施例提供一種傳收器,其包含:一印刷電路板;一光學模組,其包含一互連波導管,該互連波導管會傳輸光信號;一矽光晶片,其被連接至該印刷電路板並且會調變該些光信號、偵測該些光信號、或是調變與偵測該些光信號;一耦合器晶片,其被附接至該矽光晶片及該互連波導管,俾使得該些光信號會沿著一介於該矽光晶片與與該互連波導管之間的光路徑被傳輸;以及一殼體,用以封入該矽光晶片以及該耦合器晶片。該耦合器晶片會利用一鎖存器被固定在該殼體之中。該耦合器晶片可以藉由解鎖該鎖存器而脫離該殼體。 According to a preferred embodiment of the present invention, a transceiver includes: a printed circuit board; an optical module including an interconnecting waveguide that transmits optical signals; and a silicon wafer Connected to the printed circuit board and modulate the optical signals, detect the optical signals, or modulate and detect the optical signals; a coupler chip attached to the light The wafer and the interconnecting waveguide, such that the optical signals are transmitted along an optical path between the fluorescent wafer and the interconnecting waveguide; and a housing for enclosing the fluorescent wafer And the coupler wafer. The coupler wafer is secured within the housing using a latch. The coupler wafer can be detached from the housing by unlocking the latch.

根據本發明的一較佳實施例提供一種光學模組,其包含:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸;以及一光偵測器,其被表面鑲嵌至該矽光晶片。 According to a preferred embodiment of the present invention, an optical module includes: a silicon wafer including a waveguide that transmits an optical signal; and a coupler wafer attached to the light The wafer, such that the optical signals are transmitted along a light path between the phosphor wafer and the coupler wafer; and a photodetector that is surface mounted to the phosphor wafer.

根據本發明的一較佳實施例提供一種製造光學模組的方法,其包含:提供一具有一光層的晶圓;裁切該晶圓,用以形成一矽光晶片;配接該矽光晶片與一印刷電路板;配接一耦合器晶片與該矽光晶片;以及將一互連波導管鑲嵌至該耦合器晶片。 According to a preferred embodiment of the present invention, a method of fabricating an optical module includes: providing a wafer having a light layer; cutting the wafer to form a silicon wafer; and mating the light a wafer and a printed circuit board; a coupler wafer and the silicon wafer; and an interconnecting waveguide mounted to the coupler wafer.

根據本發明的一較佳實施例提供一種製造光學模組的方法,其包含:提供一由多個矽光晶片組成的晶圓;配接多個耦合器晶片與該晶圓上的該 些矽光晶片;裁切該晶圓,用以形成多個矽光晶片/耦合器晶片組裝件;配接該些矽光晶片/耦合器晶片組裝件與多個印刷電路板;以及將多條互連波導管鑲嵌至該些耦合器晶片。 According to a preferred embodiment of the present invention, a method of fabricating an optical module includes: providing a wafer composed of a plurality of phosphor wafers; mating a plurality of coupler wafers with the germanium on the wafer An optical wafer; the wafer is cut to form a plurality of phosphor wafer/coupler wafer assemblies; the silicon wafer/coupler wafer assembly and the plurality of printed circuit boards are coupled; and the plurality of interconnects are interconnected A waveguide is embedded in the coupler wafers.

參考隨附的圖式,可以從本發明的較佳實施例的下面詳細說明中更明白本發明的上面以及其它特點、元件、特徵、步驟、以及優點。 The above as well as other features, elements, features, steps and advantages of the present invention will become more apparent from the description of the appended claims.

10‧‧‧傳收器 10‧‧‧Acceptor

11‧‧‧微控制器 11‧‧‧Microcontroller

12‧‧‧雷射驅動器 12‧‧‧Laser driver

13‧‧‧調變器驅動器 13‧‧‧Transformer driver

14‧‧‧轉阻放大器(TIA) 14‧‧‧Transistor Amplifier (TIA)

15‧‧‧矽光晶片 15‧‧‧Lighting wafer

16‧‧‧調變器1至4 16‧‧‧Transformers 1 to 4

17‧‧‧接收器1至4 17‧‧‧Receivers 1 to 4

18‧‧‧雷射A、B 18‧‧‧Laser A, B

19‧‧‧耦合器晶片 19‧‧‧ Coupler Wafer

20‧‧‧模態轉換器 20‧‧‧Mode converter

21‧‧‧傳送(Tx)互連波導管 21‧‧‧Transmission (Tx) interconnected waveguide

22‧‧‧接收(Rx)互連波導管 22‧‧‧Receiving (Rx) interconnected waveguides

23‧‧‧傳送(Tx)輸入 23‧‧‧Transfer (Tx) input

24‧‧‧接收(Rx)輸出 24‧‧‧Receive (Rx) output

25‧‧‧連接器 25‧‧‧Connector

26‧‧‧多工器(MUX) 26‧‧‧Multiplexer (MUX)

27‧‧‧解多工器(DEMUX) 27‧‧‧Demultiplexer (DEMUX)

28‧‧‧傳送(Tx)轉向結構 28‧‧‧Transfer (Tx) steering structure

29‧‧‧接收(Rx)轉向結構 29‧‧‧Receiving (Rx) steering structure

30‧‧‧纖殼 30‧‧‧Small shell

31‧‧‧核心 31‧‧‧ core

32‧‧‧通道波導管 32‧‧‧Channel waveguide

33‧‧‧通道格柵 33‧‧‧Channel grille

34‧‧‧通道偵測器 34‧‧‧Channel detector

35‧‧‧通道射束 35‧‧‧Channel beam

36‧‧‧方向耦合器 36‧‧‧directional coupler

37‧‧‧格柵耦合器 37‧‧‧Grid coupler

38‧‧‧耦合器光層 38‧‧‧ Coupler Light Layer

39‧‧‧矽光光層 39‧‧‧矽光光层

40‧‧‧印刷電路板(PCB) 40‧‧‧Printed circuit board (PCB)

41‧‧‧球柵陣列(BGA) 41‧‧‧Ball Grid Array (BGA)

42‧‧‧耦合器透鏡 42‧‧‧ Coupler lens

43‧‧‧矽光透鏡 43‧‧‧Digital lens

44‧‧‧凹口 44‧‧‧ Notch

45‧‧‧熱化合物 45‧‧‧Hot compounds

46‧‧‧陸地部 46‧‧‧ Land Department

51‧‧‧點接點 51‧‧‧ point contact

52‧‧‧線接點 52‧‧‧ wire joints

53‧‧‧平面接點 53‧‧‧Flat joints

54‧‧‧通道雷射 54‧‧‧channel laser

55‧‧‧對齊球體 55‧‧‧Aligning the sphere

56‧‧‧分隔體 56‧‧‧Separator

57‧‧‧混合式矽光晶片 57‧‧‧Mixed fluorescent wafer

58‧‧‧通孔 58‧‧‧through hole

59‧‧‧直通孔 59‧‧‧through holes

60‧‧‧第一波導管 60‧‧‧First waveguide

61‧‧‧第一漸細部 61‧‧‧First Gradual Department

62‧‧‧第二波導管 62‧‧‧second waveguide

63‧‧‧第二漸細部 63‧‧‧Second Gradual Department

64‧‧‧基板 64‧‧‧Substrate

65‧‧‧中間層 65‧‧‧Intermediate

66‧‧‧頂端層 66‧‧‧Top layer

70‧‧‧殼體 70‧‧‧shell

71‧‧‧散熱片 71‧‧‧ Heat sink

72‧‧‧鎖存器 72‧‧‧Latch

73‧‧‧凹口 73‧‧‧ Notch

74‧‧‧溝槽 74‧‧‧ trench

75‧‧‧孔洞 75‧‧‧ holes

76‧‧‧凹槽 76‧‧‧ Groove

77‧‧‧電子層 77‧‧‧Electronic layer

78‧‧‧光點尺寸轉換器區 78‧‧‧ spot size converter area

79‧‧‧散熱片 79‧‧‧ Heat sink

81‧‧‧第一連接器 81‧‧‧First connector

82‧‧‧第二連接器 82‧‧‧Second connector

100‧‧‧耦合器基準點 100‧‧‧ Coupler reference point

101‧‧‧矽光基準點 101‧‧‧ Twilight reference point

102‧‧‧底部相機 102‧‧‧ bottom camera

103‧‧‧頂端相機 103‧‧‧ top camera

104‧‧‧平台 104‧‧‧ platform

105‧‧‧夾盤 105‧‧‧ chuck

圖1所示的係根據本發明一較佳實施例的矽光系統的方塊圖。 1 is a block diagram of a calendering system in accordance with a preferred embodiment of the present invention.

圖2所示的係根據本發明一較佳實施例的另一矽光系統的方塊圖。 2 is a block diagram of another glazing system in accordance with a preferred embodiment of the present invention.

圖3與4所示的係具有能夠用於圖2中所示之矽光系統的耦合器晶片,其具有埃謝勒格柵。 Figures 3 and 4 have a coupler wafer that can be used in the calendering system shown in Figure 2, having an Echeler grid.

圖5所示的係具有能夠用於圖2中所示之矽光系統的耦合器晶片,其具有陣列式波導管格柵。 Figure 5 shows a coupler wafer that can be used in the calendering system shown in Figure 2, having an arrayed waveguide grille.

圖6所示的係具有能夠用於圖2中所示之矽光系統的耦合器晶片,其具有有表面格柵與方向耦合器的分色濾光器。 Figure 6 shows a coupler wafer that can be used in the calendering system shown in Figure 2, having a dichroic filter with a surface grid and directional coupler.

圖7所示的係被連接至一矽光晶片的耦合器晶片。 The system shown in Figure 7 is coupled to a coupler wafer of a silicon wafer.

圖8至10、32、以及33所示的係用於該耦合器晶片與矽光晶片的各種可能的光學排列。 Figures 8 through 10, 32, and 33 are used for various possible optical arrangements of the coupler wafer and the calendering wafer.

圖11以及12所示的係具有一分隔體的混合式矽光晶片。 11 and 12 are hybrid calendered wafers having a separator.

圖13所示的係具有一通孔的矽光晶片。 Figure 13 shows a silicon wafer with a via.

圖14以及15所示的係具有兩個波導管層的耦合器晶片。 14 and 15 are coupler wafers having two waveguide layers.

圖16所示的係用於該混合式矽光晶片與該耦合器晶片的傳送側射束模型的範例。 An example of a transfer side beam model for the hybrid calender wafer and the coupler wafer is shown in FIG.

圖17以及18所示的係一種動力對齊排列。 Figures 17 and 18 show a dynamic alignment arrangement.

圖19以及20所示的係一種視覺輔助對齊排列。 Figures 19 and 20 show a visually assisted alignment.

圖21以及22所示的係傳收器的一範例。 An example of a transceiver shown in Figures 21 and 22 is shown.

圖23以及24所示的係傳收器的另一範例。 Another example of a transceiver shown in Figures 23 and 24 is shown.

圖25以及26所示的係耦合器晶片的一範例。 An example of a coupler chip shown in Figures 25 and 26.

圖27所示的係矽光晶片的一範例。 An example of a twilight wafer shown in FIG.

圖28以及29所示的係製造傳收器的步驟。 The steps of manufacturing the transceiver shown in Figures 28 and 29 are shown.

圖30所示的係具有光點尺寸轉換器區的光纖。 Figure 30 shows an optical fiber having a spot size converter region.

圖31所示的係被一連接至兩個連接器的傳收器。 The unit shown in Fig. 31 is connected to a transceiver of two connectors.

圖34所示的係傳收器的另一範例。 Another example of a transceiver is shown in FIG.

圖1所示的係根據本發明一較佳實施例的矽光系統。傳收器10包含一微控制器11,其被連接至雷射驅動器12、調變器驅動器13、以及轉阻放大器(Transimpedance Amplifier,TIA)14。微控制器11會如微控制器11的右手邊的箭頭所示般地從位於該矽光系統外部的一或更多個裝置處接收電氣輔助信號以及發送電氣輔助信號至該矽光系統外部的一或更多個裝置,舉例來說,該些電氣輔助信號包含控制與監視信號。該調變器驅動器13會經由傳送(Tx)輸入23接收電氣資料信號,而TIA 14則經由接收(Rx)輸出24來輸出電氣資料信號。該些Tx輸入23以及該些Rx輸出24較佳的係被併入於連接器25之中。雷射A、B(圖中標示為元件符號18)被連接至雷射驅動器12。該傳收器10還包含一矽光晶片15以及一耦合器晶片19。該耦合器晶片19被連接至Tx互連波導管21以及Rx互連波導管22。 Figure 1 shows a calendering system in accordance with a preferred embodiment of the present invention. The transceiver 10 includes a microcontroller 11 that is coupled to the laser driver 12, the modulator driver 13, and a Transimpedance Amplifier (TIA) 14. The microcontroller 11 will receive an electrical assistance signal from one or more devices located outside of the light system as indicated by the arrow on the right hand side of the microcontroller 11 and transmit an electrical assistance signal to the exterior of the light system. One or more devices, for example, include electrical control and monitoring signals. The modulator driver 13 receives the electrical profile signal via the transmit (Tx) input 23, and the TIA 14 outputs the electrical profile signal via the receive (Rx) output 24. The Tx inputs 23 and the Rx outputs 24 are preferably incorporated into the connector 25. Lasers A, B (labeled as component symbol 18 in the figure) are connected to the laser driver 12. The transceiver 10 also includes a calender wafer 15 and a coupler wafer 19. The coupler wafer 19 is connected to a Tx interconnect waveguide 21 and an Rx interconnect waveguide 22.

一通道係由單一路徑來定義,信號會沿著該單一路徑被傳輸,也就是,傳送及/或接收。舉例來說,其中一條傳送通道係由該調變器驅動器13從最頂端的Tx輸入23處所收到的電氣資料信號所定義,其會讓調變器4調變來自雷射B的光,並且來自該調變器4之經調變的光會經由耦合器晶片19進入最頂端的 Tx互連波導管21。於此傳送通道的範例中,該傳送通道包含電氣資料信號以及光學資料信號兩者。一對應的接收通道係由最底部Rx互連波導管22上被該耦合器晶片19收到的光學資料信號所定義,其會讓底部接收器1產生一電氣資料信號,並且來自該最底部接收器1的一對應電氣資料信號會由TIA 14供應至最底部的Rx輸出24,其中,該對應的電氣資料信號係以被該TIA 14收到的該已產生的電氣資料信號為基礎。 A channel is defined by a single path along which signals are transmitted, that is, transmitted and/or received. For example, one of the transmission channels is defined by the modulator driver 13 from the electrical data signal received at the topmost Tx input 23, which causes the modulator 4 to modulate the light from the laser B, and The modulated light from the modulator 4 enters the topmost Tx interconnected waveguide 21 via the coupler wafer 19. In the example of the transfer channel, the transfer channel includes both an electrical data signal and an optical data signal. A corresponding receiving channel is defined by the optical data signal received by the coupler chip 19 on the bottommost Rx interconnecting waveguide 22, which causes the bottom receiver 1 to generate an electrical data signal from the bottom receiving A corresponding electrical data signal of the device 1 is supplied by the TIA 14 to the bottommost Rx output 24, wherein the corresponding electrical data signal is based on the generated electrical data signal received by the TIA 14.

微控制器11能夠為任何合宜的微控制器、微處理器、中央處理單元、可場程式化閘極陣列、特定應用積體電路、...等。一個以上的微控制器11會被使用。該微控制器11能夠為一離散部件,或者,其亦能夠和該矽光晶片15整合。整合微控制器11和該矽光晶片15可能會增加該矽光晶片15的成本、複雜度、以及尺寸。 The microcontroller 11 can be any suitable microcontroller, microprocessor, central processing unit, field programmable gate array, application specific integrated circuit, etc. More than one microcontroller 11 will be used. The microcontroller 11 can be a discrete component or it can also be integrated with the calender wafer 15. Integrating the microcontroller 11 and the calendering wafer 15 may increase the cost, complexity, and size of the calendering wafer 15.

圖1中雖然顯示兩個雷射18;不過,任何合宜數量的雷射皆能夠被使用。在圖1中,雷射A被連接至調變器1、2(為清楚起見,僅有調變器1被標示為元件符號16),而雷射B則被連接至調變器3、4。然而,倘若一雷射18有足夠的電力供該些通道中的每一條通道使用的話該雷射18亦能夠被連接至該些調變器中的每一者;或者,四個雷射18可以被連接至該些調變器1至4,俾使得每一條通道皆有一個雷射可以使用。倘若使用一個以上的雷射18的話,該些雷射18能夠提供不同波長的光,俾使得不同的通道使用不同波長的光。 Although two lasers 18 are shown in Figure 1, any suitable number of lasers can be used. In Figure 1, the laser A is connected to the modulator 1, 2 (for the sake of clarity, only the modulator 1 is labeled as the component symbol 16), and the laser B is connected to the modulator 3, 4. However, if a laser 18 has sufficient power for each of the channels to be used, the laser 18 can also be connected to each of the modulators; or, four lasers 18 can It is connected to the modulators 1 to 4 so that each channel has a laser that can be used. If more than one laser 18 is used, the lasers 18 are capable of providing different wavelengths of light, such that different channels use different wavelengths of light.

舉例來說,雷射18能夠為邊緣發射器或者垂直空腔表面發射雷射(VCSEL)。該些雷射18能夠:1)被鑲嵌在傳收器10外部,其中,來自該雷射的光能夠利用一互連波導管並且可能利用耦合器晶片19而被供應至該矽光晶片15;2)被鑲嵌在一具有該傳收器10之其它器件的印刷電路板(PCB)上,舉例來說,該些其它器件包含微控制器11、雷射驅動器12、調變器驅動器13、 TIA 14、矽光晶片15、耦合器晶片19、...等,其中,來自該些雷射18的光會藉由該PCB之中的埋置有機波導管被耦合至該矽光晶片15;或者3)與該矽光晶片15整合,其範例包含:一微型封裝雷射,其通常係由一MEMS矽外殼所製成,該MEMS矽外殼含有一分散式回授雷射(Distributed FeedBack Laser,DFB雷射)、一光學球透鏡、以及一隔離器;一覆晶式p-down,其為能夠利用覆晶技術來鑲嵌的SOA(半導體光學放大器)、DFB、或是Fabry-Perot半導體雷射晶片;或是一異質整合雷射,其經常包含一III-V量子增益結構,其會創造被耦合至並且被侷限至底下之矽波導管的光。因為雷射18的效能有溫度敏感性,所以,於某些應用中,有利的方式係將雷射18被鑲嵌在矽光晶片15的外部,其可以被鑲嵌在具有其它器件的PCB上或是被鑲嵌在傳收器10外部。 For example, laser 18 can emit a laser (VCSEL) for an edge emitter or vertical cavity surface. The lasers 18 can: 1) be mounted outside the transceiver 10, wherein light from the laser can be supplied to the calender wafer 15 using an interconnecting waveguide and possibly using a coupler wafer 19; 2) being mounted on a printed circuit board (PCB) having other components of the transceiver 10, for example, the other devices including the microcontroller 11, the laser driver 12, the modulator driver 13, the TIA 14. A calender wafer 15, a coupler wafer 19, etc., wherein light from the lasers 18 is coupled to the calender wafer 15 by a buried organic waveguide in the PCB; or 3) integrated with the calender wafer 15, an example of which includes: a miniature package laser, which is usually made of a MEMS housing having a distributed feedback laser (DFB) Laser), an optical ball lens, and an isolator; a flip-chip p-down, which is an SOA (semiconductor optical amplifier), DFB, or Fabry-Perot semiconductor laser chip that can be mounted using flip chip technology Or a heterogeneously integrated laser that often contains a III-V quantum gain junction , Which creates and is coupled to the bottom is confined to silicon light waveguide. Because the performance of the laser 18 is temperature sensitive, in some applications, it is advantageous to have the laser 18 embedded in the exterior of the calender wafer 15, which can be mounted on a PCB with other devices or It is embedded outside the transceiver 10.

雷射驅動器12會被鑲嵌在傳收器10裡面,舉例來說,其包含被鑲嵌在矽光晶片15附近或被鑲嵌在矽光晶片15上;或者,雷射驅動器12亦能夠被鑲嵌在傳收器10外面,舉例來說,被鑲嵌在一主PCB(圖1中並未顯示)上。 The laser driver 12 is embedded in the transceiver 10, for example, it is embedded adjacent to the calender wafer 15 or embedded on the calender wafer 15; or the laser driver 12 can be embedded in the transmission The outside of the receiver 10, for example, is mounted on a main PCB (not shown in Figure 1).

調變器驅動器13會從Tx輸入23處接收電氣資料信號並且藉由關閉與開啟一對應的調變器16而產生一對應的放大電氣信號,其會產生一具有高位準信號與低位準信號的光學資料信號。該調變器驅動器13能夠為如圖1中所示的單一裝置,其被提供用於供所有通道使用;或者,該調變器驅動器13亦能夠為一組裝置,每一條通道皆有一個裝置可以使用。因為該些調變器16被關閉與開啟的速度會快過雷射被開啟與關閉的速度,所以,利用該些調變器16能夠達到高頻的目的。 The modulator driver 13 receives the electrical data signal from the Tx input 23 and generates a corresponding amplified electrical signal by turning off and turning on a corresponding modulator 16, which produces a high level signal and a low level signal. Optical data signal. The modulator driver 13 can be a single device as shown in FIG. 1 that is provided for use by all channels; alternatively, the modulator driver 13 can also be a group of devices, one for each channel can use. Since the speeds of the modulators 16 being turned off and on are faster than the speed at which the lasers are turned on and off, the modulators 16 can be used to achieve high frequency.

TIA 14係受控於微控制器11並且從光偵測器1至4處接收信號(為 清楚起見,接收器1至4以元件符號17來標示)。一般來說,該信號為一電流信號,其大小係以被該些接收器17偵測到的光的數額為基礎,並且TIA 14會將該電流信號轉換成一電壓信號。該TIA 14能夠為如圖1中所示的單一裝置,其被提供用於供所有通道使用;或者,該TIA 14亦能夠為一組裝置,每一條通道皆有一個裝置可以使用。 The TIA 14 is controlled by the microcontroller 11 and receives signals from the photodetectors 1 to 4 (receivers 1 to 4 are designated by the symbol 17 for clarity). Typically, the signal is a current signal based on the amount of light detected by the receivers 17, and the TIA 14 converts the current signal into a voltage signal. The TIA 14 can be a single device as shown in Figure 1, which is provided for use by all channels; alternatively, the TIA 14 can also be a group of devices, one for each channel.

矽光晶片15雖然較佳的係一由矽所製成的光學裝置;然而,亦能夠使用其它合宜的材料,舉例來說,InP或是鈮酸鋰。矽光晶片15包含一矽晶圓中能夠傳送光、控制光、及/或偵測光的任何部分。矽光晶片15的此些功能包含調變、偵測、引導、MUX/DEMUX...等。矽光晶片15亦能夠為如圖11與12中所示般由被焊接在一起的矽與玻璃所製成的混合式晶片。矽光晶片15通常包含操縱光的波導管(圖中並未顯示)以及被用來產生光信號的驅動器16。矽光晶片15之中的典型波導管的剖面維度目前雖然為約0.3μmx0.3μm;不過,亦可以使用其它合宜的尺寸。於本發明的某些較佳實施例中,矽光晶片15會包含被形成在埋置於一二氧化矽基質中的氮化矽條紋之中的波導管。由於氮化矽與二氧化矽之間的較小折射率差異的關係,此些波導管通常會有較大的模態尺寸(mode size)。 The calender wafer 15 is preferably an optical device made of tantalum; however, other suitable materials can be used, for example, InP or lithium niobate. The calender wafer 15 includes any portion of a wafer that is capable of transmitting light, controlling light, and/or detecting light. Such functions of the silicon wafer 15 include modulation, detection, booting, MUX/DEMUX, and the like. The calender wafer 15 can also be a hybrid wafer made of tantalum and glass that are welded together as shown in Figures 11 and 12. The calender wafer 15 typically includes a waveguide that manipulates light (not shown) and a driver 16 that is used to generate the optical signal. The cross-sectional dimension of a typical waveguide in the calender wafer 15 is currently about 0.3 μm x 0.3 μm; however, other suitable dimensions can be used. In certain preferred embodiments of the invention, the calendering wafer 15 will comprise a waveguide formed in a tantalum nitride strip embedded in a ceria matrix. Due to the small refractive index difference between tantalum nitride and ruthenium dioxide, such waveguides typically have a larger mode size.

耦合器晶片19為一在該矽光晶片15與該些互連波導管21、22之間傳輸光學信號的裝置。該耦合器晶片19能夠為在該矽光晶片15與該(些)互連波導管21、22之間提供一光學路徑的任何裝置。該耦合器晶片19會具有被動式光學功能,舉例來說,其包含MUX/DEMUX。該耦合器晶片19能夠改變光的方向並且能夠改變光的模態尺寸。舉例來說,倘若矽光晶片15以垂直方式或是接近垂直方式發光的話,那麼,耦合器晶片19便會重新引導該垂直光,俾使得其會在水平方向或是接近水平方向中傳導。模態轉換器20會改變光的模態尺寸,其能夠在各種光學介面處提供有效的耦合,同時保持該些介面處的對齊容限值。舉例來說,從矽光晶片15處發出的光會具有約0.3μmx0.3μm的剖面模態尺寸,並且 該互連波導管的剖面模態尺寸的直徑在單模態光纖中能夠為9μm。模態轉換器20會改變該已發射的光剖面尺寸,以便匹配或是接近匹配互連波導管21、22的剖面尺寸。在Rx通道中可能未必需要模態轉換器20,因為光並不需要被模態匹配至該光偵測器之中,也就是,即使光的剖面尺寸小於該光偵測器,該光偵測器仍然能夠有效地偵測該光。耦合器晶片19能夠由矽、玻璃、或是矽與玻璃兩者來製成,其中,矽與玻璃被陽極焊接在一起。耦合器晶片19較佳的係由熱膨脹係數和矽光晶片15的熱膨脹係數雷同的材料所製成,俾使得在操作期間,當傳收器10的溫度提高時,該兩個裝置仍會保持對齊並且不會彎折或扭轉(或者,彎折與扭轉大幅地降低或最小化)。 The coupler wafer 19 is a device that transmits an optical signal between the calender wafer 15 and the interconnected waveguides 21, 22. The coupler wafer 19 can be any device that provides an optical path between the calender wafer 15 and the interconnecting waveguides 21, 22. The coupler die 19 will have passive optical functionality, for example, which includes a MUX/DEMUX. The coupler wafer 19 is capable of changing the direction of light and is capable of changing the modal dimensions of the light. For example, if the calender wafer 15 is illuminated in a vertical or near vertical manner, the coupler wafer 19 will redirect the vertical light such that it will conduct in a horizontal or near horizontal direction. The modal converter 20 changes the modal size of the light, which provides effective coupling at various optical interfaces while maintaining alignment tolerances at the interfaces. For example, light emitted from the calender wafer 15 will have a cross-sectional modal size of about 0.3 μm x 0.3 μm, and the cross-sectional modal size of the interconnected waveguide can be 9 μm in a single-mode optical fiber. The modal converter 20 changes the transmitted light profile size to match or closely match the cross-sectional dimensions of the interconnected waveguides 21, 22. The modal converter 20 may not necessarily be needed in the Rx channel because the light does not need to be modally matched to the photodetector, that is, even if the cross-sectional size of the light is smaller than the photodetector, the photodetection The device is still able to effectively detect the light. The coupler wafer 19 can be made of tantalum, glass, or both tantalum and glass, wherein the tantalum and the glass are anodically welded together. The coupler wafer 19 is preferably made of a material having a coefficient of thermal expansion that is identical to the coefficient of thermal expansion of the calender wafer 15, such that during operation, the two devices remain aligned as the temperature of the collector 10 increases. And it won't bend or twist (or bends and twists are greatly reduced or minimized).

在圖1中,傳收器10雖然包含具有四條對應Tx互連波導管21的四條傳送通道以及具有四條對應Rx互連波導管22的四條接收通道;然而,亦能夠包含任何合宜數量的通道。舉例來說,傳收器10能夠包含一條、六條、八條、或是十二條Tx互連波導管21以及對應的一條、六條、八條、或是十二條Rx互連波導管22。除了傳收器10之外,取而代之的係,亦能夠使用僅具有一條或是更多條Tx互連波導管21的傳送器,或者,亦能夠使用僅具有一條或是更多條Rx互連波導管22的接收器。 In Figure 1, the transceiver 10 includes four transmission channels having four corresponding Tx interconnecting waveguides 21 and four receiving channels having four corresponding Rx interconnecting waveguides 22; however, any suitable number of channels can be included. For example, the transceiver 10 can include one, six, eight, or twelve Tx interconnecting waveguides 21 and corresponding one, six, eight, or twelve Rx interconnecting waveguides twenty two. In addition to the transceiver 10, instead of a transmitter having only one or more Tx interconnecting waveguides 21, it is also possible to use only one or more Rx interconnected waves. The receiver of the catheter 22.

互連波導管21、22較佳的係光纖。該些光纖能夠為單獨的光纖或者能夠為被排列成束狀或帶狀的一光纖陣列。該些互連波導管21、22亦能夠為一以撓性聚合物為基礎的波導管帶或是一由矽或特定其它合宜材料所製成的中介片晶片。光纖通常包含一被纖殼30包圍的核心31,舉例來說,如圖5中所示。該些光纖能夠為單模態或是多模態。舉例來說,單模態光纖的核心會具有約9μm的剖面尺寸,而多模態光纖的核心則會具有約50μm或是約62.5μm的剖面尺寸。該些光纖能夠如圖21與22中所示般地被永久地附接至該傳收器10(也就是,尾纖式光纖),或者能夠如圖23與24中所示般地可脫離該傳收器(也就是,連接器式光 纖)。 The interconnecting waveguides 21, 22 are preferably optical fibers. The fibers can be individual fibers or can be an array of fibers arranged in a bundle or ribbon. The interconnecting waveguides 21, 22 can also be a flexible polymer based waveguide tape or an interposer wafer made of tantalum or certain other suitable materials. The fiber typically includes a core 31 surrounded by a shell 30, for example, as shown in FIG. The fibers can be single mode or multimodal. For example, the core of a single mode fiber will have a cross-sectional dimension of about 9 [mu]m, while the core of a multimode fiber will have a cross-sectional dimension of about 50 [mu]m or about 62.5 [mu]m. The fibers can be permanently attached to the transceiver 10 (i.e., pigtail fiber) as shown in Figures 21 and 22, or can be detached as shown in Figures 23 and 24. Transmitter (ie, connector fiber).

連接器25能夠為任何合宜的連接器,舉例來說,其包含由位於美國印第安納州的新奧爾巴尼市的Samtec,Inc.所販售的UEC5連接器。可能會使用一個以上的連接器25。單一連接器25能夠被用來收納該些Tx輸入23以及Rx輸出24;或者,其中一個連接器能夠用於Tx輸入23以及另一個連接器能夠用於Rx輸出24。 Connector 25 can be any suitable connector, for example, which includes a UEC5 connector sold by Samtec, Inc. of New Albany, Indiana, USA. More than one connector 25 may be used. A single connector 25 can be used to house the Tx inputs 23 and the Rx outputs 24; alternatively, one of the connectors can be used for the Tx input 23 and the other connector can be used for the Rx output 24.

本發明較佳實施例的傳收器10能夠被施行為雷同於在美國申請案第13/539,173號、第13/758,464號、第13/895,571號、第13/950,628號、以及第14/295,367號中所揭示之傳收器的傳收器,本文以引用的方式將該些申請案的完整內容併入。除了使用此些申請案中所揭示的光學引擎之外,取而代之的係,傳收器10亦可以使用以矽光為基礎的光學引擎,其可以有較小的尺寸、較高的速度、較大的頻寬、較高的效率、以及較長的信號行進距離。圖1中雖然並未顯示;不過,傳收器10會包含被連接至該傳收器10之各種器件的一或更多個散熱片,用以散熱。 The receiver 10 of the preferred embodiment of the present invention can be exemplified in U.S. Application Nos. 13/539,173, 13/758,464, 13/895,571, 13/950,628, and 14/295,367. The transceiver of the transceiver disclosed in the number is incorporated herein by reference in its entirety. In addition to using the optical engine disclosed in these applications, instead of the system, the transceiver 10 can also use a twilight-based optical engine that can be smaller in size, higher in speed, larger. Bandwidth, higher efficiency, and longer signal travel distance. Although not shown in FIG. 1; however, the transceiver 10 will include one or more heat sinks connected to the various components of the transceiver 10 for heat dissipation.

圖2所示的係根據本發明一較佳實施例的另一矽光系統的方塊圖。圖2中的矽光系統雷同於圖1中的矽光系統,雷同的元件係以相同的元件符號來標示。圖2中的傳收器10包含四個雷射1至4(為清楚起見,僅有雷射1以元件符號18來標示),每一個雷射18有不同的波長。圖2中的耦合器晶片19較佳的係利用多工器(MUX)26以及解多工器(DEMUX)27來提供波長分工。圖2中的耦合器晶片19雖然並未顯示模態轉換器20;不過,該些模態轉換器20會被放置在該耦合器晶片19之中,可能位於該些不同通道中的MUX 26以及DEMUX 27的前面或後面。MUX 26及/或DEMUX 27較佳的係被形成在具有低熱膨脹係數的玻璃上,而且該玻璃的折射率不會隨著溫度大幅地改變。 2 is a block diagram of another glazing system in accordance with a preferred embodiment of the present invention. The calendering system of Fig. 2 is identical to the calendering system of Fig. 1, and the same components are denoted by the same reference numerals. The transceiver 10 of Figure 2 contains four lasers 1 through 4 (for clarity only laser 1 is indicated by component symbol 18), each of which has a different wavelength. The coupler chip 19 of Figure 2 preferably utilizes a multiplexer (MUX) 26 and a demultiplexer (DEMUX) 27 to provide wavelength division. The coupler die 19 of FIG. 2, although not shown, modal converter 20; however, the modal converters 20 will be placed in the coupler die 19, possibly in the different channels of the MUX 26 and Front or back of the DEMUX 27. MUX 26 and/or DEMUX 27 are preferably formed on glass having a low coefficient of thermal expansion, and the refractive index of the glass does not vary greatly with temperature.

MUX 26會結合該些傳送通道的光學信號,俾使得所有該些傳送 通道的光學信號會在相同的Tx互連波導管21中往下傳送。DEMUX 27會分離所有接收通道中接收自單一互連波導管22的光學信號。因為該些通道對應於不同波長的光的關係,所以,可以對光學信號進行此結合與分離。圖2中的結合比例為4:1而分離比例為1:4;不過,亦可以使用其它比例。舉例來說,倘若傳收器10有12條傳送通道以及12條接收通道的話,那麼,結合比例可以為12:3或12:1,而分離比例可以為3:12或1:12。12:3或3:12的比例需要三條互連波導管,而非一條。 The MUX 26 combines the optical signals of the transmission channels such that all of the optical signals of the transmission channels are carried down in the same Tx interconnecting waveguide 21. The DEMUX 27 separates the optical signals received from a single interconnected waveguide 22 in all receive channels. Since the channels correspond to light of different wavelengths, this combination and separation of the optical signals can be performed. The combination ratio in Figure 2 is 4:1 and the separation ratio is 1:4; however, other ratios can also be used. For example, if the transceiver 10 has 12 transmission channels and 12 reception channels, the combination ratio can be 12:3 or 12:1, and the separation ratio can be 3:12 or 1:12. 12: A ratio of 3 or 3:12 requires three interconnected waveguides instead of one.

在圖2中,該些通道較佳的係操作於在通道之間有20nm波長間隔的O頻帶之中;不過,亦可以採用不同的頻帶以及不同的波長間隔。 In Figure 2, the channels are preferably operated in an O-band with a 20 nm wavelength spacing between the channels; however, different frequency bands and different wavelength spacings may be employed.

圖3與4所示的係能夠用於圖2中所示的矽光系統中的耦合器晶片19。如圖3中所示,該耦合器晶片19會被鑲嵌在矽光晶片15的頂端。該耦合器晶片19以及該矽光晶片15的典型維度為約0.5mm至約1mm的厚度,約5mm的寬度,以及約5mm的長度。亦可以採用其它尺寸。 The series shown in Figures 3 and 4 can be used for the coupler wafer 19 in the calendering system shown in Figure 2. As shown in FIG. 3, the coupler wafer 19 is embedded in the top end of the calender wafer 15. Typical dimensions of the coupler wafer 19 and the calendered wafer 15 are from about 0.5 mm to about 1 mm, a width of about 5 mm, and a length of about 5 mm. Other sizes are also possible.

圖3與4中所示的耦合器晶片19包含一MUX 26以及一DEMUX 27。單一Tx互連波導管21以及單一Rx互連波導管22會被連接至該些耦合器晶片19。該些耦合器晶片19可以包含一條以上的互連波導管21、22以及一個以上的對應MUX 26與DEMUX 27。在圖3與4中,該些耦合器晶片19包含六個Tx轉向結構28以及六個Rx轉向結構29,該些Tx轉向結構28會轉向接收自矽光晶片15的垂直光,而該些Rx轉向結構29會轉向接收自DEMUX 27的水平光。該些六個轉向結構28、29中的每一者係用於一對應波長λ16中。圖3中的耦合器晶片19雖然包含六條傳送通道以及六條接收通道;不過,可以使用任何數量的傳送通道以及接收通道。該些Tx轉向結構28被連接至MUX 26,俾使得該些光學信號會被結合並且經由Tx互連波導管21被傳送。Rx互連波導管22被連接至DEMUX 27,俾使該些光學信號會被分離並且經由Rx轉向結構29被傳送。在圖3中所示的MUX 26以及DEMUX 27為一埃謝勒格柵的一部分。使用埃謝勒格柵為較佳係因為其體型 小並且溫度敏感性小於其它MUX/DEMUX元件。 The coupler chip 19 shown in Figures 3 and 4 includes a MUX 26 and a DEMUX 27. A single Tx interconnect waveguide 21 and a single Rx interconnect waveguide 22 are connected to the coupler wafers 19. The coupler wafers 19 may include more than one interconnected waveguide 21, 22 and more than one corresponding MUX 26 and DEMUX 27. In Figures 3 and 4, the coupler wafers 19 include six Tx steering structures 28 and six Rx steering structures 29 that turn to receive vertical light from the calendering wafer 15, and the Rx The steering structure 29 will turn to the horizontal light received from the DEMUX 27. Each of the six steering structures 28, 29 is used in a corresponding wavelength λ 1 - λ 6 . The coupler wafer 19 of Figure 3 includes six transfer channels and six receive channels; however, any number of transfer channels and receive channels can be used. The Tx steering structures 28 are coupled to the MUX 26 such that the optical signals are combined and transmitted via the Tx interconnecting waveguide 21. The Rx interconnect waveguide 22 is coupled to the DEMUX 27 such that the optical signals are separated and transmitted via the Rx steering structure 29. The MUX 26 and DEMUX 27 shown in Figure 3 are part of an Echelle grid. The use of an Echelle grid is preferred because of its small size and temperature sensitivity compared to other MUX/DEMUX elements.

倘若耦合器晶片19要被使用在傳送器之中而非被使用在傳收器10之中的話,那麼,便僅需要MUX 26以及Tx互連波導管21。倘若該耦合器晶片19要被使用在接收器之中而非被使用在傳收器10之中的話,那麼,便僅需要DEMUX 27以及Rx互連波導管22。 If the coupler wafer 19 is to be used in the transmitter instead of being used in the transceiver 10, then only the MUX 26 and the Tx interconnecting waveguide 21 are required. If the coupler wafer 19 is to be used in a receiver rather than in the transceiver 10, then only the DEMUX 27 and the Rx interconnected waveguide 22 are required.

圖5所示的係一波長選擇格柵,其被作為DEMUX 27。圖5中的波長選擇格柵雖然提供四條通道;不過,亦可以使用任何其它數量的通道。該波長選擇格柵在耦合器晶片19的通道波導管32中包含四條通道格柵。為清楚起見,該些通道格柵中僅有其中一條被標示為33。在該波長選擇格柵中的其中一條通道包含Rx互連波導管22、通道格柵33、以及通道偵測器34。通道射束35(其包含該些光學信號)會被傳輸經過Rx互連波導管22、通道格柵33、以及通道偵測器34。該通道射束35較佳的係在耦合器晶片19與矽光晶片15之間的間隙之中垂直於該耦合器晶片19與該矽光晶片15的表面。圖5所示的係用於DEMUX 27的排列。雷同的排列亦能夠當作MUX 26。 The one-wavelength selection grid shown in FIG. 5 is used as the DEMUX 27. The wavelength selective grid of Figure 5 provides four channels; however, any other number of channels can be used. The wavelength selective grid includes four channel gratings in the channel waveguide 32 of the coupler wafer 19. For the sake of clarity, only one of the channel grids is designated 33. One of the channels in the wavelength selective grid includes an Rx interconnecting waveguide 22, a channel grid 33, and a channel detector 34. A channel beam 35 (which includes the optical signals) is transmitted through the Rx interconnecting waveguide 22, the channel grid 33, and the channel detector 34. The channel beam 35 is preferably perpendicular to the surface of the coupler wafer 19 and the calender wafer 15 in the gap between the coupler wafer 19 and the calender wafer 15. The arrangement shown in Figure 5 is for the arrangement of the DEMUX 27. The same arrangement can also be considered as MUX 26.

圖6所示的係具有能夠當作DEMUX 27之具有方向耦合器36與格柵耦合器37的分色濾光器。方向耦合器36與格柵耦合器37具有波長敏感性,其會減少通道串訊。方向耦合器36較佳的係一能夠將光學功率分割成兩個光學通道的無損失裝置。該些格柵耦合器37能夠由微型加工面鏡來取代。方向耦合器36與格柵耦合器37通常有極化敏感性。每一條通道皆包含一分離的方向耦合器36與一格柵耦合器37用於橫向電氣(Tranverse Electrical,TE)極化以及用於橫向磁性(Tranverse Magnetic,TM)極化。兩種極化會在一光偵測器(圖6中並未顯示)處進行空間結合,俾使得能夠在每一條通道中使用單一光偵測器。或者,該些極化亦能夠進行角度結合,或是使用一極化射束結合結構。圖6雖然顯示用於DEMUX 27的排列;不過,雷同的排列亦能夠當作MUX 26,但是,並不需要考 量不同的極化,因為雷射源的極化通常有良好的定義。 Shown in Figure 6 is a dichroic filter having a directional coupler 36 and a grid coupler 37 that can be considered as a DEMUX 27. Directional coupler 36 and grid coupler 37 have wavelength sensitivity which reduces channel crosstalk. Directional coupler 36 is preferably a lossless device capable of splitting optical power into two optical channels. The grid couplers 37 can be replaced by micromachined mirrors. Directional coupler 36 and grid coupler 37 are typically polarization sensitive. Each channel includes a separate directional coupler 36 and a grid coupler 37 for transverse electrical (TE) polarization and for transverse magnetic (TM) polarization. The two polarizations are spatially combined at a photodetector (not shown in Figure 6), enabling the use of a single photodetector in each channel. Alternatively, the polarizations can also be angularly combined or a polarized beam bonded structure. Although Figure 6 shows an arrangement for the DEMUX 27; however, the same arrangement can also be considered as the MUX 26, but it is not necessary to consider different polarizations because the polarization of the laser source is generally well defined.

可以不使用圖3至6中所示的埃謝勒格柵、波長選擇格柵、以及分色濾光器,取而代之的係,可以使用陣列式波導管格柵、其它分色濾光器、或是共振干涉濾波器作為MUX 26及/或DEMUX 27。 Instead of using the Echeler grid, wavelength selective grid, and dichroic filter shown in Figures 3 through 6, an arrayed waveguide grille, other dichroic filters, or It is a resonant interference filter as MUX 26 and/or DEMUX 27.

圖7所示的係被連接至矽光晶片15的耦合器晶片19。該接收通道包含Rx互連波導管22以及通道偵測器34。在一傳送通道中會使用Tx互連波導管21取代Rx互連波導管22,並且使用一通道雷射54而並非通道偵測器34。該接收通道會在該Rx互連波導管22與該通道偵測器34之間提供一光路徑,而該傳送通道則會在該Tx互連波導管21與該通道雷射54之間提供一光路徑。該耦合器晶片19以及該矽光晶片15會包含用於操控通道射束35的各種結構。耦合器晶片19會包含透鏡42,而矽光晶片15則會包含透鏡43。該耦合器晶片19包含一包含被動式波導管的光層38,其包含Rx轉向結構29。該Rx轉向結構29會包含一微型加工表面或是一表面格柵。該微型加工表面會使用完全內反射或者會包含一反射塗層。該微型加工表面能夠為平坦狀或者能夠為彎曲用以如圖8至10、32、以及33中所示般地聚焦該通道射束35。互連波導管21、22的末端表面亦能夠被彎折用以取代轉向結構29。在傳送通道中,該矽光晶片15包含一包含主動式波導管的光層39,圖7中雖然並未顯示;但是,其包含調變器16。在接收通道中,該矽光晶片15的光層39並不需要有主動式波導管。在圖7中,該耦合器晶片19的光層38雖然位於頂端表面;但是,該光層38亦能夠位於該耦合器晶片19的底部表面。同樣地,該矽光晶片15的光層39雖然位於底部表面;但是,該光層39亦能夠位於該矽光晶片15的頂端表面。該耦合器晶片19與該矽光晶片15皆會包含一塗層(舉例來說,介電質,例如,氮化矽或氧化矽),用以減少傳送通道與接收通道中的反向反射。 The series shown in FIG. 7 is connected to the coupler wafer 19 of the calender wafer 15. The receive channel includes an Rx interconnect waveguide 22 and a channel detector 34. Instead of the Rx interconnecting waveguide 22, a Tx interconnecting waveguide 21 is used in a transfer channel and a channel of lasers 54 is used instead of the channel detector 34. The receiving channel provides a light path between the Rx interconnecting waveguide 22 and the channel detector 34, and the transmitting channel provides a path between the Tx interconnecting waveguide 21 and the channel laser 54 Light path. The coupler wafer 19 and the calender wafer 15 will contain various structures for manipulating the channel beam 35. The coupler wafer 19 will contain a lens 42 and the calender wafer 15 will contain a lens 43. The coupler wafer 19 includes an optical layer 38 comprising a passive waveguide that includes an Rx steering structure 29. The Rx steering structure 29 will include a micromachined surface or a surface grid. The micromachined surface will use complete internal reflection or will contain a reflective coating. The micromachined surface can be flat or can be curved to focus the channel beam 35 as shown in Figures 8 through 10, 32, and 33. The end surfaces of the interconnecting waveguides 21, 22 can also be bent to replace the steering structure 29. In the transfer channel, the calendering wafer 15 comprises an optical layer 39 comprising an active waveguide, although not shown in FIG. 7; however, it comprises a modulator 16. In the receiving channel, the optical layer 39 of the calendering wafer 15 does not require an active waveguide. In FIG. 7, the optical layer 38 of the coupler wafer 19 is located on the top surface; however, the optical layer 38 can also be located on the bottom surface of the coupler wafer 19. Similarly, the light layer 39 of the calender wafer 15 is located on the bottom surface; however, the light layer 39 can also be located on the top surface of the calender wafer 15. Both the coupler wafer 19 and the calender wafer 15 may include a coating (for example, a dielectric such as tantalum nitride or hafnium oxide) to reduce back reflection in the transfer channel and the receive channel.

圖8至10、32、以及33所示的係用於耦合器晶片19以及矽光晶片 15的各種可能的光學排列。圖8顯示一種具有單一彎曲表面的排列並且包含平坦的Rx轉向結構29、沒有透鏡43的平坦矽光晶片15、以及耦合器晶片19上的透鏡42,其優點係僅需要一個彎曲表面。圖9顯示一種具有三個彎曲表面的排列並且包含彎曲的Rx轉向結構29、矽光晶片15上的透鏡43、以及耦合器晶片19上的透鏡42,其在矽光晶片15與耦合器晶片19之間的間隙中提供一準直射束。圖10顯示一種具有兩個彎曲表面以及一個平坦表面的排列並且包含彎曲的Rx轉向結構29、沒有透鏡43的平坦矽光晶片15、以及耦合器晶片19上的透鏡42,其好處係在該矽光晶片15的頂端提供一平坦表面,俾使得在對矽光晶片15的此表面上不需要任何處理或是僅需要最少的處理。在圖32與33中,彼此相向的矽光晶片15的表面以及耦合器晶片19的表面為平坦,並且在該矽光晶片15與該耦合器晶片19之間沒有任何空間。圖32顯示一種具有單一彎曲表面的排列並且包含一平坦的Rx轉向結構29、沒有透鏡43的平坦矽光晶片15、以及位在耦合器晶片19上但是沒有面向該矽光晶片15的透鏡42,其優點係僅需要一個彎曲表面。圖33顯示一種具有單一彎曲表面的排列並且包含一彎曲的Rx轉向結構29、平坦矽光晶片15、以及平坦的耦合器晶片19,其優點係僅需要一個彎曲表面。 The various possible optical arrangements for the coupler wafer 19 and the calendering wafer 15 are shown in Figures 8 through 10, 32, and 33. Figure 8 shows an arrangement having a single curved surface and comprising a flat Rx turning structure 29, a flat calendering wafer 15 without a lens 43, and a lens 42 on the coupler wafer 19, with the advantage that only one curved surface is required. Figure 9 shows an arrangement having three curved surfaces and comprising a curved Rx steering structure 29, a lens 43 on the calender wafer 15, and a lens 42 on the coupler wafer 19 on the calender wafer 15 and the coupler wafer 19 A collimated beam is provided in the gap between them. Figure 10 shows an arrangement having two curved surfaces and a flat surface and comprising a curved Rx turning structure 29, a flat calendering wafer 15 without a lens 43, and a lens 42 on the coupler wafer 19, the benefit of which is The top end of the optical wafer 15 provides a flat surface so that no processing is required on this surface of the calender wafer 15 or only minimal processing is required. In Figs. 32 and 33, the surfaces of the calender wafer 15 facing each other and the surface of the coupler wafer 19 are flat, and there is no space between the calender wafer 15 and the coupler wafer 19. 32 shows an arrangement having a single curved surface and comprising a flat Rx turning structure 29, a flat calendering wafer 15 without a lens 43, and a lens 42 positioned on the coupler wafer 19 but without facing the calendering wafer 15, The advantage is that only one curved surface is required. Figure 33 shows an arrangement having a single curved surface and comprising a curved Rx turning structure 29, a flat calendering wafer 15, and a flat coupler wafer 19, the advantage of which is only one curved surface.

通道射束35會被準直(圖9)或者沒有被準直(圖8、10、32、以及33)。該通道射束35可能位在一傾斜角度處,也就是,沒有垂直,如圖8至10、32、以及33中所示。較佳的係,該通道射束35在該矽光晶片15與該耦合器晶片19之間的間隙區域中會被準直或者接近準直。此區域中相對大的射束尺寸(也就是,約20μm至約100μm)會放鬆該矽光晶片15與該耦合器晶片19之間的對齊容限值。有一平坦矽光晶片15的圖8、10、32、以及33不需要在矽光晶片15的其中一側提供表面特徵元件。端視光學佈局而定,舉例來說,位在該矽光晶片15的頂端表面的特徵元件以及位在該矽光晶片15的底部表面的特徵元件之間的必要對齊為±1μm。要達成此精確程度會非常困難並且昂貴。於一具有準直射束的理想 系統中,矽光晶片15與耦合器晶片19之間的位置對齊誤差不會在聚焦處造成任何位移。雖然可能會有角度偏移;但是,互連波導管21、22以及通道偵測器34的角度敏感性小於位置敏感性。 The channel beam 35 will be collimated (Fig. 9) or not collimated (Figs. 8, 10, 32, and 33). The channel beam 35 may be located at an oblique angle, that is, without vertical, as shown in Figures 8 through 10, 32, and 33. Preferably, the channel beam 35 is collimated or nearly collimated in the region of the gap between the calender wafer 15 and the coupler wafer 19. The relatively large beam size in this region (i.e., from about 20 [mu]m to about 100 [mu]m) relaxes the alignment tolerance between the calender wafer 15 and the coupler wafer 19. Figures 8, 10, 32, and 33 having a flat calender wafer 15 need not provide surface features on one side of the calender wafer 15. Depending on the optical layout, for example, the necessary alignment between the feature elements located on the top end surface of the calender wafer 15 and the feature elements located on the bottom surface of the calender wafer 15 is ±1 μm. It can be very difficult and expensive to achieve this level of precision. In an ideal system with a collimated beam, the position alignment error between the calender wafer 15 and the coupler wafer 19 does not cause any displacement at the focus. Although there may be an angular offset; however, the angular sensitivity of the interconnecting waveguides 21, 22 and the channel detector 34 is less than positional sensitivity.

圖8至10、32、以及33中所示的各種彎曲表面以及圖7中所示的透鏡能夠利用雷射加工來製造,其中,一超快速的雷射(舉例來說,皮秒(pico second)或是飛秒(femto second)脈衝寬度)會在一表面上方移動,用以產生該彎曲表面。利用雷射加工所進行的燒蝕性材料移除會留下在某些應用中需要進行後置處理的光學粗糙表面。雷射加工會在耦合器晶片19及/或分隔體56(下面會作討論)的表面底下進行,用以顯著地減少或最小化需要被燒蝕移除的材料的數額。雷射加工雖然僅會移除該雷射被聚焦的位置處的材料;但是,雷射加工卻會下切廣大的材料部分,該些部分接著能夠藉由另一製程來移除。雷射加工在形成結構時提供很大的自由度,舉例來說,其包含具有不同曲率及配向的透鏡以及面鏡。可以使用熱研磨製程來磨平雷射加工中的任何殘餘粗糙。亦可以使用一超快速雷射藉由局部性修正耦合器晶片19裡面的折射率而形成該耦合器晶片之中的波導管。 The various curved surfaces shown in Figures 8 through 10, 32, and 33 and the lens shown in Figure 7 can be fabricated using laser processing, wherein an ultra-fast laser (for example, pico second) Or a femto second pulse width) moves over a surface to create the curved surface. Ablative material removal using laser processing leaves an optically rough surface that requires post processing in some applications. Laser processing can be performed under the surface of coupler wafer 19 and/or separator 56 (discussed below) to significantly reduce or minimize the amount of material that needs to be removed by ablation. Laser processing removes only the material at the location where the laser is focused; however, laser processing cuts down a large portion of the material that can then be removed by another process. Laser processing provides a great deal of freedom in forming the structure, for example, it includes lenses with different curvatures and alignments and mirrors. A thermal polishing process can be used to smooth any residual roughness in the laser processing. The waveguide in the coupler wafer can also be formed by locally correcting the index of refraction within the coupler wafer 19 using an ultra-fast laser.

矽光晶片15包含一或更多個通道偵測器34及/或一或更多個通道雷射54。該些通道偵測器34會以一體成形的方式被整合至該矽光晶片15之中,或者會被表面鑲嵌至該矽光晶片15。一體成形整合的通道偵測器34會包含具有約0.4A/W(@1310nm處)響應值的Ge/Si裝置;而表面鑲嵌的通道偵測器34則會包含具有約0.9A/W(@1310nm處)響應值的InGaAs裝置,其響應值約為一體成形整合通道偵測器的兩倍。該通道偵測器34能夠為一提供波長過濾的共振凹腔增強偵測器,或者能夠為一環形共振器。圖27所示的係矽光晶片15的一範例,其中,該通道偵測器34以及該TAI 14被表面鑲嵌至光層39,較佳的係,彼此靠近。該通道偵測器34的直徑會相依於所需要的頻寬而改變。較高頻寬的系統會有小直徑 的通道偵測器34。舉例來說,10Gbps的系統可以有約70μm的偵測器直徑,而28Gbps的系統可以有約22μm的偵測器直徑。 The calender wafer 15 includes one or more channel detectors 34 and/or one or more channel lasers 54. The channel detectors 34 are integrated into the calender wafer 15 in an integrally formed manner or may be surface mounted to the calender wafer 15. The integrally formed channel detector 34 will include a Ge/Si device having a response value of about 0.4 A/W (at @1310 nm); and the surface-mounted channel detector 34 will contain about 0.9 A/W (@ The InGaAs device with a response value at 1310 nm has a response value that is approximately twice that of an integrally formed integrated channel detector. The channel detector 34 can be a resonant cavity enhanced detector that provides wavelength filtering, or can be a ring resonator. An example of a stroboscopic wafer 15 is shown in Figure 27, wherein the channel detector 34 and the TAI 14 are surface mounted to the optical layer 39, preferably in close proximity to one another. The diameter of the channel detector 34 will vary depending on the desired bandwidth. A higher bandwidth system will have a small diameter channel detector 34. For example, a 10 Gbps system can have a detector diameter of about 70 μm, while a 28 Gbps system can have a detector diameter of about 22 μm.

矽光晶片15較佳的係利用覆晶技術(舉例來說,其包含球柵陣列(Ball Grid Array,BGA)41)被連接至PCB 40。其它器件(舉例來說,其包含雷射驅動器12、調變器驅動器13、以及TIA 14、...等)亦能夠使用短柱凸塊覆晶技術。PCB 40較佳的係包含一凹口44,其包含一熱化合物45,該熱化合物45會接觸通道偵測器34或通道雷射54。 The phosphor wafer 15 is preferably connected to the PCB 40 by flip chip technology (which includes, for example, a Ball Grid Array (BGA) 41). Other devices (for example, including laser driver 12, modulator driver 13, and TIA 14, etc.) can also use short pillar bump flip chip technology. The PCB 40 preferably includes a recess 44 that includes a thermal compound 45 that contacts the channel detector 34 or the channel laser 54.

耦合器晶片19與矽光晶片15會分隔一間隙,俾使得由該矽光晶片15所產生的熱從該矽光晶片15至該耦合器晶片19有不良的熱路徑。倘若UV光能夠被傳送穿過該耦合器晶片19的話,該間隙則會被UV固化黏著劑填充。舉例來說,該間隙能夠為約20μm至約50μm。利用該耦合器晶片19與該矽光晶片15之間的間隙,該耦合器晶片19與該矽光晶片15會彼此對齊,用以確保所有通道的正確操作。該些對齊特徵元件會有不同的自由度。舉例來說,矽光晶片15上的固定式對齊球體55會扣接耦合器晶片19之中的點接點51、線接點52、以及平面接點53,如圖17與18中所示。此排列能夠倒置,俾使得該些對齊球體55位於耦合器晶片19上,而接點51、52、53則位於矽光晶片15上。該些接點51、52、53會被微型加工、能夠藉由光微影術以及各向異性蝕刻來形成、或者能夠藉由雷射加工製程來形成。該些對齊球體55會被固定於凹部之中。或者,該些對齊球體55亦能夠利用被形成在矽光晶片15(或是耦合器晶片19)的表面上的對齊突出部來取代。該些對齊球體能夠由玻璃製成。 The coupler wafer 19 and the calender wafer 15 are separated by a gap such that heat generated by the calender wafer 15 has a poor thermal path from the calender wafer 15 to the coupler wafer 19. This gap is filled with UV curable adhesive provided that UV light can be transmitted through the coupler wafer 19. For example, the gap can be from about 20 [mu]m to about 50 [mu]m. Using the gap between the coupler wafer 19 and the calender wafer 15, the coupler wafer 19 and the calender wafer 15 are aligned with one another to ensure proper operation of all channels. These alignment features have different degrees of freedom. For example, the fixed alignment balls 55 on the calender wafer 15 will snap up the point contacts 51, the line contacts 52, and the planar contacts 53 in the coupler wafer 19, as shown in FIGS. 17 and 18. This arrangement can be inverted such that the alignment balls 55 are on the coupler wafer 19 and the contacts 51, 52, 53 are on the calender wafer 15. The contacts 51, 52, 53 are micromachined, can be formed by photolithography and anisotropic etching, or can be formed by a laser processing process. The alignment balls 55 are fixed in the recesses. Alternatively, the alignment balls 55 can be replaced with alignment protrusions formed on the surface of the calender wafer 15 (or the coupler wafer 19). The alignment spheres can be made of glass.

在圖17中,該矽光晶片15包含各向異性蝕刻的倒角錐體,該些對齊球體55會被固定於其中。在圖18中,該耦合器晶片19包含多個匹配凹口,它們會定義接點51、52、53。該些對齊球體55提供一剛性連接,而該些接點51、52、53則被排列成用以防止因為該矽光晶片15與該耦合器晶片19的熱膨脹係數 差異所造成的彎折與扭轉。本技術領域希望避免或最小化彎折與扭轉,因為彎折與扭轉會導致耦合效率下降並且導致傳收器10無法操作。避免或最小化熱誘發的彎折與扭轉會提高傳收器10的操作溫度範圍。 In Fig. 17, the calendering wafer 15 comprises an anisotropically etched chamfer, and the alignment spheres 55 are fixed therein. In Figure 18, the coupler wafer 19 includes a plurality of matching notches that define contacts 51, 52, 53. The alignment balls 55 provide a rigid connection, and the contacts 51, 52, 53 are arranged to prevent bending and twisting caused by the difference in thermal expansion coefficient between the calender wafer 15 and the coupler wafer 19. . It is desirable in the art to avoid or minimize bending and torsion because bending and torsion can result in reduced coupling efficiency and render the transceiver 10 inoperable. Avoiding or minimizing thermally induced bending and torsion increases the operating temperature range of the transceiver 10.

矽光晶片15與耦合器晶片19會藉由在固化期間收縮的順從性黏著劑而被固定在一起。該順從性黏著劑能夠藉由將該順從性黏著劑注入於該耦合器晶片19上的直通孔59之中來供應。該順從性黏著劑雖然能夠被UV固化;不過,這必非係必要條件。 The calender wafer 15 and the coupler wafer 19 are secured together by a compliant adhesive that shrinks during curing. The compliant adhesive can be supplied by injecting the compliant adhesive into the through holes 59 in the coupler wafer 19. The compliant adhesive can be UV cured; however, this must not be a necessary condition.

除了圖8至10、32、以及33中所示的透鏡排列之外,亦能夠如圖11至15中所示般地使用各種其它技術來修正該通道射束的尺寸。此些技術以及透鏡排列能夠分開使用以及組合使用。 In addition to the lens arrangement shown in Figures 8 through 10, 32, and 33, various other techniques can be used to correct the size of the channel beam as shown in Figures 11-15. These techniques, as well as lens arrangements, can be used separately and in combination.

圖11以及12所示的係一種混合式矽光晶片57,其包含一被附接至矽光晶片15的分隔體56。該分隔體56的厚度能夠為約0.5mm至數個mm。該分隔體56可以允許在該混合式矽光晶片57與該耦合器晶片19之間有更大的射束擴張,其會放鬆對齊容限值並且允許進行被動式對齊。分隔體56會包含基準標記或是微型加工結構,用以幫助對齊該耦合器晶片19與該混合式矽光晶片57。 11 and 12 are a hybrid calender wafer 57 that includes a separator 56 that is attached to a calender wafer 15. The separator 56 can have a thickness of about 0.5 mm to several mm. The separator 56 may allow for greater beam expansion between the hybrid calender wafer 57 and the coupler wafer 19, which relaxes the alignment tolerance and allows for passive alignment. The separator 56 may include fiducial marks or micromachined structures to assist in aligning the coupler wafer 19 with the hybrid calender wafer 57.

分隔體56能夠由玻璃或矽製成,和矽光晶片15為相同的材料。該分隔體56與該矽光晶片15的熱膨脹係數會匹配或是實質上匹配,用以避免超額應力累積。該分隔體56會被陽極焊接至該矽光晶片15。該分隔體56會先被焊接至一由多個矽光晶片所組成的晶圓,舉例來說,8英吋或12英吋晶圓,並且接著在焊接之後被裁切。假設75%的晶圓利用率以及5mmx5mm的晶片,那麼,從8英吋的晶圓中會取得972個裝置以及從12英吋的晶圓中會取得2188個裝置。該耦合器晶片19會在晶圓級處被附接,或者會在裁切之後才被附接。 The separator 56 can be made of glass or tantalum, and the calendering wafer 15 is the same material. The separator 56 matches or substantially matches the coefficient of thermal expansion of the calendered wafer 15 to avoid excess stress buildup. The separator 56 is anodically soldered to the calender wafer 15. The separator 56 is first soldered to a wafer of a plurality of phosphorescent wafers, for example, 8 inch or 12 inch wafers, and then cut after soldering. Assuming 75% wafer utilization and 5mm x 5mm wafers, 972 devices will be taken from a 8-inch wafer and 2188 devices will be obtained from a 12-inch wafer. The coupler wafer 19 will be attached at the wafer level or will be attached after cutting.

圖11顯示介於該混合式矽光晶片57與該耦合器晶片19之間的間隙;而圖12則顯示該混合式矽光晶片57與該耦合器晶片19被陽極焊接在一起, 其能夠在晶圓級處被實施並且能夠減少部件數。 Figure 11 shows the gap between the hybrid calender wafer 57 and the coupler wafer 19; and Figure 12 shows that the hybrid calender wafer 57 and the coupler wafer 19 are anodically bonded together, which is capable of The wafer level is implemented and the number of parts can be reduced.

圖13所示的係具有通孔58的矽光晶片15。通孔58會如圖13中所示般地具有漸細的壁部,或者會具有筆直的壁部(圖中並未顯示)。通孔58的尺寸超大,以便放鬆對齊容限值,只要通道偵測器34完全露出即可。尺寸超大的通孔58在背側矽光處理中並不需要很高的位置容限值。通孔58會被金屬化,用以提供一反射表面,其在該通道中可以不需要有任何透鏡或者可以放鬆對齊容限值。如圖13中所示,倘若使用一整合式通道偵測器34的話,該通孔58會終止於光層39處。或者,通孔58亦能夠延伸穿過該光層39。 A calendering wafer 15 having a through hole 58 is shown in FIG. The through hole 58 will have a tapered wall as shown in Fig. 13, or will have a straight wall portion (not shown). The through hole 58 is oversized to relax the alignment tolerance as long as the channel detector 34 is fully exposed. The oversized through hole 58 does not require a high position tolerance in the backside calendering process. The vias 58 are metallized to provide a reflective surface in which no lenses may be required or the alignment tolerances may be relaxed. As shown in FIG. 13, the via 58 terminates at the optical layer 39 provided an integrated channel detector 34 is used. Alternatively, the vias 58 can also extend through the optical layer 39.

圖14以及15所示的係在光層38之中具有第一波導管60與第二波導管62的耦合器晶片19。第一波導管60位於基板64(其較佳的係玻璃上)並且包含第一漸細部61。第二波導管62位於該第一波導管60的上方並且包含第二漸細部63。第一波導管60與第二波導管62被排列成使得光學能量會被消逝場(evanescent field)耦合通過第一漸細部61與第二漸細部63。 14 and 15 are coupler wafers 19 having a first waveguide 60 and a second waveguide 62 among the optical layers 38. The first waveguide 60 is located on the substrate 64 (which is preferably a tie glass) and includes a first tapered portion 61. A second waveguide 62 is located above the first waveguide 60 and includes a second tapered portion 63. The first waveguide 60 and the second waveguide 62 are arranged such that optical energy is coupled through the first tapered portion 61 and the second tapered portion 63 by an evanescent field.

較佳的係,第一波導管60與第二波導管62具有不同的光學及物理特性。舉例來說,第一波導管60與第二波導管62具有不同的尺寸,用以支援不同的模態尺寸。較大的模態尺寸能夠幫助將來自一通道雷射54的光耦合至互連波導管21,而較小的模態尺寸則能夠幫助進行MUX/DEMUX操作以及調變。 Preferably, the first waveguide 60 and the second waveguide 62 have different optical and physical properties. For example, the first waveguide 60 and the second waveguide 62 are of different sizes to support different modal dimensions. The larger modal size can help couple light from a channel of laser 54 to the interconnecting waveguide 21, while the smaller modal size can aid in MUX/DEMUX operation and modulation.

光層38較佳的係包含下面之中的至少其中一者:PMMA(聚甲基丙烯酸甲酯)、SU8光阻、矽、二氧化矽、以及氮化矽。第一波導管60與第二波導管62能夠由彼此不相同的材料製成。第一波導管60能夠由SiN製成,因為SiN波導管通常較小;而第二波導管62則能夠由SiO2製成,因為SiO2波導管的維度會妥適地匹配單模態光纖的模態尺寸。這可以讓第一波導管60被連接至MUX 26並且讓第二波導管62被連接至Tx互連波導管21。 Light layer 38 preferably comprises at least one of the following: PMMA (polymethyl methacrylate), SU8 photoresist, ruthenium, ruthenium dioxide, and tantalum nitride. The first waveguide 60 and the second waveguide 62 can be made of materials different from each other. The first waveguide 60 can be made of SiN because the SiN waveguide is typically smaller; the second waveguide 62 can be made of SiO 2 because the dimensions of the SiO 2 waveguide will properly match the mode of the single mode fiber. State size. This allows the first waveguide 60 to be connected to the MUX 26 and the second waveguide 62 to be connected to the Tx interconnecting waveguide 21.

第一波導管60與第二波導管62能夠由不同的製程來製造,其包含 結合摻雜、蝕刻、或是材料沉積與雷射加工的光微影術,其藉由材料移除或是藉由修正的材料特性來改變材料的折射率及/或密度。雷射加工會藉由將短脈衝波長的雷射光聚焦於一材料之中而稠化及/或提高折射率。被聚焦的光點會局部性地改變一小體積(舉例來說,大小為10至100μm3)中的折射率。被聚焦的光點會高速地(舉例來說,100mm/sec)沿著一材料被掃描。 The first waveguide 60 and the second waveguide 62 can be fabricated by different processes, including photolithography combined with doping, etching, or material deposition and laser processing, which is removed or borrowed by material. The refractive index and/or density of the material is altered by the modified material properties. Laser processing thickens and/or increases the refractive index by focusing a short pulse of laser light into a material. The focused spot will locally change the refractive index in a small volume (for example, 10 to 100 μm 3 in size). The focused spot is scanned along a material at high speed (for example, 100 mm/sec).

如圖14中所示,光層38從上至下包含:1)一具有折射率n2的頂端層66;2)一具有折射率n1的第二波導管62;3)一具有折射率n2的中間層65;以及4)一具有折射率n3的第一波導管60。光層38位於具有折射率nsub的基板64的頂端。第一波導管60與第二波導管62具有不同的光學特性,因此,n1≠n3。第二波導管62的折射率n1大於頂端層66以及中間層65的折射率n2,也就是,n1>n2。第一波導管60的折射率n3大於中間層65的折射率n2以及基板64的折射率nsub,也就是,n3>n2並且n3>nsub。亦可以採用其它排列,只要波導管的折射率高於包圍該波導管的材料的折射率即可。 As shown in FIG. 14, the light layer 38 comprises, from top to bottom, 1) a top layer 66 having a refractive index n 2 ; 2) a second waveguide 62 having a refractive index n 1 ; 3) a refractive index An intermediate layer 65 of n 2 ; and 4) a first waveguide 60 having a refractive index n 3 . The light layer 38 is located at the top end of the substrate 64 having a refractive index nsub . The first waveguide 60 and the second waveguide 62 have different optical characteristics, and therefore, n 1 ≠n 3 . Refractive index n 1 of the second waveguide 62 is greater than the top layer 66 and an intermediate layer 65 of refractive index n 2, i.e., n 1> n 2. The refractive index n 3 of the first waveguide 60 is greater than the refractive index n 2 of the intermediate layer 65 and the refractive index n sub of the substrate 64, that is, n 3 > n 2 and n 3 > n sub . Other arrangements are also possible as long as the refractive index of the waveguide is higher than the refractive index of the material surrounding the waveguide.

圖14以及15雖然顯示一耦合器晶片19;不過,雷同的結構同樣能夠被形成在矽光晶片15的光層39之中。 14 and 15 show a coupler wafer 19; however, the same structure can be formed in the optical layer 39 of the calender wafer 15.

除了圖8至15、32、以及33中所示的排列與技術之外,亦可以使用包含如圖30中所示的光點尺寸轉換器區的互連波導管21、22。耦合器晶片19中的通道波導管32的模態尺寸會匹配或是實質上匹配(落在製造容限值裡面)該些互連波導管21、22的光點尺寸轉換器區78的末端處的模態尺寸。具有光點尺寸轉換器區78的互連波導管21、22能夠被用來取代圖8至15、32、以及33中所示的排列與技術;或者,除了圖8至15、32、以及33中所示的排列與技術之外,還可以額外使用具有光點尺寸轉換器區78的互連波導管21、22。 In addition to the arrangements and techniques shown in Figures 8 through 15, 32, and 33, interconnected waveguides 21, 22 including the spot size converter regions as shown in Figure 30 can also be used. The modal dimensions of the channel waveguides 32 in the coupler wafer 19 will match or substantially match (fall within the manufacturing tolerances) the ends of the spot size converter regions 78 of the interconnected waveguides 21, 22. Modal size. Interconnected waveguides 21, 22 having spot size converter regions 78 can be used in place of the arrangements and techniques shown in Figures 8 through 15, 32, and 33; or, in addition to Figures 8 through 15, 32, and 33 In addition to the arrangement and technique shown, interconnected waveguides 21, 22 having spot size converter regions 78 may additionally be used.

該光點尺寸轉換器區78能夠由互連波導管21、22的末端處的一絕熱漸細部來提供。提高模態尺寸會降低介於耦合器晶片19中的通道波導管32以及該些互連波導管21、22的核心31之間的對齊容限值。倘若互連波導管21、22為一光纖的話,那麼,該光點尺寸轉換器區78便能夠藉由局部加熱該些互連波導管21、22來創造,從而導致形成該核心31的摻雜物的擴散。超短雷射處理能夠被用來局部加熱該光纖。該超短雷射處理會藉由將該雷射聚焦在該光纖中的一3維圖樣之中而改變該光纖的折射率,從而創造該光點尺寸轉換器區78。單模態光纖的模態尺寸會從約9μm增加至約20微米。標準單模態光纖在核心31與通道波導管32之間的1μm對齊誤差中會有1dB的光學損失。倍增該模態尺寸則會將1dB的對齊容限值提高至大於2μm。 The spot size converter zone 78 can be provided by an adiabatic taper at the end of the interconnecting waveguides 21, 22. Increasing the modal size reduces the alignment tolerance between the channel waveguide 32 in the coupler wafer 19 and the core 31 of the interconnected waveguides 21, 22. If the interconnecting waveguides 21, 22 are an optical fiber, the spot size converter region 78 can be created by locally heating the interconnecting waveguides 21, 22, resulting in the formation of doping of the core 31. The spread of things. Ultra-short laser processing can be used to locally heat the fiber. The ultrashort laser processing creates the spot size converter region 78 by focusing the laser in a 3D pattern in the fiber to change the index of refraction of the fiber. The modal size of a single mode fiber will increase from about 9 [mu]m to about 20 microns. The standard single mode fiber has an optical loss of 1 dB in a 1 μm alignment error between the core 31 and the channel waveguide 32. Multiplying this modal size increases the 1dB alignment tolerance to greater than 2μm.

圖16所示的係用於混合式矽光晶片57與耦合器晶片19的傳送側射束模型的範例。圖16在光路徑中並沒有包含或顯示任何轉向結構並且沒有包含或顯示圖11至15中所示的任何技術。圖16包含如圖9中所示的兩個彎曲表面。首先,假設通道射束35為0.5μm大小的高斯射束。該混合式矽光晶片57包含一0.7mm厚的矽光晶片用以作為矽光晶片15,其折射率n=3.5;並且包含一0.5mm厚的矽酸硼玻璃層用以作為分隔體56,其折射率n=1.45。該矽酸硼玻璃層能夠為Borofloat®,其係由微浮製程(microfloat process)所製成,其會產生一具有低熱膨脹係數的玻璃,並且具有良好的表面品質、可見光透射特徵、以及機械強度。分隔體56中的透鏡43具有351μm的曲率半徑。在混合式矽光晶片57與耦合器晶片19之間有15μm的間隙。耦合器晶片19中的透鏡42具有343μm的曲率半徑。該耦合器晶片19包含一厚度為0.7mm的Borofloat®玻璃層,其折射率n=1.45。於此範例中,通道射束35會以66μm的射束尺寸被準直在該間隙之中並且以85%的耦合效率被耦合至一標準的單模態光纖之中。 An example of a transfer side beam model for the hybrid calender wafer 57 and the coupler wafer 19 is shown in FIG. Figure 16 does not include or display any steering structures in the light path and does not include or display any of the techniques illustrated in Figures 11-15. Figure 16 contains two curved surfaces as shown in Figure 9. First, it is assumed that the channel beam 35 is a Gaussian beam of a size of 0.5 μm. The hybrid calender wafer 57 comprises a 0.7 mm thick calender wafer for use as a calender wafer 15 having a refractive index n = 3.5; and comprising a 0.5 mm thick layer of bismuth borate glass for use as a separator 56, Its refractive index n = 1.45. The borosilicate glass layer can be Borofloat®, which is made by a microfloat process, which produces a glass having a low coefficient of thermal expansion and has good surface quality, visible light transmission characteristics, and mechanical strength. . The lens 43 in the separator 56 has a radius of curvature of 351 μm. There is a gap of 15 μm between the hybrid calender wafer 57 and the coupler wafer 19. The lens 42 in the coupler wafer 19 has a radius of curvature of 343 μm. The coupler wafer 19 comprises a Borofloat® glass layer having a thickness of 0.7 mm and having a refractive index n = 1.45. In this example, the channel beam 35 is collimated in the gap with a beam size of 66 μm and coupled into a standard single-mode fiber with 85% coupling efficiency.

圖19以及20所示的係一種視覺輔助對齊排列,其能夠被用來取代 圖17以及18中所示的動力對齊排列。於該視覺輔助排列中,該耦合器晶片19包含一基準點100,而該矽光晶片15包含一基準點101。基準點100、101會如圖20中所示般地被對齊。如圖19中所示,為對齊矽光晶片15以及耦合器晶片19,該矽光晶片15會被放置在平台104上,並且夾盤105被用來以該矽光晶片15為基準移動該耦合器晶片19。夾盤105會在x方向、y方向、以及z方向之中被移動並且亦可能被旋轉。平台104會在x方向以及y方向之中被移動並且亦可能被旋轉。頂端相機103係被用來觀看耦合器晶片19上的基準點100,而底部相機102則係被用來觀看矽光晶片15上的基準點101。耦合器晶片19以及矽光晶片15會相互對齊,直到相機102、103(它們會在x方向以及y方向之中被精確地對齊)能夠被用來視覺確認基準點100、101如圖20中所示般地被對齊為止。因為使用兩部相機102、103並且該些相機102、103會看見位於面向該些相機102、103的表面上的基準點100、101的關係,所以,該些相機102、103並不需要看穿該矽光晶片15或是耦合器晶片19。然而,亦可以使用一透射穿過該耦合器晶片19及/或該矽光晶片15的光波長,其可以讓該視覺輔助對齊系統對齊耦合器晶片19及/或矽光晶片15中位在該相機102或103的反向側上的標記。耦合器晶片19及/或該矽光晶片15之中的波導管會傳輸該視覺輔助對齊系統可以看見的光學輻射,以便進行主動式對齊。 Figures 19 and 20 are a visually assisted alignment arrangement that can be used in place of the power alignment arrangement shown in Figures 17 and 18. In the visual aid arrangement, the coupler wafer 19 includes a reference point 100 and the calender wafer 15 includes a reference point 101. The reference points 100, 101 will be aligned as shown in FIG. As shown in FIG. 19, to align the calender wafer 15 and the coupler wafer 19, the calender wafer 15 will be placed on the platform 104, and the chuck 105 is used to move the coupling from the calender wafer 15 as a reference. Wafer 19. The chuck 105 will be moved in the x-direction, the y-direction, and the z-direction and may also be rotated. The platform 104 will be moved in the x and y directions and may also be rotated. The top camera 103 is used to view the fiducials 100 on the coupler wafer 19, while the bottom camera 102 is used to view the fiducials 101 on the calender wafer 15. The coupler wafer 19 and the calender wafer 15 will be aligned with one another until the cameras 102, 103 (which will be precisely aligned in the x and y directions) can be used to visually confirm the fiducials 100, 101 as shown in FIG. It is normally aligned. Since the two cameras 102, 103 are used and the cameras 102, 103 will see the relationship of the reference points 100, 101 on the surface facing the cameras 102, 103, the cameras 102, 103 do not need to see through the The calender wafer 15 is either a coupler wafer 19. However, a wavelength of light transmitted through the coupler wafer 19 and/or the calender wafer 15 can also be used, which allows the visual aid alignment system to align the coupler wafer 19 and/or the calender wafer 15 in the A mark on the opposite side of the camera 102 or 103. The waveguides in the coupler wafer 19 and/or the calendering wafer 15 transmit optical radiation that is visible to the visual aid alignment system for active alignment.

該耦合器晶片19以及該矽光晶片15使用接點51、52、53作為零個至三個對齊特徵元件。在零個對齊特徵元件中(也就是,沒有使用接點51、52、53中的任一者),該耦合器晶片19以及該矽光晶片15的對齊僅有使用基準點100、101。在三個對齊特徵元件中(也就是,使用全部的接點51、52、53),雖然使用視覺輔助對齊會有幫助,不過,亦可以不使用視覺輔助對齊。在一或兩個對齊特徵元件中,該耦合器晶片19以及該矽光晶片15之間的某些自由度會取決於該些對齊特徵元件,而某些自由度則會取決於使用具有基準點100、101的視覺輔 助對齊。 The coupler wafer 19 and the calender wafer 15 use the contacts 51, 52, 53 as zero to three alignment features. In the zero alignment feature (i.e., without any of the contacts 51, 52, 53), the coupler wafer 19 and the calender wafer 15 are aligned using only the reference points 100, 101. In the three alignment features (i.e., using all of the contacts 51, 52, 53), while it may be helpful to use visually assisted alignment, visual assisted alignment may not be used. In one or two alignment features, some degree of freedom between the coupler wafer 19 and the calender wafer 15 will depend on the alignment features, and some degrees of freedom will depend on the use of reference points. Visual aid alignment of 100, 101.

在圖17至20中,該些對齊特徵元件係被用來對齊該耦合器晶片19以及該矽光晶片15。除此之外,雷同的對齊特徵元件亦能夠被用來對齊矽光晶片15以及分隔體56。 In Figures 17 through 20, the alignment features are used to align the coupler wafer 19 and the calender wafer 15. In addition, similar alignment features can be used to align the phosphor wafer 15 and the separator 56.

圖21、22、以及34所示的係傳收器10的範例。圖21以及22中所示的傳收器10包含一PCB 40。微控制器11以及矽光晶片15會被鑲嵌至該PCB 40。該耦合器晶片19以及該矽光晶片15被封入在一殼體70之中。散熱片71為非必要並且會被用來消散來自該矽光晶片15的熱能或是來自被鑲嵌在該矽光晶片15上的器件的熱能。如圖21中所示,散熱片71會被連接至該矽光晶片15的底部。如圖34中所示,除了被附接至該矽光晶片15之底部的散熱片71之外,散熱片79亦能夠被連接至該矽光晶片15的頂端。互連波導管21、22會被永久地附接至該傳收器10。也就是,互連波導管21、22會係尾纖式光纖。PCB 40在能夠被插入於一連接器(圖21與22中並未顯示)之中的其中一個邊緣中包含多個陸地部46。該連接器能夠位於一IC封裝之中、位於一主PCB(圖21與22中並未顯示)的中間、或是一中介片。圖31顯示被插入於第一連接器81之中的PCB 40。如圖31中所示,PCB 40亦能夠同步於該第一連接器81被連接至一第二連接器82;不過,這並非必要條件。倘若傳收器10如圖31中所示般被連接至第一連接器81與第二連接器82的話,那麼,高速信號便能夠經由第一連接器81被傳輸,而低速信號則能夠經由第二連接器82被傳輸。較佳的係,互連波導管21、22相對於該傳收器10形成某個角度,俾使得,當該傳收器10被插入於位在一PCB中間的連接器之中時,該些互連波導管21、22會延伸在該PCB上的任何其它裝置上方而不會干擾該些裝置。圖21與22之中雖然顯示多條互連線21、22;不過,亦可以使用單一互連波導管21或22。 An example of a transceiver 10 shown in Figures 21, 22, and 34. The transceiver 10 shown in Figures 21 and 22 includes a PCB 40. The microcontroller 11 and the calender wafer 15 are mounted to the PCB 40. The coupler wafer 19 and the calender wafer 15 are enclosed in a housing 70. The heat sink 71 is optional and may be used to dissipate thermal energy from the calender wafer 15 or thermal energy from devices mounted on the calender wafer 15. As shown in FIG. 21, a heat sink 71 is attached to the bottom of the calender wafer 15. As shown in FIG. 34, in addition to the heat sink 71 attached to the bottom of the calender wafer 15, a heat sink 79 can be attached to the top end of the calender wafer 15. The interconnecting waveguides 21, 22 will be permanently attached to the transceiver 10. That is, the interconnecting waveguides 21, 22 will be pigtailed fibers. The PCB 40 includes a plurality of land portions 46 in one of the edges that can be inserted into a connector (not shown in Figures 21 and 22). The connector can be located in an IC package, in the middle of a main PCB (not shown in Figures 21 and 22), or an interposer. FIG. 31 shows the PCB 40 inserted into the first connector 81. As shown in FIG. 31, the PCB 40 can also be connected to a second connector 82 in synchronization with the first connector 81; however, this is not a requirement. If the transceiver 10 is connected to the first connector 81 and the second connector 82 as shown in FIG. 31, then the high speed signal can be transmitted via the first connector 81, and the low speed signal can pass through the first The two connectors 82 are transmitted. Preferably, the interconnecting waveguides 21, 22 form an angle with respect to the transceiver 10 such that when the transceiver 10 is inserted into a connector intermediate the PCB, the The interconnecting waveguides 21, 22 will extend over any other device on the PCB without interfering with the devices. Although a plurality of interconnect lines 21, 22 are shown in Figs. 21 and 22; however, a single interconnected waveguide 21 or 22 can also be used.

圖23以及24所示的係具有一鎖存器72的傳收器10的範例。圖21 與22之中的傳收器10以及圖23與24之中的傳收器10雷同;不同的係,圖23與24之中的傳收器10包含鎖存器72。因為該些互連波導管21、22可以脫離該傳收器10,所以,該些互連波導管21、22能夠為連接器式光纖。在圖23與24中的傳收器10中,該矽光晶片15以及具有鎖存器72的殼體70係被排列成使得在該耦合器晶片19被插入於該殼體70之中以後,該耦合器晶片19會被固定於該殼體70裡面並且對齊該矽光晶片15。該傳收器10會包含粗略對齊特徵元件,其會大體上對齊該耦合器晶片19以及該矽光晶片15。對齊球體55以及接點51、52、53會精確地對齊該耦合器晶片19以及該矽光晶片15。該些粗略對齊特徵元件會被放置在任何合宜的位置中,其包含被放置在該耦合器晶片19、該矽光晶片15、殼體70、或是散熱片中的任何一者上。舉例來說,粗略對齊特徵元件能夠包含位於該耦合器晶片19或是該矽光晶片15上之經蝕刻的導引柱,其會對齊位於該矽光晶片15或是該耦合器晶片19上之經蝕刻的導引孔。一散熱片(圖中並未顯示)會被整合於該鎖存器72之中或者被放置在該殼體70上,其具有一不會覆蓋該鎖存器72的削切部。 An example of a transceiver 10 having a latch 72 is shown in FIGS. 23 and 24. 21 and 22 are the same as the transceiver 10 of Figs. 23 and 24; differently, the transceiver 10 of Figs. 23 and 24 includes a latch 72. Because the interconnecting waveguides 21, 22 can be detached from the transceiver 10, the interconnecting waveguides 21, 22 can be connectorized optical fibers. In the transceiver 10 of FIGS. 23 and 24, the calender wafer 15 and the housing 70 having the latch 72 are arranged such that after the coupler wafer 19 is inserted into the housing 70, The coupler wafer 19 will be secured within the housing 70 and aligned with the calender wafer 15. The transceiver 10 will include coarse alignment features that will substantially align the coupler wafer 19 and the calender wafer 15. The alignment sphere 55 and the contacts 51, 52, 53 will precisely align the coupler wafer 19 and the calender wafer 15. The coarse alignment features will be placed in any convenient location including any one of the coupler wafer 19, the calender wafer 15, the housing 70, or the heat sink. For example, the coarse alignment feature can include an etched guide post on the coupler wafer 19 or the calender wafer 15 that is aligned on the calender wafer 15 or the coupler wafer 19. Etched lead holes. A heat sink (not shown) will be integrated into the latch 72 or placed on the housing 70 with a cutout that does not cover the latch 72.

圖25與26所示的係耦合器晶片19的一範例。該耦合器晶片19包含用於該些互連波導管21、22的一溝槽74陣列以及一凹口73。該些互連波導管21、22中的每一者會被插入於一對應孔洞75之中,其會精確地對齊耦合器晶片19裡面的互連波導管21、22。孔洞75能夠以一利用超短雷射脈衝的雷射來製造。該耦合器晶片19包含一凹槽76,其會被一黏著劑填充,用以將該些互連波導管21、22永久性地固定在正確位置中。黏著劑亦會被塗敷於該凹口73之中,用以提供應變消除劑。在圖25以及26之中,轉向結構28、29在相鄰的互連波導管21、22的側邊上提供一完全內反射表面,俾使得來自該些互連波導管21、22的光會被引導向下。 An example of a coupler chip 19 shown in Figures 25 and 26. The coupler wafer 19 includes an array of trenches 74 for the interconnected waveguides 21, 22 and a recess 73. Each of the interconnected waveguides 21, 22 will be inserted into a corresponding aperture 75 that will precisely align the interconnected waveguides 21, 22 within the coupler wafer 19. The aperture 75 can be fabricated with a laser that utilizes ultrashort laser pulses. The coupler wafer 19 includes a recess 76 that is filled with an adhesive to permanently secure the interconnecting waveguides 21, 22 in the correct position. An adhesive is also applied to the recess 73 to provide a strain relief. In Figures 25 and 26, the steering structures 28, 29 provide a fully internal reflective surface on the sides of adjacent interconnecting waveguides 21, 22 such that light from the interconnected waveguides 21, 22 Being guided down.

圖28以及29所示的係製造傳收器的步驟。在圖28中所示的方法 中,一矽光晶片會被附接至一PCB。一耦合器晶片接著會被配接至該矽光晶片。接著,多條光纖便會被附接至該耦合器晶片1。 The steps of manufacturing the transceiver shown in Figures 28 and 29 are shown. In the method shown in Figure 28, a silicon wafer will be attached to a PCB. A coupler wafer is then mated to the calender wafer. Then, a plurality of optical fibers are attached to the coupler wafer 1.

在步驟S10中,該矽光晶片會被製造。該矽光晶片在第一側包含一光層。該矽光晶片在第二側包含透鏡及/或對齊特徵元件。該些透鏡及/或對齊特徵元件會直接被蝕刻在該矽光晶片的第二側;或者會先被蝕刻在一不同的晶圓(其可以為矽或是玻璃)上,並且接著被焊接至該矽光晶片(晶圓至晶圓或是晶片至晶圓)。在步驟S11中,該些主動式裝置(舉例來說,其包含覆晶光偵測器、覆晶TIA、以及覆晶調變器驅動器)會被附接至該矽光晶片。該矽光晶片接著會在步驟S12中被測試。在步驟S13中,具有矽光晶片的晶圓會被裁切。在步驟S14中,該PCB會被組裝。在步驟S15中,該耦合器晶片會被製造。該耦合器晶片在第一側包含一光層以及多條溝槽。該耦合器晶片在第二側會包含透鏡及/或對齊特徵元件。在步驟S16中,具有耦合器晶片的晶圓會被裁切。 In step S10, the calendering wafer will be fabricated. The calendering wafer includes a light layer on the first side. The calendering wafer includes a lens and/or alignment features on the second side. The lenses and/or alignment features are directly etched on the second side of the wafer; or they are first etched onto a different wafer (which may be tantalum or glass) and then soldered to The wafer (wafer to wafer or wafer to wafer). In step S11, the active devices (including, for example, a flip-chip photodetector, a flip chip TIA, and a flip chip modulator driver) are attached to the phosphor wafer. The calendered wafer is then tested in step S12. In step S13, the wafer having the calendering wafer is cut. In step S14, the PCB will be assembled. In step S15, the coupler wafer will be fabricated. The coupler wafer includes a light layer and a plurality of trenches on the first side. The coupler wafer will include lenses and/or alignment features on the second side. In step S16, the wafer with the coupler wafer is cut.

在步驟S17中,該矽光晶片會被連接至該PCB。在步驟S18中,分離的對齊特徵元件會視情況被加入。在步驟S19中,該矽光晶片與耦合器晶片會被配接。在步驟S20中,該矽光晶片與耦合器晶片會利用黏著劑被焊接在一起。在步驟S21中,該些光纖會被鑲嵌至耦合器晶片之中的溝槽。在步驟S22中,散熱片、光纖應變消除劑、...等會視情況被加入。在步驟S23中會對該傳收器進行最終測試。 In step S17, the calendering wafer will be connected to the PCB. In step S18, the separated alignment features are added as appropriate. In step S19, the calender wafer and the coupler wafer are mated. In step S20, the calender wafer and the coupler wafer are soldered together using an adhesive. In step S21, the fibers are embedded into the trenches in the coupler wafer. In step S22, a heat sink, an optical fiber strain canceling agent, etc. are added as appropriate. The final test is performed on the transceiver in step S23.

圖29中所示的方法依賴於以晶圓級製造的方式在該矽光晶圓上製造該些耦合器晶片。多個單獨的耦合器晶片會被鑲嵌至該矽光晶圓上的矽光晶片。該矽光/耦合器晶圓接著會被裁切。接著,光纖會被附接至耦合器晶片。 The method illustrated in Figure 29 relies on fabricating the coupler wafers on the calendered wafer in a wafer level fabrication manner. A plurality of individual coupler wafers are embedded into the calender wafer on the calendered wafer. The calender/coupler wafer is then cut. The fiber is then attached to the coupler wafer.

在步驟S30中,該矽光晶片會被製造。該矽光晶片在第一側包含一光層。該矽光晶片在第二側會包含透鏡及/或對齊特徵元件。該些透鏡及/或對齊特徵元件會直接被蝕刻在該矽光晶片的第二側;或者會先被蝕刻在一不同的 晶圓(其可以為矽或是玻璃)上,並且接著被焊接至該矽光晶片(晶圓至晶圓或是晶片至晶圓)。在步驟S31中,該些主動式裝置(舉例來說,其包含覆晶光偵測器、覆晶TIA、以及覆晶調變器驅動器)會被附接至該矽光晶片。該矽光晶片接著會在步驟S32中被測試。在步驟S34中,該耦合器晶片會被製造。該耦合器晶片在第一側包含一光層以及多條溝槽。該耦合器晶片在第二側會包含透鏡及/或對齊特徵元件。在步驟S35中,具有耦合器晶片的晶圓會被裁切。 In step S30, the calendering wafer will be fabricated. The calendering wafer includes a light layer on the first side. The calendering wafer will include lenses and/or alignment features on the second side. The lenses and/or alignment features are directly etched on the second side of the wafer; or they are first etched onto a different wafer (which may be tantalum or glass) and then soldered to The wafer (wafer to wafer or wafer to wafer). In step S31, the active devices (including, for example, a flip-chip photodetector, a flip chip TIA, and a flip chip modulator driver) are attached to the phosphor wafer. The calendered wafer is then tested in step S32. In step S34, the coupler wafer will be fabricated. The coupler wafer includes a light layer and a plurality of trenches on the first side. The coupler wafer will include lenses and/or alignment features on the second side. In step S35, the wafer with the coupler wafer is cut.

在步驟S36中,分離的對齊特徵元件會視情況被加入。在步驟S37中,該些矽光晶片與該些耦合器晶片會被配接至該晶圓上的矽光晶片。在步驟S38中,該矽光晶片與耦合器晶片會被焊接。在步驟S39中,具有該些矽光晶片與該些耦合器晶片的晶圓會被裁切。在步驟S40中,該PCB會被組裝。在步驟S41中,該矽光晶片會被連接至該PCB。在步驟S42中,該些光纖會被鑲嵌至耦合器晶片之中的溝槽。在步驟S43中,散熱片、光纖應變消除劑、...等會視情況被加入。在步驟S44中會對該傳收器進行最終測試。 In step S36, the separated alignment features are added as appropriate. In step S37, the silicon wafers and the coupler wafers are coupled to the phosphor wafer on the wafer. In step S38, the calender wafer and the coupler wafer are soldered. In step S39, the wafers having the calender wafers and the coupler wafers are cut. In step S40, the PCB will be assembled. In step S41, the calendering wafer will be connected to the PCB. In step S42, the fibers are embedded into the trenches in the coupler wafer. In step S43, a heat sink, an optical fiber strain relief, etc. are added as appropriate. The final test is performed on the transceiver in step S44.

應該瞭解的係,前面的說明僅係解釋本發明。熟習本技術的人士便會明白便能夠設計各種替代例與修正例,其並不會脫離本發明。據此,本發明希望涵蓋落在隨附申請專利範圍的範疇裡面的所有此些替代例、修正例、以及變化例。 It is to be understood that the foregoing description is merely illustrative of the invention. Those skilled in the art will appreciate that various alternatives and modifications can be devised without departing from the invention. Accordingly, the invention is intended to cover all such alternatives, modifications, and variations in the scope of the appended claims.

Claims (8)

一種光學模組,其包括:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;以及一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸;其中,該光路徑包含該耦合器晶片的一第一表面以及該耦合器晶片的一第二表面;以及由該些光信號所定義的一射束的剖面尺寸在該第一表面及該第二表面處並不相同。  An optical module comprising: a silicon wafer comprising a waveguide, the waveguide transmits an optical signal; and a coupler wafer attached to the fluorescent wafer, such that the optical signals are Transmitting along a light path between the wafer and the coupler wafer; wherein the light path includes a first surface of the coupler wafer and a second surface of the coupler wafer; The cross-sectional dimensions of a beam defined by the optical signals are not the same at the first surface and the second surface.   根據申請專利範圍第1項的光學模組,其中,該矽光晶片與該耦合器晶片中的至少其中一者包含一聚焦元件。  The optical module of claim 1, wherein at least one of the phosphor wafer and the coupler wafer comprises a focusing element.   根據申請專利範圍第2項的光學模組,其中,該聚焦元件係一準直透鏡。  The optical module of claim 2, wherein the focusing element is a collimating lens.   一種對齊兩塊基板的方法,其包括:提供一具有一第一基準點的第一基板以及一具有一第二基準點的第二基板,該些第一基準點與第二基準點位在彼此不相向的第一基板的表面與第二基板的表面;提供彼此反向的第一相機與第二相機,俾使得該第一相機看見該第一基準點並且該第二相機看見該第二基準點;以及藉由利用該些第一相機與第二相機來對齊該些第一基準點與第二基準點而對齊該些第一基板與第二基板。  A method of aligning two substrates, comprising: providing a first substrate having a first reference point and a second substrate having a second reference point, the first reference point and the second reference point being in each other a surface of the first substrate that is not opposite to the surface of the second substrate; a first camera and a second camera that are opposite to each other are provided, such that the first camera sees the first reference point and the second camera sees the second reference And aligning the first substrate and the second substrate by aligning the first reference point and the second reference point by using the first camera and the second camera.   一種光學模組,其包括:一互連波導管,其會傳輸光信號;一矽光晶片,其會調變該些光信號、偵測該些光信號、或是調變與偵測該 些光信號;以及一耦合器晶片,其被附接至該矽光晶片及該互連波導管,俾使得該些光信號會沿著一介於該矽光晶片與與該互連波導管之間的光路徑被傳輸;其中,該互連波導管會與該矽光晶片形成斜角。  An optical module includes: an interconnecting waveguide that transmits an optical signal; and a dimming chip that modulates the optical signals, detects the optical signals, or modulates and detects the optical signals An optical signal; and a coupler wafer attached to the fluorescent wafer and the interconnecting waveguide such that the optical signals are along a path between the fluorescent wafer and the interconnecting waveguide The optical path is transmitted; wherein the interconnected waveguide forms an oblique angle with the calendering wafer.   一種光學模組,其包括:一矽光晶片,其包含一波導管,該波導管會傳輸光信號;一耦合器晶片,其被附接至該矽光晶片,俾使得該些光信號會沿著一介於該矽光晶片與該耦合器晶片之間的光路徑被傳輸;以及一光偵測器,其被表面鑲嵌至該矽光晶片。  An optical module comprising: a fluorescent wafer comprising a waveguide, the waveguide transmitting an optical signal; a coupler wafer attached to the fluorescent wafer, such that the optical signals are along A light path between the wafer and the coupler wafer is transferred; and a photodetector is surface-mounted to the calender wafer.   一種製造光學模組的方法,其包括:提供一具有一光層的晶圓;裁切該晶圓,用以形成一矽光晶片;配接該矽光晶片與一印刷電路板;配接一耦合器晶片與該矽光晶片;以及將一互連波導管鑲嵌至該耦合器晶片。  A method of manufacturing an optical module, comprising: providing a wafer having a light layer; cutting the wafer to form a silicon wafer; mating the silicon wafer with a printed circuit board; mating one a coupler wafer and the calendering wafer; and an interconnecting waveguide is inlaid to the coupler wafer.   一種製造光學模組的方法,其包括:提供一由多個矽光晶片組成的晶圓;配接多個耦合器晶片與該晶圓上的該些矽光晶片;裁切該晶圓,用以形成多個矽光晶片/耦合器晶片組裝件;配接該些矽光晶片/耦合器晶片組裝件與多個印刷電路板;以及將多條互連波導管鑲嵌至該些耦合器晶片。  A method of manufacturing an optical module, comprising: providing a wafer composed of a plurality of phosphorescent wafers; mating a plurality of coupler wafers with the phosphor wafers on the wafer; cutting the wafer, using Forming a plurality of calender wafer/coupler wafer assemblies; mating the phosphor wafer/coupler wafer assemblies and the plurality of printed circuit boards; and embedding the plurality of interconnected waveguides into the coupler wafers.  
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