TWI675229B - Optical module including silicon photonics chip and coupler chip - Google Patents

Abstract

An optical module includes: an interconnected waveguide that transmits optical signals; a silicon optical chip that modulates the optical signals, detects the optical signals, or modulates and detects the optical signals Optical signal; a coupler chip that is attached to the silicon optical chip and the interconnecting waveguide so that the optical signals will follow an optical path between the silicon optical chip and the interconnecting waveguide Being transmitted; and one of the silicon optical chip and the coupler chip includes a first alignment protrusion, a second alignment protrusion, and a third alignment protrusion. The other of the coupler chip and the silicon optical chip includes a point contact, a line contact, and a planar contact. The point contact does not provide any movement of the first alignment protrusion. The line contact provides linear movement of the second alignment protrusion. The planar contact provides planar movement of the third alignment protrusion.

Description

   Optical module containing silicon light chip and coupler chip   

The invention relates to an optical module. More specifically, the present invention relates to an optical module having a silicon light device.

    Related applications    

This application claims the right of the following applications under the specification of 35 USC§119 (e): US Application No. 62 / 131,971 filed on March 12, 2015; US Application filed on March 12, 2015 No. 62 / 131,989; U.S. Application No. 62 / 132,739 filed on March 13, 2015; U.S. Application No. 62 / 134,166 filed on March 17, 2015; Filed on March 17, 2015 U.S. Application No. 62 / 134,173 filed; U.S. Application No. 62 / 134,229 filed on March 17, 2015; U.S. Application No. 62 / 158,029 filed on May 7, 2015; and 2015 US Application No. 62 / 215,932 filed on September 9. This article refers to U.S. Application Nos. 62 / 131,971, 62 / 131,989, 62 / 131,739, 62 / 134,166, 62 / 134,173, 62 / 134,229, 62 / 158,029 by reference , And the full content of each case in 62 / 215,932.

The use of optical interconnects instead of electrical interconnects can achieve significant gain bandwidth and bandwidth density (Gb / s / m ² of surface area occupied by the transceiver); however, optical interconnects already exist in telecommunication networks (across In the heart of maritime networks, metropolitan networks, etc.), they have not reached the level of integration, and the cost and energy efficiency are not sufficient to replace the electrical interconnection on short-range links. For example, optical interconnects based on Vertical Cavity Surface Emitting Laser (VCSEL) are still ten times more expensive than electrical interconnects. The application of a large number of manufacturing technologies and the concept of low-cost electronic processes can already integrate optical functions into the silicon substrate. The infrastructure and know-how used to make electronic integrated circuits can also be applied to optical integrated circuits, significantly reducing their costs.

A great deal of development effort has been focused on integrating optical functions into silicon, but less has been devoted to coupling light from silicon optical elements to optical fibers. Many prior art optical modules using discrete devices or integrated circuits are equipped with fiber pigtail and use an active alignment process to align the fiber with a laser source or photodetector. However, this active alignment process often relies on the use of a multi-axis robot for dynamic or active alignment (for example, using power or photocurrent feedback). Once the best coupling signal is obtained, the fiber is fixed by laser fusion or UV (ultraviolet induced) curing. The fiber is either end-coupled to a device or fixed in a focusing plane with microlenses that are used to couple light into / outside the fiber.

There are several disadvantages to active movement. It is a monolithic process with a processing time of about 1 minute / part, and cannot be expanded to a large number of optical ports. The costs associated with coupling light into and out of silicon optical components are limited to commercial viability for short-range links based on light. Therefore, there is a need for a durable, low-cost method for coupling light into and out of silicon light elements.

Similar to the situation in long-distance telecommunications, Wavelength Division Multiplexing (WDM) for optical interconnection is very attractive because it can reduce the number of fibers, reduce fiber alignment, and reduce cost. WDM technology multiplexes several optical signals at different wavelengths on a single fiber. For example, a loose WDM system in an O-band uses four channels with wavelengths of about 1271 nm, 1291 nm, 1311 nm, and 1331 nm. WDM allows each of these four channels to be transmitted simultaneously on a bundle of fibers, thereby increasing the bandwidth of each fiber available. To use WDM, multiplexing / demultiplexing must be provided at the end of the optical link to combine / separate the different wavelength channels. Therefore, a rugged, low-cost method is needed to integrate multiplexing / demultiplexing functions and silicon-optic components.

In order to overcome the problems described above, a preferred embodiment of the present invention provides an optical module including one or more of the following: (1) kinematic alignment, which includes a first alignment protrusion, A second alignment protrusion, a third alignment protrusion, and corresponding point contacts, line contacts, and planar contacts; (2) a coupler chip, which changes a beam defined by the optical signals (3) a coupler chip that includes a multiplexer, a demultiplexer, or a multiplexer and a demultiplexer; (4) a separator that is attached to A silicon light chip, wherein the separator is anode-welded to the silicon light chip; (5) an arrangement in which a cross-sectional size of a beam defined by the light signals is preferably located in the silicon light The interface between the wafer and the coupler wafer is the largest; (6) an arrangement in which the cross-sectional size of a beam defined by the optical signals is at the first surface and the second surface of the coupler wafer Not the same; (7) an interconnected waveguide that includes a spot size converter region; (8) a A waveguide, which forms an oblique angle with the silicon light chip; (9) a coupler chip and a silicon light chip, which are anode-welded together; and (10) a light detector, which is surface-mounted to The silicon light chip. A preferred embodiment of the present invention also provides a receiver having a latch for allowing the interconnected waveguide to be detached. The preferred embodiment of the present invention also provides a method of using two A method for aligning the two substrates with reference points in a surface of the substrate; and a preferred embodiment of the present invention also provides a method for manufacturing an optical module.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: an interconnected waveguide that transmits optical signals; and a silicon optical chip that modulates the optical signals and detects the optical signals. Or modulate and detect the optical signals; a coupler chip, which is attached to the silicon optical chip and the interconnecting waveguide, so that the optical signals will follow a path between the silicon optical chip and An optical path between the interconnecting waveguides is transmitted; and one of the silicon optical chip and the coupler chip includes a first alignment protrusion, a second alignment protrusion, and a third alignment protrusion. The other of the coupler chip and the silicon optical chip includes a point contact, a line contact, and a planar contact. The point contact does not provide any movement of the first alignment protrusion. The line contact provides linear movement of the second alignment protrusion. The planar contact provides planar movement of the third alignment protrusion.

Preferably, the first alignment protrusion, the second alignment protrusion, and the third alignment protrusion are made of glass, and they are located in one of the silicon light chip and the coupler chip. Among the chamfers. The optical module preferably further includes a separator, which is attached to the silicon light chip. The separator and the silicon light chip are preferably anodically welded together.

The cross-sectional size of a beam defined by the optical signals is preferably the largest at the interface between the silicon optical chip and the coupler chip. A cross-sectional size of a beam defined by the optical signals is better that it initially increases along the optical path and then decreases along the optical path.

At least one of the silicon light chip and the coupler chip preferably includes a focusing element. The focusing element is preferably a collimating lens. The interconnecting waveguide is preferably detachable from the optical module. The interconnected waveguide includes a spot size converter region. The silicon light chip preferably includes a light detector which is embedded on the surface of the silicon light chip. The silicon light chip and the coupler chip preferably include a plurality of reference points located on surfaces that do not face each other.

According to a preferred embodiment of the present invention, a transceiver is provided, which includes an optical module and a printed circuit board according to various preferred embodiments of the present invention. The silicon optical chip is connected to the printed circuit board.

The receiver further includes a housing for encapsulating the silicon optical chip and the coupler chip. The preferred system of the receiver further comprises a latch, which fixes the coupler chip in the housing, wherein the coupler chip can be released from the housing by unlocking the latch.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: a silicon optical chip including a waveguide that transmits optical signals; and a coupler chip that is attached to the silicon Optical chip, so that the optical signals are transmitted along an optical path between the silicon optical chip and the coupler chip. The coupler chip changes the cross-sectional size of a beam defined by the optical signals, and the coupler chip includes a multiplexer, a demultiplexer, or a multiplexer and a demultiplexer. .

The multiplexer, the demultiplexer, or the multiplexer and the demultiplexer preferably include an Echelle Grating, an array waveguide grid, and a directional coupling. Filter, a dichroic filter, or a resonant interference filter. The cross-sectional size of the beam is preferably the largest at the interface between the silicon optical chip and the coupler chip. The cross-sectional size of the beam is preferably increased initially along the light path and then decreased along the light path. Preferably, a photodetector is surface embedded into the silicon light chip or incorporated into the silicon light chip. A light source is preferably incorporated into the silicon light chip. The optical module preferably further includes a light source located outside the silicon light chip, wherein light from the light source is supplied to the silicon light chip. The silicon optical chip preferably includes a through hole in the optical path. The silicon light chip and the coupler chip are preferably anodically bonded to each other.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: a silicon optical chip including a waveguide that transmits optical signals; and a coupler chip that is attached to the silicon Optical chip, so that the optical signals are transmitted along an optical path between the silicon optical chip and the coupler chip. The optical path includes a first surface of the coupler wafer and a second surface of the coupler wafer. The cross-sectional dimensions of a beam defined by the optical signals are different at the first surface and the second surface.

At least one of the silicon light chip and the coupler chip preferably includes a focusing element. The focusing element is preferably a collimating lens.

According to a preferred embodiment of the present invention, a method for aligning two substrates is provided. The method includes: providing a first substrate having a first reference point and a second substrate having a second reference point. The reference point and the second reference point are located on the surface of the first substrate and the surface of the second substrate that are not opposite to each other; and the first camera and the second camera opposite to each other are provided so that the first camera sees the first reference point And the second camera sees the second reference point; and aligns the first substrate and the second substrate by using the first camera and the second camera to align the first reference point and the second reference point.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: a silicon optical chip including a waveguide that transmits optical signals; and a coupler chip that is attached to the silicon Optical chip, so that the optical signals are transmitted along an optical path between the silicon optical chip and the coupler chip. The coupler chip changes the cross-sectional size of a beam defined by the optical signals. The cross-sectional size of the beam is largest at the interface between the silicon optical chip and the coupler chip.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: an interconnected waveguide that transmits optical signals; and a silicon optical chip that modulates the optical signals and detects the optical signals. Or modulate and detect the optical signals; and a coupler chip, which is attached to the silicon optical chip and the interconnecting waveguide, so that the optical signals will follow The optical path to and from the interconnecting waveguide is transmitted. The interconnected waveguide includes a spot size converter region, wherein a cross-sectional size of a beam defined by the optical signals changes.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: a silicon optical chip including a waveguide that transmits optical signals; and a coupler chip that is attached to the silicon Optical chip, so that the optical signals are transmitted along an optical path between the silicon optical chip and the coupler chip. The coupler chip changes the cross-sectional size of a beam defined by the optical signals. The coupler chip and the silicon light chip are anode-bonded together.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: an interconnected waveguide that transmits optical signals; and a silicon optical chip that modulates the optical signals and detects the optical signals. Or modulate and detect the optical signals; and a coupler chip, which is attached to the silicon optical chip and the interconnecting waveguide, so that the optical signals will follow The optical path to and from the interconnecting waveguide is transmitted. The interconnecting waveguide forms an oblique angle with the silicon optical chip.

According to a preferred embodiment of the present invention, a transceiver is provided, which includes: a printed circuit board; an optical module including an interconnecting waveguide that transmits optical signals; and a silicon optical chip. , Which is connected to the printed circuit board and will modulate the optical signals, detect the optical signals, or modulate and detect the optical signals; a coupler chip, which is attached to the silicon light The chip and the interconnecting waveguide, so that the optical signals are transmitted along an optical path between the silicon optical chip and the interconnecting waveguide; and a casing for sealing the silicon optical chip And the coupler chip. The coupler chip is fixed in the housing by a latch. The coupler chip can be released from the housing by unlocking the latch.

According to a preferred embodiment of the present invention, an optical module is provided, which includes: a silicon light chip including a waveguide that transmits optical signals; a coupler chip that is attached to the silicon A chip, so that the optical signals are transmitted along an optical path between the silicon optical chip and the coupler chip; and a light detector, which is surface-mounted into the silicon optical chip.

According to a preferred embodiment of the present invention, a method for manufacturing an optical module is provided. The method includes: providing a wafer having an optical layer; cutting the wafer to form a silicon light wafer; and connecting the silicon light A chip and a printed circuit board; a coupler chip and the silicon optical chip are connected; and an interconnecting waveguide is embedded in the coupler chip.

According to a preferred embodiment of the present invention, a method for manufacturing an optical module is provided, which includes: providing a wafer composed of a plurality of silicon optical wafers; and matching a plurality of coupler wafers with the silicon on the wafer Optical wafer; cutting the wafer to form multiple silicon optical wafer / coupler wafer assemblies; mating the silicon optical wafer / coupler wafer assemblies with multiple printed circuit boards; and interconnecting multiple A waveguide is embedded in the coupler wafers.

The above and other features, elements, characteristics, steps, and advantages of the present invention can be more clearly understood from the following detailed description of the preferred embodiments of the present invention with reference to the accompanying drawings.

10‧‧‧Transceiver

11‧‧‧Microcontroller

12‧‧‧laser driver

13‧‧‧Modulator driver

14‧‧‧ Transimpedance Amplifier (TIA)

15‧‧‧ Silicon Optical Chip

16‧‧‧ Modulators 1 to 4

17‧‧‧ Receivers 1 to 4

18‧‧‧Laser A, B

19‧‧‧ coupler chip

20‧‧‧ Modal Converter

21‧‧‧Transmission (Tx) Interconnected Waveguide

22‧‧‧Receiving (Rx) interconnected waveguide

23‧‧‧Tx input

24‧‧‧Receive (Rx) output

25‧‧‧ Connector

26‧‧‧ Multiplexer (MUX)

27‧‧‧Demultiplexer (DEMUX)

28‧‧‧Tx Steering Structure

29‧‧‧Receiving (Rx) steering structure

30‧‧‧ fiber shell

31‧‧‧core

32‧‧‧channel waveguide

33‧‧‧Aisle grille

34‧‧‧channel detector

35‧‧‧ channel beam

36‧‧‧ Directional Coupler

37‧‧‧ Grille Coupler

38‧‧‧Coupler Optical Layer

39‧‧‧ Silicon Light Layer

40‧‧‧Printed Circuit Board (PCB)

41‧‧‧ Ball Grid Array (BGA)

42‧‧‧ coupler lens

43‧‧‧Silicone lens

44‧‧‧ notch

45‧‧‧ thermal compounds

46‧‧‧Land Department

51‧‧‧point contact

52‧‧‧line contact

53‧‧‧Plane contact

54‧‧‧ channel laser

55‧‧‧ aligned sphere

56‧‧‧ divider

57‧‧‧ Hybrid Silicon Optical Chip

58‧‧‧through hole

59‧‧‧through hole

60‧‧‧First Waveguide

61‧‧‧First taper

62‧‧‧Second Waveguide

63‧‧‧Second taper

64‧‧‧ substrate

65‧‧‧ middle layer

66‧‧‧ Top layer

70‧‧‧shell

71‧‧‧ heat sink

72‧‧‧ Latch

73‧‧‧notch

74‧‧‧Groove

75‧‧‧ Hole

76‧‧‧Groove

77‧‧‧Electronic layer

78‧‧‧Spot size converter area

79‧‧‧ heat sink

81‧‧‧first connector

82‧‧‧Second connector

100‧‧‧ coupler reference point

101‧‧‧ silicon light reference point

102‧‧‧ bottom camera

103‧‧‧Top Camera

104‧‧‧platform

105‧‧‧Chuck

FIG. 1 is a block diagram of a silicon light system according to a preferred embodiment of the present invention.

FIG. 2 is a block diagram of another silicon light system according to a preferred embodiment of the present invention.

The system shown in FIGS. 3 and 4 has a coupler chip that can be used in the silicon light system shown in FIG. 2, which has an Echeler grid.

The system shown in FIG. 5 has a coupler chip that can be used in the silicon light system shown in FIG. 2 and has an arrayed waveguide grid.

The system shown in FIG. 6 has a coupler chip which can be used in the silicon light system shown in FIG.

The coupler chip shown in FIG. 7 is connected to a silicon optical chip.

Figures 8 to 10, 32, and 33 show various possible optical arrangements for the coupler chip and the silicon optical chip.

11 and 12 show a hybrid silicon optical chip having a separator.

The silicon light chip shown in FIG. 13 has a through hole.

The coupler wafer shown in Figs. 14 and 15 has two waveguide layers.

FIG. 16 shows an example of a transmission-side beam model for the hybrid silicon optical chip and the coupler chip.

Figures 17 and 18 show a dynamic alignment arrangement.

19 and 20 show a visually assisted alignment arrangement.

An example of the system receiver shown in FIGS. 21 and 22.

Another example of the system receiver shown in Figs.

An example of the tying coupler chip shown in FIGS. 25 and 26.

An example of a silicon-based silicon wafer shown in FIG. 27.

28 and 29 are steps for manufacturing a receiver.

The optical fiber shown in FIG. 30 has a spot size converter region.

The system shown in Figure 31 is a transceiver connected to two connectors.

Another example of the system receiver shown in FIG.

FIG. 1 shows a silicon light system according to a preferred embodiment of the present invention. The transceiver 10 includes a microcontroller 11, which is connected to a laser driver 12, a modulator driver 13, and a transimpedance amplifier (TIA) 14. The microcontroller 11 receives electrical auxiliary signals from one or more devices located outside the silicon optical system as shown by arrows on the right-hand side of the microcontroller 11 and sends electrical auxiliary signals to external devices of the silicon optical system. One or more devices, for example, the electrical auxiliary signals include control and monitoring signals. The modulator driver 13 receives electrical data signals via a transmit (Tx) input 23, and the TIA 14 outputs electrical data signals via a receive (Rx) output 24. The Tx input 23 and the Rx output 24 are preferably incorporated into the connector 25. The lasers A, B (labeled as 18 in the figure) are connected to the laser driver 12. The transceiver 10 further includes a silicon optical chip 15 and a coupler chip 19. The coupler wafer 19 is connected to the Tx interconnect waveguide 21 and the Rx interconnect waveguide 22.

A channel is defined by a single path along which signals are transmitted, that is, transmitted and / or received. For example, one of the transmission channels is defined by the electrical data signal received by the modulator driver 13 from the top Tx input 23, which will cause the modulator 4 to modulate the light from the laser B, and The modulated light from the modulator 4 enters the topmost Tx interconnect waveguide 21 via the coupler wafer 19. In the example of the transmission channel, the transmission channel includes both electrical data signals and optical data signals. A corresponding receiving channel is defined by the optical data signal received by the coupler chip 19 on the bottommost Rx interconnecting waveguide 22, which will cause the bottom receiver 1 to generate an electrical data signal and receive from the bottommost receiving A corresponding electrical data signal of the device 1 will be supplied by the TIA 14 to the bottom Rx output 24, wherein the corresponding electrical data signal is based on the generated electrical data signal received by the TIA 14.

The microcontroller 11 can be any suitable microcontroller, microprocessor, central processing unit, field-programmable gate array, application-specific integrated circuits, etc. More than one microcontroller 11 will be used. The microcontroller 11 can be a discrete component, or it can be integrated with the silicon optical chip 15. Integrating the microcontroller 11 and the silicon-optic chip 15 may increase the cost, complexity, and size of the silicon-optic chip 15.

Although two lasers 18 are shown in Figure 1; any suitable number of lasers can be used. In Figure 1, laser A is connected to modulators 1, 2 (for clarity, only modulator 1 is labeled as component symbol 16), while laser B is connected to modulator 3, 4. However, if a laser 18 has sufficient power for each of the channels, the laser 18 can also be connected to each of the modulators; or, four lasers 18 can Connected to these modulators 1 to 4, 俾 makes a laser available for each channel. If more than one laser 18 is used, the lasers 18 can provide light of different wavelengths, so that different channels use different wavelengths of light.

For example, the laser 18 can be an edge emitter or a vertical cavity surface emitting laser (VCSEL). The lasers 18 can: 1) be embedded outside the receiver 10, wherein the light from the laser can be supplied to the silicon optical chip 15 using an interconnected waveguide and possibly a coupler chip 19; 2) It is embedded on a printed circuit board (PCB) with other devices of the transceiver 10, for example, the other devices include a microcontroller 11, a laser driver 12, a modulator driver 13, and a TIA. 14. Silicon optical chip 15, coupler chip 19, ..., etc., wherein the light from the lasers 18 is coupled to the silicon optical chip 15 through the embedded organic waveguide in the PCB; or 3) Integrate with the silicon optical chip 15. Examples include: a miniature package laser, which is usually made of a MEMS silicon shell, which contains a distributed feed back laser (DFB). Laser), an optical ball lens, and an isolator; a flip-chip p-down, which is an SOA (semiconductor optical amplifier), DFB, or Fabry-Perot semiconductor laser chip that can be embedded using flip-chip technology Or a heterogeneous integrated laser, which often includes a III-V quantum gain junction , Which creates and is coupled to the bottom is confined to silicon light waveguide. Because the performance of the laser 18 is temperature sensitive, in some applications, it is advantageous to embed the laser 18 on the outside of the silicon wafer 15, which can be embedded on a PCB with other devices or It is embedded outside the receiver 10.

The laser driver 12 is embedded in the receiver 10, for example, it includes being embedded near or on the silicon optical chip 15; or, the laser driver 12 can also be embedded in the transmitting device 10. The receiver 10 is, for example, embedded on a main PCB (not shown in FIG. 1).

The modulator driver 13 receives electrical data signals from the Tx input 23 and generates a corresponding amplified electrical signal by closing and opening a corresponding modulator 16, which generates a signal having a high level signal and a low level signal. Optical data signals. The modulator driver 13 can be a single device as shown in FIG. 1, which is provided for use by all channels; or, the modulator driver 13 can also be a group of devices, and each channel has a device can use. Because the speeds at which the modulators 16 are turned on and off are faster than the speed at which the lasers are turned on and off, the use of the modulators 16 can achieve a high-frequency purpose.

TIA 14 is controlled by microcontroller 11 and receives signals from photodetectors 1 to 4 (for clarity, receivers 1 to 4 are identified by component symbol 17). Generally, the signal is a current signal, the magnitude of which is based on the amount of light detected by the receivers 17, and the TIA 14 converts the current signal into a voltage signal. The TIA 14 can be a single device as shown in FIG. 1, which is provided for use by all channels; alternatively, the TIA 14 can also be a group of devices, one device for each channel can be used.

Although the silicon light chip 15 is preferably an optical device made of silicon; however, other suitable materials can also be used, such as InP or lithium niobate. The silicon light chip 15 includes any portion of a silicon wafer capable of transmitting light, controlling light, and / or detecting light. These functions of the silicon light chip 15 include modulation, detection, guidance, MUX / DEMUX, etc. The silicon wafer 15 can also be a hybrid wafer made of silicon and glass soldered together as shown in FIGS. 11 and 12. The silicon optical chip 15 usually includes a waveguide (not shown) for manipulating light and a driver 16 for generating an optical signal. Although the cross-sectional dimension of a typical waveguide in the silicon optical chip 15 is currently about 0.3 μm × 0.3 μm; however, other suitable sizes can also be used. In some preferred embodiments of the present invention, the silicon wafer 15 includes a waveguide formed in a silicon nitride stripe embedded in a silicon dioxide matrix. Due to the small refractive index difference between silicon nitride and silicon dioxide, these waveguides usually have a larger mode size.

The coupler chip 19 is a device for transmitting optical signals between the silicon optical chip 15 and the interconnected waveguides 21 and 22. The coupler chip 19 can be any device that provides an optical path between the silicon optical chip 15 and the interconnecting waveguides 21, 22. The coupler chip 19 may have a passive optical function, for example, it includes MUX / DEMUX. The coupler wafer 19 can change the direction of light and can change the modal size of the light. For example, if the silicon light chip 15 emits light in a vertical or near-vertical manner, the coupler chip 19 will redirect the vertical light, so that it will conduct in the horizontal direction or near the horizontal direction. The modal converter 20 changes the modal size of the light, which can provide effective coupling at various optical interfaces while maintaining the alignment tolerances at these interfaces. For example, the light emitted from the silicon optical chip 15 will have a cross-sectional modal size of about 0.3 mx 0.3 m, and the diameter of the cross-sectional modal size of the interconnected waveguide can be 9 m in a single-mode fiber. The modal converter 20 changes the cross-sectional size of the emitted light so as to match or closely match the cross-sectional size of the interconnected waveguides 21, 22. The modal converter 20 may not be necessary in the Rx channel, because light does not need to be modally matched to the light detector, that is, the light detection is performed even if the cross-sectional size of the light is smaller than the light detector. The device is still able to effectively detect the light. The coupler chip 19 can be made of silicon, glass, or both silicon and glass, wherein silicon and glass are anode welded together. The coupler chip 19 is preferably made of a material with the same thermal expansion coefficient as the thermal expansion coefficient of the silicon-optic wafer 15, so that during operation, when the temperature of the receiver 10 increases, the two devices will remain aligned. And does not bend or twist (or, bends and twists are greatly reduced or minimized).

In FIG. 1, although the receiver 10 includes four transmission channels with four corresponding Tx interconnecting waveguides 21 and four receiving channels with four corresponding Rx interconnecting waveguides 22, it can also include any suitable number of channels. For example, the receiver 10 can include one, six, eight, or twelve Tx interconnecting waveguides 21 and a corresponding one, six, eight, or twelve Rx interconnecting waveguides. twenty two. In addition to the receiver 10, a transmitter having only one or more Tx interconnecting waveguides 21 can be used instead, or a receiver having only one or more Rx interconnecting waves can be used. The receiver of the catheter 22.

The interconnecting waveguides 21, 22 are preferably optical fibers. These optical fibers can be individual optical fibers or can be an optical fiber array arranged in a bundle or ribbon shape. The interconnected waveguides 21, 22 can also be a flexible polymer-based waveguide tape or an interposer wafer made of silicon or some other suitable material. An optical fiber typically includes a core 31 surrounded by a fiber housing 30, as shown in FIG. 5, for example. These fibers can be single-mode or multi-mode. For example, the core of a single-mode fiber will have a cross-sectional size of about 9 μm, while the core of a multi-mode fiber will have a cross-sectional size of about 50 μm or 62.5 μm. The optical fibers can be permanently attached to the receiver 10 (that is, pigtail fiber) as shown in FIGS. 21 and 22, or can be detached from the optical fiber as shown in FIGS. 23 and 24. Receiver (ie, connector-type fiber).

The connector 25 can be any suitable connector, including, for example, a UEC5 connector sold by Samtec, Inc. of New Albany, Indiana, USA. More than one connector 25 may be used. A single connector 25 can be used to accommodate the Tx input 23 and Rx output 24; or one of the connectors can be used for Tx input 23 and the other connector can be used for Rx output 24.

The receiver 10 of the preferred embodiment of the present invention can be implemented similarly to U.S. applications Nos. 13 / 539,173, 13 / 758,464, 13 / 895,571, 13 / 950,628, and 14 / 295,367 The receiver of the receiver disclosed in the No., the entire contents of these applications are incorporated herein by reference. In addition to using the optical engines disclosed in these applications, instead, the transceiver 10 can also use a silicon light-based optical engine, which can have a smaller size, higher speed, and larger Bandwidth, higher efficiency, and longer signal travel distance. Although not shown in FIG. 1, the receiver 10 may include one or more heat sinks for various devices connected to the receiver 10 for heat dissipation.

FIG. 2 is a block diagram of another silicon light system according to a preferred embodiment of the present invention. The silicon light system in FIG. 2 is similar to the silicon light system in FIG. 1, and the same components are marked with the same component symbols. The transceiver 10 in FIG. 2 includes four lasers 1 to 4 (for clarity, only the laser 1 is designated by the component symbol 18), and each laser 18 has a different wavelength. The coupler chip 19 in FIG. 2 preferably uses a multiplexer (MUX) 26 and a demultiplexer (DEMUX) 27 to provide wavelength division of labor. Although the coupler chip 19 in FIG. 2 does not show the modal converter 20; however, the modal converters 20 will be placed in the coupler chip 19, and may be located in the MUX 26 in the different channels and Front or back of DEMUX 27. MUX 26 and / or DEMUX 27 are preferably formed on glass having a low coefficient of thermal expansion, and the refractive index of the glass does not change significantly with temperature.

The MUX 26 will combine the optical signals of the transmission channels so that the optical signals of all the transmission channels will be transmitted downward in the same Tx interconnecting waveguide 21. The DEMUX 27 separates the optical signals received from a single interconnected waveguide 22 in all receiving channels. Because these channels correspond to the relationship of light of different wavelengths, this combination and separation of optical signals can be performed. The binding ratio in FIG. 2 is 4: 1 and the separation ratio is 1: 4; however, other ratios may be used. For example, if the transceiver 10 has 12 transmission channels and 12 reception channels, the combination ratio can be 12: 3 or 12: 1, and the separation ratio can be 3:12 or 1:12. 12: A 3 or 3:12 ratio requires three interconnected waveguides instead of one.

In FIG. 2, the channels are preferably operated in the O band with a 20 nm wavelength interval between the channels; however, different frequency bands and different wavelength intervals can also be used.

The system shown in FIGS. 3 and 4 can be used for the coupler chip 19 in the silicon optical system shown in FIG. 2. As shown in FIG. 3, the coupler chip 19 is embedded on the top of the silicon optical chip 15. Typical dimensions of the coupler chip 19 and the silicon optical chip 15 are a thickness of about 0.5 mm to about 1 mm, a width of about 5 mm, and a length of about 5 mm. Other sizes can also be used.

The coupler chip 19 shown in FIGS. 3 and 4 includes a MUX 26 and a DEMUX 27. A single Tx interconnect waveguide 21 and a single Rx interconnect waveguide 22 are connected to the coupler wafers 19. The coupler chips 19 may include more than one interconnecting waveguide 21, 22 and more than one corresponding MUX 26 and DEMUX 27. In FIGS. 3 and 4, the coupler wafers 19 include six Tx turning structures 28 and six Rx turning structures 29. The Tx turning structures 28 turn the vertical light received from the silicon light chip 15, and the Rx The steering structure 29 turns to horizontal light received from the DEMUX 27. Each of the six turning structures 28, 29 is used in a corresponding wavelength λ ₁ -λ ₆ . Although the coupler chip 19 in FIG. 3 includes six transmission channels and six reception channels; any number of transmission channels and reception channels may be used. The Tx steering structures 28 are connected to the MUX 26 so that the optical signals are combined and transmitted via the Tx interconnecting waveguide 21. The Rx interconnect waveguide 22 is connected to the DEMUX 27, so that these optical signals are separated and transmitted via the Rx steering structure 29. MUX 26 and DEMUX 27 shown in FIG. 3 are part of an Echelle grid. The use of an Echeler grid is preferred because of its small size and lower temperature sensitivity than other MUX / DEMUX components.

If the coupler chip 19 is to be used in the transmitter instead of the receiver 10, then only the MUX 26 and the Tx interconnect waveguide 21 are required. If the coupler chip 19 is to be used in the receiver instead of the receiver 10, then only the DEMUX 27 and the Rx interconnect waveguide 22 are required.

The system shown in FIG. 5 is a wavelength selective grid, which is used as the DEMUX 27. Although the wavelength selection grid in FIG. 5 provides four channels; any other number of channels may be used. The wavelength selection grid includes four channel grids in the channel waveguide 32 of the coupler wafer 19. For clarity, only one of these channel grids is labeled 33. One of the channels in the wavelength selection grid includes an Rx interconnecting waveguide 22, a channel grid 33, and a channel detector 34. The channel beam 35 (which contains the optical signals) is transmitted through the Rx interconnecting waveguide 22, the channel grid 33, and the channel detector 34. The channel beam 35 is preferably in a gap between the coupler chip 19 and the silicon optical chip 15 perpendicular to the surfaces of the coupler chip 19 and the silicon optical chip 15. The system shown in FIG. 5 is used for the arrangement of the DEMUX 27. The same arrangement can also be used as MUX 26.

The system shown in FIG. 6 has a dichroic filter having a directional coupler 36 and a grid coupler 37 that can be used as the DEMUX 27. The directional coupler 36 and the grid coupler 37 have wavelength sensitivity, which can reduce channel crosstalk. The directional coupler 36 is preferably a lossless device capable of dividing optical power into two optical channels. These grid couplers 37 can be replaced by micro-machined mirrors. The directional coupler 36 and the grid coupler 37 are usually polarization sensitive. Each channel includes a separate directional coupler 36 and a grid coupler 37 for Tranverse Electrical (TE) polarization and for Tranverse Magnetic (TM) polarization. The two polarizations are spatially combined at a photodetector (not shown in Figure 6), which makes it possible to use a single photodetector in each channel. Alternatively, the polarizations can be combined angularly, or a polarized beam combining structure can be used. Figure 6 shows the arrangement for DEMUX 27; however, the same arrangement can be used as MUX 26, but it is not necessary to consider different polarizations because the polarization of laser sources is usually well defined.

The Echelle grid, wavelength selective grid, and dichroic filter shown in FIGS. 3 to 6 may not be used, and instead, an arrayed waveguide grid, other dichroic filter, or It is a resonance interference filter as MUX 26 and / or DEMUX 27.

The coupler chip 19 shown in FIG. 7 is connected to a silicon optical chip 15. The receiving channel includes an Rx interconnect waveguide 22 and a channel detector 34. Instead of the Rx interconnect waveguide 22, a Tx interconnect waveguide 21 is used in a transmission channel, and a channel laser 54 is used instead of the channel detector 34. The receiving channel provides an optical path between the Rx interconnecting waveguide 22 and the channel detector 34, and the transmitting channel provides an optical path between the Tx interconnecting waveguide 21 and the channel laser 54. Light path. The coupler chip 19 and the silicon optical chip 15 include various structures for controlling the channel beam 35. The coupler chip 19 will include a lens 42 and the silicon optical chip 15 will include a lens 43. The coupler wafer 19 includes a light layer 38 including a passive waveguide, which includes an Rx turning structure 29. The Rx turning structure 29 may include a micro-machined surface or a surface grid. The micromachined surface will use total internal reflection or will include a reflective coating. The micro-machined surface can be flat or curved to focus the channel beam 35 as shown in FIGS. 8 to 10, 32, and 33. The end surfaces of the interconnecting waveguides 21, 22 can also be bent to replace the steering structure 29. In the transmission channel, the silicon optical chip 15 includes an optical layer 39 including an active waveguide. Although not shown in FIG. 7, it includes a modulator 16. In the receiving channel, the optical layer 39 of the silicon optical chip 15 does not need to have an active waveguide. In FIG. 7, although the optical layer 38 of the coupler wafer 19 is located on the top surface; however, the optical layer 38 can also be located on the bottom surface of the coupler wafer 19. Similarly, the light layer 39 of the silicon optical chip 15 is located on the bottom surface; however, the light layer 39 can also be located on the top surface of the silicon optical chip 15. The coupler chip 19 and the silicon optical chip 15 both include a coating (for example, a dielectric such as silicon nitride or silicon oxide) to reduce back reflection in the transmission channel and the reception channel.

Various possible optical arrangements for the coupler chip 19 and the silicon optical chip 15 shown in FIGS. 8 to 10, 32, and 33 are shown. FIG. 8 shows an arrangement with a single curved surface and including a flat Rx turning structure 29, a flat silicon wafer 15 without a lens 43, and a lens 42 on the coupler wafer 19, which has the advantage that only one curved surface is required. FIG. 9 shows an arrangement with three curved surfaces and including a curved Rx turning structure 29, a lens 43 on a silicon wafer 15, and a lens 42 on a coupler wafer 19 on the silicon wafer 15 and the coupler wafer 19 A gap between them provides a collimated beam. FIG. 10 shows an arrangement with two curved surfaces and a flat surface and including a curved Rx steering structure 29, a flat silicon optical wafer 15 without a lens 43, and a lens 42 on a coupler wafer 19, the benefits of which are based on the silicon The top of the optical wafer 15 provides a flat surface, so that no processing or minimal processing is required on this surface of the silicon optical wafer 15. In FIGS. 32 and 33, the surface of the silicon optical wafer 15 and the surface of the coupler wafer 19 facing each other are flat, and there is no space between the silicon optical wafer 15 and the coupler wafer 19. FIG. 32 shows an arrangement having a single curved surface and including a flat Rx turning structure 29, a flat silicon wafer 15 without a lens 43, and a lens 42 located on the coupler wafer 19 but not facing the silicon wafer 15, The advantage is that only one curved surface is required. FIG. 33 shows an arrangement having a single curved surface and including a curved Rx turning structure 29, a flat silicon wafer 15, and a flat coupler wafer 19, which has the advantage that only one curved surface is required.

The channel beam 35 will be collimated (Figure 9) or not (Figures 8, 10, 32, and 33). The channel beam 35 may be positioned at an oblique angle, that is, not perpendicular, as shown in FIGS. 8 to 10, 32, and 33. Preferably, the channel beam 35 is collimated or nearly collimated in the gap region between the silicon optical chip 15 and the coupler chip 19. The relatively large beam size (ie, about 20 μm to about 100 μm) in this region relaxes the alignment tolerance between the silicon optical chip 15 and the coupler chip 19. 8, 10, 32, and 33 with a flat silicon wafer 15 do not need to provide surface feature elements on one side of the silicon wafer 15. The end depends on the optical layout. For example, the necessary alignment between the feature elements located on the top surface of the silicon optical chip 15 and the feature elements located on the bottom surface of the silicon optical chip 15 is ± 1 μm. Achieving this level of precision can be very difficult and expensive. In an ideal system with a collimated beam, the positional alignment error between the silicon optical chip 15 and the coupler chip 19 will not cause any displacement at the focus. Although there may be an angular offset; the angular sensitivity of the interconnected waveguides 21, 22 and the channel detector 34 is less than the position sensitivity.

The various curved surfaces shown in FIGS. 8 to 10, 32, and 33 and the lens shown in FIG. 7 can be manufactured using laser processing, where an ultra-fast laser (for example, pico second ) Or femto second pulse width) will move over a surface to create the curved surface. Ablation material removal using laser processing can leave optically rough surfaces that require post-processing in some applications. Laser processing is performed under the surface of the coupler wafer 19 and / or the spacer 56 (discussed below) to significantly reduce or minimize the amount of material that needs to be removed by ablation. Although the laser processing only removes the material at the position where the laser is focused, the laser processing cuts down a large portion of the material, which can then be removed by another process. Laser processing provides a large degree of freedom in forming structures. For example, it includes lenses and mirrors with different curvatures and alignments. Any residual roughness during laser processing can be smoothed using a thermal grinding process. An ultra-fast laser can also be used to form the waveguide in the coupler wafer 19 by locally modifying the refractive index in the coupler wafer 19.

The silicon optical chip 15 includes one or more channel detectors 34 and / or one or more channel lasers 54. The channel detectors 34 are integrated into the silicon optical chip 15 in an integrated manner, or they are surface-mounted into the silicon optical chip 15. The integrated channel detector 34 will include a Ge / Si device with a response value of about 0.4A / W (@ 1310nm); and the surface-embedded channel detector 34 will include a 0.9 / A (W (@ At 1310nm), the response value of the InGaAs device is about twice that of the integrated channel detector. The channel detector 34 can be a resonant cavity enhanced detector that provides wavelength filtering, or can be a ring resonator. An example of the system silicon optical chip 15 shown in FIG. 27, wherein the channel detector 34 and the TAI 14 are surface embedded into the light layer 39, and the preferred system is close to each other. The diameter of the channel detector 34 will vary depending on the required bandwidth. Higher bandwidth systems will have a small diameter channel detector34. For example, a 10 Gbps system can have a detector diameter of about 70 μm, and a 28 Gbps system can have a detector diameter of about 22 μm.

The silicon light chip 15 is preferably connected to the PCB 40 by using flip-chip technology (for example, it includes a Ball Grid Array (BGA) 41). Other devices (for example, which include a laser driver 12, a modulator driver 13, and a TIA 14, etc.) can also use stub bump flip chip technology. The PCB 40 preferably includes a notch 44 that includes a thermal compound 45 that will contact the channel detector 34 or the channel laser 54.

The coupler chip 19 and the silicon optical chip 15 are separated by a gap, so that the heat generated by the silicon optical chip 15 has a poor thermal path from the silicon optical chip 15 to the coupler chip 19. If UV light can be transmitted through the coupler wafer 19, the gap will be filled with a UV curing adhesive. For example, the gap can be about 20 μm to about 50 μm. By using the gap between the coupler chip 19 and the silicon optical chip 15, the coupler chip 19 and the silicon optical chip 15 are aligned with each other to ensure correct operation of all channels. These alignment features have different degrees of freedom. For example, the fixed alignment sphere 55 on the silicon optical chip 15 is fastened to the point contact 51, the line contact 52, and the plane contact 53 in the coupler chip 19, as shown in FIGS. 17 and 18. This arrangement can be inverted so that the alignment spheres 55 are located on the coupler wafer 19, and the contacts 51, 52, and 53 are located on the silicon wafer 15. The contacts 51, 52, and 53 can be microfabricated, can be formed by photolithography and anisotropic etching, or can be formed by laser processing. The alignment spheres 55 are fixed in the recesses. Alternatively, the alignment spheres 55 can be replaced by alignment protrusions formed on the surface of the silicon optical chip 15 (or the coupler chip 19). The alignment spheres can be made of glass.

In FIG. 17, the silicon wafer 15 includes an anisotropically etched chamfered cone, and the alignment spheres 55 are fixed therein. In FIG. 18, the coupler wafer 19 includes a plurality of matching notches, which define the contacts 51, 52, 53. The alignment spheres 55 provide a rigid connection, and the contacts 51, 52, 53 are arranged to prevent bending and twisting caused by the difference in thermal expansion coefficients between the silicon optical chip 15 and the coupler chip 19 . It is desirable in the art to avoid or minimize bending and torsion, as bending and torsion can result in reduced coupling efficiency and render the receiver 10 inoperable. Avoiding or minimizing heat-induced bending and twisting increases the operating temperature range of the receiver 10.

The silicon wafer 15 and the coupler wafer 19 are fixed together by a compliant adhesive that shrinks during curing. The compliant adhesive can be supplied by injecting the compliant adhesive into the through-hole 59 on the coupler wafer 19. Although this compliant adhesive can be cured by UV; this is not necessarily a requirement.

In addition to the lens arrangements shown in FIGS. 8 to 10, 32, and 33, various other techniques can be used to modify the channel beam size as shown in FIGS. 11 to 15. These techniques and lens arrangements can be used separately and in combination.

11 and 12 show a hybrid silicon optical chip 57 including a spacer 56 attached to the silicon optical chip 15. The thickness of the separator 56 can be about 0.5 mm to several mm. The spacer 56 may allow greater beam expansion between the hybrid silicon light chip 57 and the coupler chip 19, which would relax the alignment tolerances and allow passive alignment. The spacer 56 may include fiducial marks or micro-machined structures to help align the coupler chip 19 and the hybrid silicon light chip 57.

The spacer 56 can be made of glass or silicon, and is the same material as the silicon light chip 15. The thermal expansion coefficients of the spacer 56 and the silicon optical chip 15 are matched or substantially matched to avoid the accumulation of excess stress. The spacer 56 is anodically soldered to the silicon wafer 15. The spacer 56 is first soldered to a wafer made of a plurality of silicon wafers, for example, an 8-inch or 12-inch wafer, and then cut after soldering. Assuming 75% wafer utilization and 5mm x 5mm wafers, 972 devices will be obtained from 8-inch wafers and 2188 devices will be obtained from 12-inch wafers. The coupler wafer 19 may be attached at the wafer level or may be attached after cutting.

FIG. 11 shows the gap between the hybrid silicon light chip 57 and the coupler chip 19; and FIG. 12 shows that the hybrid silicon light chip 57 and the coupler chip 19 are anode welded together, which can be It is implemented at the wafer level and can reduce the number of parts.

The silicon optical chip 15 shown in FIG. 13 has a through hole 58. The through hole 58 may have a tapered wall portion as shown in FIG. 13, or may have a straight wall portion (not shown in the figure). The size of the through hole 58 is too large to relax the alignment tolerance, as long as the channel detector 34 is fully exposed. The over-sized through hole 58 does not require a high position tolerance value in the backside silicon light processing. The through hole 58 is metalized to provide a reflective surface, which may not need any lens in the channel or relax the alignment tolerance. As shown in FIG. 13, if an integrated channel detector 34 is used, the through hole 58 will terminate at the optical layer 39. Alternatively, the through hole 58 can also extend through the light layer 39.

The coupler wafer 19 shown in FIGS. 14 and 15 includes a first waveguide 60 and a second waveguide 62 in the optical layer 38. The first waveguide 60 is located on a substrate 64 (which is preferably on a glass) and includes a first tapered portion 61. The second waveguide 62 is located above the first waveguide 60 and includes a second tapered portion 63. The first waveguide 60 and the second waveguide 62 are arranged such that optical energy is coupled through the first tapered portion 61 and the second tapered portion 63 by an evanescent field.

Preferably, the first waveguide 60 and the second waveguide 62 have different optical and physical characteristics. For example, the first waveguide 60 and the second waveguide 62 have different sizes to support different modal sizes. A larger modal size can help couple light from a channel laser 54 to the interconnected waveguide 21, while a smaller modal size can help MUX / DEMUX operation and modulation.

The optical layer 38 preferably includes at least one of the following: PMMA (polymethyl methacrylate), SU8 photoresist, silicon, silicon dioxide, and silicon nitride. The first waveguide 60 and the second waveguide 62 can be made of materials different from each other. The first waveguide 60 can be made of SiN because the SiN waveguide is usually smaller; the second waveguide 62 can be made of SiO ₂ because the dimensions of the SiO ₂ waveguide will properly match the mode of the single-mode fiber. State size. This may allow the first waveguide 60 to be connected to the MUX 26 and the second waveguide 62 to be connected to the Tx interconnecting waveguide 21.

The first waveguide 60 and the second waveguide 62 can be manufactured by different processes, including photolithography combining doping, etching, or material deposition and laser processing, which are performed by material removal or borrowing. The refractive index and / or density of the material is changed by the modified material characteristics. Laser processing thickens and / or increases the refractive index by focusing laser light of short pulse wavelengths into a material. The focused light spot locally changes the refractive index in a small volume (for example, a size of 10 to 100 μm ³ ). The focused light spot is scanned along a material at high speed (for example, 100 mm / sec).

As shown in FIG. 14, the optical layer 38 includes, from top to bottom: 1) a top layer 66 having a refractive index n ₂ ; 2) a second waveguide 62 having a refractive index n ₁ ; 3) a having a refractive index an intermediate layer 65 of n ₂ ; and 4) a first waveguide 60 having a refractive index n ₃ . The optical layer 38 is located on the top of the substrate 64 having a refractive index n _sub . Since the first waveguide 60 and the second waveguide 62 have different optical characteristics, n ₁ ≠ n ₃ . Refractive index n ₁ of the second waveguide 62 is greater than the top layer 66 and an intermediate layer 65 of refractive index n _2, i.e., n _1> n _2. The refractive index n _{3 of the} first waveguide 60 is larger than the refractive index n _{2 of the} intermediate layer 65 and the refractive index n _{sub of the} substrate 64, that is, n ₃ > n ₂ and n ₃ > n _sub . Other arrangements may be used as long as the refractive index of the waveguide is higher than the refractive index of the material surrounding the waveguide.

14 and 15 show a coupler wafer 19; however, the same structure can also be formed in the light layer 39 of the silicon optical wafer 15.

In addition to the arrangements and techniques shown in FIGS. 8 to 15, 32, and 33, interconnected waveguides 21, 22 including a spot size converter region as shown in FIG. 30 can also be used. The modal dimensions of the channel waveguides 32 in the coupler wafer 19 will match or substantially match (fall within manufacturing tolerances) at the ends of the spot size converter regions 78 of these interconnected waveguides 21, Modal dimensions. Interconnected waveguides 21, 22 having a spot size converter region 78 can be used in place of the arrangements and techniques shown in FIGS. 8 to 15, 32, and 33; or, in addition to FIGS. 8 to 15, 32, and 33 In addition to the arrangements and techniques shown in the figures, interconnected waveguides 21, 22 having a spot size converter region 78 may be used in addition.

The spot size converter region 78 can be provided by an adiabatic taper at the ends of the interconnecting waveguides 21,22. Increasing the modal size will reduce the alignment tolerance between the channel waveguide 32 in the coupler wafer 19 and the cores 31 of the interconnecting waveguides 21 and 22. If the interconnecting waveguides 21, 22 are an optical fiber, the spot size converter region 78 can be created by locally heating the interconnecting waveguides 21, 22, resulting in a doping that forms the core 31 Diffusion of things. Ultra-short laser processing can be used to locally heat the fiber. The ultra-short laser processing changes the refractive index of the optical fiber by focusing the laser into a 3-dimensional pattern in the optical fiber, thereby creating the spot size converter region 78. The modal size of a single-mode fiber will increase from about 9 μm to about 20 microns. The standard single-mode fiber has an optical loss of 1 dB in a 1 μm alignment error between the core 31 and the channel waveguide 32. Multiplying this modal size will increase the 1dB alignment tolerance to greater than 2μm.

An example of a transmission-side beam model for the hybrid silicon optical chip 57 and the coupler chip 19 shown in FIG. 16 is shown. FIG. 16 does not include or show any steering structures in the light path and does not include or show any of the techniques shown in FIGS. 11 to 15. FIG. 16 contains two curved surfaces as shown in FIG. 9. First, it is assumed that the channel beam 35 is a Gaussian beam having a size of 0.5 μm. The hybrid silicon-optic chip 57 includes a 0.7-mm-thick silicon-optic chip as the silicon-optic chip 15 with a refractive index n = 3.5; and a 0.5-mm-thick borosilicate glass layer as the separator 56. Its refractive index n = 1.45. The boron silicate glass layer can be Borofloat®, which is made by a microfloat process, which produces a glass with a low thermal expansion coefficient, and has good surface quality, visible light transmission characteristics, and mechanical strength. . The lens 43 in the separator 56 has a radius of curvature of 351 μm. There is a gap of 15 μm between the hybrid silicon optical chip 57 and the coupler chip 19. The lens 42 in the coupler wafer 19 has a radius of curvature of 343 μm. The coupler wafer 19 includes a layer of Borofloat® glass having a thickness of 0.7 mm and a refractive index n = 1.45. In this example, the channel beam 35 is collimated in the gap with a beam size of 66 μm and is coupled into a standard single-mode fiber with a coupling efficiency of 85%.

19 and 20 are visually assisted alignment arrangements that can be used in place of the dynamic alignment arrangements shown in FIGS. 17 and 18. In the visually assisted arrangement, the coupler chip 19 includes a reference point 100, and the silicon optical chip 15 includes a reference point 101. The fiducials 100, 101 are aligned as shown in FIG. As shown in FIG. 19, in order to align the silicon optical chip 15 and the coupler chip 19, the silicon optical chip 15 is placed on the platform 104, and the chuck 105 is used to move the coupling with the silicon optical chip 15 as a reference.器 片 19。 The wafer 19. The chuck 105 is moved among the x direction, the y direction, and the z direction and may also be rotated. The platform 104 is moved in the x direction and the y direction and may also be rotated. The top camera 103 is used to view the reference point 100 on the coupler wafer 19, and the bottom camera 102 is used to view the reference point 101 on the silicon wafer 15. The coupler chip 19 and the silicon optical chip 15 will be aligned with each other until the cameras 102, 103 (which will be accurately aligned in the x and y directions) can be used to visually confirm the reference points 100, 101 as shown in FIG. 20 Aligned as shown. Because two cameras 102, 103 are used and the cameras 102, 103 see the relationship of the reference points 100, 101 on the surface facing the cameras 102, 103, the cameras 102, 103 do not need to see through the The silicon light chip 15 or the coupler chip 19. However, a wavelength of light transmitted through the coupler chip 19 and / or the silicon optical chip 15 may also be used, which may allow the vision assisted alignment system to align the coupler chip 19 and / or the silicon optical chip 15 in the Marking on the opposite side of the camera 102 or 103. The waveguides in the coupler chip 19 and / or the silicon optical chip 15 transmit optical radiation that can be seen by the vision-assisted alignment system for active alignment.

The coupler chip 19 and the silicon optical chip 15 use contacts 51, 52, and 53 as zero to three alignment feature elements. Among the zero alignment features (ie, none of the contacts 51, 52, and 53 are used), the alignment of the coupler wafer 19 and the silicon-optic wafer 15 uses only the reference points 100, 101. Among the three alignment feature elements (that is, using all of the contacts 51, 52, 53), although it is helpful to use visually assisted alignment, it is also possible not to use visually assisted alignment. In one or two alignment features, some degrees of freedom between the coupler chip 19 and the silicon-optic chip 15 will depend on the alignment features, and some degrees of freedom will depend on the use of a reference point. 100, 101 visually assisted alignment.

In FIGS. 17 to 20, the alignment features are used to align the coupler chip 19 and the silicon optical chip 15. In addition, similar alignment features can also be used to align the silicon wafer 15 and the spacer 56.

Examples of the system receiver 10 shown in FIGS. 21, 22, and 34. The transceiver 10 shown in FIGS. 21 and 22 includes a PCB 40. The microcontroller 11 and the silicon optical chip 15 are embedded in the PCB 40. The coupler chip 19 and the silicon optical chip 15 are enclosed in a casing 70. The heat sink 71 is unnecessary and will be used to dissipate thermal energy from the silicon optical chip 15 or thermal energy from a device embedded on the silicon optical chip 15. As shown in FIG. 21, a heat sink 71 is connected to the bottom of the silicon optical chip 15. As shown in FIG. 34, in addition to the heat sink 71 attached to the bottom of the silicon optical chip 15, the heat sink 79 can also be connected to the top of the silicon optical chip 15. The interconnecting waveguides 21, 22 are permanently attached to the receiver 10. That is, the interconnecting waveguides 21, 22 will be pigtailed optical fibers. The PCB 40 includes a plurality of land portions 46 at one edge that can be inserted into a connector (not shown in FIGS. 21 and 22). The connector can be located in an IC package, in the middle of a main PCB (not shown in FIGS. 21 and 22), or an interposer. FIG. 31 shows the PCB 40 inserted in the first connector 81. As shown in FIG. 31, the PCB 40 can also be connected to a second connector 82 in synchronization with the first connector 81; however, this is not a necessary condition. If the transceiver 10 is connected to the first connector 81 and the second connector 82 as shown in FIG. 31, a high-speed signal can be transmitted through the first connector 81, and a low-speed signal can be transmitted through the first connector 81. The two connectors 82 are transmitted. Preferably, the interconnecting waveguides 21, 22 form an angle with respect to the receiver 10, so that when the receiver 10 is inserted into a connector located in the middle of a PCB, the The interconnecting waveguides 21, 22 will extend above any other device on the PCB without disturbing the devices. Although a plurality of interconnection lines 21 and 22 are shown in FIGS. 21 and 22, a single interconnection waveguide 21 or 22 may be used.

Examples of the transceiver 10 having a latch 72 are shown in Figs. The transmitter 10 in FIGS. 21 and 22 is the same as the transmitter 10 in FIGS. 23 and 24. In different systems, the transmitter 10 in FIGS. 23 and 24 includes a latch 72. Because the interconnected waveguides 21 and 22 can be separated from the receiver 10, the interconnected waveguides 21 and 22 can be connector-type optical fibers. In the receiver 10 in FIGS. 23 and 24, the silicon optical chip 15 and the case 70 having the latch 72 are arranged so that after the coupler chip 19 is inserted into the case 70, The coupler chip 19 is fixed in the casing 70 and aligned with the silicon light chip 15. The transceiver 10 may include a coarse alignment feature, which substantially aligns the coupler chip 19 and the silicon optical chip 15. The alignment sphere 55 and the contacts 51, 52, 53 will accurately align the coupler chip 19 and the silicon optical chip 15. The roughly aligned feature elements may be placed in any suitable location, including being placed on any of the coupler wafer 19, the silicon-optic wafer 15, the housing 70, or a heat sink. For example, the coarse alignment feature can include an etched guide post on the coupler wafer 19 or the silicon-optical wafer 15, which is aligned on the silicon-optical wafer 15 or the coupler wafer 19. Etched pilot holes. A heat sink (not shown) is integrated into the latch 72 or placed on the housing 70, and has a cutout portion that does not cover the latch 72.

An example of the tethered coupler wafer 19 shown in Figs. The coupler chip 19 includes an array of grooves 74 and a recess 73 for the interconnecting waveguides 21, 22. Each of the interconnecting waveguides 21 and 22 will be inserted into a corresponding hole 75, which will accurately align the interconnecting waveguides 21 and 22 inside the coupler wafer 19. The hole 75 can be made by a laser using an ultra-short laser pulse. The coupler wafer 19 includes a recess 76 which is filled with an adhesive to permanently fix the interconnecting waveguides 21, 22 in the correct position. An adhesive is also applied in the notch 73 to provide a strain relief agent. In Figures 25 and 26, the turning structures 28, 29 provide a fully internal reflecting surface on the sides of adjacent interconnecting waveguides 21, 22, so that light from these interconnecting waveguides 21, 22 will Be guided down.

28 and 29 are steps for manufacturing a receiver. In the method shown in FIG. 28, a silicon optical chip is attached to a PCB. A coupler chip is then mated to the silicon optical chip. Then, a plurality of optical fibers are attached to the coupler chip 1.

In step S10, the silicon optical wafer is manufactured. The silicon light chip includes a light layer on a first side. The silicon light chip includes a lens and / or an alignment feature on a second side. The lenses and / or alignment features are directly etched on the second side of the silicon wafer; or they are first etched on a different wafer (which can be silicon or glass) and then soldered to The silicon optical wafer (wafer-to-wafer or wafer-to-wafer). In step S11, the active devices (for example, they include a flip-chip photodetector, a flip-chip TIA, and a flip-chip modulator driver) are attached to the silicon optical chip. The silicon optical chip is then tested in step S12. In step S13, the wafer with a silicon optical wafer is cut. In step S14, the PCB is assembled. In step S15, the coupler wafer is manufactured. The coupler wafer includes a light layer and a plurality of grooves on a first side. The coupler wafer may include lenses and / or alignment features on the second side. In step S16, the wafer with the coupler wafer is cut.

In step S17, the silicon optical chip is connected to the PCB. In step S18, separate alignment feature elements are added as appropriate. In step S19, the silicon optical chip and the coupler chip are mated. In step S20, the silicon optical chip and the coupler chip are soldered together using an adhesive. In step S21, the optical fibers are embedded in grooves in the coupler wafer. In step S22, heat sinks, fiber strain relief agents, etc. are added as appropriate. A final test is performed on the transceiver in step S23.

The method shown in FIG. 29 relies on manufacturing the coupler wafers on the silicon optical wafer in a wafer-level manufacturing manner. A plurality of individual coupler chips are embedded in the silicon light chip on the silicon light wafer. The silicon photo / coupler wafer is then cut. The fiber is then attached to the coupler wafer.

In step S30, the silicon optical chip is manufactured. The silicon light chip includes a light layer on a first side. The silicon optical chip may include a lens and / or an alignment feature on the second side. The lenses and / or alignment features are directly etched on the second side of the silicon wafer; or they are first etched on a different wafer (which can be silicon or glass) and then soldered The silicon optical wafer (wafer-to-wafer or wafer-to-wafer). In step S31, the active devices (for example, they include a flip-chip photodetector, a flip-chip TIA, and a flip-chip modulator driver) are attached to the silicon optical chip. The silicon optical chip is then tested in step S32. In step S34, the coupler wafer is manufactured. The coupler wafer includes a light layer and a plurality of grooves on a first side. The coupler wafer may include lenses and / or alignment features on the second side. In step S35, the wafer with the coupler wafer is cut.

In step S36, separate alignment feature elements are added as appropriate. In step S37, the silicon optical chips and the coupler chips are mated to the silicon optical chips on the wafer. In step S38, the silicon optical chip and the coupler chip are soldered. In step S39, the wafers with the silicon optical wafers and the coupler wafers are cut. In step S40, the PCB is assembled. In step S41, the silicon optical chip is connected to the PCB. In step S42, the optical fibers are embedded in grooves in the coupler wafer. In step S43, heat sinks, fiber strain relief agents, etc. are added as appropriate. A final test is performed on the receiver in step S44.

It should be understood that the foregoing description merely explains the present invention. Those skilled in the art will understand that various alternatives and modifications can be designed without departing from the present invention. Accordingly, the invention is intended to cover all such alternatives, modifications, and variations that fall within the scope of the appended patent applications.

Claims (22)

A coupler chip for optically connecting an optical channel of a silicon optical chip to an interconnected waveguide. The coupler chip includes an optical waveguide that transmits optical signals passing through the coupler chip; wherein the optical waveguide It is made of a laser-treated material, which is produced with ultra-short laser pulses. According to the coupler wafer of the first patent application scope, it further comprises a light layer on a first side of the coupler wafer. The coupler wafer according to item 2 of the patent application scope, further comprising a groove on the first side of the coupler wafer adjacent to the optical layer; wherein the groove is constructed to receive the mutual Linked waveguide. According to the coupler wafer of claim 3, it further comprises a notch on the first side of the coupler wafer adjacent to the groove; wherein the notch is constructed to receive the mutual Linked waveguide. According to the coupler wafer of claim 3, it further comprises a hole on the first side of the coupler wafer adjacent to the trench; wherein the hole is constructed to receive the interconnected waveguide . The coupler wafer according to item 2 of the patent application scope, further comprising a lens on a second side of the coupler wafer opposite to the first side. The coupler chip according to item 2 of the patent application scope, wherein the optical waveguide includes a first waveguide and a second waveguide, the first waveguide is on a first layer of the optical layer, and the second wave The conduit is on a second layer of the light layer. The coupler chip according to claim 7 of the scope of patent application, wherein: the first waveguide includes a first tapered portion; The second waveguide includes a second tapered portion; and the first waveguide and the second waveguide are constructed so that light energy is coupled by an evanescent field. The coupler wafer according to item 7 of the application, wherein the first waveguide comprises SiN and the second waveguide comprises SiO ₂ . According to the coupler wafer of the first patent application scope, it further includes an optical layer, which includes from top to bottom: a top layer having a refractive index n ₂ ; a second waveguide having a refraction n ₁ ratio; an intermediate layer having the refractive index n _2; and a first waveguide having a refractive index n _3; wherein the refractive index n ₁ of the second waveguide is different from the first waveguide The refractive index n ₃ (n ₁ ≠ n ₃ ); and the refractive index n _{1 of} the second waveguide is greater than the refractive index n ₂ (n ₁ > n ₂ ) of the top layer and the intermediate layer; and the first The refractive index n _{3 of} a waveguide is larger than the refractive index n ₂ (n ₃ > n ₂ ) of the intermediate layer. A method of manufacturing a coupler chip for optically connecting an optical channel of a silicon optical chip to an interconnecting waveguide, the method comprising processing the coupler chip with an ultra-short laser pulse, An optical waveguide is produced in the coupler wafer, wherein the optical waveguide provides an optical path between the optical channel of the silicon optical wafer and the interconnecting waveguide. The method according to item 11 of the application, wherein the laser processing step includes locally correcting a refractive index inside the coupler wafer. The method according to item 12 of the patent application scope, wherein the step of locally correcting a refractive index corrects the refractive index in a region of a volume of about 10 μm ³ to 100 μm ³ . The method according to item 12 of the patent application scope, wherein the step of locally correcting a refractive index corrects the refractive index in a region at a rate of about 100 mm / sec. The method according to item 11 of the patent application scope, wherein the step of laser processing includes Locally correct a density inside the coupler wafer. The method according to item 11 of the patent application scope, further comprising thermally grinding the coupler wafer to smooth the residual roughness after the laser processing step. The method according to claim 11 of the patent application scope, further comprising additional laser processing to produce a curved surface or lens in the coupler wafer. The method of claim 11 further includes additional laser processing to produce a hole in the coupler wafer, and the interconnecting waveguide is received in the hole. The method according to item 11 of the application, wherein the laser processing step uses a laser having one of a pico second or a femto second pulse width. An interconnected waveguide includes a spot size converter region defined by a three-dimensional pattern in a laser-treated material produced using ultrashort laser pulses, wherein the spot size converter region includes an adiabatic gradient Detail, the adiabatic tapering changes the size of a cross section of a light beam transmitted in the interconnected waveguide. The interconnecting waveguide according to claim 20, wherein the spot size converter region increases a domain modal size of the interconnecting waveguide from about 9 μm to about 20 microns. A method of manufacturing an interconnected waveguide, the method comprising laser processing an interconnected waveguide by focusing an ultrashort laser pulse in a three-dimensional pattern to form a spot size converter region, wherein the spot size conversion The device region includes an adiabatic taper that changes a cross-sectional size of a light beam transmitted in the interconnected waveguide.