TW201825917A - Probe card assembly having die-level and pin-level compliance, and associated systems and methods - Google Patents

Abstract

Systems and methods for testing semiconductor wafers are disclosed herein. In one embodiment, an apparatus for testing dies of a semiconductor wafer includes: a tester-side printed circuit board (PCB); a wafer-side support plate having a first surface facing the tester-side PCB and a second surface facing away from the first face; and a plurality of individual probe cards (DUT-lets) supported by the wafer-side support plate. Each individual DUT-let has a DUT-let contactor that carries a plurality of contact structures for contacting at least one die of the semiconductor wafer. The individual DUT-let contactors are individually compliant with respect to the semiconductor wafer, and wherein the individual DUT-let contactors are separated.

Description

Probe card assembly with grain level and pin level compliance and associated system and method thereof

The present invention relates to probe card assemblies, associated systems and methods for testing semiconductor wafers, and more particularly to probe card assemblies having grain level and pin level compliance and their associated System and method.

Integrated circuits are used in a wide range of products. The price of integrated circuits continues to decrease and performance continues to increase, and is ubiquitous in modern electronic devices. These improvements in performance/cost ratios are at least partially miniaturized, which enables the production of more semiconductor dies from a single wafer using each new generation of integrated circuit fabrication techniques. In addition, the total number of signals and power/ground contacts on a semiconductor die typically increases with new and more complex die designs. Before the semiconductor die is introduced to the customer, the performance of the integrated circuit is tested based on a statistical sample or by testing each die. Performing an electrical test on a semiconductor die typically involves energizing the die through the power/ground contacts, transmitting the signal to the input contacts of the die, and measuring the resulting signal at the output contacts of the die. Therefore, during electrical testing, at least some of the contacts on the die must be in electrical contact to connect the die to the power supply and test signal. 1A and 1B are a cross-sectional view and a bottom view, respectively, of a probe card 110 for testing a semiconductor wafer in accordance with the prior art. In operation, the probe card 110 contacts a wafer 140 such that an array of probe pins 116 and the die of the wafer 145 (also referred to as a "tested device" or "DUT") A corresponding array of points 148 (eg, pads, solder balls, copper posts, or through-turn vias (TSVs)) are in electrical contact. Next, a tester 150 transmits an electrical test sequence (eg, a test vector) to the die contact 148 of one or more of the dies 145 via the cable 130 and the probe card 110. In response to the test sequences, the integrated circuit of the tested die produces an output signal that is routed back to the wafer tester 150 via the probe card 110 for analysis and determination of whether a particular die has passed the test. Next, the test contactor is moved to another die or another group of die 145 that is tested in parallel, and the test continues until the entire wafer is tested. Once the entire wafer 140 has been tested, the wafers on the wafer are singulated along the wafer etch 146, the untested dies are discarded, and the package passes through the tested dies and is introduced to the customer. Probe card 110 provides a path for signal/power between tester 150 and tested die 145 of wafer 140. The signal/power is further passed through a printed circuit board (PCB) 114, through a connection PCB 120 to a spatial converter 112 contact structure 120, through a spatial converter 112 wiring layer 113 to further reach the probe card 110 probe connection Needle 116, probe pin 116 contacts the DUT during operation. The space transformer 112 is held in place by a holder 126. The screw 128 can adjust the relative position of the space transformer 112 relative to one of the PCBs 114. For example, the screws 128 may improve the parallelism between the space transformer 112 and the PCB 114 to improve contact between the probe pins 116 and the tested die 145. In many applications, a reliable contact between the probe card 110 and the die of the wafer 140 requires a relatively high contact force between the wafer and the probe card. This contact force can cause the probe card 110 to bend. In general, the conventional space transformer 112 is less flexible than the PCB 114 because the space transformer is smaller than the PCB and is also more rigid than the material of the PCB 114 (for example, a woven fiberglass cloth having an epoxy resin binder). Made of one of the materials (for example, ceramic). Therefore, the conventional probe card includes reinforcing members 122a/122b and screws 124 for limiting the bending of the PCB 114. Typically, an increasing number of die contacts are distributed over a decreasing die area, which causes the contacts to become smaller, and the contacts are spaced apart by a smaller distance (eg, a smaller pitch) . In addition, the characteristic diameter of the contact pins of the test contactor typically varies proportionally with the characteristic dimensions of one of the contact structures on the semiconductor die. Therefore, as the contact structure on the die becomes smaller and/or has a smaller pitch, the contact pins of the test contactor become smaller and smaller. However, it is difficult to significantly reduce the diameter and spacing of the contact pins of the test contactor, for example, because it is difficult to machine and assemble such small parts, which results in low yield and test contactors. The performance is inconsistent. 2A is an exploded view of one portion of a test stack 250 for testing a semiconductor wafer in accordance with the prior art. Test stack 250 routes signals and power from a tester (not shown) to a wafer 140 or other substrate carrying one or more devices under test (DUT) 145, and then from a DUT (eg, a semiconductor die) The output signal is sent back to the tester for analysis and determination of the performance of a different DUT (eg, whether the DUT is suitable for packaging and is available to the customer). Signal and power from the tester are routed through cable 239 to a tester translator interface board (TTI board) 230, to a wafer translator 210 and further to semiconductor dies on wafer 140. Conductive traces 238 carried by a test contactor substrate 232 can electrically connect the cable 239 to the contacts 236 on opposite sides of the TTI substrate 232. In some embodiments, the TTI substrate 232 can be a printed circuit board (PCB). In operation, the TTI board 230 can contact one of the interrogation sides 213 of a wafer translator 210, as indicated by arrow A. In at least some embodiments, the relatively large interrogation side contact structure 214 can improve the alignment of the corresponding contacts 236 of the TTI board 230. Contact structure 214 at inquiry side 213 is electrically coupled to relatively small wafer side contact structures 216 on wafer side 215 of one of translators 210 through conductive traces 218 of a wafer translator substrate 212. The wafer side contact structures 216 are sized and/or spaced to contact corresponding die contacts 148 of the wafer 220. The die contacts 148 may be relatively flat surfaces on the die, solder balls, copper posts, or other contact structures carried by the die. Arrow B indicates that one of the wafer translator 210 contacts one of the die contacts 148 on the active side 125 of the wafer 140. As explained above, the signals and power from the tester can affect the DUT of the wafer 140, and the output signal from the tested DUT can be routed back to the tester for analysis and determination as to whether the DUT is operating according to specifications. A wafer chuck 240 supports the wafer 140. Arrow C indicates the direction in which wafer 140 is mated with wafer chuck 240. In operation, the wafer 140 can be held against the wafer chuck 240 using, for example, vacuum or mechanical clamping. In some cases, the contact structure 216 on the wafer side of the wafer translator 210 can simultaneously contact all or nearly all of the dies 145a, 145b, etc. on the wafer 140. In some cases, the diameter of the wafer translator 210 may generally correspond to the diameter of the wafer 140, or the wafer translator may have a larger diameter than the corresponding wafer under test. 2B and 2C are partial schematic top and bottom views, respectively, of a wafer translator in accordance with an embodiment of the presently disclosed technology. FIG. 2B illustrates the query side 213 of the wafer translator 210. The distance (eg, pitch) between adjacent query side contact structures 214 is represented as P ₁ in the horizontal direction and P ₂ in the vertical direction. The illustrated query side contact structure 214 has a width D ₁ and a height D ₂ . The distance, width and height of the contact structures 214 may be collectively referred to as "characteristic dimensions". In various embodiments, the query side contact structure 214 can be square, rectangular, circular, or other shape. Additionally, the query side contact structure 214 may have a uniform pitch (e.g., across the wafer translator 10, P ₁ and P ₂ are equal) or a non-uniform spacing. FIG. 2C illustrates wafer side 215 of wafer translator 210. In certain embodiments, the distance 216 between adjacent contact structures on the wafer side in the horizontal direction and may be line-based p ₁ p ₂ in the vertical direction. The width and height ("characteristic size") of the wafer side contact structure 216 are expressed as d ₁ and d ₂ . In some embodiments, the wafer side contact structure 216 can contact the pins of the corresponding die contacts on the wafer 140. Line 219 corresponds to a wafer etch that separates individual dies of wafer 140 from each other. Generally, the size/pitch of the query side contact structure 214 is greater than the size/pitch of the wafer side contact structure 216. Therefore, the alignment and contact between the test contactor and the wafer translator are improved. However, when the contact die is over a relatively large wafer 140 (eg, over a wafer having a 150 mm, 200 mm, or 300 mm diameter), it may be difficult to maintain the die contact 148 and wafer side contact structures. Consistent contact between 216. Similarly, it may be difficult to maintain consistent contact between the contacts 236 on the TTI board 230 and the corresponding interrogation side contact structures 214. For example, the tilt or undulation (ripple) of the wafer translator may overstress some of the contact pairs 214/236 and/or 216/148, while some other contact structures do not have sufficient or no contact at all. . Generally, as the wafer 140 becomes larger and larger, and the die contacts 148 become smaller and smaller, the consistency and reliability of the contacts are degraded. Therefore, there is a need for cost effective test contactors that provide consistent contact with all of the devices under test (DUT) on the wafer.

In one embodiment, an apparatus for testing a die of a semiconductor wafer includes: a tester side printed circuit board (PCB); a wafer side support board having one of the test side PCBs facing the tester a first surface and a second surface facing away from the first surface; and a plurality of individual probe cards (DUT-let) supported by the wafer side support plate, each individual DUT interface having a a DUT interface contactor carrying a plurality of contact structures for contacting at least one die of the semiconductor wafer, wherein the individual DUT interface contactors are individually compliant with respect to the semiconductor wafer, And wherein the individual DUT interface contactors are separated. In another embodiment, a method for testing a semiconductor wafer includes aligning a probe card assembly to face the semiconductor wafer, wherein the probe card assembly includes a plurality of individual probe cards ( a DUT interface), and each of the DUT interfaces has a DUT interface contactor carrying a plurality of contact structures; contacting the plurality of dies of the semiconductor wafer with the plurality of DUT interfaces; and testing the crystals of the semiconductor wafer Particles, wherein the individual DUT interface contactors are individually compliant with respect to the semiconductor wafer, and wherein the individual DUT interface contactors are separate.

This application claims the following U.S. Provisional Application: No. 62/420116, filed on November 10, 2016, No. 62/454420, filed on February 3, 2017, and application on April 12, 2017 No. 62/484750, No. 62/485104, filed on April 13, 2017, No. 62/533,469, filed on July 17, 2017, and No. 62/573,507, filed on October 17, 2017 The above application is hereby incorporated by reference in its entirety. Specific details of several embodiments of representative probe card assemblies and associated methods are set forth below. It will also be apparent to those skilled in the art that the inventive technology may have additional embodiments and that the techniques may be practiced without the details of the embodiments set forth below with reference to Figures 3-25. The inventive technology is generally related to semiconductor wafer test equipment. More particularly, the present technology relates to methods and systems for contacting ("probing") a die of a semiconductor wafer using a probe card assembly. In some embodiments, a probe card assembly includes a plurality of individual probe cards for contacting a tested die (DUT) on a semiconductor wafer. A different probe card (also known as a "DUT interface") can contact one or more of the wafers. In some embodiments, the DUT interface has grain level and pin level compliance. For example, individual DUT interfaces (ie, DUT interface contacts) can be individually pivoted to provide compliance and/or better contact with individual dies on the wafer. In general, individual pivoting of individual probe card DUT interfaces can improve X-Y and vertical alignment of corresponding dies against the wafer. In addition, a lateral movement between the contacts of the DUT interface and the contacts of the individual dies (also referred to as a "scrub") improves the contact between the contacts of the DUT interface and the contacts of the die. Electrical contact. In some embodiments, the pivot of the DUT interface contactor can be asymmetric to improve scrubbing. In some embodiments, the vertical position of the DUT interface (ie, the Z position or the distance of the DUT interface from the wafer) may also be adjustable. Typically, the pins of one other DUT interface have some vertical and some lateral pin level compliance. In some embodiments, the DUT interface can carry electrical components (eg, capacitors, resistors, active circuits, etc.) for signal/power conditioning. In addition, electrical components placed close to the DUT can perform certain functions typically performed by the tester. For example, test vectors can be stored on a memory chip hosted by a DUT interface, and such vectors can perform tests with relatively small return delays due to the long signal path between the DUT and the tester compared to the DUT and The signal path between the electrical components is short. Signals from individual DUT interfaces can be routed through their respective individual contactors (eg, flexible printed circuit boards (PCBs)) to the common PCB of the probe card assembly and further to the tester. 3 is a bottom isometric view of one of the probe card assemblies 3000 configured in accordance with an embodiment of the presently disclosed technology. The illustrated probe card assembly 3000 includes a plurality of individual probe cards (DUT interfaces) 700 that face the die on a semiconductor wafer (not shown). A wafer side support plate 600 provides mechanical support for the individual DUT interface 700. A PCB 500 provides a routing path for signals/power between the die of the wafer (DUT) and the tester. In operation, a different DUT interface 700 can contact ("probe") one or more dies of the 矽 wafer. 4 is a top isometric view of one of the probe card assemblies 3000 configured in accordance with an embodiment of the presently disclosed technology. An outer reinforcement 300 (sometimes referred to in the industry as a "spider foot") provides structural support for the components of the probe card assembly 3000. In certain embodiments, the outer reinforcement 300 can be made of stainless steel or constant steel. The components of probe card assembly 3000 can be held together at least in part by fasteners 310. FIG. 5 is a side cross-sectional view of one of the probe card assemblies 3000 in accordance with an embodiment of the presently disclosed technology. Typically, the outer reinforcement 300 is attached to a prober (eg, to the top of one of the probers) prior to the start of the test. In operation, the prober chuck contacts the semiconductor wafer 140 with the individual DUT interface 700 of the probe card assembly 3000 to establish an electrical path between the tester and the die of the semiconductor wafer 140. In some embodiments, each DUT interface 700 faces one die 145 of semiconductor wafer 140. In other embodiments, one DUT interface 700 can test two dies 145 in parallel, three dies 145 in parallel, and the like. In some embodiments, the DUT interface 700 can be interspersed on the probe card assembly 3000 such that, for example, the DUT interface 700 touches every other die 145 of the semiconductor wafer 140. Therefore, the entire semiconductor wafer 140 is tested in two steps (also referred to as "touch down") by moving the probe card assembly 3000 between each of the die touches. Grain. Similarly, a probe card assembly having a DUT interface 700 that contacts every three dies 145 of semiconductor wafer 140 tests the entire semiconductor wafer in three steps. Other combinations of DUT interfaces 700 for the die 145 of the semiconductor wafer 140 are also possible. In the illustrated embodiment, wafer side support plate 600 structurally supports DUT interface 700. In some embodiments, the wafer side support plate 600 can be made of constant steel, stainless steel, ceramic, or other materials. In certain embodiments, the invariable steel (nickel-iron) alloy may have a low coefficient of thermal expansion (CTE) or may be comparable to one of the CTEs of the tantalum wafer itself. Therefore, the mismatch between the thermal probe card assembly 3000 and the germanium wafer 140 is reduced. The PCB 500 provides routing paths for signals and power between the tested die (DUT) 145 of the semiconductor wafer 140 and the tester. The PCB 500 can be structurally supported by a support plate 400 and further by an outer reinforcement 300. In some embodiments, the support plate 400 is made of metal or ceramic. The support plate 400 can have openings for routing cables or other conductors from the DUT interface 700 to the tester. 6 is a detailed view of one of the probe card assemblies 3000 shown in FIG. The illustrated probe card assembly 3000 includes a DUT interface 700, a wafer side support plate 600, a tester side PCB 500, a support plate 400, and an outer reinforcement 300. DUT interface 700 faces test die 145 of semiconductor wafer 140. In operation, the contact structure 712 contacts the contact pads (or other contact structures) of the test die 145. In some embodiments, all of the dies 145 of the semiconductor wafer 140 can be simultaneously contacted by their corresponding DUT interface 700. In other embodiments, a subset of the die 145 of the semiconductor wafer 140 is simultaneously contacted by its corresponding DUT interface 700. In various embodiments, the contact structure 712 can be attached to a pin, microelectromechanical system (MEMS), or other electrical contact structure. Details of the DUT interface 700 are shown in FIG. Figure 7 is a detailed view of one of the DUT interfaces 700 shown in Figure 6. In some embodiments, the DUT interface 700 includes a wiring substrate 710 that carries a contact structure 712. The wiring substrate 710 may be one substrate having an electrical trace, for example, a PCB (for example, also referred to as a "flexible member" which is relatively thin flexible PCB), a ceramic substrate, a glass substrate, and a A germanium substrate or other planarizable and polishable material with electrical traces. In some embodiments, the wiring substrate 710 carries a contact structure 712 for contacting the DUT. The wiring substrate 710 can carry electrical components 714 (eg, capacitors, resistors, memory, active circuitry, etc.) for signal/power conditioning. In some applications, the testability of the DUT is improved when the electrical component 714 is placed relatively close to the test die (DUT). In some embodiments, a DUT interface stiffener 730 structurally supports the wiring substrate 710. An adhesive assembly 720 can attach the DUT interface reinforcement 730 to the wiring substrate 710. The portions of the DUT interface reinforcement 730, the bonding assembly 720, the contact structure 712, and the wiring substrate 710 carrying the contact structure 712 are collectively referred to as a DUT interface contact 709. In some embodiments, a ring frame 740 and a dome 750 support the DUT interface against the wafer side support plate 600. A binder (not shown) can be coupled to the ring frame 740 and the DUT interface reinforcement 730. In some embodiments, a controllable microfluidic element can be used in place or in combination with the ring frame 740 and the dome 750. In some embodiments, the wiring substrate 710 provides an electrical path between the tested die and an interposer 770, and the interposer 770 is between the wiring substrate 710 and the tester side PCB 500. The wiring substrate 710 may pass through one of the openings 610 in the wafer side support plate 600. In some embodiments, the interposer 770 includes interposer pins 772 that contact the corresponding contact pads 716 of the substrate 710. The opposite side of the interposer 770 can include similar pins for routing power/signals from the interposer pad 774 to the electrical traces 510 of the tester side PCB 500, and further enabling power/signal to be tested Between the devices. An upper reinforcing member 760 can structurally support the wiring substrate 710 against the wafer side support plate 600. 8 is a partial isometric view of one of the individual DUT interfaces in accordance with an embodiment of the presently disclosed technology. The illustrated individual DUT interfaces 700-1, 700-2 each carry an array of contact structures 712, but other arrangements of contact structures 712 are possible, depending on the contacts on the test die (DUT). layout. In operation, DUT interfaces 700-1, 700-2 contact one or more tested dies 145 to electrically route between the tester and the tested die (DUT). The DUT interfaces 700-1, 700-2 are structurally separated, and thus their respective DUT interface contactors 709 have independent grain level compliance. For example, DUT interfaces 700-1 and 700-2 may be at different heights (ie, different distances from the wafer) and/or non-parallel prior to contacting their corresponding test dies. For example, DUT interface 700-1 can contact corresponding die 145 before DUT interface 700-2 contacts its corresponding die 145. However, since the DUT interfaces 700-1, 700-2 are structurally separated, even when the DUT interfaces are out of plane with each other within the probe card assembly 3000, both DUT interfaces 700-1, 700-2 (and total The other DUT interfaces are still accessible to their respective tested dies. Thus, the tolerance of the DUT interface contact height flatness within the probe card assembly 3000 can be relaxed, and the contact between the DUT interface 700 and the tested die 145 can be improved. Contact structure 712 of an alternate DUT interface also has some vertical and some lateral pin level compliance that further improves contact between DUT interface 700 and tested die 145. The DUT interfaces 700-1, 700-2 are supported by the wafer side support plate 600. 9 is a partial isometric view of one of the individual DUT interfaces in accordance with an embodiment of the presently disclosed technology. The wafer side support plate 600 is not shown for better viewing of other components. In some embodiments, a holder clip 776 holds the interposer 770 in place and abuts the contact pads 716 of the substrate 710 to align the interposer. In some embodiments, the tester side PCB 500 is in electrical contact with the interposer 770. FIG. 10 is an isometric view of an interposer 770 in accordance with an embodiment of the presently disclosed technology. In some embodiments, the interposer 770 has one of the electrical contacts of the spring-shaped or spring-loaded interposer 774. The substrate of the interposer 770 can be a PCB, ceramic or other material. When the probe card assembly 3000 is assembled, the interposer pin 774 is in electrical contact with the corresponding contact pad 716 of the tester side PCB 500. 11 through 15 are partial schematic cross-sectional views of individual probe cards in accordance with embodiments of the presently disclosed technology. For simplicity and clarity, Figures 11 through 15 show a DUT interface 700 contacting a test die (DUT) 145, however, in operation, the probe card assembly 3000 includes a plurality of DUT interfaces contacting its corresponding tested die. Or a group of tested dies 145. FIG. 11 shows DUT interface 700 in contact with tested die 145. In operation, the ring frame 740 and the dome 750 can improve the alignment of the DUT interface 700 against the tested die 145. For example, the combination of the ring 740 and the dome 750 can provide one of the pivotal movements of the contact structure 712, thus compensating for some of the flatness differences between the DUT interface contacts 712 and the corresponding tested die 145. In some embodiments, one of the shear modulus of the ring frame 740 can limit lateral movement of the DUT interface 700 such that the contact structure 712 does not travel beyond the corresponding contact structure of the die 145. Moreover, the flexibility and deformability of the dome 750 can compensate for some inaccuracies in the vertical distance between the individual DUT interface 700 and the wafer 140. In some embodiments, the ring frame 740 and the dome 750 are joined by, for example, welding, brazing, soldering, or by an adhesive element 745. FIG. 12 shows DUT interface 700 in contact with tested die 145. In some embodiments, the dome 750 can be a snap dome with an opening in the dome 750 for the snap ring bracket 740. In some embodiments, the dome/ring combination can be a ball and socket assembly of one of the ball pens, which is typically applied at a relatively low cost (eg, a few tenths of a dollar) and applied to the ball and socket subassembly. Relatively low force with relatively high accuracy of the ball and socket (eg, micron accuracy). In operation, the ring frame 740 can be laterally curved (e.g., in response to a centrifugal load), thereby improving lateral rubbing against the contact structure of the test die 145. In some embodiments, the DUT interface 700 includes a DUT interface substrate 725 having vias 726 for electrically connecting the contact structures 712 to the wiring substrate 710. The wiring substrate 725 can be a PCB or a ceramic substrate. FIG. 13 shows DUT interface 700 in contact with tested die 145. In some embodiments, the DUT interface 700 includes a plurality of ring frames 740-1, 740-2. In certain embodiments, the ring frames 740-1, 740-2 have different profiles, different material properties, and/or asymmetric distribution. Thus, the DUT interface contact 709 can have a preferred pivoting orientation, thus, at least in some cases, improving the alignment between the contact structure 712 and the corresponding contact structure of the DUT on the wafer. In certain embodiments, the asymmetric ring frames 740-1, 740-2 improve lateral wiping of the contact structure 712. FIG. 14 shows DUT interface 700 in contact with tested die 145. The illustrated DUT interface 700 includes a ring frame 740 that connects the DUT interface substrate 725 to the wafer side support plate 600. In some embodiments, the ring frame 740 can be shaped to facilitate bending thereof by, for example, making the intermediate portion of the ring frame 740 narrower than its upper and lower ends. Thus, when the contact structure 712 contacts the test die 145, the pivoting of the contact structure 712 can be improved. FIG. 15 shows DUT interface 700 in contact with tested die 145. The illustrated DUT interface includes a wire bond 711 for electrically connecting the DUT interface substrate 725 to the wiring substrate 710. In some embodiments, the wire bond can be attached to the through hole 726 of the DUT interface substrate 725 (or the pad is attached to the via 726). 16 and 17 are bottom and top isometric views, respectively, of a DUT interface 700 configured in accordance with an embodiment of the presently disclosed technology. The DUT interface 700 is supported by the wafer side support plate 600. In operation, a plurality of DUT interfaces 700 can be included in the probe card assembly 3000. 18 is a partially exploded view of a DUT interface 700 configured in accordance with an embodiment of the presently disclosed technology. In operation, the contact structure 712 of the DUT interface 700 protrudes through an opening 615 to make electrical contact with the tested die 145 of the germanium wafer 140, thus providing an electrical path between the tested die 145 and the tester. A cleat 780 can structurally support the wiring substrate 710 against the wafer side support plate 600. In some embodiments, the fastener 762 engages the splint 780 with the wafer side support plate 600 and the DUT interface 700. 19 and 20 are top and bottom isometric views, respectively, of a DUT interface 700 configured in accordance with an embodiment of the presently disclosed technology. In order to make these views clearer, the wafer side support plate 600 and the splint 780 are not shown. 21 is an exploded isometric view of one of the DUT interfaces 700 in accordance with an embodiment of the presently disclosed technology. In operation, the wiring substrate 710 is electrically connected to the tester side PCB 500 and further to the tester. Starting from the bottom of the view, the contact structure 712 faces the individual DUTs of the germanium wafer (not shown). The contact structure 712 is supported by the wiring substrate 710. In some embodiments, the wiring substrate 710 can be a flexible PCB. In the probe card assembly 3000, the wiring substrate 710 is electrically connected to the tester side PCB 500 and further to the tester 150. In the illustrated embodiment, the DUT interface stiffener 730 structurally supports the back side of the wiring substrate 710. The bonding assembly 720 can attach the DUT interface reinforcement 730 to the wiring substrate 710. Adhesive assembly 720 can be an elastomer that provides a small amount of total compliance or less unevenness. In some embodiments, the DUT interface 700 includes a plurality of pivoting structures, for example, having a first pivoting structure of a dome 750 and a dome weld 752 and having an upper dome 754 and an upper dome A second pivoting structure of one of the outer casings 756. With the first pivoting structure 750/752, the DUT interface contactor 709 can pivot at the surface of the dome 750. With the second pivoting structure 754/756, the upper dome 754 can pivot in a recess 757 in one of the upper dome housings 756. The upper dome 754 can be attached to a flex mount 748, thus also allowing the flex mount 748 to pivot. In some embodiments, the presence of the two pivot structures 750/752 and 754/756 facilitates better alignment and/or contact of the DUT interface 700 with the contacts of the tested die. In some embodiments, a corner of the dome 750 can be welded to the dome weld 752. In operation, when the stiffener 730 compresses the pivoting structure 750/752, the dome 750 can be moved to the side (away from the splice point at the dome weld 752) to provide a contact structure over the corresponding structure of the tested die. 712 horizontal rubbing. 22 is a bottom plan view of one of the DUT interfaces 700 in accordance with an embodiment of the presently disclosed technology. Cross-sectional views 23 through 25 are discussed below with reference to FIGS. 23 through 25. 23 is a cross-sectional view of FIGS. 23-23 of the DUT interface 700 shown in FIG. In some embodiments, the contact structure 712 is modified and tested by a first pivoting structure comprising a dome 750 and a dome weld 752 and a second pivoting structure comprising an upper dome 754 and an upper dome housing 756. Contact between the corresponding contact structures of the grains. Figure 24 is a cross-sectional view of Figures 24-24 of the DUT interface 700 shown in Figure 22. In some embodiments, the DUT interface 700 includes a set screw 744 having a pin 743 that is adjustable in height. In operation, the set screw 744 can be adjusted such that the pin 743 extends toward the DUT interface reinforcement 730 and contacts the DUT interface reinforcement 730. In some embodiments, by extending the pin 743 and contacting the DUT interface stiffener 730, the plane of the DUT interface stiffener 730 can be adjusted and thus the plane of the contact structure 712 can be adjusted. Thus, the contact structure 712 can be better aligned against the corresponding contact structure of the tested die. Figure 25 is a cross-sectional view of Figures 25-25 of the DUT interface 700 shown in Figure 22. In some embodiments, the DUT interface 700 includes a leveling screw 742 that adjusts the plane of the flexure mount 748. For example, the DUT interface 700 can include three leveling screws 742 that define a leveling plane of the flexing mount 748 that in turn defines a leveling plane of the contact structure 712. In some embodiments, the DUT interface 700 includes an adjustment screw 746 that adjusts an angle of the plane of the flex mount 748. In some embodiments, the adjustment screw 746 can also adjust the distance of the flexure mount 748 from the upper reinforcement 760, thereby adjusting the vertical distance of the contact structure 712 from one of the corresponding contact structures of the test die. Thus, the contact structure 712 can achieve a better alignment and/or a more precise distance relative to the corresponding contact structure of the die being tested. Many embodiments of the techniques set forth above may be in the form of computer or controller executable instructions, including routines executed by a programmable computer or controller. Those skilled in the art will appreciate that the techniques can be practiced on a computer/controller system in addition to the devices shown and described below. The technology may be embodied in a special application computer, controller or data processor that is specially programmed, configured or constructed to perform one or more of the computer-executable instructions set forth below. Therefore, the terms "computer" and "controller" as used herein generally refer to any data processor and may include internet appliances and handheld devices (including palmtop computers, wearable computers, cellular or mobile phones, Multiprocessor systems, processor-based or programmable consumer electronics, network computers, minicomputers, etc.). The information that can be disposed of by such a computer is presented by any suitable display medium (including a CRT display or LCD). In view of the foregoing, it will be appreciated that the specific embodiments of the invention are described herein, and the various modifications may be made without departing from the invention. In addition, while the various advantages and features associated with a particular embodiment are set forth in the context of the embodiments, other embodiments may exhibit such advantages and/or features, and not all embodiments These advantages and/or features must be exhibited within the scope of the technology. Accordingly, the present invention may encompass other embodiments not explicitly shown or described herein.

23-23‧‧‧ Sectional view

24-24‧‧‧ Sectional view

25-25‧‧‧ Sectional view

110‧‧‧ probe card

112‧‧‧ space transformer

114‧‧‧Printed circuit board

116‧‧‧ probe pin

120‧‧‧Contact structure (printed circuit board to space transformer)

122a‧‧‧Strength

122b‧‧‧Strength

124‧‧‧ screws

125‧‧‧Action side

126‧‧‧Retainer/Retainer for space transformer

128‧‧‧ screws

130‧‧‧ cable

140‧‧‧Wafer/Semiconductor Wafer/矽 Wafer

145‧‧‧Grade/tested die/tested device

145a‧‧‧ grain

145b‧‧‧ grain

146‧‧‧ Wafer etch

148‧‧‧die contacts/contacts

150‧‧‧Tester/Wab Tester

210‧‧‧Wafer Translator/Translator

212‧‧‧ wafer translator substrate

213‧‧ Query side

214‧‧‧Contact structure/inquiry side contact structure/contact pair

215‧‧‧ Wafer side

216‧‧‧Contact structure/wafer side contact structure/contact pair

218‧‧‧ conductive traces

219‧‧‧ line

230‧‧‧Tester Translator Interface Board

232‧‧‧Test contactor substrate/tester translator interface substrate

236‧‧‧Contact/contact pairs

238‧‧‧ conductive traces

239‧‧‧ Cable

240‧‧‧wafer chuck

250‧‧‧Test stack

300‧‧‧External reinforcement

310‧‧‧fasteners

400‧‧‧support plate

500‧‧‧Printed circuit board/tester side printed circuit board

510‧‧‧Electric trace

600‧‧‧ Wafer side support plate

610‧‧‧ openings

615‧‧‧ openings

700‧‧‧Individual probe card/tested die interface

700-1‧‧‧Tested die interface

700-2‧‧‧Tested die interface

709‧‧‧Tested die interface contactors

710‧‧‧Wiring substrate/substrate (for example, flex printed circuit board)

711‧‧‧ line combination

712‧‧‧Contact structure/tested die interface contacts (pins, MEMS, etc.)

714‧‧‧Electric components

716‧‧‧Contact pads

720‧‧‧bonding components

725‧‧‧Tested die interface substrate

726‧‧‧through hole

730‧‧‧Tested die interface reinforcement/reinforced material

740‧‧‧ ring rack

740-1‧‧‧Ring frame/Asymmetric ring frame

740-2‧‧‧Ring/Asymmetric Ring Frame

742‧‧‧ Leveling screws (for example, 3 screws)

743‧‧‧ pin

744‧‧‧Setting screws

745‧‧‧Adhesive components

746‧‧‧Adjustment screws

748‧‧‧Flexing frame

750‧‧‧Dome/first pivoting structure/pivoting structure

752‧‧‧Dome Fusion / First Pivot Structure / Pivot Structure

754‧‧‧Upper dome/second pivoting structure/pivoting structure

756‧‧‧Upper dome housing/second pivoting structure/pivoting structure

757‧‧‧Depression

760‧‧‧Upper reinforcement

762‧‧‧fasteners

770‧‧‧Intermediary

772‧‧‧Intermediate layer pin

774‧‧‧Interposer pad/spring or spring-loaded interposer pin/interposer pin

776‧‧‧Retainer clip

780‧‧‧ splint

3000‧‧‧Probe card assembly/thermal probe card assembly

A‧‧‧ arrow

B‧‧‧ arrow

C‧‧‧ arrow

D ₁ ‧‧‧Width

d ₁ ‧‧‧Width

D ₂ ‧‧‧ Height

d ₂ ‧‧‧height

P ₁ ‧‧‧Distance

P ₂ ‧‧‧ distance

The aspects of the invention can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale. Rather, the focus is on a clear understanding of the principles of the invention. 1A is a side cross-sectional view of one of the portions of a test stack for testing a semiconductor wafer in accordance with the prior art. 1B is a bottom plan view of one portion of a test stack for testing a semiconductor wafer in accordance with the prior art. 2A is an exploded view of one portion of a test stack for testing a semiconductor wafer in accordance with the prior art. 2B is a partially schematic top plan view of a wafer translator in accordance with one of the prior art. 2C is a partially schematic bottom view of a wafer translator in accordance with one of the prior art. 3 is a bottom isometric view of one of the probe card assemblies configured in accordance with an embodiment of the presently disclosed technology. 4 is a top isometric view of one of the probe card assemblies configured in accordance with an embodiment of the presently disclosed technology. Figure 5 is a side cross-sectional view of one of the probe card assemblies shown in Figure 4. Figure 6 is a detailed view of one of the probe card assemblies shown in Figure 5. Figure 7 is a detailed view of one of the individual probe cards (DUT interfaces) shown in Figure 6. 8 and 9 are partial isometric views of individual probe cards in accordance with embodiments of the presently disclosed technology. Figure 10 is an isometric view of one of the interposers in accordance with an embodiment of the presently disclosed technology. 11 through 15 are partial schematic cross-sectional views of individual probe cards in accordance with embodiments of the presently disclosed technology. 16 is an upward isometric view of one of the individual probe cards configured in accordance with an embodiment of the presently disclosed technology. 17 is a top isometric view of one of the individual probe cards configured in accordance with an embodiment of the presently disclosed technology. Figure 18 is a partially exploded view of one of the individual probe cards configured in accordance with an embodiment of the presently disclosed technology. 19 is a top isometric view of one of the individual probe cards configured in accordance with an embodiment of the presently disclosed technology. 20 is a bottom isometric view of one of the individual probe cards configured in accordance with an embodiment of the presently disclosed technology. 21 is an exploded isometric view of one of the individual probe cards in accordance with one embodiment of the presently disclosed technology. 22 is a bottom plan view of one of the individual probe cards in accordance with an embodiment of the presently disclosed technology. 23 through 25 are cross-sectional views of the individual probe cards shown in Fig. 22.

Claims (20)

An apparatus for testing a die of a semiconductor wafer, comprising: a tester side printed circuit board (PCB); a wafer side support board having a first surface and a back facing the tester side PCB a second surface of the first side; and a plurality of individual probe cards (DUT interfaces) supported by the wafer side support plate, each individual DUT interface having a DUT interface contact, the DUT interface contacts The device carries a plurality of contact structures for contacting at least one of the semiconductor wafers, wherein the individual DUT interface contactors are individually compliant with respect to the semiconductor wafer, and wherein the individual DUT interface contactors Separated. The device of claim 1, wherein the one DUT interface contactor comprises: the plurality of contact structures for contacting the semiconductor wafer; a wiring substrate carrying the contact structures; an adhesive component having the same The wiring substrate contacts one of the second side and the first side facing the second side; and a DUT interface reinforcement is in contact with the first surface of the bonding assembly. The device of claim 1, further comprising a pivoting structure having: a first side attached to the DUT interface contact; and a second side opposite the first side Wherein the second side is attached to the wafer side support plate, wherein one of the planes of the DUT interface contactors is adjustable by the first pivoting structure. The device of claim 3, wherein the first side of the pivoting structure is attached to the DUT interface reinforcement using the first side. The apparatus of claim 3, wherein the pivoting structure is a first pivoting structure, the apparatus further comprising a second pivoting structure, wherein the plane of the DUT interface contactors is achievable by the first pivoting structure The second pivoting structure is adjusted. The device of claim 3, wherein the pivoting structure comprises a ring frame and a dome, and wherein the ring frame is coupled to the dome by a ring binder. The device of claim 3, wherein the pivoting structure comprises a ring frame and a dome, and wherein the ring frame snaps into an opening in the dome. The device of claim 3, wherein the pivoting structure comprises a first ring frame and a second ring frame, and wherein the first ring frame and the second ring frame have different cross sections. The device of claim 1, wherein each of the individual DUT interfaces includes at least two leveling screws for adjusting a plane of the contact structures of the DUT interface contacts. The device of claim 1, wherein each of the individual DUT interfaces includes a plurality of adjustment screws having a pin, wherein the pins are in contact with the DUT interface contact in a first position, and wherein in a second position The pins are not in contact with the DUT interface contactor. The device of claim 3, wherein the DUT interface contactor comprises a plurality of vias. The device of claim 1, further comprising an interposer electrically connected to one of the at least one DUT interface wiring substrate and the tester side PCB. The apparatus of claim 12, further comprising: a support plate for structurally supporting the tester side PCB; and an outer reinforcement for structurally supporting the support plate. The device of claim 12, wherein the wafer side support plate includes a plurality of openings for routing the plurality of wiring substrates of the plurality of DUT interfaces toward the tester side PCB. A method for testing a semiconductor wafer, comprising: aligning a probe card assembly to face the semiconductor wafer, wherein the probe card assembly includes a plurality of individual probe cards (DUT interfaces), and Each of the DUT interfaces has a DUT interface contactor carrying a plurality of contact structures; contacting a plurality of dies of the semiconductor wafer with the plurality of DUT interfaces; and testing the dies of the semiconductor wafer, wherein The individual DUT interface contactors are individually compliant with respect to the semiconductor wafer, and wherein the individual DUT interface contactors are separate. The method of claim 15, wherein each DUT interface contacts a die of the semiconductor wafer. The method of claim 15, wherein each DUT interface contacts a plurality of dies of the semiconductor wafer. The method of claim 15, wherein the individual DUT interface is compliant with respect to the semiconductor wafer based at least in part on pivotal movement about one of the pivoting mechanisms of the individual DUT interface. The method of claim 18, wherein the pivoting mechanism is a first pivoting mechanism, and wherein the individual DUT interface comprises a second pivoting mechanism. The method of claim 15, further comprising: adjusting a plane of the DUT interface contact by contacting the DUT interface contact with a pin of the independently adjustable set screw.