TW201806450A - Plasma processing device and particle adhesion suppressing method - Google Patents

Abstract

This invention aims to suppress particle adhesion onto substrates. Provided is a plasma processing device comprising: a processing chamber received therein substrates for performing plasma processing; a mounting table for mounting substrates thereon; a counter electrode opposing the mounting table; a first high frequency power supply applying a first high frequency power for generating plasma on the mounting table or the counter electrode; a second high frequency power supply applying on the mounting table a second high frequency power with a frequency lower than that of the a first high frequency power supply on the mounting table for generating a bias voltage; a DC power supply applying a DC voltage on counter electrode; and a controller for controlling the first high frequency power supply, the second high frequency power supply and the DC power supply. During or after the plasma processing, and before stopping the application of the first high frequency power and the second high frequency power, the controller makes the DC voltage ramp down.

Description

Plasma processing device and particle adhesion suppression method

The invention relates to a plasma processing device and a method for suppressing particle adhesion.

In a processing chamber where plasma processing is performed on a semiconductor wafer (hereinafter referred to as "wafer"), a reaction product is generated in the plasma processing, or a substance constituting the inner wall of the processing container is removed by the plasma. When these substances are formed into particles and attached to the wafer, defects are formed in the semiconductor elements formed on the wafer, and the yield is reduced. Therefore, a method for suppressing particles from adhering to a wafer has been proposed (for example, refer to Patent Document 1). In Patent Document 1, after the dry etching process is completed, the application of DC power to the upper electrode is stopped immediately, and after a predetermined time elapses, the application of high-frequency power for plasma generation and high-frequency power for bias voltage generation is stopped. [Prior Art Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2013-102237

[Problems to be Solved by the Invention] However, in Patent Document 1, when the application of DC power is stopped, a sharp change in the sheath potential may occur and particles may adhere to the wafer.

In view of the above problems, in one aspect, the present invention aims to suppress particles from adhering to a substrate. [Means to solve the problem]

In order to solve the above problem, according to one aspect, a plasma processing apparatus is provided. The plasma processing apparatus includes a processing chamber, a mounting table, a counter electrode, a first high-frequency power source, a second high-frequency power source, a DC power source, and a control. The processing chamber is used to house the substrate and can be plasma-treated inside; the mounting table is used to mount the substrate; the counter electrode is opposed to the mounting table; and the first high-frequency power supply is used to mount the substrate. The first high-frequency power for plasma generation is applied to the stage or the counter electrode; the second high-frequency power is used to apply a second high-frequency to the stage that is lower than the bias voltage of the first high-frequency power Electricity; the DC power supply is used to apply a DC voltage to the counter electrode; the control unit is used to control the first high-frequency power supply, the second high-frequency power supply, and the DC power supply; After the slurry treatment and before stopping the application of the first high-frequency power and the second high-frequency power, the DC voltage is gradually decreased. [Effect of the invention]

According to an aspect, it is possible to suppress particles from adhering to the substrate.

[Mode for Carrying Out the Invention] The mode for carrying out the invention will be described below with reference to the drawings. In addition, in this specification and drawings, the same reference numerals are attached to substantially the same structures, and redundant descriptions are omitted.

[Plasma processing apparatus] First, an example of the plasma processing apparatus 1 will be described with reference to FIG. 1. The plasma processing apparatus 1 of this embodiment is a capacitively-coupled parallel plate plasma processing apparatus and includes a substantially cylindrical processing container 10. The inner surface of the processing container 10 is subjected to aluminum anodizing treatment (anodic oxidation treatment). In the processing container 10 (processing chamber), plasma processing such as etching treatment and film formation processing may be performed by plasma.

An example of the substrate on which the mounting table 20 is mounted is the wafer W. The mounting table 20 is formed of, for example, aluminum (Al), titanium (Ti), silicon carbide (SiC), or the like. The mounting table 20 functions as a lower electrode.

An electrostatic chuck 106 for electrostatically adsorbing the wafer W is formed on the upper side of the mounting table 20. The electrostatic chuck 106 has a structure in which a chuck electrode 106a is sandwiched between insulators 106b. A DC voltage source 112 is connected to the chuck electrode 106a. When a DC voltage is applied to the chuck electrode 106 a from the DC voltage source 112, the wafer W is attracted to the electrostatic chuck 106 with a Coulomb force.

An annular focusing ring 108 is placed on the outer periphery of the electrostatic chuck 106 so as to surround the outer edge of the wafer W. The focus ring 108 is formed of, for example, silicon, and gathers the plasma toward the surface of the wafer W in the processing container 10 to improve the efficiency of the plasma processing.

The supporting table 104 is formed on the lower side of the mounting table 20, whereby the mounting table 20 can be held on the bottom of the processing container 10. A refrigerant flow path 104 a is formed inside the support body 104. A cooling medium such as cooling water or brine (hereinafter also referred to as "refrigerant") output from the cooler 107 flows and circulates through the refrigerant inlet pipe 104b, the refrigerant flow path 104a, and the refrigerant outlet pipe 104c. The refrigerant circulating in this way cools the mounting table 20 by exhausting heat.

The heat transfer gas supply source 85 supplies a heat transfer gas such as helium (He) or argon (Ar) to the back surface of the wafer W on the electrostatic chuck 106 through the gas supply line 130. With this structure, the electrostatic chuck 106 controls the temperature with the refrigerant circulating in the refrigerant flow path 104a and the heat transfer gas supplied to the back surface of the wafer W. As a result, the wafer can be controlled at a predetermined temperature.

A power supply device 30 for supplying dual-frequency overlapping power is connected to the mounting table 20. The power supply device 30 includes a first high-frequency power source 32 for supplying high-frequency power HF (first high-frequency power) for plasma generation of a first frequency. In addition, the power supply device 30 includes a second high-frequency power supply 34 for supplying high-frequency power LF (second high-frequency power) for generating a bias voltage at a second frequency lower than a first frequency. The first high-frequency power source 32 is electrically connected to the mounting table 20 via a first matching device 33. The second high-frequency power source 34 is electrically connected to the mounting table 20 via a second matching device 35. The first high-frequency power source 32 can apply a high-frequency power HF of, for example, 60 MHz to the mounting table 20. The second high-frequency power source 34 can apply a high-frequency power LF of, for example, 13.56 MHz to the mounting table 20. In the present embodiment, the first high-frequency power is applied to the mounting table 20 and may be applied to the gas shower head 25.

The first matcher 33 matches the load impedance with the internal (or output) impedance of the first high-frequency power source 32. The second matcher 35 matches the load impedance with the internal (or output) impedance of the second high-frequency power source 34. The first matching unit 33 functions to make the internal impedance of the first high-frequency power source 32 and the load impedance significantly consistent when plasma is generated in the processing container 10. The second matching device 35 functions to make the internal impedance of the second high-frequency power supply 34 and the load impedance significantly match when a plasma is generated in the processing container 10.

The gas spray head 25 is installed so as to close an opening on the top of the processing container 10 by a shielding ring 40 covering a peripheral portion thereof. A variable DC power supply 70 is connected to the gas spray head 25, and a negative DC (DC voltage) can be output from the variable DC power supply 70. The gas spray head 25 may also be formed of silicon. The gas spray head 25 also has a function of an opposing electrode (upper electrode) that faces the mounting table 20 (lower electrode).

A gas introduction port 45 for introducing a gas is formed in the gas spray head 25. A center-side diffusion chamber 50a and an edge-side diffusion chamber 50b branched from the gas introduction port 45 are provided inside the gas spray head 25. The gas output from the gas supply source 15 is supplied to the diffusion chambers 50 a and 50 b through the gas introduction port 45. After the diffusion chambers 50 a and 50 b have diffused, the gas is introduced into the mounting table 20 from a plurality of gas supply holes 55.

An exhaust port 60 is formed on the bottom surface of the processing container 10, and an exhaust device 65 that can be connected to the exhaust port 60 exhausts the inside of the processing container 10. Thereby, the inside of the processing container 10 can be maintained at a predetermined vacuum degree. A gate valve G is provided on a side wall of the processing container 10. The gate valve G can be opened and closed when the wafer W is carried in and out from the processing container 10.

A control unit 100 is provided in the plasma processing apparatus 1 to control the entire operation of the apparatus. The control unit 100 includes a central processing unit (CPU) 105, a read only memory (ROM) 110, and a random access memory (RAM) 115. The CPU 105 executes desired processing such as etching according to the recipe stored in a memory area such as the RAM 115. The recipe records the device's control information on the program conditions, that is, program time, pressure (gas exhaust), high-frequency power, voltage, various gas flows, the temperature in the processing container (the upper electrode temperature, the sidewall temperature of the processing container, and the wafer W temperature, electrostatic chuck temperature, etc.), and the temperature of the refrigerant output from the cooler 107. In addition, these programs and recipes showing processing conditions can also be stored in hard disk or semiconductor memory. In addition, the recipe can also be stored in a computer-readable portable storage medium such as CD-ROM, DVD, etc. The state is set to a predetermined position to be read.

When plasma processing is performed, the gate valve G is controlled to switch the wafer W into the processing container 10 and placed on the mounting table 20. When a DC voltage is applied to the chuck electrode 106 a from the DC voltage source 112, the wafer W can be adsorbed and held on the electrostatic chuck 106.

The processing gas is supplied from the gas supply source 15 into the processing container 1. In addition, the first and second high-frequency power are applied to the mounting table 20 from the first and second high-frequency power sources 32 and 34, and a negative DC (direct-current voltage) is applied to the gas shower head 25 from the variable direct-current power supply 70. As a result, a plasma is generated above the wafer W, and a plasma treatment is performed on the wafer W. After the plasma treatment, the DC voltage source 112 applies a DC voltage opposite to the positive and negative values of the wafer W from the suction pad electrode 106 a to neutralize the charge of the wafer W, and the wafer W is peeled from the electrostatic chuck 106. The gate valve G is controlled to open and close the wafer W to the outside of the processing container 10.

[Particle Adhesion Inhibition Method 1 (Mode 1-1)] Next, the particle adhesion suppression method 1 in this embodiment will be described with reference to FIG. 2. Referring to the schematic view of the upper portion 2 as shown in Figure 1-1 changes with time, the present embodiment in the form of particles adhering to a method for inhibiting, at the end of the plasma processing of the wafer W, at time t _1, can be stopped from Application of DC (hereinafter referred to as "Top DC") output from the variable DC power supply 70. Thereafter, at time t ₂ , the first high-frequency power (hereinafter referred to as “HF RF”) output from the first high-frequency power source 32 and the second high-frequency power (hereinafter referred to as “HF RF”) output from the second high-frequency power source 34. "LF RF".) The application is stopped at the same time.

The results of stopping the application of each power in the order of Top DC → HF RF and LF RF in Mode 1-1 are shown in the granular results of Mode 1-1 in the lower table of FIG. 2. Mode 1-1 in the center of the table is the case where the delay time (= t ₂ -t ₁ ) of HF and LF is 0.5s, that is, after the application of Top DC is stopped, the application of HF RF and LF RF is stopped after 0.5s. Situation.

The pattern 1-1 on the right of the table is the case where the delay time (= t ₂ -t ₁ ) of HF and LF is 1.0s, that is, after the application of Top DC is stopped, the application of HF RF and LF RF is stopped after 1.0s. Situation.

The non-delay mode on the left side of the table is the case where the delay time (= t ₂ -t ₁ ) of HF and LF is 0.0s, that is, the case where all the application of Top DC, HF RF and LF RF are stopped at the same time.

As a result of the experiment, it can be confirmed that the number of particles on the wafer W is reduced to about 1/4 in the case of the mode 1-1 in the center and the right compared to the case of the non-delay mode. In addition, in this experiment of the particle adhesion suppression method 1 and the experiments of the particle adhesion suppression methods 2 and 3 described later, each of the procedures of the mode 1-1 and the non-delay mode was performed three times, and the number of such particles was compared. average of. In addition, as a result of the experiment, it was confirmed that in any of the cases of the pattern 1-1, the number of particles on the wafer W was reduced to the same extent. Therefore, it can be seen that the procedure of the particle adhesion suppression method 1 which stops the application of each power in the order of Top DC → HF RF and LF RF has the effect of reducing the adhesion of particles to the wafer W. In addition, it can be seen that the delay time of HF RF and LF RF is either 0.5s or 1.0s, and the particle reduction effect remains unchanged.

[Particle Adhesion Inhibition Method 2 (Modes 1-2, Mode 2)] Next, the particle adhesion suppression method 2 in this embodiment will be described with reference to FIG. 3. The upper part of FIG. 3 shows the time-varying graphs of Mode 1-2 and Mode 2.

In mode 1-2 of the particle adhesion suppression method 2 of this embodiment, after the plasma processing on the wafer W is finished, the application of the Top DC output from the variable DC power supply 70 is stopped, and thereafter, the first high frequency is stopped. Application of HF RF output from the power supply 32. Then, the application of the LF RF output from the second high-frequency power supply 34 is stopped. That is, in mode 1-2, the application of each power is stopped in the order of Top DC → HF RF → LF RF.

In mode 2 of the particle adhesion suppression method 2 of this embodiment, Top DC is not applied during the plasma processing of the wafer W. Therefore, in the mode 2, after the plasma processing of the wafer W is finished, the application of each power is stopped in the order of HF RF → LF RF or LF RF → HF RF.

The lower table in FIG. 3 shows the experimental results of stopping the application of each power by the methods of modes 1-2 and 2 after the end of the plasma treatment. The leftmost non-delay mode of the table is the case where the delay time of HF and LF is 0.0s, that is, the situation where all the application of Top DC, HF RF, and LF RF is stopped at the same time, and the non-delay mode of the lower table in Figure 2 is Same result.

In the modes 1-2 and 2 displayed on the right side of the no-delay mode, as shown in the brackets of each mode column, a delay occurs between the stop of the application of HF RF and the stop of application of LF RF. In the patterns 1-2, 2 (LF → HF) on the left in the thick frame, after the application of Top DC is stopped, after 0.5s, the application of LF RF is stopped, after the application of Top DC is stopped, after 1.0s, Stop application of HF RF. In the patterns 1-2, 2 (HF → LF) on the right side in the thick frame, after the application of Top DC is stopped, after 0.5s, the application of HF RF is stopped, after the application of Top DC is stopped, after 1.0s, Stop application of LF RF.

As a result of the experiment, it can be confirmed that any of the modes 1-2, 2 (LF → HF) and modes 1-2, 2 (HF → LF) in the thick frame, compared with the non-delay mode, the number of particles on the wafer W Both are reduced to about 1/10.

In addition, as a result of the experiment, it was confirmed that the mode 1-2, 2 (HF → LF) can reduce the number of particles on the wafer W more than the mode 1-2, 2 (LF → HF). Therefore, it can be seen that the procedure of stopping the application of each power in the order of Top DC → HF RF → LF RF is more effective than the procedure of stopping the application of each power in the order of Top DC → LF RF → HF RF. The effect of attachment.

The two patterns 1-2, 2 (HF → LF) to the right of the thick box in the lower table of Figure 3 show the experimental results when the delay time of HF RF and the delay time of LF RF are changed. This result shows that it is important to stop the application in the order of HF RF → LF RF after stopping the application of Top DC, even if the stop time point of HF RF application and the stop time point of LF RF application are changed by about 1 second. It is also possible to obtain a high particle reduction effect.

[Particle Adhesion Inhibition Method 3 (Mode 1-3, Mode 1-4)] Next, the particle adhesion suppression method 3 in this embodiment will be described with reference to FIG. 4. The time-dependent changes of mode 1-3 and mode 1-4 are shown on the upper part of FIG. 4.

In mode 1-3 of the particle adhesion suppression method 3 of this embodiment, after the plasma processing of the wafer W is finished, the Top DC output from the variable DC power supply 70 is gradually decreased, and after the application of the Top DC is stopped, the stop is stopped. Application of the HF RF output from the first high-frequency power supply 32 is stopped, and application of the LF RF output from the second high-frequency power supply 34 is stopped. That is, in modes 1-3, the application of each power is stopped in the order of stopping after the slow drop of Top DC → HF RF → LF RF.

However, the control method of the slow-down of the Top DC includes not only a method of reducing the applied DC voltage in a stepwise manner as shown in Mode 1-3, but also a method of continuously reducing the applied DC voltage as shown in Mode 1-4.

In addition, as shown in Modes 1-4, it can be controlled to make the Top DC decrease gradually, and when the application of Top DC is stopped, the application of HF RF and LF RF is stopped. It can also be controlled to slow down the Top DC, and stop the application of HF RF and LF RF before stopping the application of Top DC. It can also be controlled to slow down the Top DC and stop the application of each power in the order of HF RF → LF RF when or before the application of the Top DC is stopped.

The lower table in FIG. 4 shows the experimental results of stopping the application of each power by the methods of modes 1-3 and 1-4 after the end of the plasma treatment. The leftmost non-delay mode in the lower table of Fig. 4 is a case where the delay time of HF and LF is 0.0s, that is, a situation where all the application of Top DC, HF RF, and LF RF is stopped at the same time. The lower table has the same result in the no-delay mode.

In the modes 1-4 and 1-3 shown on the right side of the non-delay mode, it was confirmed that the number of particles on the wafer W was reduced to about 1/20 compared to the case of the non-delay mode. That is, in the method of stopping the application of each of the HF RF and LF RF power after the Top DC is gradually lowered, the effect of reducing the adhesion of particles to the wafer W is very high.

In addition, as a result of the experiment, it was confirmed that the number of particles on the wafer W can be further reduced in the mode 1-3 than in the mode 1-4. That is, it has been confirmed that the method of gradually lowering the Top DC and stopping the application of each power in the order of HF RF → LF RF after stopping the application of the Top DC has the highest effect of reducing the adhesion of particles to the wafer W.

[Reasons for Inhibiting Particle Adhesion] The reasons for suppressing particle adhesion described above will be described with reference to FIG. 5. 5 (a) to 5 (c) show an example of a cross section between the electrostatic chuck 106 and the focus ring 108. FIG. 5 (a) is a view schematically showing a state near the edge of the wafer W when the plasma processing of the wafer W is completed. The reaction products generated in the plasma processing and the substances constituting the inner wall of the processing container 10 removed by the plasma are attached between the electrostatic chuck 106 and the focus ring 108.

The focus ring 108 is a ring-shaped member arranged on the outer edge portion of the wafer W. Since the height of the topmost part of the focus ring 108 is higher than that of the wafer W, substances formed as particle sources of reaction products and the like are easily accumulated between the electrostatic chuck 106 and the focus ring 108 on the outer edge of the wafer W.

In this state, when the Top DC (direct current voltage) is suddenly stopped from being turned on to being turned off (on time → turn-off control at time t _{1 in} the time-varying graph on the left side of FIG. 5), a sharp sheath potential change occurs.

Specifically, in the plasma treatment, in a state where Top DC is applied to the gas spray head 25 having the function of an upper electrode, the surface of the upper electrode is formed at a negative potential due to the sheath formed on the upper electrode.

When the application of Top DC is stopped in this state, the surface of the upper electrode suddenly changes from negative potential to positive. As a result, as shown in FIG. 5 (b), the negatively charged particles are instantly attracted to the direction of the upper electrode, and as a result, the possibility that the particles adhere to the surface of the edge portion of the wafer W increases. As a result, a phenomenon in which particles adhere to the wafer W increases.

On the other hand, in the particle adhesion suppression method 3 of this embodiment, control is performed so that the application of Top DC is gradually decreased and stopped. According to this, since the application of the Top DC is gradually stopped, the surface of the wafer W can be suppressed from suddenly changing from a negative potential to a positive potential. As a result, as shown in FIG. 5 (c), the force with which the negatively charged particles are attracted to the edge portion of the wafer W is reduced. Thereby, at the time point when the application of the Top DC is stopped in FIG. 5 (c) (the slow-down control from time t ₁ to t ₃ of the time-varying graph on the right side of FIG. 5), the adhesion of particles on the wafer W can be suppressed.

[Consolidation] From the above description, while referring to FIG. 6, the aggregation of the particle adhesion suppression methods 1 to 3 of this embodiment is performed. As shown in the mode 1-3 and mode 1-4 shown in the table of FIG. 6 (refer to FIG. 4 for the program of the mode), when the application of the Top DC is slowed down and stopped, the adhesion of particles to the wafer W can be suppressed.

In addition, instead of slowing down the application of Top DC, as shown in mode 1-2 of FIG. 6 (refer to FIG. 3 for the program of the mode), the application is stopped in the order of HF RF → LF RF, thereby suppressing particle adhesion. Under wafer W.

Mode 1-2 can prevent particles from adhering to the wafer W for either HF RF or LF RF. During the application, a sheath is formed on the surface of the upper electrode, wafer W, focus ring 108, and the like. At this time, since the sheath is negative, the wafer W and the focus ring 108 are negatively charged.

Therefore, when the applied HF RF is stopped, by continuing the application of the LF RF, it is possible to avoid the complete elimination of the formed sheath. Thereby, the surface of the wafer W can be negatively charged, and the negatively charged particles can be suppressed from being attached to the wafer W. In addition, by stopping the application in the order of HF RF → LF RF, it is possible to avoid a sudden change in the sheath potential. It is possible to suppress particles from adhering to the wafer W.

When comparing HF RF and LF RF, the frequency of the plasma generated when HF RF is applied is higher than that of the plasma generated when LF RF is applied, so it is unstable. When the plasma is unstable, the formed sheath will also be unstable. Therefore, if the procedure is to stop the application of LF RF where the plasma is more stable after the application of HF RF is stopped, the surface of the wafer W can be more negatively charged. From the above, by stopping the application in the order of HF RF → LF RF, it is possible to more effectively suppress particles from adhering to the wafer W than in the order of LF RF → HF RF.

Furthermore, by combining the "gradual fall of Top DC" and "stop application in the order of HF RF → LF RF", it is possible to most effectively suppress particles from adhering to the wafer W. That is, as shown in FIG. 6, according to the procedure of stopping the application of modes 1-3 in the order of slow-down of Top DC → HF RF → LF RF, as shown in FIG. 6, the adhesion of particles on the wafer W can be most effectively reduced.

Specifically, in the procedures of modes 1-3, the number of particles attached to the wafer W can be reduced to about 1/25 compared to the non-delay mode in which all the applications of Top DC, HF RF, and LF RF are stopped at the same time.

As described above, according to the experimental results of the method 1 to 3 for suppressing the adhesion of particles in this embodiment, it can be known that the procedure of stopping the application of each power according to the sequence of slow decline of Top DC → HF RF → LF RF can reduce particles on the wafer most. The attachment of W.

However, it can be seen that not only mode 1-3, but also the process of slowing down the top DC of mode 1-4 → HF RF and LF RF and applying a stop at the same time can also reduce the adhesion of particles on the wafer W.

In addition, it can be seen that, as in Modes 1-2 and 2, when there is no program for slow-down of Top DC, the application procedure of stopping the application in the order of HF RF → LF RF can also reduce the adhesion of particles on the wafer W.

As described above, the plasma processing apparatus and the method for suppressing particle adhesion have been described in the above embodiments. The plasma processing apparatus and the method for suppressing particle adhesion of the present invention are not limited to the above embodiments, and various modifications and variations can be made within the scope of the present invention. Improvement. The matters described in the plural embodiments can be combined within a range that does not conflict.

For example, the method for inhibiting particles from adhering to a substrate of the present invention can be applied not only to a capacitively coupled plasma (CCP) device, but also to other plasma processing devices. Other plasma processing devices can also be inductively coupled plasma (ICP: Inductively Coupled Plasma) processing devices, plasma processing devices using radial wire slot antennas, and spiral wave excited plasma (HWP: Helicon Wave Plasma) processing. Equipment, electronic cyclotron resonance plasma (ECR: Electron Cyclotron Resonance Plasma) processing equipment, etc.

In this specification, the substrate is described with a semiconductor wafer W, but it is not limited to this, and various substrates, light for LCD (Liquid Crystal Display), FPD (Flat Panel Display), etc. Cover, CD substrate, printed substrate, etc.

1‧‧‧ Plasma treatment device
10‧‧‧handling container
15‧‧‧Gas supply source
20‧‧‧mounting table
25‧‧‧Gas spray head
30‧‧‧Power supply device
32‧‧‧The first high-frequency power supply
33‧‧‧1st matcher
34‧‧‧ 2nd high frequency power supply
35‧‧‧ 2nd matcher
60‧‧‧ exhaust port
65‧‧‧Exhaust
70‧‧‧ Variable DC Power Supply
85‧‧‧ heat transfer gas supply source
100‧‧‧Control Department
104‧‧‧ support
104a‧‧‧Refrigerant flow path
104b‧‧‧Refrigerant inlet piping
104c‧‧‧Refrigerant outlet piping
106‧‧‧ electrostatic chuck
106a‧‧‧ Suction Electrode
106b‧‧‧ insulator
108‧‧‧focus ring
112‧‧‧DC voltage source
130‧‧‧Gas supply line
DC‧‧‧DC voltage
G‧‧‧Gate valve
HF‧‧‧ High-frequency power for plasma generation
HF RF‧‧‧The first high-frequency power output from the first high-frequency power supply
LF‧‧‧High-frequency power for bias voltage generation
LF RF‧‧‧ 2nd high frequency power output from 2nd high frequency power supply
Top DC‧‧‧ DC output from variable DC power supply
t ₁ ‧‧‧time
t ₂ ‧‧‧time
t ₃ ‧‧‧time
W‧‧‧ Wafer

FIG. 1 is a diagram showing an example of a longitudinal section of a plasma processing apparatus according to an embodiment. FIG. 2 is a diagram showing an example of a method for suppressing particle adhesion and its result according to an embodiment. FIG. 3 is a diagram showing an example of a method for suppressing particle adhesion and its result according to an embodiment. FIG. 4 is a diagram showing an example of a method for suppressing particle adhesion and its result according to an embodiment. 5 (a) to (c) are diagrams for explaining the reason of the method for suppressing particle adhesion in one embodiment. FIG. 6 is a diagram showing a comparison of a list of particle adhesion suppression methods and results in an embodiment.

DC‧‧‧DC voltage

HF‧‧‧ High-frequency power for plasma generation

HF RF‧‧‧The first high-frequency power output from the first high-frequency power supply

LF‧‧‧High-frequency power for bias voltage generation

LF RF‧‧‧ 2nd high frequency power output from 2nd high frequency power supply

Top DC‧‧‧ DC output from variable DC power supply

Claims (6)

A plasma processing apparatus includes: a processing chamber for accommodating a substrate and performing plasma processing therein; a mounting table for mounting a substrate; a counter electrode opposed to the mounting table; a first high frequency The power source is used to apply the first high-frequency power for plasma generation to the mounting table or the counter electrode; the second high-frequency power source is used to apply a bias voltage having a frequency lower than the first high-frequency power to the mounting table. A second high-frequency power for generation; a DC power source for applying a DC voltage to the counter electrode; and a control unit for controlling the first high-frequency power source, the second high-frequency power source, and the DC power source; the control When the plasma treatment is performed or after the plasma treatment and before the application of the first high-frequency power and the second high-frequency power is stopped, the DC voltage is gradually decreased. For example, the plasma processing device of the scope of application for a patent, in which the control unit is configured to stop the application of the first high-frequency power and the second high-frequency power during or after the plasma processing, or before the application of the second high-frequency power is stopped. At that time, the slowly decreasing DC voltage is stopped. For example, the plasma processing device of the first or second scope of the patent application, wherein the control section stops the application of the second high-frequency power after stopping the application of the first high-frequency power. For example, the plasma processing device of the scope of application for item 1 or item 2 further includes a ring-shaped member arranged at the outer edge of the mounting table, and the height of the top of the ring-shaped member is higher than the substrate. A plasma processing apparatus includes: a processing chamber for accommodating a substrate and performing plasma processing therein; a mounting table for mounting a substrate; a counter electrode opposed to the mounting table; a first high frequency The power source is used to apply the first high-frequency power for plasma generation to the mounting table or the counter electrode; the second high-frequency power supply is used to apply a bias voltage having a frequency lower than the first high-frequency power to the mounting table. A second high-frequency power for generation; and a control section for controlling the first high-frequency power supply and the second high-frequency power supply; the control section during the plasma processing or after the plasma processing and makes the first high-frequency power After the application of the high-frequency power is stopped, the application of the second high-frequency power is stopped. A method for suppressing particle adhesion is used to inhibit particles from adhering to a substrate subjected to plasma processing by a plasma processing device. The plasma processing device includes: a processing chamber for accommodating a substrate and performing plasma processing inside the substrate; A mounting table for placing a substrate; a counter electrode facing the mounting table; a first high-frequency power supply for applying the first high-frequency power for plasma generation to the mounting table or the counter electrode; the second A high-frequency power source for applying a second high-frequency power for generating a bias voltage lower than the first high-frequency power source to the mounting table; a DC power source for applying a DC voltage to the counter electrode; and a control unit, Used to control the first high-frequency power supply, the second high-frequency power supply, and the direct-current power supply; the method for suppressing particle adhesion during or after the plasma treatment makes the direct-current voltage drop slowly, and after the direct-voltage drop To stop the application of the first high-frequency power and the second high-frequency power.