TW201802783A - Pixel sensing device and method for controlling the same - Google Patents

Pixel sensing device and method for controlling the same Download PDF

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TW201802783A
TW201802783A TW105121615A TW105121615A TW201802783A TW 201802783 A TW201802783 A TW 201802783A TW 105121615 A TW105121615 A TW 105121615A TW 105121615 A TW105121615 A TW 105121615A TW 201802783 A TW201802783 A TW 201802783A
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terminal
voltage
signal
control
transistor
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TW105121615A
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TWI592917B (en
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陳雅鈴
李建亞
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友達光電股份有限公司
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Priority to CN201610720385.8A priority patent/CN106375687B/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75Circuitry for providing, modifying or processing image signals from the pixel array

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

A pixel sensing device includes a transistor, a capacitor, a photodiode, a first reset unit, a second reset unit, a transmitting unit, a control unit, and a reading unit. The transistor includes a first terminal, a control terminal, and a second terminal. The photodiode includes an anode and a cathode. The photodiode senses ambient light for outputting a signal voltage. The first reset unit resets the voltage of the cathode based on a first reset signal. The second reset unit outputs a reset voltage to the control terminal based on a second reset signal. The transmitting unit transmits the signal voltage of the cathode to the control terminal and couples the signal voltage to the second terminal based on a transmitting signal. The control unit provides a power supply voltage to the first terminal based on a control signal. The reading unit reads out the current based on a reading signal.

Description

畫素感測裝置及控制方法 Pixel sensing device and control method

本發明係有關於一種感測裝置及其控制方法,且特別是有關於一種畫素感測裝置及其控制方法。 The invention relates to a sensing device and a control method thereof, and more particularly to a pixel sensing device and a control method thereof.

一般主動畫素感測器內包含多個電晶體與電容,以感測光源並相應地產生電流。然而,由於製程的影響或長時間操作後,每一主動畫素感測器內之多個電晶體的臨界電壓(Vth)會不相同,在此狀態下,即使給予每一主動畫素感測器相同的照光量,每一主動畫素感測器所產生的電流仍然會有差異,導致讀取到的電流有所誤差。 Generally, the main video element sensor includes a plurality of transistors and capacitors to sense the light source and generate a current accordingly. However, due to the influence of the manufacturing process or after a long time operation, the threshold voltages (Vth) of the plurality of transistors in each main animation element sensor will be different. The same amount of light from the sensor, the current generated by each main animation sensor will still be different, resulting in an error in the read current.

由此可見,上述現有的方式,顯然仍存在不便與缺陷,而有待改進。為了解決上述問題,相關領域莫不費盡心思來謀求解決之道,但長久以來仍未發展出適當的解決方案。 It can be seen that the above existing methods obviously still have inconveniences and defects, and need to be improved. In order to solve the above-mentioned problems, the related fields have made every effort to find a solution, but a suitable solution has not been developed for a long time.

發明內容旨在提供本揭示內容的簡化摘要,以使閱讀者對本揭示內容具備基本的理解。此發明內容並非本揭示內容的完整概述,且其用意並非在指出本發明實施例的重要/ 關鍵元件或界定本發明的範圍。 This summary is intended to provide a simplified summary of this disclosure so that readers may have a basic understanding of this disclosure. This summary is not a complete overview of this disclosure, and it is not intended to indicate the importance of the embodiments of the invention / Key elements or define the scope of the invention.

本發明內容之一目的是在提供一種畫素感測裝置及其控制方法,藉以改善先前技術的問題。 An object of the present invention is to provide a pixel sensing device and a control method thereof, so as to improve the problems of the prior art.

為達上述目的,本發明內容之一技術態樣係關於一種畫素感測裝置,此畫素感測裝置包含第一電晶體、第一電容、光電二極體、第一重置單元、第二重置單元、傳遞單元、控制單元、讀取單元、第一電容以及第二電容。第一電晶體包含第一端、控制端及第二端。第一電晶體用以輸出一電流。第一電容耦接於第一電晶體之控制端與第二端之間。光電二極體包含陽極端及陰極端,此光電二極體用以感測光源以輸出信號電壓。第一重置單元耦接於光電二極體之陰極端,用以根據第一重置信號以重置陰極端之電壓。第二重置單元耦接於第一電晶體之控制端,用以根據第二重置信號以對控制端輸出重置電壓。傳遞單元耦接於陰極端與控制端之間,此傳遞單元用以根據傳遞信號以將陰極端之信號電壓傳遞至控制端,並透過第一電容耦合信號電壓至第二端。控制單元耦接於第一電晶體之第一端,用以根據控制信號以提供電源供應電壓至第一端。讀取單元耦接於第一電晶體之第二端,用以根據讀取信號以讀取電流。第二電容耦接於控制單元與讀取單元之間。 To achieve the above object, one aspect of the technical content of the present invention relates to a pixel sensing device. The pixel sensing device includes a first transistor, a first capacitor, a photodiode, a first reset unit, and a first pixel. Two reset units, a transfer unit, a control unit, a reading unit, a first capacitor, and a second capacitor. The first transistor includes a first terminal, a control terminal, and a second terminal. The first transistor is used to output a current. The first capacitor is coupled between the control terminal and the second terminal of the first transistor. The photodiode includes an anode terminal and a cathode terminal. The photodiode is used to sense a light source to output a signal voltage. The first reset unit is coupled to the cathode terminal of the photodiode, and is used to reset the voltage of the cathode terminal according to the first reset signal. The second reset unit is coupled to the control terminal of the first transistor, and is configured to output a reset voltage to the control terminal according to the second reset signal. The transmitting unit is coupled between the cathode terminal and the control terminal. The transmitting unit is used for transmitting the signal voltage of the cathode terminal to the control terminal according to the transmitted signal, and the signal voltage is coupled to the second terminal through the first capacitor. The control unit is coupled to the first terminal of the first transistor to provide a power supply voltage to the first terminal according to a control signal. The reading unit is coupled to the second terminal of the first transistor to read the current according to the reading signal. The second capacitor is coupled between the control unit and the reading unit.

為達上述目的,本發明內容之另一技術態樣係關於一種控制方法,此控制方法用以控制畫素感測裝置。畫素感測裝置包含電晶體、電容及光電二極體,電晶體包含第一端、控制端及第二端,光電二極體包含陽極端及陰極端,電容耦接於控制端與第二端之間。此控制方法包含以下步驟:於補償期 間,根據第一重置信號以重置陰極端之電壓;於補償期間根據第二重置信號以對控制端寫入重置電壓;於一資料寫入期間,根據傳遞信號以將光電二極體之陰極端輸出的信號電壓傳遞至控制端,並透過電容耦合信號電壓至第二端;於讀取期間,根據控制信號以提供電源供應電壓至第一端,其中電晶體於讀取期間根據控制端與第二端之間的電壓以輸出電流;以及於讀取期間,根據讀取信號以讀取電流。 To achieve the above object, another aspect of the present invention relates to a control method for controlling a pixel sensing device. The pixel sensing device includes a transistor, a capacitor, and a photodiode. The transistor includes a first terminal, a control terminal, and a second terminal. The photodiode includes an anode terminal and a cathode terminal. The capacitor is coupled to the control terminal and the second terminal. Between ends. This control method includes the following steps: During the compensation period During the compensation period, the voltage at the cathode terminal is reset according to the first reset signal; during the compensation period, the reset voltage is written to the control terminal according to the second reset signal; during a data writing period, the photodiode is transferred according to the transmitted signal. The signal voltage output from the cathode terminal of the body is transmitted to the control terminal, and the signal voltage is coupled to the second terminal through capacitance; during the reading period, the power supply voltage is provided to the first terminal according to the control signal, and the transistor is The voltage between the control terminal and the second terminal is used to output the current; and during the reading, the current is read according to the reading signal.

因此,根據本發明之技術內容,本發明實施例藉由提供一種畫素感測裝置及控制方法,藉以改善畫素感測裝置因其內電晶體的臨界電壓(Vth)不同而導致讀取到的電流有所誤差之問題。 Therefore, according to the technical content of the present invention, the embodiments of the present invention provide a pixel sensing device and a control method to improve the pixel sensing device's readout caused by the threshold voltage (Vth) of the transistor in the pixel sensing device. There is an error in the current.

在參閱下文實施方式後,本發明所屬技術領域中具有通常知識者當可輕易瞭解本發明之基本精神及其他發明目的,以及本發明所採用之技術手段與實施態樣。 After referring to the following embodiments, those with ordinary knowledge in the technical field to which the present invention pertains can easily understand the basic spirit and other inventive objectives of the present invention, as well as the technical means and implementation aspects adopted by the present invention.

110‧‧‧第一重置單元 110‧‧‧First reset unit

120‧‧‧第二重置單元 120‧‧‧Second reset unit

130‧‧‧傳遞單元 130‧‧‧ Delivery Unit

140‧‧‧控制單元 140‧‧‧control unit

150‧‧‧讀取單元 150‧‧‧reading unit

500‧‧‧積分單元 500‧‧‧point unit

900‧‧‧方法 900‧‧‧ Method

910~970‧‧‧步驟 910 ~ 970‧‧‧step

C1~C3‧‧‧電容 C1 ~ C3‧‧‧Capacitor

D‧‧‧第一端 D‧‧‧ the first end

EM‧‧‧控制信號 EM‧‧‧Control signal

G‧‧‧控制端 G‧‧‧Control terminal

IOUT‧‧‧電流 I OUT ‧‧‧ Current

N‧‧‧陰極端 N‧‧‧ cathode terminal

PD‧‧‧光電二極體 PD‧‧‧Photodiode

P1~P5‧‧‧期間 During P1 ~ P5‧‧‧‧

Reset1~Reset2‧‧‧重置信號 Reset1 ~ Reset2‧‧‧Reset signal

S‧‧‧第二端 S‧‧‧ the second end

Select‧‧‧讀取信號 Select‧‧‧Read signal

SW‧‧‧開關 SW‧‧‧Switch

T1~T6‧‧‧電晶體 T1 ~ T6‧‧‧Transistors

TX‧‧‧傳遞信號 TX‧‧‧ pass signal

VDD‧‧‧電源供應電壓 V DD ‧‧‧ Power supply voltage

Vref‧‧‧參考電壓 V ref ‧‧‧ Reference voltage

Vrst‧‧‧重置電壓 V rst ‧‧‧ reset voltage

Vsig‧‧‧信號電壓 V sig ‧‧‧Signal voltage

Vss‧‧‧電壓 V ss ‧‧‧ Voltage

Vth‧‧‧臨界電壓 V th ‧‧‧ critical voltage

為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:第1圖係依照本發明一實施例繪示一種畫素感測裝置的示意圖。 In order to make the above and other objects, features, advantages, and embodiments of the present invention more comprehensible, the description of the drawings is as follows: FIG. 1 is a schematic diagram of a pixel sensing device according to an embodiment of the present invention .

第2圖係依照本發明實施例繪示一種控制波形示意圖。 FIG. 2 is a schematic diagram of a control waveform according to an embodiment of the present invention.

第3圖係依照本發明第1圖所示之實施例繪示畫素感測裝置的詳細電路示意圖。 FIG. 3 is a detailed circuit diagram of the pixel sensing device according to the embodiment shown in FIG. 1 of the present invention.

第4圖係依照本發明第3圖所示之實施例繪示畫素感測裝 置的操作示意圖。 FIG. 4 shows a pixel sensing device according to the embodiment shown in FIG. 3 of the present invention. Set operation diagram.

第5圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。 FIG. 5 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention.

第6圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。 FIG. 6 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention.

第7圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。 FIG. 7 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention.

第8圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。 FIG. 8 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention.

第9圖係繪示依照本發明另一實施方式的一種控制方法之流程圖。 FIG. 9 is a flowchart illustrating a control method according to another embodiment of the present invention.

根據慣常的作業方式,圖中各種特徵與元件並未依比例繪製,其繪製方式是為了以最佳的方式呈現與本發明相關的具體特徵與元件。此外,在不同圖式間,以相同或相似的元件符號來指稱相似的元件/部件。 According to the usual operation method, various features and components in the figure are not drawn to scale. The drawing method is to present the specific features and components related to the present invention in an optimal way. In addition, between different drawings, the same or similar element symbols are used to refer to similar elements / components.

為了使本揭示內容的敘述更加詳盡與完備,下文針對了本發明的實施態樣與具體實施例提出了說明性的描述;但這並非實施或運用本發明具體實施例的唯一形式。實施方式中涵蓋了多個具體實施例的特徵以及用以建構與操作這些具體實施例的方法步驟與其順序。然而,亦可利用其他具體實施例來達成相同或均等的功能與步驟順序。 In order to make the description of this disclosure more detailed and complete, the following provides an illustrative description of the implementation mode and specific embodiments of the present invention; but this is not the only form of implementing or using the specific embodiments of the present invention. The embodiments include the features of a plurality of specific embodiments, as well as the method steps and their order for constructing and operating these specific embodiments. However, other specific embodiments can also be used to achieve the same or equal functions and sequence of steps.

除非本說明書另有定義,此處所用的科學與技術 詞彙之含義與本發明所屬技術領域中具有通常知識者所理解與慣用的意義相同。此外,在不和上下文衝突的情形下,本說明書所用的單數名詞涵蓋該名詞的複數型;而所用的複數名詞時亦涵蓋該名詞的單數型。 Unless otherwise defined in this specification, science and technology used herein The meaning of the vocabulary is the same as that understood by those with ordinary knowledge in the technical field to which the present invention belongs. In addition, when not in conflict with the context, the singular noun used in this specification covers the plural form of the noun; and the plural noun used also covers the singular form of the noun.

另外,關於本文中所使用之「耦接」,可指二或多個元件相互直接作實體或電性接觸,或是相互間接作實體或電性接觸,亦可指二或多個元件相互操作或動作。 In addition, as used in this document, "coupling" may mean that two or more elements make direct physical or electrical contact with each other, or indirectly make physical or electrical contact with each other, or that two or more elements operate mutually Or action.

第1圖係依照本發明一實施例繪示一種畫素感測裝置的示意圖。如圖所示,畫素感測裝置包含第一電晶體T1、第一電容C1、第二電容C2、光電二極體PD、第一重置單元110、第二重置單元120、傳遞單元130、控制單元140及讀取單元150。第一電晶體T1包含第一端D、控制端G及第二端S。光電二極體PD包含陽極端及陰極端N。 FIG. 1 is a schematic diagram of a pixel sensing device according to an embodiment of the present invention. As shown in the figure, the pixel sensing device includes a first transistor T1, a first capacitor C1, a second capacitor C2, a photodiode PD, a first reset unit 110, a second reset unit 120, and a transfer unit 130. Control unit 140 and reading unit 150. The first transistor T1 includes a first terminal D, a control terminal G, and a second terminal S. The photodiode PD includes an anode terminal and a cathode terminal N.

於連接關係上,第一重置單元110耦接於光電二極體PD之陰極端N,並可接收電源供應電壓VDD及第一重置信號Reset1。傳遞單元130耦接於光電二極體PD之陰極端N與第一電晶體T1之控制端G之間,並可接收傳遞信號TX。第二重置單元120耦接於第一電晶體T1之控制端G,並可接收重置電壓Vrst及第二重置信號Reset2。第一電容C1耦接於第一電晶體T1之控制端G與第二端S之間。控制單元140耦接於第一電晶體T1之第一端D,並可接收電源供應電壓VDD及控制信號EM。讀取單元150耦接於第一電晶體T1之第二端S與外部的積分單元500之間,並可接收讀取信號Select。第二電容C2耦接於控制單元140與讀取單元150之間。 In terms of connection, the first reset unit 110 is coupled to the cathode terminal N of the photodiode PD, and can receive the power supply voltage V DD and the first reset signal Reset1. The transmission unit 130 is coupled between the cathode terminal N of the photodiode PD and the control terminal G of the first transistor T1, and can receive a transmission signal TX. The second reset unit 120 is coupled to the control terminal G of the first transistor T1 and can receive a reset voltage V rst and a second reset signal Reset2. The first capacitor C1 is coupled between the control terminal G and the second terminal S of the first transistor T1. The control unit 140 is coupled to the first terminal D of the first transistor T1 and can receive a power supply voltage V DD and a control signal EM. The reading unit 150 is coupled between the second terminal S of the first transistor T1 and the external integration unit 500 and can receive a reading signal Select. The second capacitor C2 is coupled between the control unit 140 and the reading unit 150.

為使本發明實施例之畫素感測裝置的操作方式易於理解,請一併參閱第2圖,其係依照本發明實施例繪示一種控制波形示意圖。如圖第1圖及第2圖所示,光電二極體PD用以感測光源以輸出信號電壓。第一重置單元110用以於補償期間P2根據第一重置信號Reset1以重置陰極端N之電壓。第二重置單元120用以於補償期間P2根據第二重置信號Reset2以對控制端G寫入重置電壓Vrst,以使第二端S漸趨於重置電壓Vrst扣掉電晶體T1之臨界電壓。積分期間P3為光電二極體PD曝光積分時間。 In order to make the operation method of the pixel sensing device of the embodiment of the present invention easy to understand, please refer to FIG. 2 together, which is a schematic diagram of a control waveform according to the embodiment of the present invention. As shown in FIG. 1 and FIG. 2, the photodiode PD is used to sense a light source to output a signal voltage. The first reset unit 110 is configured to reset the voltage of the cathode terminal N according to the first reset signal Reset1 during the compensation period P2. The second reset unit 120 is configured to write a reset voltage V rst to the control terminal G according to the second reset signal Reset2 during the compensation period P2, so that the second terminal S gradually approaches the reset voltage V rst to buckle the transistor. T1 threshold voltage. The integration period P3 is the integration time of the photodiode PD exposure.

此外,傳遞單元130用以於資料寫入期間P4根據傳遞信號TX以將陰極端N之信號電壓傳遞至控制端G,並透過第一電容C1耦合信號電壓至第二端S。於讀取期間P5,控制單元140用以根據控制信號EM以提供電源供應電壓VDD至第一端D,第一電晶體T1根據控制端G與第二端S之間的電壓以輸出電流,讀取單元150用以根據讀取信號Select以讀取上述電流。 In addition, the transmitting unit 130 is configured to transmit the signal voltage of the cathode terminal N to the control terminal G according to the transmission signal TX during the data writing period P4, and couple the signal voltage to the second terminal S through the first capacitor C1. During the reading period P5, the control unit 140 is configured to provide a power supply voltage V DD to the first terminal D according to the control signal EM, and the first transistor T1 outputs a current according to the voltage between the control terminal G and the second terminal S. The reading unit 150 is configured to read the current according to the reading signal Select.

如此一來,由於本案之畫素感測裝置於上述期間內,對第一電晶體T1進行重置以及補償,使第一電晶體T1輸出之電流與其本身之臨界電壓無關,因此,得以有效改善畫素感測裝置因其內電晶體的臨界電壓(Vth)不同而導致讀取到的電流有所誤差之問題。 In this way, the pixel sensing device of the present case resets and compensates the first transistor T1 during the above period, so that the current output by the first transistor T1 is independent of its own threshold voltage, so it can be effectively improved. The pixel sensing device has a problem that an error occurs in a read current due to a difference in a threshold voltage (V th ) of a transistor therein.

請一併參閱第1圖與第2圖,舉例而言,第一重置單元110在補償期間P2根據高位準之第一重置信號Reset1以重置陰極端N之電壓。隨後,第二重置單元120在補償期間P2 根據高位準之第二重置信號Reset2以對控制端G寫入重置電壓Vrst,以於第二端S形成第一電壓差(Vrst-Vth)。 Please refer to FIG. 1 and FIG. 2 together. For example, the first reset unit 110 resets the voltage of the cathode terminal N according to the high-level first reset signal Reset1 during the compensation period P2. Subsequently, during the compensation period P2, the second reset unit 120 writes a reset voltage V rst to the control terminal G according to the second reset signal Reset2 at a high level, so as to form a first voltage difference (V rst- V th ).

接著,光電二極體PD感測光源以於其陰極端N產生信號電壓Vsig,傳遞單元130在資料寫入期間P4根據高位準的傳遞信號TX以將陰極端N之信號電壓Vsig傳遞至控制端G,並透過第一電容C1耦合信號電壓Vsig至第二端S,以於第二端s形成第一電壓差(Vrst-Vth)與第二電壓差(Vsig-Vrst)*a之電壓和((Vrst-Vth)+(Vsig-Vrst)*a)。然後,在讀取期間P5,控制單元140用以根據高位準之控制信號EM以提供電源供應電壓VDD至第一端D,此時,第一電晶體T1即可根據上述電壓和((Vrst-Vth)+(Vsig-Vrst)*a)以輸出電流IOUT,上述參數a為第一電容C1之電容值與第一電容C1及第二電容C2之電容值和的比例,其關係式如下:

Figure TW201802783AD00001
Then, photodiode PD sensing light source at its cathode terminal N to generate a signal voltage V sig, 130 P4 transfer unit to transfer the cathode terminal N of the signal voltage V sig to a high level according to a transfer signal TX data during the writing The control terminal G couples the signal voltage V sig to the second terminal S through the first capacitor C1 to form a first voltage difference (V rst -V th ) and a second voltage difference (V sig -V rst ) at the second terminal s. ) * a voltage sum ((V rst- V th ) + (V sig -V rst ) * a). Then, during the reading period P5, the control unit 140 is configured to provide the power supply voltage V DD to the first terminal D according to the high-level control signal EM. At this time, the first transistor T1 may be based on the voltage and ((V rst- V th ) + (V sig -V rst ) * a) to output current I OUT , the above parameter a is the ratio of the capacitance value of the first capacitor C1 to the sum of the capacitance values of the first capacitor C1 and the second capacitor C2, The relationship is as follows:
Figure TW201802783AD00001

依據上述操作而產生之電流IOUT將與臨界電壓Vth無關,說明如後。 The current I OUT generated according to the above operation will have nothing to do with the threshold voltage V th , which will be described later.

首先,電晶體之電流公式如下:

Figure TW201802783AD00002
First, the current formula of the transistor is as follows:
Figure TW201802783AD00002

於讀取期間P5,第一電晶體T1之控制端G與第二端S之間的電壓VGS為Vsig-((Vrst-Vth)+(Vsig-Vrst)*a),將上述電壓VGS帶入公式1,得到第一電晶體T1之電流IOUT如下:

Figure TW201802783AD00003
During the reading period P5, the voltage V GS between the control terminal G and the second terminal S of the first transistor T1 is V sig -((V rst -V th ) + (V sig -V rst ) * a), Bringing the above voltage V GS into Equation 1, the current I OUT of the first transistor T1 is as follows:
Figure TW201802783AD00003

將上述公式2進行整理後,得到以下公式:

Figure TW201802783AD00004
After finishing the above formula 2, the following formula is obtained:
Figure TW201802783AD00004

由公式3可知,即使主動畫素感測器內採用之電晶體基於製程的影響或長時間操作後,而導致臨界電壓Vth不同,本案之畫素感測裝置的讀取單元150輸出之電流IOUT確實與第一電晶體T1的臨界電壓Vth無關,因此,得以有效改善先前技術中基於臨界電壓Vth不同而導致讀取到的電流有所誤差之問題。 It can be known from Equation 3 that even if the transistor used in the main video sensor is affected by the process or after a long time operation, the threshold voltage V th is different. The current output by the reading unit 150 of the pixel sensing device of the present case I OUT is indeed not related to the threshold voltage V th of the first transistor T 1. Therefore, the problem of the error in the read current due to different threshold voltage V th in the prior art can be effectively improved.

請參閱第2圖,補償期間P2與積分期間P3部分重疊。因此,本案之畫素感測裝置在上述重疊時段內可同時執行補償與積分操作,以增進畫素感測裝置之執行效率。 See Figure 2. The compensation period P2 and the integration period P3 partially overlap. Therefore, the pixel sensing device in this case can perform compensation and integration operations simultaneously during the above-mentioned overlapping period, so as to improve the execution efficiency of the pixel sensing device.

請一併參閱第1圖與第2圖,控制單元140於初始期間P1根據控制信號EM以對第一端D寫入電源供應電壓VDD,讀取單元150於初始期間P1根據讀取信號Select對第二端S寫入參考電壓Vref。在一實施例中,初始期間P1與讀取期間P5部分重疊。在另一實施例中,請參閱第2圖,初始期間P1與讀取期間P5可為同一期間,亦即本案之畫素感測裝置可同時執行初始化與讀取電流操作,以增進畫素感測裝置之執行效率。 Please refer to FIG. 1 and FIG. 2 together. In the initial period P1, the control unit 140 writes the power supply voltage V DD to the first terminal D according to the control signal EM, and the reading unit 150 selects the read signal Select in the initial period P1. A reference voltage V ref is written to the second terminal S. In one embodiment, the initial period P1 partially overlaps the read period P5. In another embodiment, please refer to FIG. 2, the initial period P1 and the reading period P5 may be the same period, that is, the pixel sensing device in this case can perform initialization and reading current operations at the same time to improve the pixel feeling Measure the implementation efficiency of the device.

第3圖係依照本發明第1圖所示之實施例繪示畫素感測裝置的詳細電路示意圖。如圖所示,第一重置單元110包含第二電晶體T2,此第二電晶體T2包含第一端、控制端及第二端,第二電晶體T2之第一端用以接收電源供應電壓VDD,第二電晶體T2之控制端用以接收第一重置信號Reset1,第二電晶體T2之第二端耦接於光電二極體PD之陰極端N。此外,第二重置單元120包含第三電晶體T3,此第三電晶體T3包含 第一端、控制端及第二端,第三電晶體T3之第一端用以接收重置電壓Vrst,第三電晶體T3之控制端用以接收第二重置信號Reset2,第三電晶體T3之第二端耦接於第一電晶體T1之控制端G。再者,傳遞單元130包含第四電晶體T4,此第四電晶體T4包含第一端、控制端及第二端,第四電晶體T4之第一端耦接於光電二極體PD之陰極端N,第四電晶體T4之控制端用以接收傳遞信號TX,第四電晶體T4之第二端耦接於第一電晶體T1之控制端G。 FIG. 3 is a detailed circuit diagram of the pixel sensing device according to the embodiment shown in FIG. 1 of the present invention. As shown in the figure, the first reset unit 110 includes a second transistor T2. The second transistor T2 includes a first terminal, a control terminal, and a second terminal. The first terminal of the second transistor T2 is used to receive power supply. At the voltage V DD , the control terminal of the second transistor T2 is used to receive the first reset signal Reset1, and the second terminal of the second transistor T2 is coupled to the cathode terminal N of the photodiode PD. In addition, the second reset unit 120 includes a third transistor T3. The third transistor T3 includes a first terminal, a control terminal, and a second terminal. The first terminal of the third transistor T3 is used to receive the reset voltage V rst. The control terminal of the third transistor T3 is used to receive the second reset signal Reset2, and the second terminal of the third transistor T3 is coupled to the control terminal G of the first transistor T1. Furthermore, the transmission unit 130 includes a fourth transistor T4. The fourth transistor T4 includes a first terminal, a control terminal, and a second terminal. The first terminal of the fourth transistor T4 is coupled to the cathode of the photodiode PD. Extreme N, the control terminal of the fourth transistor T4 is used to receive the transmission signal TX, and the second terminal of the fourth transistor T4 is coupled to the control terminal G of the first transistor T1.

此外,控制單元140包含第五電晶體T5,此第五電晶體T5包含第一端、控制端及第二端,第五電晶體T5之第一端用以接收電源供應電壓VDD,第五電晶體T5之控制端用以接收控制信號EM。第五電晶體T5之第二端耦接於第一電晶體T1之第一端D。另一方面,讀取單元150包含第六電晶體T6,此第六電晶體T6包含第一端、控制端及第二端,第六電晶體T6之第一端耦接於第一電晶體T1之第二端S,第六電晶體T6之控制端用以接收讀取信號Select,第六電晶體T6之第二端耦接於外部的積分單元500之反相輸入端。另外,第二電容C2耦接於第五電晶體T5之第一端與第一電晶體T1之第二端S之間,並耦接到第六電晶體T6之第一端。此外,積分單元500包含放大器、第三電容C3與開關SW。第三電容C3耦接於放大器的反相輸入端與輸出端之間。開關SW亦耦接於放大器的反相輸入端與輸出端之間。放大器的反相輸入端耦接於第六電晶體T6之第二端,放大器的非反相輸入端用以接收參考電壓VrefIn addition, the control unit 140 includes a fifth transistor T5. The fifth transistor T5 includes a first terminal, a control terminal, and a second terminal. The first terminal of the fifth transistor T5 is used to receive the power supply voltage V DD . The control terminal of the transistor T5 is used to receive the control signal EM. The second terminal of the fifth transistor T5 is coupled to the first terminal D of the first transistor T1. On the other hand, the reading unit 150 includes a sixth transistor T6. The sixth transistor T6 includes a first terminal, a control terminal, and a second terminal. The first terminal of the sixth transistor T6 is coupled to the first transistor T1. The second terminal S, the control terminal of the sixth transistor T6 is used to receive the read signal Select, and the second terminal of the sixth transistor T6 is coupled to the inverting input terminal of the external integration unit 500. In addition, the second capacitor C2 is coupled between the first terminal of the fifth transistor T5 and the second terminal S of the first transistor T1, and is coupled to the first terminal of the sixth transistor T6. In addition, the integrating unit 500 includes an amplifier, a third capacitor C3, and a switch SW. The third capacitor C3 is coupled between the inverting input terminal and the output terminal of the amplifier. The switch SW is also coupled between the inverting input terminal and the output terminal of the amplifier. The inverting input terminal of the amplifier is coupled to the second terminal of the sixth transistor T6. The non-inverting input terminal of the amplifier is used to receive the reference voltage V ref .

第4圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。請一併參閱第2圖與第4圖,於初始期間P1,讀取信號Select為高準位信號,第六電晶體T6根據讀取信號Select而導通,同時,積分單元500的放大器之反相輸入端與非反相輸入端等電位而均為參考電壓Vref,因此,第六電晶體T6會將反相輸入端之參考電壓Vref寫入第一電晶體T1之第二端S。此外,控制信號EM為高準位信號,第五電晶體T5根據控制信號EM而導通,以提供電源供應電壓VDD至第一端D。再者,其餘信號皆為低位準信號,因此,第二電晶體T2、第三電晶體T3、第四電晶體T4皆未被導通。於此期間,光電二極體PD可用以感測光源而於其陰極端N產生信號電壓,然而,由於第二電晶體T2與第四電晶體T4皆未被導通,因此,光電二極體PD之陰極端N會向接地端VSS放電,且光電二極體PD不會傳遞信號電壓至第一電晶體T1之控制端G。再者,第三電晶體T3未被導通,因此,重置電壓Vrst不會傳遞至第一電晶體T1之控制端G,據此,第一電晶體T1依據控制端G與第二端S之電壓差而未導通。 FIG. 4 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention. Please refer to FIG. 2 and FIG. 4 together. In the initial period P1, the read signal Select is a high-level signal, the sixth transistor T6 is turned on according to the read signal Select, and at the same time, the amplifier of the integration unit 500 is inverted. The input terminal is at the same potential as the non-inverting input terminal and is the reference voltage Vref . Therefore, the sixth transistor T6 writes the reference voltage V ref of the inverting input terminal to the second terminal S of the first transistor T1. In addition, the control signal EM is a high-level signal, and the fifth transistor T5 is turned on according to the control signal EM to provide a power supply voltage V DD to the first terminal D. Furthermore, the remaining signals are all low-level signals. Therefore, the second transistor T2, the third transistor T3, and the fourth transistor T4 are not turned on. During this period, the photodiode PD can be used to sense the light source and generate a signal voltage at its cathode terminal N. However, since the second transistor T2 and the fourth transistor T4 are not turned on, the photodiode PD The cathode terminal N will discharge to the ground terminal V SS , and the photodiode PD will not transmit a signal voltage to the control terminal G of the first transistor T1. Furthermore, the third transistor T3 is not turned on. Therefore, the reset voltage V rst is not transmitted to the control terminal G of the first transistor T1. According to this, the first transistor T1 is based on the control terminal G and the second terminal S. Voltage difference without conducting.

第5圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。請一併參閱第2圖與第5圖,於補償期間P2,第一重置信號Reset1為高準位信號,第二電晶體T2根據第一重置信號Reset1而導通,以將電源供應電壓VDD寫入光電二極體PD之陰極端N。此外,控制信號EM依舊為高準位信號,第五電晶體T5根據控制信號EM而導通,以提供電源供應電壓VDD至第一端D。再者,其餘信號皆為低位準信號, 因此,第三電晶體T3、第四電晶體T4及第六電晶體T6皆未被導通。於此期間,由於第四電晶體T4皆未被導通,因此,光電二極體PD不會傳遞信號電壓至第一電晶體T1之控制端G。再者,第三電晶體T3未被導通,因此,重置電壓Vrst不會傳遞至第一電晶體T1之控制端G,據此,第一電晶體T1依據控制端G與第二端S之電壓差而未導通。此外,第六電晶體T6未被導通,因此,積分單元500的反相端不會收到電壓,且其開關SW短路,據此,積分單元500不會進行積分以讀出任何信號。 FIG. 5 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention. Please refer to FIG. 2 and FIG. 5 together. During the compensation period P2, the first reset signal Reset1 is a high-level signal, and the second transistor T2 is turned on according to the first reset signal Reset1 to turn the power supply voltage V DD is written into the cathode terminal N of the photodiode PD. In addition, the control signal EM is still a high-level signal, and the fifth transistor T5 is turned on according to the control signal EM to provide a power supply voltage V DD to the first terminal D. Furthermore, the remaining signals are all low-level signals. Therefore, the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are not turned on. During this period, since the fourth transistor T4 is not turned on, the photodiode PD does not transmit a signal voltage to the control terminal G of the first transistor T1. Furthermore, the third transistor T3 is not turned on. Therefore, the reset voltage V rst is not transmitted to the control terminal G of the first transistor T1. According to this, the first transistor T1 is based on the control terminal G and the second terminal S. Voltage difference without conducting. In addition, the sixth transistor T6 is not turned on. Therefore, the inverting terminal of the integration unit 500 will not receive a voltage, and its switch SW is short-circuited. Accordingly, the integration unit 500 will not perform integration to read any signal.

第6圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。請一併參閱第2圖與第6圖,於補償期間P2,第二重置信號Reset2為高準位信號,第三電晶體T3根據第二重置信號Reset2而導通,以對第一電晶體T1之控制端G寫入重置電壓Vrst,以於第二端S形成第一電壓差(Vrst-Vth)。此外,控制信號EM依舊為高準位信號,第五電晶體T5根據控制信號EM而導通,以提供電源供應電壓VDD至第一端D。再者,其餘信號皆為低位準信號,因此,第二電晶體T2、第四電晶體T4及第六電晶體T6皆未被導通。於此期間,光電二極體PD可用以感測光源而於其陰極端N產生信號電壓,然而,由於第二電晶體T2與第四電晶體T4皆未被導通,因此,光電二極體PD之陰極端N會向接地端VSS放電。此外,第六電晶體T6未被導通,因此,積分單元500的反相端不會收到電壓,且其開關SW短路,據此,積分單元500不會進行積分以讀出任何信號。 FIG. 6 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention. Please refer to FIG. 2 and FIG. 6 together. During the compensation period P2, the second reset signal Reset2 is a high-level signal, and the third transistor T3 is turned on according to the second reset signal Reset2, so that the first transistor is turned on. The control terminal G of T1 writes a reset voltage V rst to form a first voltage difference (V rst -V th ) at the second terminal S. In addition, the control signal EM is still a high-level signal, and the fifth transistor T5 is turned on according to the control signal EM to provide a power supply voltage V DD to the first terminal D. Furthermore, the remaining signals are all low-level signals. Therefore, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 are not turned on. During this period, the photodiode PD can be used to sense the light source and generate a signal voltage at its cathode terminal N. However, since the second transistor T2 and the fourth transistor T4 are not turned on, the photodiode PD The cathode terminal N is discharged to the ground terminal V SS . In addition, the sixth transistor T6 is not turned on. Therefore, the inverting terminal of the integration unit 500 will not receive a voltage, and its switch SW is short-circuited. Accordingly, the integration unit 500 will not perform integration to read any signal.

第7圖係依照本發明第3圖所示之實施例繪示畫 素感測裝置的操作示意圖。請一併參閱第2圖與第7圖,於資料寫入期間P4,光電二極體PD感測光源以於其陰極端N產生信號電壓Vsig,傳遞信號TX為高位準信號,第四電晶體T4根據傳遞信號TX而導通,以將光電二極體PD之陰極端N的信號電壓Vsig傳遞至第一電晶體T1的控制端G,並透過第一電容C1耦合信號電壓Vsig至第二端S,以於第一電晶體T1的第二端S形成第一電壓差(Vrst-Vth)與第二電壓差(Vsig-Vrst)*a之電壓和((Vrst-Vth)+(Vsig-Vrst)*a)。再者,其餘信號皆為低位準信號,因此,第二電晶體T2、第三電晶體T3、第五電晶體T5、第六電晶體T6皆未被導通。此外,第六電晶體T6未被導通,因此,積分單元500的反相端不會收到電壓,且其開關SW短路,據此,積分單元500不會進行積分以讀出任何信號。 FIG. 7 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention. Please refer to FIG. 2 and FIG. 7 together. During the data writing period P4, the photodiode PD senses the light source to generate a signal voltage V sig at its cathode terminal N, and the transmission signal TX is a high level signal. The crystal T4 is turned on according to the transmission signal TX, so as to transmit the signal voltage V sig of the cathode terminal N of the photodiode PD to the control terminal G of the first transistor T1, and couple the signal voltage V sig to the first through the first capacitor C1. The two terminals S form a voltage sum of the first voltage difference (V rst -V th ) and the second voltage difference (V sig -V rst ) * a at the second terminal S of the first transistor T1 ((V rst- V th ) + (V sig -V rst ) * a). Furthermore, the remaining signals are all low-level signals. Therefore, the second transistor T2, the third transistor T3, the fifth transistor T5, and the sixth transistor T6 are not turned on. In addition, the sixth transistor T6 is not turned on. Therefore, the inverting terminal of the integration unit 500 will not receive a voltage, and its switch SW is short-circuited. Accordingly, the integration unit 500 will not perform integration to read any signal.

第8圖係依照本發明第3圖所示之實施例繪示畫素感測裝置的操作示意圖。請一併參閱第2圖與第8圖,於讀取期間P5,控制信號EM為高位準信號,第五電晶體T5根據控制信號EM而導通,以提供電源供應電壓VDD至第一電晶體T1的第一端D,此時,第一電晶體T1即可根據控制端G的電壓Vsig與第二端S的電壓和((Vrst-Vth)+(Vsig-Vrst)*a)以輸出電流IOUT,依據上述操作而產生之電流IOUT將與臨界電壓Vth無關。再者,讀取信號Select為高準位信號,第六電晶體T6根據讀取信號Select而導通,以讀取電流IOUT。上述第一電晶體T1第二端S之電壓和的參數a為第一電容C1之電容值與第一電容C1及第二電容C2之電容值和的比例,其關係式如下:

Figure TW201802783AD00005
FIG. 8 is a schematic diagram illustrating the operation of the pixel sensing device according to the embodiment shown in FIG. 3 of the present invention. Please refer to FIG. 2 and FIG. 8 together. During the reading period P5, the control signal EM is a high level signal, and the fifth transistor T5 is turned on according to the control signal EM to provide the power supply voltage V DD to the first transistor. The first terminal D of T1, at this time, the first transistor T1 can be based on the sum of the voltage V sig of the control terminal G and the voltage of the second terminal S ((V rst- V th ) + (V sig -V rst ) * a) With the output current I OUT , the current I OUT generated according to the above operation will be independent of the threshold voltage V th . Furthermore, the read signal Select is a high-level signal, and the sixth transistor T6 is turned on according to the read signal Select to read the current I OUT . The parameter a of the voltage sum of the second terminal S of the first transistor T1 is the ratio of the capacitance value of the first capacitor C1 to the sum of the capacitance values of the first capacitor C1 and the second capacitor C2, and the relationship is as follows:
Figure TW201802783AD00005

依據上述操作而產生之電流IOUT將與臨界電壓Vth無關,說明如後。 The current I OUT generated according to the above operation will have nothing to do with the threshold voltage V th , which will be described later.

首先,電晶體之電流公式如下:

Figure TW201802783AD00006
First, the current formula of the transistor is as follows:
Figure TW201802783AD00006

於讀取期間P5,第一電晶體T1之控制端G與第二端S之間的電壓VGS為Vsig-((Vrst-Vth)+(Vsig-Vrst)*a),將上述電壓VGS帶入公式1,得到第一電晶體T1之電流IOUT如下:

Figure TW201802783AD00007
During the reading period P5, the voltage V GS between the control terminal G and the second terminal S of the first transistor T1 is V sig -((V rst -V th ) + (V sig -V rst ) * a), Bringing the above voltage V GS into Equation 1, the current I OUT of the first transistor T1 is as follows:
Figure TW201802783AD00007

將上述公式2進行整理後,得到以下公式:

Figure TW201802783AD00008
After finishing the above formula 2, the following formula is obtained:
Figure TW201802783AD00008

由公式3可知,即使主動畫素感測器內採用之電晶體基於製程的影響或長時間操作後,而導致臨界電壓Vth不同,本案之畫素感測裝置的第六電晶體T6輸出之電流IOUT確實與第一電晶體T1的臨界電壓Vth無關,因此,得以有效改善先前技術中基於臨界電壓Vth不同而導致讀取到的電流有所誤差之問題。此外,其餘信號皆為低位準信號,因此,第二電晶體T2、第三電晶體T3、第四電晶體T4皆未被導通。於此期間,積分單元500之開關SW斷路,且由第六電晶體T6接收到電流IOUT並對其進行積分操作,以將相應於光電二極體PD感測到的光源強度之電流IOUT讀出到外部電路。此外,光電二極體PD於此時依然可用以感測光源而於其陰極端N產生信號電壓,然而,由於第二電晶體T2與第四電晶體T4皆未被導通,因此,光電二極體PD之陰極端N會向接地端VSS放電。 It can be known from Formula 3 that even if the transistor used in the main pixel sensor is affected by the process or after a long time operation, the threshold voltage V th is different. The sixth transistor T6 of the pixel sensor in this case outputs The current I OUT is indeed independent of the threshold voltage V th of the first transistor T1, and therefore, the problem of errors in the read current due to different threshold voltage V th in the prior art can be effectively improved. In addition, the remaining signals are all low-level signals. Therefore, the second transistor T2, the third transistor T3, and the fourth transistor T4 are not turned on. In the meantime, the integrating unit 500 the switch SW open circuit, and received by the sixth transistor T6 to the current I OUT and subjected to integral operation, corresponding to the photodiode PD measured current sensing light intensity I OUT Read to external circuit. In addition, the photodiode PD can still be used to sense the light source and generate a signal voltage at its cathode terminal N. However, since the second transistor T2 and the fourth transistor T4 are not turned on, the photodiode The cathode terminal N of the bulk PD is discharged to the ground terminal V SS .

第9圖係繪示依照本發明另一實施方式的一種控 制方法之流程圖。如圖所示,此控制方法900可用以控制如第1圖所示之畫素感測裝置,其包含以下步驟:步驟910:於初始期間,根據讀取信號以對第二端寫入參考電壓;步驟920:於初始期間,根據控制信號以對第一端寫入電源供應電壓;步驟930:於補償期間,根據第一重置信號以重置陰極端之電壓;步驟940:於補償期間根據第二重置信號以對控制端寫入重置電壓;步驟950:於積分期間,光電二極體曝光而於光電二極體之陰極端產生信號電壓;步驟960:於資料寫入期間,根據傳遞信號以將光電二極體之陰極端輸出的信號電壓傳遞至控制端,並透過電容耦合信號電壓至第二端;步驟970:於讀取期間,根據控制信號以提供電源供應電壓至第一端,其中電晶體於讀取期間根據其控制端與第二端之間的電壓以輸出電流;以及步驟980:於讀取期間,根據讀取信號以讀取電流。 FIG. 9 shows a control device according to another embodiment of the present invention. Process flow chart. As shown in the figure, the control method 900 can be used to control the pixel sensing device as shown in FIG. 1 and includes the following steps: Step 910: During the initial period, write a reference voltage to the second terminal according to the read signal Step 920: During the initial period, write the power supply voltage to the first terminal according to the control signal; Step 930: During the compensation period, reset the cathode terminal voltage according to the first reset signal; Step 940: According to the compensation period The second reset signal is used to write a reset voltage to the control terminal; step 950: during the integration period, the photodiode is exposed to generate a signal voltage at the cathode terminal of the photodiode; step 960: during the data writing, according to The signal is transmitted to transmit the signal voltage output from the cathode terminal of the photodiode to the control terminal, and the signal voltage is coupled to the second terminal through capacitance; step 970: during the reading period, a power supply voltage is provided to the first according to the control signal Terminal, wherein the transistor outputs current according to the voltage between its control terminal and the second terminal during the reading period; and step 980: during the reading period, the current is read according to the reading signal.

為使本發明實施例之控制方法900易於理解,請一併參閱第1圖、第2圖及第9圖。在步驟910中,於初始期間P1,藉由讀取單元150根據讀取信號Select以對電晶體T1之第二端S寫入參考電壓Vref。在步驟920中,於初始期間P1,藉 由控制單元140根據控制信號EM以對電晶體T1之第一端D寫入電源供應電壓VDD。在步驟930中,於補償期間P2,藉由第一重置單元110根據第一重置信號Reset1以重置光電二極體PD的陰極端N之電壓。在步驟940中,於補償期間P2,藉由第二重置單元120根據第二重置信號Reset2以對電晶體T1之控制端G寫入重置電壓Vrst,以使電晶體T1之第二端S漸趨於第一電壓差(Vrst-Vth)。在步驟950中,於積分期間P3,光電二極體PD曝光積分並於陰極端N產生信號電壓。在一實施例中,請參閱第2圖,補償期間P2與積分期間P3部分重疊。 In order to make the control method 900 of the embodiment of the present invention easy to understand, please refer to FIG. 1, FIG. 2, and FIG. 9 together. In step 910, in the initial period P1, the reading unit 150 writes the reference voltage Vref to the second terminal S of the transistor T1 according to the reading signal Select. In step 920, during the initial period P1, the control unit 140 writes the power supply voltage V DD to the first terminal D of the transistor T1 according to the control signal EM. In step 930, during the compensation period P2, the first reset unit 110 resets the voltage of the cathode terminal N of the photodiode PD according to the first reset signal Reset1. In step 940, during the compensation period P2, the second reset unit 120 writes a reset voltage V rst to the control terminal G of the transistor T1 according to the second reset signal Reset2 to make the second of the transistor T1 The terminal S gradually approaches the first voltage difference (V rst -V th ). In step 950, during the integration period P3, the photodiode PD exposes the integration and generates a signal voltage at the cathode terminal N. In an embodiment, referring to FIG. 2, the compensation period P2 and the integration period P3 partially overlap.

在步驟960中,於資料寫入期間P4,藉由傳遞單元130根據傳遞信號TX以將光電二極體PD之陰極端N輸出的信號電壓Vsig傳遞至控制端G,並透過電容C1耦合信號電壓Vsig至第二端S,以於第二端S形成第一電壓差(Vrst-Vth)與第二電壓差(Vsig-Vrst)*a之電壓和((Vrst-Vth)+(Vsig-Vrst)*a)。在步驟970中,於讀取期間P5,藉由控制單元140根據控制信號EM以提供電源供應電壓VDD至第一端D,此外,於讀取期間P5,電晶體T1根據控制端G的電壓Vsig與第二端S的電壓和((Vrst-Vth)+(Vsig-Vrst)*a)以輸出電流,依據上述操作而產生之電流將與臨界電壓Vth無關。於步驟980中,於讀取期間P5,藉由讀取單元150根據讀取信號Select以讀取電流。上述第一電晶體T1第二端S之電壓和的參數a為第一電容C1之電容值與第一電容C1及第二電容C2之電容值和的比例,其關係式如下:

Figure TW201802783AD00009
In step 960, during the data writing period P4, the transmission unit 130 transmits the signal voltage V sig output from the cathode terminal N of the photodiode PD to the control terminal G according to the transmission signal TX, and couples the signal through the capacitor C1. Voltage V sig to the second terminal S, so that the voltage sum of the first voltage difference (V rst -V th ) and the second voltage difference (V sig -V rst ) * a ((V rst- V th ) + (V sig -V rst ) * a). In step 970, during the reading period P5, the control unit 140 provides a power supply voltage V DD to the first terminal D according to the control signal EM. In addition, during the reading period P5, the transistor T1 is based on the voltage of the control terminal G. V sig and the voltage sum ((V rst -V th ) + (V sig -V rst ) * a) of the second terminal S are used to output current. The current generated according to the above operation will have nothing to do with the threshold voltage V th . In step 980, during the reading period P5, the reading unit 150 reads the current according to the reading signal Select. The parameter a of the voltage sum of the second terminal S of the first transistor T1 is the ratio of the capacitance value of the first capacitor C1 to the sum of the capacitance values of the first capacitor C1 and the second capacitor C2, and the relationship is as follows:
Figure TW201802783AD00009

依據上述操作而產生之電流IOUT將與臨界電壓Vth無關,說明如後。 The current I OUT generated according to the above operation will have nothing to do with the threshold voltage V th , which will be described later.

首先,電晶體之電流公式如下:

Figure TW201802783AD00010
First, the current formula of the transistor is as follows:
Figure TW201802783AD00010

於讀取期間P5,第一電晶體T1之控制端G與第二端S之間的電壓VGS為Vsig-((Vrst-Vth)+(Vsig-Vrst)*a),將上述電壓VGS帶入公式1,得到第一電晶體T1之電流IOUT如下:

Figure TW201802783AD00011
During the reading period P5, the voltage V GS between the control terminal G and the second terminal S of the first transistor T1 is V sig -((V rst -V th ) + (V sig -V rst ) * a), Bringing the above voltage V GS into Equation 1, the current I OUT of the first transistor T1 is as follows:
Figure TW201802783AD00011

將上述公式2進行整理後,得到以下公式:

Figure TW201802783AD00012
After finishing the above formula 2, the following formula is obtained:
Figure TW201802783AD00012

由公式3可知,即使控制方法900所控制之畫素感測裝置內採用之電晶體基於製程的影響或長時間操作後,而導致臨界電壓Vth不同,經由本案控制方法900對畫素感測裝置之控制,使得畫素感測裝置的第六電晶體T6輸出之電流IOUT確實與第一電晶體T1的臨界電壓Vth無關,因此,得以有效改善先前技術中基於臨界電壓Vth不同而導致讀取到的電流有所誤差之問題。 It can be known from Equation 3 that even if the transistor used in the pixel sensing device controlled by the control method 900 is based on the influence of the manufacturing process or after a long-term operation, the threshold voltage V th is different, and the pixel sensing is performed by the control method 900 of the present case. the control means, such that the output of the sixth transistor T6 pixel sensing device current I OUT is indeed independent of the threshold voltage V th of the first transistor T1 is, therefore, to improve on the prior art varies the threshold voltage V th Causes the problem that the read current has an error.

所屬技術領域中具有通常知識者當可明白,控制方法900中之各步驟依其執行之功能予以命名,僅係為了讓本案之技術更加明顯易懂,並非用以限定該等步驟。將各步驟予以整合成同一步驟或分拆成多個步驟,或者將任一步驟更換到另一步驟中執行,皆仍屬於本揭示內容之實施方式。 Those with ordinary knowledge in the technical field should understand that the steps in the control method 900 are named according to the functions performed by them, only to make the technology in this case more obvious and understandable, and not to limit these steps. Integrating each step into the same step or splitting it into multiple steps, or changing any step to another step for execution, still belongs to the embodiments of the present disclosure.

由上述本發明實施方式可知,應用本發明具有下列優點。本發明實施例藉由提供一種畫素感測裝置及控制方 法,藉以改善畫素感測裝置因其內電晶體的臨界電壓不同而導致讀取到的電流有所誤差之問題。 It can be known from the foregoing embodiments of the present invention that the application of the present invention has the following advantages. Embodiments of the present invention provide a pixel sensing device and a control method. This method can improve the pixel sensing device's error caused by the difference in the threshold voltage of the transistor.

雖然上文實施方式中揭露了本發明的具體實施例,然其並非用以限定本發明,本發明所屬技術領域中具有通常知識者,在不悖離本發明之原理與精神的情形下,當可對其進行各種更動與修飾,因此本發明之保護範圍當以附隨申請專利範圍所界定者為準。 Although the above embodiments disclose specific examples of the present invention, they are not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention pertains should not deviate from the principles and spirit of the present invention. Various changes and modifications can be made to it, so the scope of protection of the present invention shall be defined by the scope of the accompanying patent application.

110‧‧‧第一重置單元 110‧‧‧First reset unit

120‧‧‧第二重置單元 120‧‧‧Second reset unit

130‧‧‧傳遞單元 130‧‧‧ Delivery Unit

140‧‧‧控制單元 140‧‧‧control unit

150‧‧‧讀取單元 150‧‧‧reading unit

500‧‧‧積分單元 500‧‧‧point unit

C1~C3‧‧‧電容 C1 ~ C3‧‧‧Capacitor

D‧‧‧第一端 D‧‧‧ the first end

EM‧‧‧控制信號 EM‧‧‧Control signal

G‧‧‧控制端 G‧‧‧Control terminal

PD‧‧‧光電二極體 PD‧‧‧Photodiode

Reset1~Reset2‧‧‧重置信號 Reset1 ~ Reset2‧‧‧Reset signal

S‧‧‧第二端 S‧‧‧ the second end

Select‧‧‧讀取信號 Select‧‧‧Read signal

SW‧‧‧開關 SW‧‧‧Switch

T1‧‧‧電晶體 T1‧‧‧Transistor

TX‧‧‧傳遞信號 TX‧‧‧ pass signal

VDD‧‧‧電源供應電壓 V DD ‧‧‧ Power supply voltage

Vref‧‧‧參考電壓 V ref ‧‧‧ Reference voltage

Vrst‧‧‧重置電壓 V rst ‧‧‧ reset voltage

N‧‧‧陰極端 N‧‧‧ cathode terminal

Vss‧‧‧電壓 V ss ‧‧‧ Voltage

IOUT‧‧‧電流 I OUT ‧‧‧ Current

Claims (13)

一種畫素感測裝置,包含:一第一電晶體,包含一第一端、一控制端及一第二端,用以輸出一電流;一第一電容,耦接於該第一電晶體之該控制端與該第二端之間;一光電二極體,包含一陽極端及一陰極端,用以感測一光源以輸出一信號電壓;一第一重置單元,耦接於該光電二極體之該陰極端,用以根據一第一重置信號以重置該陰極端之電壓;一第二重置單元,耦接於該第一電晶體之該控制端,用以根據一第二重置信號以對該控制端輸出一重置電壓;一傳遞單元,耦接於該陰極端與該控制端之間,用以根據一傳遞信號以將該陰極端之該信號電壓傳遞至該控制端,並透過該第一電容耦合該信號電壓至該第二端;一控制單元,耦接於該第一電晶體之該第一端,用以根據一控制信號以提供一電源供應電壓至該第一端;一讀取單元,耦接於該第一電晶體之該第二端,用以根據一讀取信號以讀取該電流;以及一第二電容,耦接於該控制單元與該讀取單元之間。 A pixel sensing device includes: a first transistor including a first terminal, a control terminal, and a second terminal for outputting a current; a first capacitor coupled to the first transistor Between the control terminal and the second terminal; a photodiode including an anode terminal and a cathode terminal for sensing a light source to output a signal voltage; a first reset unit coupled to the photoelectric diode The cathode terminal of the electrode body is used to reset the voltage of the cathode terminal according to a first reset signal; a second reset unit is coupled to the control terminal of the first transistor, and is used according to a first Two reset signals to output a reset voltage to the control terminal; a transmission unit coupled between the cathode terminal and the control terminal, and configured to transmit the signal voltage of the cathode terminal to the cathode terminal according to a transmission signal; A control terminal, and coupling the signal voltage to the second terminal through the first capacitor; a control unit coupled to the first terminal of the first transistor to provide a power supply voltage to the control circuit according to a control signal; The first terminal; a reading unit, coupled to the first transistor A second terminal for reading, a current in accordance with a read signal; and a second capacitor coupled between the control unit and the reading unit. 如請求項1所述之畫素感測裝置,其中該控制單元根據該控制信號以對該第一端寫入該電源供應電壓,且該讀取單元根據該讀取信號對該第二端寫入一參考電壓。 The pixel sensing device according to claim 1, wherein the control unit writes the power supply voltage to the first terminal according to the control signal, and the reading unit writes to the second terminal according to the read signal. Enter a reference voltage. 如請求項1所述之畫素感測裝置,其中該第一重置單元包含:一第二電晶體,包含:一第一端,用以接收該電源供應電壓;一控制端,用以接收該第一重置信號;以及一第二端,耦接於該陰極端。 The pixel sensing device according to claim 1, wherein the first reset unit includes: a second transistor including: a first terminal for receiving the power supply voltage; a control terminal for receiving The first reset signal; and a second terminal coupled to the cathode terminal. 如請求項1所述之畫素感測裝置,其中該第二重置單元包含:一第三電晶體,包含:一第一端,用以接收該重置電壓;一控制端,用以接收該第二重置信號;以及一第二端,耦接於該第一電晶體之該控制端。 The pixel sensing device according to claim 1, wherein the second reset unit includes: a third transistor including: a first terminal for receiving the reset voltage; a control terminal for receiving The second reset signal; and a second terminal coupled to the control terminal of the first transistor. 如請求項1所述之畫素感測裝置,其中該傳遞單元包含:一第四電晶體,包含:一第一端,耦接於該陰極端;一控制端,用以接收該傳遞信號;以及一第二端,耦接於該第一電晶體之該控制端。 The pixel sensing device according to claim 1, wherein the transmission unit includes: a fourth transistor including: a first terminal coupled to the cathode terminal; a control terminal for receiving the transmission signal; And a second terminal, which is coupled to the control terminal of the first transistor. 如請求項1所述之畫素感測裝置,其中該控制單元包含: 一第五電晶體,包含:一第一端,用以接收該電源供應電壓;一控制端,用以接收該控制信號;以及一第二端,耦接於該第一電晶體之該第一端。 The pixel sensing device according to claim 1, wherein the control unit includes: A fifth transistor includes: a first terminal for receiving the power supply voltage; a control terminal for receiving the control signal; and a second terminal coupled to the first transistor of the first transistor end. 如請求項1所述之畫素感測裝置,其中該讀取單元包含:一第六電晶體,包含:一第一端,耦接於該第一電晶體之該第二端;一控制端,用以接收該讀取信號;以及一第二端。 The pixel sensing device according to claim 1, wherein the reading unit includes: a sixth transistor including: a first terminal coupled to the second terminal of the first transistor; a control terminal For receiving the read signal; and a second terminal. 一種控制方法,用以控制一畫素感測裝置,其中該畫素感測裝置包含一電晶體、一電容及一光電二極體,該電晶體包含一第一端、一控制端及一第二端,該光電二極體包含一陽極端及一陰極端,其中該電容耦接於該控制端與該第二端之間,其中該控制方法包含:於一補償期間,根據一第一重置信號以重置該陰極端之電壓;於該補償期間根據一第二重置信號以對該控制端寫入一重置電壓;於一資料寫入期間,根據一傳遞信號以將該光電二極體之該陰極端輸出的一信號電壓傳遞至該控制端,並透過該電容耦合該信號電壓至該第二端; 於一讀取期間,根據一控制信號以提供一電源供應電壓至該第一端,其中該電晶體於該讀取期間根據該控制端與該第二端之間的電壓以輸出一電流;以及於該讀取期間,根據一讀取信號以讀取該電流。 A control method for controlling a pixel sensing device, wherein the pixel sensing device includes a transistor, a capacitor, and a photodiode, and the transistor includes a first terminal, a control terminal, and a first terminal. Two terminals, the photoelectric diode includes an anode terminal and a cathode terminal, wherein the capacitor is coupled between the control terminal and the second terminal, wherein the control method includes: during a compensation period, according to a first reset Signal to reset the voltage at the cathode terminal; to write a reset voltage to the control terminal according to a second reset signal during the compensation period; during a data write period, to transfer the photodiode according to a signal A signal voltage output from the cathode terminal of the body is transmitted to the control terminal, and the signal voltage is coupled to the second terminal through the capacitor; Providing a power supply voltage to the first terminal according to a control signal during a reading period, wherein the transistor outputs a current according to a voltage between the control terminal and the second terminal during the reading period; and During the read period, the current is read according to a read signal. 如請求項8所述之控制方法,更包含:於該補償期間前之一初始期間,根據該控制信號以對該第一端寫入該電源供應電壓。 The control method according to claim 8, further comprising: writing the power supply voltage to the first terminal according to the control signal in an initial period before the compensation period. 如請求項8所述之控制方法,更包含:於該初始期間,根據該讀取信號以對該第二端寫入一參考電壓。 The control method according to claim 8, further comprising: during the initial period, writing a reference voltage to the second terminal according to the read signal. 如請求項8所述之控制方法,其中於該補償期間根據該第二重置信號以對該控制端寫入該重置電壓的步驟,包含:於該補償期間提供該重置電壓至該控制端,以於該第二端形成一第一電壓差,其中該第一電壓差為該重置電壓與一臨界電壓之電壓差。 The control method according to claim 8, wherein the step of writing the reset voltage to the control terminal according to the second reset signal during the compensation period includes: providing the reset voltage to the control during the compensation period Terminal, so that a first voltage difference is formed at the second terminal, wherein the first voltage difference is a voltage difference between the reset voltage and a threshold voltage. 如請求項11所述之控制方法,其中於該資料寫入期間,根據該傳遞信號以將該光電二極體之該陰極端輸出的該信號電壓傳遞至該控制端,並透過該電容耦合該信號電壓至該第二端的步驟,包含: 於該資料寫入期間透過該第一電容耦合該信號電壓至該第二端,以於該第二端形成該第一電壓差與一第二電壓差之一電壓和,該第二電壓差為該信號電壓與該重置電壓之電壓差。 The control method according to claim 11, wherein during the data writing period, the signal voltage output from the cathode terminal of the photodiode is transmitted to the control terminal according to the transmission signal, and the capacitor is coupled through the capacitor. The step of signal voltage to the second terminal includes: During the data writing period, the signal voltage is coupled to the second terminal through the first capacitor to form a voltage sum of the first voltage difference and a second voltage difference at the second terminal. The second voltage difference is The voltage difference between the signal voltage and the reset voltage. 如請求項12所述之控制方法,其中該電晶體於該讀取期間根據該控制端與該第二端之間的電壓以輸出該電流的步驟,包含:該第一電晶體於該讀取期間根據該電壓和以輸出該電流。 The control method according to claim 12, wherein the step of outputting the current according to the voltage between the control terminal and the second terminal during the reading period comprises: the first transistor in the reading period The period is based on the voltage sum to output the current.
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