TW201713026A - A flyback power converter - Google Patents

Abstract

A flyback power converter is provided, which includes a transformer, a capacitor, a voltage regulator circuit, a control circuit, two switches and two diodes. A terminal of a primary coil of the transformer is coupled to a terminal of the capacitor, a terminal of the voltage regulator circuit and a DC power. The other terminal of the primary coil is coupled to the other terminals of the capacitor and the voltage regulator circuit through one of the switches, and is coupled to a reference voltage through the other one of the switches. The anode and the cathode of one of the diodes are coupled to the reference voltage and the other terminal of the primary coil, respectively. The anode and the cathode of the other one of the diodes are coupled to the other terminals of the primary coil and the capacitor, respectively. The two switches receive two PWM signals outputted from the control circuit, respectively. The voltage regulator circuit provides a discharge path when a voltage across the capacitor is greater than a predetermined voltage.

Description

Flyback power converter

The present invention relates to a power conversion technique, and more particularly to a flyback power converter.

In the conventional technology, the flyback power converter with active clamping function can provide high conversion efficiency under heavy load and full load, but when the flyback power converter operates at light load and half load In the case of the conversion efficiency will be significantly reduced.

Therefore, the development of a flyback power converter that can provide high conversion efficiency regardless of the above load conditions is an objective pursued by various power converter designers or manufacturers.

The invention provides a flyback power converter comprising a transformer, a first capacitor, a voltage stabilizing circuit, a first switch, a first diode, a second switch, a second diode and a control circuit. The transformer has a primary side coil having a first end and a second end, and the first end is coupled to a DC power source. The first capacitor has a third end and a fourth end, and the third end is coupled to the DC power source. The voltage stabilizing circuit has a fifth end and a sixth end, and the fifth end is coupled to the third end, and the sixth end is coupled to the fourth end. When the voltage of the sixth terminal is greater than the voltage of the fifth terminal by a predetermined voltage, the voltage stabilizing circuit provides a drain path from the sixth end to the fifth end. path. The first switch has a seventh end, an eighth end and a first control end, and the seventh end is coupled to the second end, the eighth end is coupled to the reference potential, and the first control end is configured to receive the first pulse width modulation signal . The anode of the first diode is coupled to the reference potential, and the cathode of the first diode is coupled to the second end. The second switch has a ninth end, a tenth end and a second control end, and the ninth end is coupled to the fourth end, the tenth end is coupled to the second end, and the second control end is configured to receive the second pulse width modulation Signal. The anode of the second diode is coupled to the second end, and the cathode of the second diode is coupled to the fourth end. The control circuit is configured to provide the first pulse width modulation signal and the second pulse width modulation signal.

The voltage stabilizing circuit in the above embodiment includes a Zener diode and a third diode. The anode of the Zener diode is coupled to the third end, and the breakdown voltage of the Zener diode is used as a preset voltage. The anode of the third diode is coupled to the fourth end, and the cathode of the third diode is coupled to the cathode of the diode.

The voltage stabilizing circuit in the above embodiment includes a third diode and an arrester diode. The cathode of the third diode is coupled to the third end. The cathode of the Zener diode is coupled to the fourth end. The anode of the Zener diode is coupled to the anode of the third diode, and the breakdown voltage of the Zener diode is used as a preset voltage.

The invention further provides a flyback power converter comprising a transformer, a first capacitor, a voltage stabilizing circuit, a first switch, a first diode, a second switch, a second diode, and a control circuit. The transformer has a primary side coil having a first end and a second end, and the first end is coupled to a DC power source. The first capacitor has a third end and a fourth end, and the third end is coupled to the DC power source. The voltage stabilizing circuit has a fifth end and a sixth end, and the fifth end is coupled to the first end, and the sixth end is coupled to the second end. When the voltage of the sixth terminal is greater than the voltage of the fifth terminal by a predetermined voltage, the voltage stabilizing circuit provides a drain path from the sixth end to the fifth end. The first switch has a seventh end, an eighth end and a first control end, and the seventh end is coupled to the second end, the eighth end is coupled to the reference potential, and the first control end is configured to receive the first pulse width modulation signal . The anode of the first diode is coupled to the reference potential, and the cathode of the first diode is coupled to the second end. The second switch has a ninth end, a tenth end, and a The second control end is coupled to the fourth end, the tenth end is coupled to the second end, and the second control end is configured to receive the second pulse width modulation signal. The anode of the second diode is coupled to the second end, and the cathode of the second diode is coupled to the fourth end. The control circuit is configured to provide the first pulse width modulation signal and the second pulse width modulation signal.

The voltage stabilizing circuit in the above embodiment includes a Zener diode and a third diode. The anode of the Zener diode is coupled to the first end, and the breakdown voltage of the Zener diode is used as a preset voltage. The anode of the third diode is coupled to the second end, and the cathode of the third diode is coupled to the cathode of the diode.

The voltage stabilizing circuit in the above embodiment includes a third diode and an arrester diode. The cathode of the third diode is coupled to the first end. The cathode of the Zener diode is coupled to the second end, the anode of the Zener diode is coupled to the anode of the third diode, and the breakdown voltage of the second diode is used as a preset voltage.

The present invention solves the above problems by constructing a flyback power converter by the above components, and adjusting the first pulse width modulation signal and the first power converter according to different load states. The duty cycle of the two-pulse wide-tuning signal is to control the conduction state of the first switch and the second switch, so that the fly-back power converter operating under heavy load or full load can be operated by using the capacitor High conversion efficiency, and the flyback power converter operating under other load conditions can be operated with its voltage regulator circuit to achieve high conversion efficiency. Therefore, the flyback power converter of the present invention can provide high conversion efficiency regardless of the load state under which it operates.

100, 200, 300, 400‧‧‧return power converter

10‧‧‧Transformers

11‧‧‧One-side coil

12‧‧‧second side coil

20‧‧‧ Voltage regulator circuit

21‧‧‧Jenner diode

22, 41, 51, 80‧‧‧ diodes

30, 90‧‧‧ capacitor

40, 50‧‧‧ switch

60‧‧‧Control circuit

GND‧‧‧ Ground potential

S1, S2‧‧‧ pulse width modulation signal

VDD‧‧‧DC power supply

Vo‧‧‧ output voltage

T‧‧‧Predetermined length of time

T1~t6‧‧‧time

Figure 1 is a schematic view of a first embodiment of the present invention.

FIG. 2A illustrates the signal timing of the pulse width modulation signals S1 and S2 of the flyback power converter in the first load state.

FIG. 2B illustrates the signal timing of the pulse width modulation signals S1 and S2 of the flyback power converter in the second load state.

Figure 3 is a schematic view of a second embodiment of the present invention.

Figure 4 is a schematic view of a third embodiment of the present invention.

Figure 5 is a schematic view of a fourth embodiment of the present invention.

Figure 1 is a schematic view showing a first embodiment of the present invention. The flyback power converter 100 includes a transformer 10, a voltage stabilizing circuit 20, a capacitor 30, a switch 40, a diode 41, a switch 50, a diode 51, and a control circuit 60.

The transformer 10 has a primary side coil 11 and a secondary side coil 12, and the primary side coil 11 and the secondary side coil 12 have opposite polarities (the end points of the dots indicate the same polarity). One end of the primary side coil 11 is coupled to the DC power source VDD, one end of the capacitor 30, and one end of the voltage stabilizing circuit 20. The other end of the switch 50 is coupled to the other end of the voltage regulator circuit 20, the second end of the switch 50 is coupled to the other end of the primary side coil 11, and the control end of the switch 50 is coupled to the control circuit 60. To receive the pulse width modulation signal S2 provided by the control circuit 60. The anode of the diode 51 is coupled to the other end of the primary side coil 11, and the cathode of the diode 51 is coupled to the other end of the voltage stabilizing circuit 20. The first end of the switch 40 is coupled to the other end of the primary side coil 11. The second end of the switch 40 is coupled to the reference potential (the reference potential in the figure is represented by the ground potential GND), and the control end of the switch 40 is coupled to the control circuit 60. To receive the pulse width modulation signal S1 provided by the control circuit 60. The anode of the diode 41 is coupled to the ground potential GND, and the cathode of the diode 41 is coupled to the other end of the primary side coil 11.

The anode of the diode 80 is coupled to one end of the secondary side coil 12, and the cathode of the diode 80 is used as an output of the flyback power converter 100 to provide an output voltage Vo to the load (not shown) ). Secondary side coil 12 The other end is coupled to the ground potential GND. One end of the capacitor 90 is coupled to the cathode of the diode 80, and the other end of the capacitor 90 is also coupled to the ground potential GND.

The voltage stabilizing circuit 20 is configured to provide a drain path between the two ends when the voltage across the capacitor 30 is greater than a predetermined voltage. In this example, the voltage stabilizing circuit 20 includes a Zener diode 21 and a diode 22. The anode of the Zener diode 21 is coupled to the DC power source VDD, and the breakdown voltage of the Zener diode 21 is used as the preset voltage. The anode of the diode 22 is coupled to the first end of the switch 50, and the cathode of the diode 22 is coupled to the cathode of the diode 21. In addition, the switches 50, 40 and the diodes 51, 41 can be implemented by using two NMOS transistors. The two sources/drains of the NMOS transistor are used as the first end and the second end of the switches 50, 40, the gate of the NMOS transistor is used as the control end of the switches 50, 40, and the body of the NMOS transistor is A body diode is used as the diodes 51, 41.

In addition, in this example, the control circuit 60 can determine the flyback power supply according to the detection result output by the corresponding load current detecting device (not shown, which should be connected to the load of the flyback power converter 100). The converter 100 operates in a first load state or a second load state (described later) and adjusts the duty cycle of the pulse width modulation signals S1 and S2 accordingly. In this example, the power load of the second load state is higher than the power load of the first load state.

When the control circuit 60 determines that the flyback power converter 100 is operating in the first load state according to the detection result output by the corresponding load current detecting device, the control circuit 60 will assume the responsibility of the pulse width modulation signal S2. The period is adjusted to 0%, and the duty cycle of the pulse width modulation signal S1 is adjusted to the first duty cycle, as shown in FIG. 2A. In Fig. 2A, T represents a preset time length.

Please refer to FIG. 1 and FIG. 2A at the same time. In the period t1, the switch 40 is in an on state and the switch 50 is in a off state. At this time, a current flows from the DC power source VDD through the primary side coil 11 and the switch 40 to the ground potential. GND causes the primary side coil 11 and the primary side leakage inductance (not shown) to start energy storage. Then, in the period t2, the switches 40 and 50 are all in a closed state, so the leakage inductance on the primary side begins to release energy, and the energy thereof passes through the diode 51 to charge the capacitor 30, so that the voltage across the capacitor 30 is continuously increased. After the breakdown voltage of the sinus diode 21 is reached, the sinus diode 21 is short-circuited. At this time, the voltage stabilizing circuit 20 can provide a drain path.

On the other hand, when the control circuit 60 determines that the flyback power converter 100 is operating in the second load state according to the detection result output by the corresponding load current detecting device, the control circuit 60 modulates the pulse width. The duty cycle of the signal S2 is adjusted to the second duty cycle, and the duty cycle of the pulse width modulation signal S1 is adjusted to the third duty cycle. The third duty cycle is greater than the first duty cycle, and the pulse enable periods of the pulse width modulation signals S1 and S2 do not overlap each other, as shown in FIG. 2B. In Fig. 2B, T also represents a preset time length.

Please refer to FIG. 1 and FIG. 2B at the same time. In the period t3, the switch 40 is in an on state and the switch 50 is in a off state. At this time, a current flows from the DC power source VDD through the primary side coil 11 and the switch 40 to the ground potential GND, so that the primary side coil 11 and the primary side The leakage inductance on the side begins to store energy. Then, in the period t4, the switches 40 and 50 are both in a closed state, so the leakage inductance on the primary side starts to release energy, and the energy thereof passes through the diode 51 to charge the capacitor 30. Next, in the period t5, the switch 40 assumes the off state and the switch 50 assumes the on state, so the leakage inductance on the primary side can still charge the capacitor 30 through the switch 50. Since the switch 50 is in an on state during the period t5, the capacitor 30 can also release energy to the primary side coil 11 through the switch 50, so that the voltage across the capacitor 30 does not continuously rise to reach the sigma diode 21 The breakdown voltage. Next, in the period t6, the switches 40 and 50 are both turned off, so that a current flows from the ground potential GND through the diode 41 and the primary side coil 11 to the DC power supply VDD.

As apparent from the above, the flyback power converter 100 of the present invention can provide high conversion efficiency regardless of the load state.

In addition, it is known to those skilled in the art that the switches 50, 40 and the diodes 51, 41 can also be implemented using two PMOS transistors having body diodes. Of course, the control circuit 60 must also modify the signal timing of the pulse width modulation signals S1 and S2.

In addition, although in the above embodiment, the diode 80 may be coupled between one end of the secondary side coil 12 and one end of the capacitor 90, it will be understood by those skilled in the art that even the diode 80 is The cathode is coupled to the other end of the secondary side coil 12, and the anode of the diode 80 is coupled to the ground potential GND, and the present invention can also be implemented. In addition, the capacitor 90 can be determined according to the design requirements.

The flyback power converter of the present invention also has other implementations, which are illustrated by FIGS. 3 to 5. In FIG. 3, the same reference numerals as those in FIG. 1 indicate the same object or signal. Comparing FIG. 3 with FIG. 1, it can be seen that the voltage regulator circuit 20 reverses the up-and-down diode 21 and the diode 22 up and down. In addition, the signal timing of the pulse width modulation signals S1 and S2 does not need to be changed.

In FIG. 4, the same reference numerals as those in FIG. 1 indicate the same object or signal. Comparing Fig. 4 with Fig. 1, it can be seen that the voltage stabilizing circuit 20 is instead connected in parallel with the primary side coil 11. In addition, the signal timing of the pulse width modulation signals S1 and S2 does not need to be changed.

In FIG. 5, the same reference numerals as those in FIG. 4 indicate the same object or signal. Comparing FIG. 5 with FIG. 4, it can be seen that the voltage regulator circuit 20 reverses the up-and-down diode 21 and the diode 22 up and down. In addition, the signal timing of the pulse width modulation signals S1 and S2 does not need to be changed.

The present invention solves the above problems by constructing a flyback power converter by the above components, and adjusting the first pulse width modulation signal and the first power converter according to different load states. Two-pulse width The duty cycle of the variable signal controls the conduction state of the first switch and the second switch, so that the flyback power converter operating under heavy load or full load can operate with the capacitor to achieve high conversion efficiency. It also allows the flyback power converter operating under other load conditions to operate with its voltage regulator circuit and achieve high conversion efficiency. Therefore, the flyback power converter of the present invention can provide high conversion efficiency regardless of the load state under which it operates.

While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

100‧‧‧Return-type power converter

10‧‧‧Transformers

11‧‧‧One-side coil

12‧‧‧second side coil

20‧‧‧ Voltage regulator circuit

21‧‧‧Jenner diode

22, 41, 51, 80‧‧‧ diodes

30, 90‧‧‧ capacitor

40, 50‧‧‧ switch

60‧‧‧Control circuit

GND‧‧‧ Ground potential

S1, S2‧‧‧ pulse width modulation signal

VDD‧‧‧DC power supply

Vo‧‧‧ output voltage

Claims (10)

A flyback power converter, comprising: a transformer having a primary side coil, the primary side coil having a first end and a second end, and the first end coupled to the DC power supply; The capacitor has a third end and a fourth end, the third end is coupled to the DC power supply; a voltage stabilizing circuit has a fifth end and a sixth end, the fifth end is coupled to the third end, The sixth end is coupled to the fourth end. When the voltage of the sixth end is greater than the voltage of the fifth end by a predetermined voltage, the voltage stabilizing circuit provides a drain path from the sixth end to the fifth end. a first switch having a seventh end, an eighth end and a first control end, the seventh end being coupled to the second end, the eighth end coupled to a reference potential, and the first control end For receiving a first pulse width modulation signal; a first diode, the anode of the first diode is coupled to the reference potential, and the cathode of the first diode is coupled to the second end; The second switch has a ninth end, a tenth end and a second control end, the ninth end is coupled to the fourth end, and the tenth end is coupled to the a second terminal, wherein the second control terminal is configured to receive a second pulse width modulation signal; a second diode body, the anode of the second diode body is coupled to the second end, the second diode body The cathode is coupled to the fourth end; and a control circuit is configured to provide the first pulse width modulation signal and the second pulse width modulation signal. The flyback power converter of claim 1, wherein the second pulse width modulation signal output by the control circuit when the flyback power converter is operated in a first load state The duty cycle is 0%, and the duty cycle of the first pulse width modulation signal output by the control circuit is a first duty cycle; and when the flyback power converter operates in a second load state, The duty cycle of the second pulse width modulation signal outputted by the control circuit is a second duty cycle, and the duty cycle of the first pulse width modulation signal output by the control circuit is a third duty cycle, wherein the The third duty cycle is greater than the first duty cycle, and the pulse enable period of the first pulse width modulation signal and the second pulse width modulation signal do not overlap each other, wherein the first load state includes one a light load state, or including the light load state and a half load state, and the second load state includes the light load state, the half load state, a heavy load state, and a set of a full load state different from the first load state . The flyback power converter of claim 2, wherein the control circuit determines that the flyback power converter operates according to a detection result of one of the load current detecting devices. The first load state or the second load state, and the duty cycle of the first pulse width modulation signal and the second pulse width modulation signal are adjusted accordingly. The flyback power converter of claim 3, wherein the voltage stabilizing circuit comprises: a register diode, the anode of the sina diode is coupled to the third end, and the sigma a breakdown voltage of the diode is used as the preset voltage; and a third diode, the anode of the third diode is coupled to the fourth end, The cathode of the third diode is coupled to the cathode of the arrester diode. The flyback power converter of claim 3, wherein the voltage regulator circuit comprises: a third diode, the cathode of the third diode is coupled to the third end; a diode, a cathode of the second diode is coupled to the fourth end, an anode of the second diode is coupled to an anode of the third diode, and a breakdown voltage of the second diode is used As the preset voltage. A flyback power converter, comprising: a transformer having a primary side coil, the primary side coil having a first end and a second end, and the first end coupled to the DC power supply; The capacitor has a third end and a fourth end, the third end is coupled to the DC power supply; a voltage stabilizing circuit having a fifth end and a sixth end, the fifth end being coupled to the first end, The sixth end is coupled to the second end. When the voltage of the sixth end is greater than the voltage of the fifth end by a predetermined voltage, the voltage stabilizing circuit provides a drain path from the sixth end to the fifth end. a first switch having a seventh end, an eighth end and a first control end, the seventh end being coupled to the second end, the eighth end coupled to a reference potential, and the first control end For receiving a first pulse width modulation signal; a first diode, the anode of the first diode is coupled to the reference potential, and the cathode of the first diode is coupled to the second end; The second switch has a ninth end, a tenth end and a second control end, The ninth end is coupled to the fourth end, the tenth end is coupled to the second end, and the second control end is configured to receive a second pulse width modulation signal; a second diode, the second An anode of the diode is coupled to the second end, a cathode of the second diode is coupled to the fourth end, and a control circuit is configured to provide the first pulse width modulation signal and the second pulse width adjustment Change signal. The flyback power converter of claim 6, wherein the second pulse width modulation signal output by the control circuit when the flyback power converter is operated in a first load state The duty cycle is 0%, and the duty cycle of the first pulse width modulation signal output by the control circuit is a first duty cycle; and when the flyback power converter operates in a second load state, The duty cycle of the second pulse width modulation signal outputted by the control circuit is a second duty cycle, and the duty cycle of the first pulse width modulation signal output by the control circuit is a third duty cycle, wherein the The third duty cycle is greater than the first duty cycle, and the pulse enable period of the first pulse width modulation signal and the second pulse width modulation signal do not overlap each other, wherein the first load state includes one a light load state, or including the light load state and a half load state, and the second load state includes the light load state, the half load state, a heavy load state, and a set of a full load state different from the first load state . The flyback power converter of claim 7, wherein the control circuit determines that the flyback power converter operates according to a detection result of a corresponding one of the load current detecting devices. The first load state or the second load state, and the duty cycle of the first pulse width modulation signal and the second pulse width modulation signal are adjusted accordingly. For example, the flyback power converter described in claim 8 Wherein the voltage stabilizing circuit comprises: a register diode, an anode of the arrester diode is coupled to the first end, and a breakdown voltage of the arrester diode is used as the preset voltage; The anode of the third diode is coupled to the second end, and the cathode of the third diode is coupled to the cathode of the Zener diode. The flyback power converter of claim 8, wherein the voltage regulator circuit comprises: a third diode, the cathode of the third diode is coupled to the first end; a cathode of the second diode, the anode of the second diode is coupled to the anode of the third diode, and the breakdown voltage of the second diode is used As the preset voltage.