TW201701104A - Apparatus and method of dynamic clock adjustment - Google Patents

Abstract

According to one embodiment, a dynamic clock adjustment device, used in a real time computing system, the device comprising: a profiling timer, detects a task time of real time computing system performing a task, and computes a time difference between the task time and a real time periodic; a controller receives the time difference, and generates a control signal in accordance with the time difference and a reference time; and a clock generator receives the control signal to generate the adjusted system clock and provides to the real time computing systems.

Description

Dynamic clock adjustment device and method

The present disclosure is directed to an apparatus and method for dynamic clock adjustment.

The existing digital real-time computing system needs a clock driver to perform data calculation or processing. If the clock is faster, of course, the faster the processing can be completed, but not every situation requires the highest speed working clock, and the higher the speed, the more power the clock may consume. . Ideally, it is the most economical way to settle the calculations in time and reserve a little bit of time remaining.

Generally, the real-time computing system adjusts the clock by a preset condition. For example, the controller generates a clock by adjusting the system clock generator (CLOCK GENERATOR) to a preset value for the task of the task. This method is a way of open circuit control and cannot be used to dynamically save power.

Another way to adjust the clock is to use the information in the Operating System (OS) to adjust the system clock. A computing system with an operating system whose operating system gets a CPU load (CPU LOADING) value, so it is for the CPU The LOADING value is used to adjust the CPU clock. Although this method can dynamically adjust the clock, it cannot guarantee its timeliness.

These methods do not meet the need for real-time computing systems to dynamically adjust clocks in a timely manner. The present disclosure proposes a technique for dynamic clock adjustment, which dynamically adjusts the system clock in a timely manner via the obtained information and closed loop control.

The disclosed embodiment relates to a dynamic clock adjustment device, which is applied to an instant computing system, the device includes: a research timer, detecting a task time of the real-time computing system executing a task, and calculating the task time a time difference from an immediate system cycle; a controller receiving the time difference and generating a control signal based on the time difference and a reference time; and a clock generator receiving the control signal to generate an adjusted system clock to provide Give this instant computing system.

Another embodiment disclosed is directed to a dynamic clock adjustment method for an instant computing system, the method comprising: detecting a task time of the instant computing system executing a task; calculating the task time and an immediate system cycle a time difference; using a controller to generate a control signal based on the time difference and a reference time; and using a clock generator to receive the control signal to generate an adjusted system clock for providing to the instant computing system.

100‧‧‧ Dynamic clock adjustment device

110‧‧‧Study timer

111‧‧‧ Mission time

112‧‧‧Instant system cycle

113‧‧‧ time difference

120‧‧‧ Controller

121‧‧‧Reference time

122‧‧‧Control signal

130‧‧‧clock generator

131‧‧‧System clock

510‧‧‧Detecting a mission time for an instant computing system to perform a task

520‧‧‧ Calculate the time difference between the task time and an immediate system cycle

530‧‧‧ Using a controller to generate a control signal based on the time difference and a reference time

540‧‧‧ Use a clock generator to receive this control signal to generate an adjusted system clock for immediate computing

1 is a schematic diagram consistent with an embodiment of the disclosure, illustrating a dynamic clock adjustment device.

2 is a schematic diagram consistent with an embodiment of the disclosure, illustrating the decision timer in the first diagram.

3 is a schematic diagram consistent with an embodiment of the disclosure, illustrating the controller generating a control signal.

4 is a schematic diagram consistent with an embodiment of the disclosure, illustrating that the clock generator receives the control signal to generate a system clock.

FIG. 5 is a schematic diagram consistent with an embodiment of the disclosure, illustrating a method of dynamic clock adjustment.

Hereinafter, embodiments according to the present invention will be described in detail with reference to the accompanying drawings, which are readily understood by those skilled in the art. The authoring of the invention may take a variety of variations, and should not be limited to only those embodiments. The description of the well-known part is omitted in the present invention, and the same reference numerals denote the same elements in the present invention.

The present disclosure proposes a technique for dynamic clock adjustment to dynamically adjust the system clock in time to improve the computational efficiency of the instant computing system. 1 is a schematic diagram consistent with an embodiment of the disclosure, illustrating a dynamic clock adjustment device. As shown in FIG. 1, the device 100 includes a test timer 110, a controller 120, and a clock generator 130. The judging timer 110 detects a task time 111 in which the real-time computing system executes a task, and calculates a time difference 113 between the task time and an immediate system period 112; the controller 120 receives the time difference 113, and according to the time difference 113 and a reference time 121 generates a control signal 122; the clock generator 130 receives the control signal 122 to generate an adjusted system clock 131 for provision to an instant computing system.

According to an embodiment of the apparatus for dynamic clock adjustment in FIG. 1, the decision timer 110 detects a task time 111 in which the instant computing system executes a task, and calculates a time difference 113 between the task time 111 and an immediate system period 112. 2 is a schematic diagram consistent with an embodiment of the disclosure, illustrating the decision timer of FIG. 1. As shown in FIG. 2, the decision timer 110 can include, for example, but not limited to, a counter that obtains the task time 111 based on a clock that performs a task by an instant computing system.

The decision timer 110 may also include, for example, but not limited to, a calculator (or counter) to calculate a time difference 113 between the task time 111 and an immediate system period 112. The immediate system period 112 is the upper limit of the time required for the immediate system to perform the task, such as the task of performing audio signal processing of 192K samples per second, and the immediate system period 112 is (1/192000) seconds. For another example, a task of performing an update process of 60 times per second, the immediate system cycle 112 is (1/60) seconds. Referring to FIG. 2, the time difference between the real-time system period 112 and the task time 111 is the time difference 113, which is the difference between the actual time and the upper time limit for executing the task, that is, the remaining time for executing the task. As previously mentioned, the decision timer 110 can include a calculator or counter to calculate this time difference 113.

According to the embodiment in FIG. 1, the controller 120 receives the time difference 113 and generates a control signal 122 based on the time difference 113 and a reference time 121. 3 is a schematic diagram consistent with an embodiment of the disclosure, illustrating the controller generating a control signal. As shown in the embodiment of FIG. 3, the controller 120 can be, for example, a comparator that compares the time difference 113 with the reference time 121 to generate the control signal 122. The reference time 121 can be, for example, a set time (eg, 20 microseconds) or a certain ratio of the immediate system period 112, such as 10% of the immediate system period 112. In an embodiment, the reference time 121 represents the optimal buffer time (for example, 10% of the immediate system period). If the time difference 113 is greater than the reference time 121, it means that the remaining time for performing the task is more than the optimal buffer time, that is, the execution is performed. The system clock of the task is faster so that there is a higher remaining time than the optimal buffer time. At this point the controller can generate a control signal 122, such as a high potential signal. Another case is if the time difference 113 is less than the reference time 121, indicating that the remaining time for executing the task is less than the optimal buffer time, that is, the system clock for executing the task is slower, so that there is a remaining time lower than the optimal buffer time. At this point the controller can generate a control signal 122, such as a low potential signal.

In view of the above, clock generator 130 receives the control signal 122 to generate an adjusted system clock 131 for provision to the instant computing system. 4 is a schematic diagram consistent with an embodiment of the disclosure, illustrating clock generator 130 receiving control signal 122 to generate system clock 131. For example, in the above embodiment, the clock generator 130 may generate a high-potential control signal 122 according to the controller 120 to generate a system clock 131 that is slower than the current clock (or the clock generator 13 may be based on the low-level control signal 122). A system clock 131) that is faster than the current clock is generated for provision to the instant computing system.

According to another embodiment, FIG. 5 illustrates a method for dynamic clock adjustment applied to an instant computing system, the method comprising: detecting a task time of an instant computing system executing a task, as shown in step 510; calculating the task time and a time difference of an immediate system cycle, as shown in step 520; using a controller to generate a control signal based on the time difference and a reference time, as shown in step 530; and receiving the control signal using a clock generator A system clock is generated for provision to the instant computing system, as shown in step 540.

In step 510, detecting a task time for the instant computing system to perform a task, a counter can be used to obtain a task time according to a clock of a real-time computing system executing a task.

In step 520, a time difference between the task time and an immediate system cycle is calculated, and a calculator (or counter) can be used to calculate a time difference between the task time and an immediate system cycle. The immediate system cycle is the upper limit of the time required for the instant system to perform the task, such as the task of performing audio signal processing of 192K samples per second, and the immediate system cycle 112 is (1/192000) seconds. The instant system cycle is, for example, a task that performs an update process of 60 times per second, and the immediate system cycle 112 is (1/60) seconds. The time difference is the difference between the actual time and the upper time limit for executing the task, that is, the remaining time for performing the task.

In step 530, a controller is used to generate a control signal based on the time difference and a reference time. The controller may be, for example, a comparator that compares the time difference with the reference time to generate a control signal. Wherein the reference time can be, for example, a set time (for example, 20) Microseconds) or some percentage of the immediate system cycle, such as 10% of the instant system cycle. In an embodiment, the reference time represents an optimal buffer time (for example, 10% of the immediate system period), and if the time difference is greater than the reference time, it means that the remaining time for performing the task is more than the optimal buffer time, that is, the system that performs the task. The clock is faster so that there is a higher remaining time than the optimal buffer time. At this point the controller can generate a control signal, such as a high potential signal. In another case, if the time difference is less than the reference time, it means that the remaining time for executing the task is less than the optimal buffer time, that is, the system clock for executing the task is slow, so that there is a remaining time lower than the optimal buffer time. At this point the controller can generate a control signal, such as a low potential signal.

In step 540, the control signal is received using a clock generator to generate a system clock for provision to an instant computing system. For example, in the above embodiment, the clock generator can generate a system clock that is slower than the current clock according to the controller generating a high-potential control signal (or the clock generator can generate a clock faster than the current clock according to the low-level control signal). The system clock 131) is provided to the instant computing system.

In summary, the present disclosure proposes a technique for providing dynamic clock adjustment, which dynamically adjusts the system clock in a timely manner via a control signal generated by the controller in a closed loop control manner.

The illustrations and descriptions of the present invention are merely preferred embodiments of the present invention, and are not intended to limit the implementation of the present invention, and those who are familiar with the art are subject to the changes in the spirit of the present invention. Or modification, should cover In the following patent application scope of this case.

100‧‧‧ Dynamic clock adjustment device

110‧‧‧Study timer

111‧‧‧ Mission time

112‧‧‧Instant system cycle

113‧‧‧ time difference

120‧‧‧ Controller

121‧‧‧Reference time

122‧‧‧Control signal

130‧‧‧clock generator

131‧‧‧System clock

Claims (8)

A dynamic clock adjustment device is applied to an instant computing system, the device comprising: a research timer, detecting a task time of the real-time computing system to perform a task, and calculating a time difference between the task time and an immediate system cycle a controller that receives the time difference and generates a control signal based on the time difference and a reference time; and a clock generator that receives the control signal to generate an adjusted system clock for providing to the instant computing system. The apparatus for dynamic clock adjustment according to claim 1, wherein the evaluation timer includes a counter for detecting the task time according to a clock of the real-time computing system performing the task. The apparatus for dynamic clock adjustment according to claim 2, wherein the evaluation timer further comprises a calculator or a counter to calculate the time difference between the task time and the immediate system period. The apparatus for dynamic clock adjustment according to claim 1, wherein the controller is a comparator that compares the time difference with the reference time to generate the control signal. A dynamic clock adjustment method is applied to an instant computing system, the method comprising: detecting a task time of the instant computing system executing a task; calculating a time difference between the task time and an immediate system period; using a controller, Generating a control letter based on the time difference and a reference time And receiving a control signal to generate an adjusted system clock for use in the instant computing system using a clock generator. The method for dynamic clock adjustment according to claim 5, wherein the method uses a counter to detect the task time according to the clock of the instant computing system executing the task. A method of dynamic clock adjustment as described in claim 5, wherein the method uses a calculator or a counter to calculate the time difference between the task time and the immediate system period. The method of dynamic clock adjustment according to claim 5, wherein the controller is a comparator that compares the time difference with the reference time to generate the control signal.