TW201625958A - Data generation device of detection, data generation method for detection and program - Google Patents

Abstract

An object of the invention is to improve an automatic generation rate of data for detection of electronic components of which both ends have no detection points. The method executes the following treatments to all of the detection object parts: the component selection treatment (81) in which detection object components are selected; the treatment (82) in which a normal circuit net table including a circuit net of the detection object components is generated; the treatment (83) in which a failure circuit net table when the detection object components of the circuit net have faults in any failure states is generated; the treatment (84) in which a detection result in a normal state is calculated when the normal circuit net is detected through more than one detection function according to each detection function simulation; the treatment (85) in which the detection result in a failure state is calculated when the failure circuit net is detected through more than one detection function according to each detection function simulation; and the treatment (86) in which a detection content is taken as individual detection data when the detection result in the normal state of each detection function is different from the detection result in the failure state. In the detection content, the different detection function is used to detect the circuit net.

Description

Inspection data creation device, inspection data creation method, and computer readable recording medium on which a program is recorded

The present invention relates to an inspection data creation device for inspecting individual inspection materials for forming circuit elements such as a plurality of electronic components formed on a circuit net of an inspection target substrate, a test data creation method, and a computer capable of reading a program. Record media.

In the case of the inspection data creation apparatus of the present invention, the applicant of the present invention has proposed the inspection data creation apparatus disclosed in the following Patent Document 1. The inspection data creation device is a measurement value for an electrical parameter of an electronic component measured based on a checkpoint provided on a conductor pattern of a circuit board on which an electronic component is mounted, and a reference for the electrical parameter. The inspection data creation device for the inspection material (including the information specifying the inspection point to be the measurement target and the inspection data indicating the reference value) for the substrate inspection device for the inspection of the circuit board, The present invention includes: a memory unit that includes information on a conductor pattern and information on the electronic component, and memorizes circuit design data indicating a circuit configuration of the circuit board; and performs processing of analog processing for simulating the operation of the circuit board based on the circuit design data. The processing unit performs simulation processing based on the circuit design data to create inspection data. At this time, the check points are provided at both ends of all the electronic parts.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Laid-Open Patent Publication No. 2013-213787 (pages 4-8, 1-2)

However, there is a problem that the above-described inspection data creation apparatus should be improved as shown below. In other words, in the inspection data creating apparatus, as described above, it is necessary to provide inspection points at both ends of the electronic component to be measured. However, for example, when there is an electronic component built in a circuit board or an electronic component in which a conductor pattern connected to a terminal is not formed on the surface of the circuit board, the electronic component cannot be inspected at both ends. Therefore, there is a problem that it is impossible to prepare inspection materials for such electronic components (the result is that the inspection coverage is lowered).

The present invention has been made to improve the problem, and the main object of the present invention is to provide an inspection data for an automatic production rate of an individual inspection data for a circuit network including circuit components such as electronic components in which no inspection points are provided at both ends. The device, the inspection data creation method, and the computer with the program recorded can read the recording medium.

In order to achieve the above object, the inspection data creation device of the first application of the patent application includes the inspection point in which the probe is placed in contact with the circuit net on the surface of the inspection target substrate, and the inspection is performed on the inspection object. The plurality of circuit elements constituting the circuit network electrically connected to each other In the case of at least one circuit element, the inspection data creation device of the processing unit for the individual inspection data for the circuit network is characterized in that the processing unit performs the following processing: normal time simulation processing, which is based on The normal circuit netlist in the case where all of the plurality of circuit elements are in the normal state, and the normal network inspection result is performed on the circuit network in the normal state by the simulation of the predetermined inspection content; the failure time simulation processing is based on At least one of the plurality of circuit elements is formed as a failure state as an inspection target, and the remaining circuit elements are formed into a fault circuit netlist in all normal states, and the circuit network of the fault state is executed. The failure check result is obtained by the simulation of the inspection content; and the individual inspection data creation process is performed by checking the aforementioned inspection content when the normal time inspection result and the failure time inspection result are different. The above-mentioned individual inspection materials when inspecting the object.

The inspection data creation device of the second application of the patent application is the inspection data creation device according to the first aspect of the patent application, wherein the processing unit is changed in accordance with a predetermined order in accordance with the normal circuit net list. The at least one circuit element to be inspected is subjected to a fault netlist creation process of the plurality of fault circuit netlists, and the fault time simulation is performed based on the fault circuit netlist created in the fault netlist creation process. deal with.

The inspection data creation device of the third aspect of the patent application is the inspection data creation device according to the first aspect of the patent application, wherein the processing unit is executed in the normal time simulation process and the failure time simulation process. The aforementioned simulation for inspecting the aforementioned inspection contents of the voltage applied to the circuit network, and performing the aforementioned individual inspection data creation processing to create the aforementioned individual In the inspection data, when the normal time inspection result of the normal time simulation processing is not different from the above-described failure time inspection result of the simulation processing at the time of the failure, and the inspection target object that the individual inspection inspection material is originally uncreated, The normal-time simulation processing, the failure-time simulation processing, and the individual inspection data creation processing are performed by increasing the voltage value of the applied voltage.

The inspection data creation device of the fourth aspect of the patent application is the inspection data creation device according to the second aspect of the patent application, wherein the processing unit is executed in the normal time simulation process and the failure time simulation process. The above-described simulation for inspecting the above-described inspection contents of the voltage applied to the circuit network, and performing the individual inspection data creation processing to create the individual inspection data, and the normal time inspection result of the normal time simulation processing and the failure time When the inspection result of the above-described failure in the simulation process is not different, and the individual inspection data is originally the unprocessed inspection target, the voltage value of the applied voltage is increased to perform the normal-time simulation processing and the failure. The time simulation process and the above-mentioned individual inspection data are processed.

The inspection data creation device of the fifth application of the patent application is the inspection data creation device according to the first aspect of the patent application, wherein the processing unit performs verification processing for the individual inspection data creation processing. The parameter data of the circuit element other than the inspection target to be inspected by the individual inspection material in the circuit network is changed within the allowable range of the circuit element. Then, the normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection data creation device of the invention of claim 6 is the inspection data creation device according to the second aspect of the patent application, wherein the processing unit performs a verification process for creating the individual inspection data creation process. In the above-described individual inspection data, the parameter values of the circuit elements other than the inspection target inspected by the individual inspection materials in the circuit network are changed within the allowable range of the circuit elements. The normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection data creation device of the seventh application of the patent application is the inspection data creation device according to the third aspect of the patent application, wherein the processing unit performs verification processing for the individual inspection data creation processing. The parameter data of the circuit element other than the inspection target to be inspected by the individual inspection material in the circuit network is changed within the allowable range of the circuit element. Then, the normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection data creation device of the eighth application of the patent application is the inspection data creation device according to item 4 of the patent application scope, and the processing unit performs verification processing for the individual inspection data creation processing. The parameter data of the circuit element other than the inspection target to be inspected by the individual inspection material in the circuit network is changed within the allowable range of the circuit element. Use The normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection data creation device of the ninth application of the patent application is formed so that the probe is placed in a checkpoint on the surface of the inspection target substrate in the substrate inspection device having one or more types of inspection functions, and the individual inspection is performed. The inspection data creation device for the individual inspection materials of the plurality of electronic components mounted on the inspection target substrate includes: the memory includes the design data according to the inspection target substrate, and is formed by the plurality of electronic components a circuit net composed of at least two or more electronic components connected to two or more of the inspection points, and a normal circuit netlist in which the electronic components are all normal normal circuit nets. And a memory unit and a processing unit of the fault circuit net of the faulty circuit network of the circuit network in which the component to be inspected is faulty in any one of the fault states, wherein the processing unit performs all of the inspection target components The following processing: normal time analog processing, which uses the aforementioned normal circuit netlist, according to the 1 type Each of the above-described inspection functions is simulated to obtain a normal-time inspection result when the probe is contacted with the inspection point connected to the normal circuit network and is inspected by the above-described one or more types of inspection functions; By using the above-described failing circuit netlist, each of the one or more types of inspection functions is simulated, and the probe is connected to the inspection point connected to the faulty circuit network, and the inspection function is detected by the above-described one or more types of inspection functions. The failure time inspection result in the faulty circuit network; and the individual inspection data creation processing, wherein the normal inspection result of each of the one or more types of inspection functions and the inspection result that is the same as the normal inspection result When the inspection function is checked, the result of the above-mentioned failure inspection is compared. When the normal inspection result is different from the inspection result of the failure, when one or more types of inspection functions are present, one of the inspection functions is checked to include the inspection. The inspection content of the circuit net of the target component is used to check whether the inspection target component is defective in the arbitrary one of the failure states.

The inspection data creation device of claim 10 is in the inspection data creation device according to claim 9 of the patent application scope, wherein the processing unit performs the following processing: part selection processing based on the aforementioned design data, Among the plurality of electronic components, the inspection target component is selected, and the normal net surface creation process is based on the design data, and the at least two or more electronic components connected to the two or more inspection points are specifically included in the inspection target component. a circuit network formed by the component, and the circuit component included in the circuit network is the normal circuit network as the normal circuit network, and the netlist of the normal circuit network is used as the normal circuit netlist; and the fault network The table creation process is based on the normal circuit net list, and the circuit network when the inspection target component fails in any one of the fault states is used as the fault circuit network to form a netlist of the fault circuit network as the fault circuit. Netlist.

The inspection data creation device of the eleventh application of the patent application is in the inspection data creation device according to claim 9 of the patent application, wherein the inspection function is performed by applying a voltage to the circuit network, and the processing unit performs: In the above-described individual inspection data creation processing, the inspection function is different from the failure inspection result, and the individual inspection data is not formed, and the inspection target component is formed as an unprocessed inspection component. Performing the aforementioned normal time simulation by raising the voltage value of the aforementioned applied voltage The processing of the above-mentioned failure and the processing of the individual inspection data are performed.

The inspection data creation device of claim 12 is the inspection data creation device according to claim 10, wherein the inspection function is performed by applying a voltage to the circuit network, and the processing unit performs: In the above-described individual inspection data creation processing, the inspection function is different from the failure inspection result, and the individual inspection data is not formed, and the inspection target component is formed as an unprocessed inspection component. The normal time simulation process, the failure time simulation process, and the individual inspection data creation process are performed by increasing the voltage value of the applied voltage.

The inspection data creation device of the thirteenth application of the patent application is the inspection data creation device according to the ninth application of the patent application, wherein the processing unit performs verification processing for the individual inspection data creation processing. The individual inspection data to be created is such that the parameter value of the electronic component other than the inspection target component inspected by the individual inspection material in the circuit network is changed within the allowable range of the electronic component. The normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection data creation device of the 14th application of the patent application is the inspection data creation device according to claim 10, wherein the processing unit performs verification processing for the individual inspection data creation processing. The individual inspection data to be created is such that the parameter value of the electronic component other than the inspection target component inspected by the individual inspection material in the circuit network is changed within the allowable range of the electronic component. use The normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection document preparation device of the fifteenth aspect of the patent application is the inspection document preparation device according to the eleventh aspect of the patent application, wherein the processing unit performs verification processing for the individual inspection data creation processing. The individual inspection data to be created is such that the parameter value of the electronic component other than the inspection target component inspected by the individual inspection material in the circuit network is changed within the allowable range of the electronic component. The normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

The inspection data creation device of the 16th application of the patent application is the inspection data creation device according to the 12th application of the patent application, wherein the processing unit performs verification processing for the individual inspection data creation processing. The individual inspection data to be created is such that the parameter value of the electronic component other than the inspection target component inspected by the individual inspection material in the circuit network is changed within the allowable range of the electronic component. The normal time simulation process and the failure time simulation process are executed by the above-described inspection contents indicated by the individual inspection materials, and it is verified whether or not the dissimilar state between the normal time inspection result and the failure time inspection result is maintained.

In the inspection data creation method of the seventeenth aspect of the invention, the probe is placed in a checkpoint that is placed on the surface of the inspection target substrate and connected to the circuit network, and the circuit formed on the inspection target substrate is inspected. of When at least one of the plurality of circuit elements that are electrically connected to each other is used as a method for preparing an inspection data for the individual inspection data for the circuit network, the following processing is performed: normal time simulation processing, According to the normal circuit net list when the plurality of circuit elements are in the normal state, the normal network inspection result is obtained by performing a simulation checked by a predetermined inspection content on the circuit network in a normal state; and the failure time simulation processing is performed. a fault circuit netlist in which the remaining circuit elements are formed into a fault state by at least one of the plurality of circuit elements as an inspection target, and the remaining circuit elements are in a normal state, and the circuit network of the fault state is used. The failure inspection result is obtained by performing the simulation checked by the inspection content; and the individual inspection data creation processing is performed by forming the inspection content when the normal inspection result and the failure inspection result are different The aforementioned individual inspection materials when the inspection target is inspected.

In the inspection method for the inspection of the surface of the substrate to be inspected in the substrate inspection device having one or more types of inspection functions, the inspection method is used to individually check the inspection. The inspection data creation method of the individual inspection materials of the plurality of electronic components mounted on the inspection target substrate, wherein the memory portion is stored in the memory unit including the design data based on the inspection target substrate Among the plurality of electronic components, the inspection target component to be inspected, and a circuit network including at least two or more electronic components connected to the two or more inspection points, all of the electronic components are normal. The normal circuit netlist of the circuit network, and the fault circuit netlist of the fault circuit network of the foregoing circuit network that only causes the aforementioned inspection target component to fail in any one fault state, In the inspection target component, the normal processing is performed by using the normal circuit net table read by the memory unit, and each of the one or more types of inspection functions is simulated and obtained. The normal time inspection result when the probe is in contact with the inspection point connected to the normal circuit network and is inspected by the above-described one or more types of inspection functions; the failure time simulation processing is read by the memory unit In the above-described fault circuit net list, the inspection points for causing the probe to be in contact with the faulty circuit network are obtained by simulation for each of the inspection functions of the one or more types, and the fault is checked by the inspection function of one or more types. The failure time inspection result in the circuit network; and the individual inspection data creation processing, which is the same as the normal inspection result of each of the above-described inspection functions and the inspection function which is the same as the normal inspection result The foregoing failure time inspection result at the time of inspection is compared, and when the normal time inspection result is different from the failure time inspection result When the inspection function is one or more types, the inspection contents of the circuit net including the inspection target component are inspected by one of the inspection functions to check whether the inspection target component is in any of the above-described failure states. The above-mentioned individual inspection materials.

The computer-readable recording medium recorded in the program of claim 19 is such that the computer is made to have a probe contact point which is disposed on the surface of the inspection target substrate and connected to the circuit network to check the formation of the inspection. The computer-readable recording medium on which the individual inspection data for the circuit network is used for recording the at least one of the plurality of circuit elements electrically connected to each other of the circuit board, The computer is caused to perform the following processing: normal time analog processing, which is performed on the foregoing circuit network in a normal state according to a normal circuit netlist when the plurality of circuit elements are set to all normal states. The normal inspection result is obtained by the simulation of the inspection contents, and the failure time simulation processing is performed in accordance with at least one of the plurality of circuit elements as a failure target, and the remaining The circuit element is formed as a fault circuit netlist in all normal states, and the fault detection result is obtained by performing the simulation checked by the inspection content on the circuit network in the fault state; and the individual inspection data creation processing is performed The content of the inspection when the normal time inspection result is different from the failure time inspection result is formed as the individual inspection data when the inspection target is inspected.

The computer-readable recording medium on which the program is recorded in the 20th article of the patent application is for causing the computer to be made to be placed in the substrate to be inspected in the substrate inspection device having one or more types of inspection functions. In the inspection point of the surface, the computer-readable recording medium on which the individual inspection materials of the plurality of electronic components mounted on the inspection target substrate are recorded is stored, and the memory is stored in the memory system: The design information of the substrate is formed by the inspection target component to be inspected among the plurality of electronic components, and the circuit network including at least two or more electronic components connected to the two or more inspection points. The electronic component is a normal circuit netlist of all normal normal circuit nets, and a fault circuit netlist of the faulty circuit network of the circuit network in which only the aforementioned inspection target component fails in any one fault state, for all of the foregoing Check the target part and let the computer perform the following processing: normal time analog processing, which is used by the aforementioned memory unit The normal circuit net table read out is obtained by simulating the inspection point for causing the probe to contact the normal circuit network by each of the inspection functions of the one or more types, and performing the inspection function of one or more types. Normal inspection check at normal time during inspection In the case of a fault-time simulation process, the fault circuit net table read by the memory unit is used, and each of the one or more types of inspection functions is simulated to obtain the probe contact with the faulty circuit network. The failure check result when the faulty circuit net is inspected by the inspection function of one or more types, and the individual inspection data creation processing, which is the normal time of each of the above-described inspection functions The inspection result is compared with the foregoing failure time inspection result when the inspection function is the same as the normal inspection result, and the inspection function is different when the normal inspection result is different from the failure inspection result. In the case of the above-mentioned type, the inspection content of the circuit net including the inspection target component is checked by one of the inspection functions, and the individual inspection for checking whether the inspection target component is defective in any of the above-described failure states is used. data.

In the computer-readable recording medium on which the inspection data preparation device of the first application of the patent application, the inspection data creation method of the application for the scope of the patent application, and the computer-readable recording medium recorded in the program of claim 19, The normal circuit netlist and the fault circuit netlist perform normal-time simulation processing, fault-time simulation processing, and individual inspection data creation processing, and check when the predetermined inspection content (for example, the inspection function of the substrate inspection device) is normal. When the result of the failure check when the inspection is performed in the same inspection content as the normal inspection result (the inspection result under the simulation of the circuit network using the failure state of the inspection target failure) is different, the inspection is performed. The content is set as an individual inspection material for checking whether the inspection object is a failure.

Therefore, the inspection data is used as a device and inspection data. The preparation method and the computer-readable recording medium on which the program is recorded are based on the information to be incorporated in the inspection target substrate, and the individual inspection data for the electronic components having no checkpoints at both ends thereof can be sufficiently increased. . Therefore, the inspection coverage of the inspection target substrate based on the individual inspection data can be sufficiently increased.

By applying the inspection data creation device of the second item of the patent scope, since the failure net table creation processing of the fault circuit net table according to the normal circuit net list is performed, only the normal circuit net list can be obtained, and the individual inspection can be sufficiently improved. The automatic creation rate of the data can sufficiently increase the inspection coverage of the inspection target substrate based on the individual inspection data. .

In the inspection data creation device of the third, fourth, eleventh, and twelthth patent applications, when the individual inspection data is an uninspected inspection target, the applied voltage is applied to the inspection target (inspection target component). The voltage value is increased to perform normal-time simulation processing, fault-time simulation processing, and individual inspection data creation processing, and individual inspection data is created. In other words, when the voltage of the applied voltage is sequentially increased, the individual inspection data is processed, and the individual inspection data is created at a lower voltage value. The circuit element is executed when the voltage of a higher voltage value is applied after the application.

Therefore, with the inspection data creation device, it is possible to make the calculation amount of the simulation sufficient while performing the calculation calculation of the simulation when the voltage is applied to all the inspection targets (inspection target parts) with all the voltage values. It is possible to perform a safer inspection on the substrate inspection device while reducing (if the inspection at a voltage with a low voltage value is applied, the inspection at a high voltage value can be omitted. In terms of individual inspection materials for safer inspections.

By applying the inspection data preparation device of the patent scopes 5, 6, 7, 8, 13, 14, 15, and 16, the result of the verification processing, the individual state in which the difference between the normal inspection result and the failure inspection result is maintained is maintained. The inspection data is retained, and the individual inspection materials that are not maintained in the different state can be deleted. Therefore, the substrate inspection device can be used to form the circuit formed on the actual inspection target substrate by using the individual inspection materials. The failure of the inspection of the circuit elements of the network (the failure of the failure of the circuit element (inspection target part) that can be detected in the simulation cannot be checked). That is, the reliability of individual inspection materials can be greatly improved.

In the computer-readable recording medium on which the inspection data preparation device of the ninth application patent application, the inspection data preparation method of the application for the patent scope No. 18, and the computer-readable recording medium in which the patent application scope is recorded, according to the obtained The normal circuit netlist and the fault circuit netlist perform normal-time simulation processing, fault-time simulation processing, and individual inspection data creation processing, and the normal inspection result of each inspection function of the substrate inspection apparatus, and the normal time When the result of the inspection is the same as the inspection function, the result of the inspection at the time of failure (using the result of the simulation under the simulation of the faulty circuit network when the component to be inspected is faulty in any one fault state) is different. In the case of a type or more, the inspection contents of the circuit net including the inspection target component are checked by one of the inspection functions, and the inspection data for checking whether the inspection target component is defective in any of the above-described failure states is used.

Therefore, the inspection data creation device, the inspection data creation method, and the computer-readable recording medium on which the program is recorded are based on being built in For the reason of the inspection target substrate and the like, the automatic inspection rate can be sufficiently increased with respect to the individual inspection materials for the electronic components in which the inspection points are not provided at both ends. Therefore, the inspection coverage of the inspection target substrate based on the individual inspection data can be sufficiently increased.

In addition, by applying the inspection data creation device of the tenth scope of the patent application, the selection of the parts to be inspected to the normal circuit netlist and the faulty netlist is performed according to the design data, so that only the design data can be obtained, and the design can be sufficiently improved. The automatic creation rate of the individual inspection materials can sufficiently increase the inspection coverage of the inspection target substrate based on the individual inspection materials.

1‧‧‧Check data preparation device

2‧‧‧ Input Department

3‧‧‧Processing Department

4‧‧‧Memory Department

5‧‧‧Output Department

71‧‧‧ circuit board

72, 75, 76, 77, 78‧‧‧ resistance

73‧‧‧ Capacitors

74‧‧‧ diode

80‧‧‧Check data processing

81‧‧‧Part selection processing

82‧‧‧Normal netlist creation

83‧‧‧ Fault netlist creation processing

84‧‧‧Normal simulation processing

85‧‧‧Analog processing in case of failure

86‧‧‧Individual inspection data processing

The first drawing is a configuration diagram of the inspection data creation device 1.

Fig. 2 is a connection diagram of the circuit board 71.

Fig. 3 is a view showing a result of simulation results of each inspection function fc of the inspection target part ob.

Fig. 4 is a flowchart showing an inspection data creation process 80 for explaining the operation (inspection data creation method) of the inspection data creation device 1.

Fig. 5 is an explanatory diagram for explaining the basic concept of the method for preparing a document for inspection.

Fig. 6 is a flowchart showing an inspection data creation process 90 for explaining the operation of the inspection data creation device 1 (other inspection data creation method).

Hereinafter, the inspection data creation device, the inspection data creation method, and the computer-readable recording medium on which the program is recorded will be described with reference to the attached drawings. Implementation form.

First, the basic concept of the method for creating a data for inspection will be described with reference to the drawings.

In the inspection data creation method, the probe of the substrate inspection apparatus is brought into contact with the inspection point of the surface of the inspection target substrate and connected to the circuit network (for example, the inspection point shown in FIG. 2 is formed by simulation). TP1 to TP4), the substrate inspection device inspects a plurality of circuit elements (for example, the resistors shown in FIG. 2) that electrically connect each other to form a circuit network (for example, the circuit network shown in FIG. 2) formed on the substrate to be inspected. And an individual inspection material for the circuit network (at least one of the circuit elements electrically connected to each other through the conductor pattern) data).

Here, the substrate inspection apparatus has an inspection function for inspecting one or two or more of the circuit nets, and includes, in association with each inspection function, a function of causing any of the probes to function as an output probe. Thereby, the electrical signal (voltage or current) for inspection is output to the checkpoint through the output probe; and any other probe among the probes functions as an input probe, thereby transmitting The input probe inputs the function of the electrical signal generated at the checkpoint due to the output of the electrical signal to the circuit network. Further, in the simulation, which of the inspection functions is used, which one of the probes functions as an output probe and an input probe corresponding to the inspection function, and as shown above The function of the output probe and the checkpoint that the input probe is in contact with, such as the inspection point, is the content of the inspection (inspection conditions).

The basic consideration of the data creation method for inspection is based on Lower logic: This circuit network is a simulation (inspection simulation) of one inspection content, and all the circuit elements constituting the circuit network are normal (the parameter value of the circuit element is a state of a nominal value described in a specification such as a catalog) (also referred to as a normal circuit network), and a circuit network (also referred to as a faulty circuit network) in which only a specific circuit element is in a fault state among the circuit elements constituting the circuit network, for a normal circuit network Use the normal circuit netlist, in addition, for the faulty circuit network, use the fault circuit netlist to perform, when the simulation results of the simulation of the normal circuit network (normal test results), and the simulation of the faulty circuit network When the simulation result (the failure check result) is different, the one test content can be used as the individual inspection data when the specific circuit element is normally checked for failure or failure.

An example of the method for preparing the inspection data will be specifically described. In this example, three of the three test contents 1, 2, and 3 that are different from each other are determined to simulate three different ones of the plurality of circuit elements included in a certain circuit network. Each of the circuit elements A, B, and C is an individual inspection data used for normal or faulty (that is, individual inspection data used for inspection of the circuit component A, and individual inspection used for inspection of the circuit component B. The data and the individual inspection data used in the circuit element C inspection are described as an example. Among them, the normal circuit net list NEno of the normal circuit network N0 in which all of the plurality of circuit elements included in the circuit network are known is known.

First, according to the normal circuit net list NEno, the fault circuit net list NEabA of the fault circuit network Na with only the circuit element A fault, the fault circuit net list NEabB of the fault circuit net Nb with only the circuit element B fault, and only the circuit The fault circuit net list NEabC of the fault circuit network Nc of the element C fault.

Next, the normal circuit net N0 is used to perform the simulation of the inspection content 1 using the normal circuit net list NEno, and the simulation result is obtained (the result of the inspection content 1 of the normal circuit network N0 (normal time inspection result REno1)). Similarly, for the faulty circuit network Na, the fault circuit net list NEabA is used to perform the simulation of the inspection content 1, and the simulation result is obtained (the result of the inspection content 1 of the faulty circuit network Na (the fault detection result REabA1)), For the faulty circuit network Nb, the fault circuit net list NEabB is used to perform the simulation of the check content 1, and the simulation result is obtained (the result of the check content 1 of the fault circuit network Nb (the fault check result REabB1)), the fault circuit The network Nc, using the fault circuit netlist NEabC, performs the simulation of the inspection content 1, and obtains the simulation result (the result of checking the content 1 with respect to the faulty circuit network Nc (the failure check result REabC1)).

Next, the simulation of the inspection content 2 is performed in the same manner as the above-described simulation of the inspection content 1, and the result of the inspection content 2 regarding the normal circuit network N0 (normal inspection result REno2) is acquired, and the fault circuit network Na is acquired. The result of checking the content 2 (the failure check result REabA2), the result of the inspection content 2 about the faulty circuit network Nb (the failure check result REabB2), and the result of the inspection content 2 regarding the faulty circuit network Nc (fault) When checking the result REabC2). In addition, the simulation of the inspection content 3 is performed in the same manner as in the simulation of the inspection contents 1 and 2 described above, and the result of the inspection content 3 regarding the normal circuit network N0 (normal inspection result REno3) is obtained, and the fault circuit is The result of checking the content 3 of the net Na (the failure check result REabA3), the result of the inspection content 3 regarding the faulty circuit network Nb (the failure check result REabB3), and the inspection content 3 regarding the faulty circuit network Nc The result (recovery result REabC3).

Thereby, the simulation results of the respective inspection contents 1, 2, and 3 shown in FIG. 5, that is, the normal time inspection results REno1, REno2, and REno3 of the normal circuit network N0 are obtained (if there is no special difference, Also known as "normal time inspection result REno"), the failure detection result REabA1 of the faulty circuit network Na, the failure time inspection result REabA2, and the failure time inspection result REabA3 (hereinafter, if there is no special difference, it is also called "fault time" The result of the inspection REabA"), the detection result REabB1 of the failure circuit network Nb, the failure result inspection result REabB2, and the failure time inspection result REabB3 (hereinafter, if there is no special difference, it is also called "fault-time inspection result REabB"), And the failure detection result REabC1 of the faulty circuit network Nc, the failure detection result REabC2, and the failure inspection result REabC3 (hereinafter, if there is no special difference, it is also referred to as "failure inspection result REabC").

Then, for each inspection content 1, 2, and 3, the normal time inspection result REno and each failure time inspection result REabA, REabB, and REabC (hereinafter, if there is no special difference, also referred to as "failure inspection result REab") In comparison, it is judged whether or not there is only one check result REab when the fault is different from the normal time check result REno.

As a result of the discrimination, as shown in FIG. 5, in the simulation result of the inspection content 1, only the failure detection result REabB1 marked with the □ mark is different from the normal inspection result REno1, and the inspection content 2 is In the simulation results, only the inspection result REabC2 marked with the □ mark is different from the normal inspection result REno2. In the simulation result of the inspection content 3, only the failure result marked with the □ mark is the inspection result REabA3 and the normal inspection result. REno3 is a different state.

At this time, by the simulation of the inspection content 1, it is possible to detect that only the circuit element B is in a state of failure. Therefore, the inspection content 1 is used as the individual inspection data when the circuit element B is normal or faulty by the simulation. . Similarly, by the simulation of the inspection content 2, it is possible to detect that only the circuit element C is in a state of failure. Therefore, the inspection content 2 is used as an individual inspection data when the circuit element C is normal or faulty by simulation. By the simulation of the inspection content 3, it is possible to detect that only the circuit element A is in a failure state. Therefore, the inspection content 3 is used as the individual inspection data when the circuit element A is normal or faulty.

Next, a configuration of an inspection data creation device that executes the inspection data creation method of the basic concept as described above will be described with reference to the drawings.

The inspection data creation device 1 as the inspection data creation device shown in Fig. 1 includes, for example, an input unit 2, a processing unit 3, a storage unit 4, and an output unit 5, which can be The design data (design data of the circuit board to be the inspection target substrate) Dde input to the input unit 2 and the specification data Dsp of the substrate inspection device for performing the inspection on the circuit board are automatically created when the circuit board is inspected. The inspection data Dte used in the substrate inspection device.

In the design data Dde of the present example, information indicating the specifications of all the electronic components of the circuit board (inspection target substrate) to be inspected by the inspection data creation device, and information indicating the shape of the conductor pattern, Information indicating the mounting position of all the electronic components in the conductor pattern, and information indicating the position of the checkpoint of the conductor pattern located on the surface of the circuit board News. The specification data Dsp includes an inspection function fc (for example, measuring impedance or resistance value between a pair of inspection points (in this example, an impedance is taken as an example) for performing inspection of the inspection target substrate. The impedance check function of the inspection; the voltage check function for measuring the voltage generated between the pair of inspection points and applying the voltage between the other pair of inspection points, and measuring between the pair of inspection points The voltage is applied, and when the voltage is applied, the current flowing between the pair of inspection points is used to check the current check function, etc.).

For example, the input unit 2 includes an external interface circuit, and receives the design data Dde and the specification data Dsp transmitted by the external device, and outputs the data to the processing unit 3.

For example, the processing unit 3 is configured by a computer, and reads and executes an operation program stored in the storage unit 4, thereby inputting the design data Dde and the specification data Dsp outputted by the input unit 2, and memorizing therein. In the memory processing of the memory unit 4, based on the design data Dde and the specification data Dsp stored in the memory unit 4, the inspection data creation processing 80, which will be described later, is performed, and the prepared inspection data Dte is output to the output. The output processing of the section 5.

The memory unit 4 is constituted by an HDD (Hard Disk Drive) or a semiconductor memory such as a RAM, and is exemplified. Further, the memory unit 4 is downloaded from the network and is removable from a recording medium on which an operating program is recorded (for example, a semiconductor memory such as a magnetic tape, a magnetic disk, a compact disk, or a flash memory). The media is loaded in advance to memorize the operation program of the processing unit 3 (including a program for causing the processing unit 3 to execute the inspection data creation processing 80), and to memorize the design data Dde, the specification data Dsp, and the inspection data. Dte et al. For example, the output unit 5 includes an external interface circuit, and inputs the inspection data Dte outputted by the processing unit 3, and outputs the inspection data Dte to an external device connected to the external interface circuit.

Next, the creation operation of the inspection data Dte by the inspection data creation apparatus 1 will be described together with the inspection data creation method.

First, the processing unit 3 inputs the design data Dde and the specification data Dsp outputted from the external device via the input unit 2, and stores them in the storage unit 4. In this example, as an example, it is assumed that the design data Dde of the circuit board 71 on which the circuit shown in FIG. 2 is formed is input. This circuit is an example of a circuit network. As shown in the figure, each electronic component including five resistors 72, 75, 76, 77, 78, one capacitor 73, and one diode 74 as circuit elements is used as an inspection object. The parts ob, which are electrically connected to each other by a conductor pattern as a circuit element. Further, in this circuit, an electronic component (for example, a diode 74 and a resistor 75) surrounded by a broken line is built in the circuit board 71, but cannot be directly connected to both ends of the built-in electronic component. checking point. Therefore, in the circuit board 71, as shown in the figure, four check points TP1 to TP4 are connected to the end of the electronic component other than the built-in electronic component (hereinafter, if there is no special difference, it is also called inspection). Point TP). Further, the substrate inspection device for inspecting the circuit board 71 is a specification data Dsp to which a substrate inspection device indicating two inspection functions fc including the impedance inspection function fc1 and the current inspection function fc2 is input.

Next, the processing unit 3 executes the inspection data creation processing 80 shown in Fig. 4 to create the inspection data Dte.

In the inspection data creation processing 80, the processing unit 3 first executes Line part selection processing (step 81). In the part selection processing, the processing unit 3 selects the inspection target part ob to be inspected as an inspection target in the electronic component of the circuit board 71 based on the design data Dde stored in the memory unit 4. In the inspection data creation processing 80 of the present example, for example, in the substrate inspection apparatus, the inspection data Dte which can be individually inspected by the electronic components mounted on the circuit board 71 is formed. Therefore, in the part selection processing, the processing unit 3 selects one inspection target part ob to be inspected. In this example, the processing unit 3 first selects the resistor 72.

Next, the processing unit 3 executes normal net list creation processing (step 82). In the normal net list creation processing, the processing unit 3 includes the electronic component (inspection target part ob) selected in step 81, and a circuit network that is connected to the inspection point TP of two or more. In addition, a circuit network in which the electronic components included in the specific circuit network (hereinafter also referred to as a specific circuit network) are all normal is a normal circuit network, and a net list of the normal circuit network is created as a normal circuit net list NEno. And it is stored in the memory unit 4 corresponding to the inspection target part ob. At this time, the normal circuit net list NEno includes information (for example, a number name) of the checkpoint TP used when the inspection target component ob is inspected.

When the resistor 72 is selected as the inspection target component ob, for example, the processing unit 3 specifies a circuit network (a series circuit of the resistor 72 and the capacitor 73) connected to the two inspection points TP1 and TP2. Further, the processing unit 3 sets the circuit network as a normal circuit network when all of the electronic components included in the specific circuit network are normal (when the line is not disconnected or short-circuited, and the constant is within a normal range). The net list of the normal circuit network is created as the normal circuit net list NEno. The normal circuit netlist NEno is created as, for example, list number 100 [checkpoint TP1, resistor 72-1], list number 101 [resistor 72-2, capacitor 73-1), list number 102 [capacitor 73-2, check point TP2] are shown. The symbols "-1" and "-2" indicate the "one end" and the "other end" of the electronic component recorded together with the symbol. In addition, please refer to Figure 2 for the list number.

The circuit network including the resistor 72 may be configured by a series circuit including a resistor 72, a capacitor 73, and a resistor 78, and a circuit network connected to the check points TP1 and TP4, in addition to the above-described circuit network. Or a circuit network composed of a resistor 72, a diode 74, and resistors 75 to 77 and connected to two checkpoints TP1 and TP3. However, in order to further improve the inspection accuracy of the resistor 72, a resistor is used. It is preferable that the number of electronic parts other than 72 is less.

Next, the processing unit 3 executes a failure netlist creation process (step 83). In the failure net table creation processing, the processing unit 3 causes the inspection target part ob to be in any one of the failure states of 1 or 2 or more based on the normal circuit net list NEno created in step 82. The circuit network at the time of the failure is used as the fault circuit network, and the net list of the fault circuit network is created as the fault circuit net list NEab, and is stored in the memory unit 4 corresponding to the inspection target part ob. At this time, the fault circuit net list NEab also contains information of the checkpoint TP used when the inspection target part ob is inspected. In this example, in order to easily understand the invention, in the case of the above-described failure state of the electronic component, any failure of the disconnection and the short circuit is performed, and there is no failure of the constant error.

Therefore, the processing unit 3 is configured as a fault circuit net table NEabo (the list number 200a [check point TP1], list number 201a [capacitor 73-2, check point TP2]) when the resistor 72 as the inspection target part ob is broken. , And the resistor 72 as the inspection target part ob is a fault circuit net table NEabs (list number 200b [check point TP1, capacitor 73-1], list number 201b [capacitor 73-2, check point TP2])) as a short-circuit fault. Fault circuit netlist NEab. Hereinafter, the fault circuit netlist NEabo and the fault circuit netlist NEabs are collectively referred to as the fault circuit netlist NEab.

Next, the processing unit 3 executes normal time simulation processing (step 84). In the normal-time simulation processing, the processing unit 3 performs simulation for each of the inspection functions fc using the normal circuit net list NEno for the normal circuit network created in step 82, and obtains the probe to be in contact with the substrate inspection device. The normal time check result REno at the time of inspection by the inspection function TP connected to the normal circuit network by the inspection point TP of 1 or 2 or more is stored in the memory unit 4. In this case, the normal time inspection result obtained by the simulation is added, for example, a predetermined value is added to obtain an upper limit value, and the predetermined value is subtracted to obtain a lower limit value, and the lower limit value is obtained. The obtained upper limit value and lower limit value are stored in the memory unit 4 as the normal time check result REno.

In this example, the processing unit 3 detects the two inspection functions fc of the impedance inspection function fc1 and the current inspection function fc2 based on the specification data Dsp stored in the storage unit 4, and the processing function fc of the substrate inspection apparatus is in step 82. The normal circuit network (the series circuit of the resistor 72 and the capacitor 73) specified in the middle is simulated, and the normal time inspection result REno1 and the current when the probe is in contact with the inspection points TP1 and TP2 and checked by the impedance inspection function fc1 are obtained. Check the normal time check result REno2 when the function fc2 is checked. Further, the processing unit 3 stores the normal time check results REno1 and REno2 obtained by the simulation in the memory unit 4 (see FIG. 3). The following will be the normal time check result REno1 and the normal time check result REno2 is collectively referred to as the normal time check result REno.

Next, the processing unit 3 executes a failure time simulation process (step 85). In the failure-time simulation processing, the processing unit 3 uses the fault circuit net table NEab for all the fault circuit networks created in step 83, and performs simulation for each inspection function fc to obtain probe contact on the substrate. The check point TP of the device connected to the faulty circuit network is checked by the inspection function fc of 1 or 2 or more, and the result REab is checked and stored.

In this example, the inspection function fc of the substrate inspection apparatus is the two inspection functions fc of the impedance inspection function fc1 and the current inspection function fc2, and the faulty circuit network created in step 83 has a faulty circuit netlist. Two fault circuit networks shown by NEabo and NEabs. Therefore, the processing unit 3 simulates each of the faulty circuit nets to obtain the failure time inspection results REabo1, REabs1, and the current check function fc2 when the probes are in contact with the inspection points TP1 and TP2 and are inspected by the impedance inspection function fc1. The result of the check at the time of inspection is REabo2, REabs2. Further, the processing unit 3 stores the failure time inspection results REabo1, REabs1, REabo2, and REabs2 obtained by the simulation as the failure net list NEab and stores them in the storage unit 4 (see FIG. 3).

Next, the processing unit 3 executes an individual inspection data creation process (step 86). In the individual inspection data creation processing, the processing unit 3 performs the normal time inspection results REno1 and REno2 obtained by simulation in step 84 and the failure time inspection results REabo1 and REabs1 obtained by simulation in step 85. , REabo2, REabs2, according to each inspection function fc (in this example, for each impedance check function fc1 and current check function fc2), it is detected (determined) whether there is a normal check result REno and a fault check result REab is Different Check function fc.

In the present example, the processing unit 3 compares the normal time check result REno1 when the normal circuit network is detected by the impedance check function fc1, and the failure time check results REabo1 and REabs1 when the two failed circuit nets are checked, and detects Whether the failure result check result REabo1, REabs1 is different from the normal time check result REno1. Further, the processing unit 3 compares the normal time check result REno2 when the current check function is detected by the current check function fc2, and the failure time check results REabo2 and REabs2 when the two failed circuit nets are checked, and detects the check at the time of failure. As a result, whether there is a difference between REabo2 and REabs2 and the normal time check result REno2 is different.

As a result of the comparison, the processing unit 3 is an impedance check function fc1 for the faulty circuit network shown by the faulty circuit net table NEabo (the faulty circuit net list NEab when the check target component ob is the resistor 72 is broken). At least one of the failure time inspection result REabo1 at the time of inspection and the failure time inspection result REabo2 when the current inspection function fc2 is checked, and the normal time inspection result REno1 regarding the normal circuit network indicated by the normal circuit net list NEno When the normal check result REno corresponding to REno2 is different, one of the impedance check function fc1 and the current check function fc2 having different check results will be used, and the normal time of the check function fc will be used. In the inspection result REno, the inspection content of the specific circuit network specified in the step 82 is checked, and the individual inspection data Dteo for checking whether the resistor 72 as the inspection target part ob is broken or not, and the inspection target part ob (in In this example, the resistor 72) is correspondingly stored in the memory unit 4.

Specifically, the resistance 72 as the inspection target part ob is broken. In the case of a line failure, the inspection results of both the impedance check function fc1 and the current check function fc2 are different from the normal time check result REno corresponding to the normal time check results REno1 and REno2. Therefore, the inspection content of the specific circuit network is checked by one of the impedance inspection function fc1 and the current inspection function fc2, and the individual inspection data Dteo for checking whether the resistor 72 is broken or not is used.

In the case where the inspection results of both the impedance check function fc1 and the current check function fc2 are different, the inspection data fte may be included in the individual inspection data Dteo, but it is preferable to use the corresponding normal inspection result REno. The one inspection function fc having a larger amount of difference is used to check the inspection contents of the specific circuit network, and is used to check whether or not the resistor 72 as the inspection target component ob is broken.

Further, the processing unit 3 is in the case of a fault when the impedance check function fc1 is inspected by the fault circuit network shown by the fault circuit net list NEabs (the fault circuit net list NEab when the resistor 72 of the inspection target part ob is short-circuited) At least one of the inspection result REabs1 and the failure time inspection result REabs2 when the current inspection function fc2 is checked corresponds to the normal time inspection results REno1 and REno2 of the normal circuit network indicated by the normal circuit net list NEno. When the normal time check result REno is different, one of the impedance check function fc1 and the current check function fc2 whose check result is different, and the normal check result REno of the check function fc are used. The inspection content of the specific circuit network specified in the step 82 is checked, and the individual inspection data Dtes for checking whether the resistor 72 as the inspection target component ob is short-circuited is set, and the inspection target component ob (in this example) Corresponding to resistance 72) And remember in memory 4.

Specifically, when the resistance 72 as the inspection target part ob is short-circuited, the inspection results of both the impedance inspection function fc1 and the current inspection function fc2 are normal inspection results corresponding to the normal inspection results REno1 and REno2. REno is different. Therefore, the inspection content of the specific circuit network is checked by one of the impedance inspection function fc1 and the current inspection function fc2, and the individual inspection data Dtes for checking whether or not the resistor 72 is short-circuited is used.

In the case where the inspection results of both the impedance check function fc1 and the current check function fc2 are different, any inspection function fc may be included in the individual inspection data Dtes, but it is preferable to use the corresponding normal inspection result REno. The one of the inspection functions fc, which has a larger amount of difference, checks the contents of the inspection of the specific circuit network, and sets the individual inspection data Dtes for checking whether or not the resistor 72 as the inspection target part ob is short-circuited.

Thereby, the information of the checkpoint TP used when the resistor 72 is used as the inspection target part ob, the individual inspection data Dteo for checking whether the resistor 72 is broken, and the inspection of whether the resistor 72 is present or not The individual inspection data Dtes of the short-circuit failure is stored in the memory unit 4 in a state in which it is associated with the resistor 72 as a separate inspection material for the resistor 72.

Then, the processing unit 3 determines whether or not the preparation of the individual inspection materials for all the inspection target parts ob to be inspected among the electronic components mounted on the circuit board 71 is determined based on the design data Dde stored in the memory unit 4. Completion (ie, whether there are inspection objects that are not made for individual inspection materials) When the preparation of the individual inspection materials for all the inspection target parts ob is not completed, the process returns to the above-mentioned step 81, and the steps 81 to 87 are repeated, thereby sequentially creating all the inspection target parts. The individual inspection data of ob.

In the circuit board 71 on which the circuit shown in FIG. 2 is formed, the processing unit 3 is a circuit network (resistor 72 and (s) that is connected to the two check points TP1 and TP2, for example, when the capacitor 73 is the inspection target part ob. The series circuit of the capacitor 73 is specified as a specific circuit network. Further, when the resistor 78 is set as the inspection target part ob, the circuit network (the circuit having only the resistor 78) connected to the two inspection points TP2 and TP4 is specified as a specific circuit network. Further, when the diode 74 is used as the inspection target part ob, a circuit network (resistor 72, diode 74, and combined resistor (resistance of resistors 75, 76) connected to the two check points TP1, TP3 is used. A series circuit of a parallel synthesis resistor with a resistor 77) is specified as a specific circuit network.

Further, regarding the capacitors 73, the resistors 78, and the diodes 74, even when there is any failure of the disconnection failure and the short-circuit failure, the failure-time inspection results REabo1 and REabs1 at the time of the impedance inspection function fc1 are checked and corresponding. The normal inspection result REno1 is different, and the failure inspection result REabo2 and REabs2 at the time of the current inspection function fc2 are different from the corresponding normal inspection result REno2. Therefore, the processing unit 3 is the same as the above-described resistor 72, and the individual inspection data D for each inspection target part ob is created.

On the other hand, one of the resistors 75, 76, and 77 constituting the combined resistor corresponds to the resistance value of the other resistor, and Similarly, even in the case of any failure of the disconnection failure or the short-circuit failure, the capacitor 73, the resistor 78, and the diode 74 are formed to have the failure-time inspection results REabo1, REabs1 and the corresponding normality when the impedance inspection function fc1 is inspected. The time check result REno1 is different, and the failure check result REabo2, REabs2 at the time of the current check function fc2 and the corresponding normal time check result REno2 are different. Further, according to the relationship with the resistance value of the other resistor, at least one of the failure-time inspection results REabo1 and REabs1 when the impedance inspection function fc1 is inspected is formed to be different from the corresponding normal-time inspection result REno1. At least one of the fault detection results REabo2 and REabs2 at the time of the state (in the same state) or the current check function fc2 is in a state different from the corresponding normal time check result REno2 (the same is true) Situation).

At this time, with respect to, for example, one of the resistors 75, 76, and 77, even if there is any failure of the disconnection failure and the short-circuit failure, the failure-time inspection results REabo1 and REabs1 at the time of the impedance inspection function fc1 are checked. The normal time check result REno1 is different, and when the fault check result REabo2, REabs2 at the time of the current check function fc2 check is different from the corresponding normal time check result REno2, the capacitor 73 is In the same manner, the resistors 78 and the diodes 74 are used as individual inspection materials when each of the inspection target parts ob is used.

On the other hand, for example, when the resistor 77 is used as the inspection target part ob, and the same circuit network as that of the above-described diode 74 is used as the specific circuit net, the resistance value of the resistor 77 is higher than that of the other resistors 75, 76. When the series combined resistance value is extremely large, the fault detection is performed when the impedance check function fc1 is checked. When the short-circuit fault in the REabo1 and REabs1 is checked, the result of the fault detection REabs1 is different from the normal check result REno1, but the fault check result REabo1 at the time of the disconnection fault is not different from the normal check result REno1. The situation. In this case, the failure time inspection result REabs2 in the case of the failure detection result REabo2 and REabs2 when the current inspection function fc2 is inspected is different from the normal time inspection result REno2, but the disconnection failure is different. The time-of-failure check result REabo2 is in a state different from the normal-time check result REno2.

Therefore, the processing unit 3 is configured to check the information of the check points TP1 and TP3 used when the resistor 77 is the inspection target component ob, and the individual inspection data Dtes for checking whether the resistor 77 is short-circuited (with the impedance check function fc1). And one of the current check functions fc2, which checks the function of the inspection of the normal circuit network, is stored in the memory unit 4 in a state in which the resistor 77 is associated with the resistor 77. Ob the individual inspection data of this particular circuit network. In the case where the resistor 77 is in the event of a disconnection failure, the check results REabo1 and REabo2 of the impedance check function fc1 and the current check function fc2 are also different from the corresponding normal time check results REno1 and REno2. . Therefore, the processing unit 3 is a component that is incapable of being inspected for the disconnection failure, and the information indicating the purpose is also related to the resistance 77 as a part of the individual inspection data for the resistor 77. The memory is in memory 4.

Further, for example, when the resistor 75 is set as the inspection target part ob and the same circuit network as that of the above-described diode 74 is a normal circuit network, the resistance value of the resistor 75 is small, and the resistor 75 is Electric connection in series When the resistance value of the resistor 76 is extremely large, and the resistance value of the resistor 77 is extremely smaller than the resistance value of the resistor 76 (for example, the resistor 75 is 10 Ω, the resistor 76 is 10 MΩ, and the resistor 77 is 100 Ω), In the case of the failure check function fc1, the check results of the check results REabo1 and REabs1 are not different from the normal check result REno1. Further, at this time, the failure time inspection results REabo2 and REabs2 at the time of the current inspection function fc2 are also in a state in which the two are not different from the normal time inspection result REno2.

Therefore, the processing unit 3 does not allow the information of the check points TP1 and TP3 used when the resistor 75 is inspected as the inspection target component ob, and any inspection function fc indicating that the impedance check function fc1 and the current check function fc2 are used. The information of any of the disconnection failure and the short-circuit failure (in the gist of the undetectable component) is stored in the memory unit 4 in association with the resistor 75, and the resistance 75 is used as the inspection target part ob. Individual inspection data for a specific circuit network.

The processing unit 3 executes the steps 81 to 87 in the same manner, and in the step 87, it is determined that the preparation of the individual inspection materials for all the inspection target parts ob has been completed (that is, the inspection target part ob which is not prepared for the individual inspection materials). At this time, the inspection data creation processing 80 is completed. Finally, the processing unit 3 executes the output processing, and reads out the entire individual inspection data stored in the inspection data creation processing 80 and stored in the storage unit 4 for each inspection target component ob, and outputs it to the output as the inspection data Dte. Department 5.

When the circuit board 71 is inspected, the substrate inspection apparatus uses the inspection data Dte to inspect the electronic components mounted on the circuit board 71, and determines whether or not the circuit board 71 is good or not.

As described above, in the inspection data creation device 1, the inspection data creation method, and the computer-readable recording medium on which the program is recorded, part selection processing, normal netlist creation processing, and fault nettable creation processing are performed. The normal-time simulation processing, the failure-time simulation processing, and the individual inspection data creation processing, the normal-time inspection result REno of each inspection function fc of the substrate inspection apparatus, and the inspection function identical to the normal-time inspection result REno The failure check result REab at the time of the fc check (in the case of any one of the failure states of 1 or 2 or more, the inspection result under the simulation of the faulty circuit network when the inspection target part ob fails) is different When there is one type or two types or more of the inspection function fc, the inspection content of the specific circuit network specified in the normal net list creation processing is checked by one of the inspection functions fc, and the inspection target part ob is used as described above. Check data Dte for failure in any one fault state.

Therefore, the inspection data creation device 1, the inspection data creation method, and the computer-readable recording medium on which the program is recorded are not set at both ends because they are built in the circuit board 71 or the like. The individual inspection data of the electronic parts (in the above-described example, the diode 74 and the resistor 75) having the check point TP can also sufficiently increase the automatic production rate. Therefore, the inspection coverage of the circuit board 71 based on the inspection data Dte composed of the individual inspection materials for the respective electronic components can be sufficiently improved.

Further, the inspection data creation device 1, the inspection data creation method, and the computer-readable recording medium on which the program is recorded may be different if there is no normal inspection result REno and the failure inspection result REab is different. When function fc, the object part ob is checked to be a part that cannot be inspected. In addition, when the inspection is performed on the circuit board 71 using the inspection data Dte, the parts that cannot be inspected can be specified based on the individual inspection materials, and the parts to be inspected are omitted in advance. The inspection is performed under the state (shaded state), so the inspection time can be shortened.

In the above-described example, the inspection function fc of the substrate inspection device is two of the impedance inspection function fc1 and the current inspection function fc2, but the inspection function fc may be one or three or more. Further, in the above-described example, the inspection function fc of the substrate inspection device may be the impedance inspection function fc1 and the current inspection function fc2, so that the number of checkpoints TP connected to the specific circuit network is set to 2 For example, when the voltage is applied between the pair of inspection points TP, the substrate inspection device includes a voltage detection function for detecting a voltage outputted between the other pair of inspection points TP as the inspection function fc, and the specific circuit is used. The number of checkpoints TP connected to the network is set to four (three if a pair of checkpoints TP on the voltage application side and one of the pair of checkpoints TP on the voltage detection side are common) .

In addition, an external device (not shown) may perform part selection processing (step 81), normal net list creation processing (step 82), and failure net table creation processing in the inspection data creation processing 80 (step). Step 83), the normal circuit net list NEno and the fault circuit net list NEab for each inspection target part ob are created, and the inspection data creation device 1 takes in the normal circuit net list NEno and the fault circuit network made in the external device. The table NEab is stored in the memory unit 4, and the normal circuit simulation table (step 84), the failure time simulation process (step 85), and the individual inspection data creation processing are executed using the normal circuit net list NEno and the fault circuit net list NEab. (Step 86), by doing this The individual inspection data Dteo for inspecting the inspection target part ob included in the specific circuit network.

In the above-described example, the circuit components such as the electronic components (the electronic components mounted on the surface of the circuit board 71 and the electronic components built in the circuit board 71) are mounted on the circuit board 71 as the circuit components. In the inspection of the target component ob, for example, a component such as a resistor or the like formed by screen-printing a paste of a resistor material on the surface of the circuit board 71 and performing heat curing or the like may be used as an electron. One of the parts is included in the inspection target part ob.

Further, the conductor pattern for electrically connecting the electronic components to each other may be processed as a circuit component constituting the circuit network, and may be included in the inspection target component ob, similarly to the above-described electronic component. In other words, in the case where the normal circuit net list NEno and the fault circuit net list NEab are acquired by the external device, the probe is placed in contact with the surface of the test target substrate. When at least one of the plurality of circuit elements (electronic components and conductor patterns) that are electrically connected to each other in the constituent circuit net of the inspection target substrate (circuit substrate) is inspected, it is provided for inspection. In the case of the individual inspection data for the circuit network, the inspection content that is predetermined for the circuit network in the normal state is performed based on the normal circuit netlist when the plurality of circuit elements are formed in the normal state (for example, the inspection function of the substrate inspection device) Fc) a normal-time simulation process for obtaining a normal-time inspection result by performing a simulation of the inspection; forming a failure state by at least one of the plurality of circuit elements as an inspection target, and forming the remaining circuit elements For the faulty circuit netlist in the normal state, perform the check on the circuit network of the fault state. When the content is checked and the simulation is performed, the failure time simulation process is performed; and when the normal inspection result and the failure time inspection result are different, the inspection content is set as the individual inspection data when the inspection target is inspected. Individual inspection data are processed. Thereby, not only the electronic component but also the conductor pattern (including the joint portion of the conductor pattern and the electronic component) can be inspected for the joint state (the presence or absence of the disconnection).

Further, only the normal circuit net list NEno is obtained by the external device, and the failure circuit net list NEab may be configured to be executed in the inspection data creation processing 80. At this time, in the circuit element included in the normal circuit net list NEno, the failure is made to change the at least one circuit element to be inspected in accordance with a predetermined order, and the fault condition is generated to form a complex fault circuit netlist. The netlist creation process, in the fault-time simulation process, performs simulation based on the fault circuit netlist made as shown above.

Further, in the above-described example, as in the circuit formed on the circuit board 71 as shown in FIG. 2, a configuration may be adopted in which any circuit element (electronic component and conductor pattern) is electrically connected to other circuit elements. In the circuit network, a specific circuit network (a part of the circuit network of the entire circuit network) including the inspection target part ob is executed for each inspection target part ob, and the normal circuit net table NEno is processed. This does not make a vain normal circuit net list NEno, but a part of the circuit network that is specifically connected between any one of the plurality of checkpoints connected to the circuit network and any other one is specifically Each part of the circuit network is formed as a normal circuit net list NEno, and according to the normal circuit net list NEno made, the at least one circuit element included in the net list is broken to form a fault circuit net list NEab, and The above-described normal time simulation processing (step 84), fault time simulation processing (step 85), and individual inspection data creation processing (step 86) are performed by using the normal circuit net list NEno and the fault circuit net list NEab which are formed as described above. In this case, the individual inspection data Dteo for inspecting the inspection target part ob included in the entire circuit network is prepared.

In the circuit network shown in FIG. 2, for example, an example of the individual inspection data Dteo for inspection is used by using two checkpoints, and specifically, the normal circuit netlist NEno and the fault circuit netlist are created. Until NEab. In this case, the combination of two checkpoints TP is selected from the checkpoints TP1 to TP4 (TP1, TP2), (TP1, TP3), (TP1, TP4), (TP2, TP3), (TP2, TP4). , (TP3, TP4) and other six groups.

In this case, for example, when only the electronic component is a circuit element (when the conductor pattern is not a circuit element), a normal circuit net list NEno (group number 100) (check list TP1) for (TP1, TP2) is created. , resistor 72-1], list number 101 [resistor 72-2, capacitor 73-1), list number 102 [capacitor 73-2, checkpoint TP2]), and two groups of (TP1, TP3) are normal. Circuit net list NEno (List No. 100 [Checkpoint TP1, Resistor 72-1], List No. 103 [Resistance 72-2, Diode 74-1], List No. 104 [Diode 74-2, Resistor 77- 1], list number 105 [resistor 77-2, checkpoint TP3), and normal circuit netlist NEno (list number 100 [checkpoint TP1, resistor 72-1], list number 103 [resistor 72-2, diode Body 74-1], list number 106 [diode 74-2, resistor 75-1], list number 107 [resistor 75-2, resistor 76-1], list number 108 [resistor 76-2, resistor 77- 2], list number 105 [resistance 77-2, check point TP3)).

In addition, a normal circuit net list NEno (list number 100 [check point TP1, resistance 72-1], list number 101 [resistor 72-2, capacitor 73-1], list number) for grouping (TP1, TP4) is created. 109 [capacitor 73-2, resistor 78-1], list number 110 [resistor 78-2, checkpoint TP4), and two normal circuit netlists NEno of (TP2, TP3) (List No. 102 [ Check point TP2, capacitor 73-2], list number 101 [capacitor 73-1, resistor 72-2], list number 103 [resistor 72-2, diode 74-1], list number 104 [diode 74 -2, resistor 77-1], list number 105 [resistor 77-2, checkpoint TP3), and normal circuit netlist NEno (list no. 102 [checkpoint TP2, capacitor 73-2], list number 101 [capacitor 73-1, resistor 72-2], list number 103 [resistor 72-2, diode 74-1], list number 106 [diode 74-2, resistor 75-1], list number 107 [resistor 75 -2, resistor 76-1], list number 108 [resistor 76-2, resistor 77-2), list number 105 [resistor 77-2, check point TP3).

Further, a normal circuit net list NEno (list No. 102 [check point TP2, capacitor 73-2], list number 109 [capacitor 73-2, resistance 78-1], list number) for the group of (TP2, TP4) is created. 110 [resistor 78-2, checkpoint TP4]), and two normal circuit netlists NEno (group number 105 [resistance 77-2, checkpoint TP3], list number 104 [two] of the group of (TP3, TP4) Polar body 74-2, resistor 77-1], list number 103 [resistor 72-2, diode 74-1], list number 101 [resistor 72-2, capacitor 73-1], list number 109 [capacitor 73 -2, resistor 78-1], list number 110 [resistor 78-2, checkpoint TP4), and normal circuit netlist NEno (list no. 105 [resistor 77-2, checkpoint TP3], list number 108 [resistance 76-2, resistance 77-2], list No. 107 [resistance 75-2, resistance 76-1], list number 106 [diode 74-2, resistance 75-1], list number 103 [resistor 72-2, diode 74-1), list number 101 [resistor 72-2, capacitor 73-1], list number 109 [capacitor 73-2, resistor 78-1], list number 110 [resistor 78-2, check point TP4).

Further, based on the normal circuit net list NEno created as described above, at least one circuit element included in the net list is broken to form a fault circuit net list NEab. Specifically, a normal circuit net list NEno (list no. 100 [check point TP1, resistance 72-1], list number 101 [resistor 72-2, capacitor 73-1] in the group of (TP1, TP2) is listed. For example, in the list No. 102 [capacitor 73-2, check point TP2]), since the electronic components included in the net list are the resistor 72 and the capacitor 73, at least one of the resistor 72 and the capacitor 73 is broken. Fault circuit netlist NEab. Thereby, the individual inspection data Dteo is created based on the created normal circuit net list NEno and the fault circuit net list NEab.

Further, in the impedance inspection function fc1, the current inspection function fc2, and the voltage inspection function of the substrate inspection device, a voltage is applied between the pair of inspection points, but the substrate inspection device may apply the voltage. The voltage value of the voltage is set to a plurality of stages (n stages. n is an integer of 2 or more). In order to create the individual inspection data for the substrate inspection apparatus, if the inspection data creation apparatus or the inspection data creation method is applied, in the simulation, each normal circuit net list NEno and the normal circuit net list are used. Each of the fault circuit nets NEab made by NEno uses all the inspection functions of the substrate inspection device while setting the voltage value of the applied voltage to the voltage value at all stages (in the above example, Impedance check function fc1 The current check function fc2 and the voltage check function are used to create individual inspection data.

However, in the configuration in which the voltage value of the voltage applied to each of the inspection functions is set to the voltage value at all stages (n-stage), the normal time simulation can be performed based on the voltage at which the voltage value of one of the stages is applied. The normal time inspection result and the failure time inspection result obtained in the simulation process at the time of the processing and the failure, and the circuit elements (electronic parts, conductor patterns, etc.) for the individual inspection data are generated, and the normal time simulation of applying the voltage of the other phase is performed. As a result of the processing of the processing of the faults and the processing of the data for the individual inspections, the calculation amount of the entire simulation is extremely large, and the time required for the inspection data creation processing becomes extremely long.

Therefore, for each of the normal circuit net list NEno and each of the fault circuit nets NEab, a simulation of applying a voltage to one of the n-stage voltage values (simulation using all the inspection functions) is performed, and The simulation result obtained by the simulation of the normal circuit network (the normal time inspection result) and the simulation result (the failure time inspection result) obtained by the simulation of the faulty circuit network are different, even if there is one type of circuit element (in In the simulation using at least one inspection function, the normal time inspection result is different from the fault detection result, and it is preferable to omit the simulation of applying the voltage to the remaining voltage value among the n-stage voltage values. This reduction is simulated in the entire calculation amount, and is shortened to the time required to create individual inspection materials.

At this time, in the substrate inspection apparatus, there is also a possibility that the voltage value of the applied voltage is set to a plurality of stages from a lower limit value to an upper limit value by a constant voltage step of, for example, 0.1 V, but In the same manner as the circuit board 71 shown in FIG. 2, a semiconductor element such as a diode 74 is included (as applied The voltage value of the voltage is a voltage value exceeding the forward voltage value Vf or a voltage value that does not reach the forward voltage value Vf, and is moved to an element of any of two states (in the diode, In any of the two states of the ON state and the OFF state, the circuit board as the circuit element is a substrate inspection device to be inspected, and in one of the plurality of stages, the voltage value is generally set. It is a two-stage phase in which the voltage value V1 of the forward voltage value Vf and the voltage value V2 (>Vf>V1>0) exceeding the forward voltage value Vf are not reached.

In the following, the substrate inspection device including the function of setting the voltage value of the applied voltage to two voltage values V1 and V2 as described above is used for the individual inspection for checking the circuit substrate 71 shown in FIG. The example of the data is described with reference to the inspection data creation processing 90 shown in Fig. 6. It is to be noted that the same processes as those of the inspection data creation processing 80 shown in FIG. 4 are denoted by the same reference numerals and the description thereof will not be repeated. Further, in the inspection data creation device 1 that executes the inspection data creation processing 90, although not shown, the storage unit 4 is formed to store in advance a processing for causing the processing unit 3 to execute the inspection data creation processing 90. The program of the program is the above two voltage values V1 and V2 as an example of the multi-stage voltage value.

In the inspection data creation processing 90 shown in FIG. 6, the processing unit 3 first specifies the voltage value V1 which is the lower of the two voltage values V1 and V2 stored in the storage unit 4 as the applied voltage. Voltage value (step 91). Next, the processing unit 3 executes steps 81 to 86 to create an individual inspection document Dteo regarding the electronic component selected in step 81. Specifically, in step 84, the processing unit 3 simulates the applied voltage value by the inspection point TP connected to the normal circuit network including the electronic component selected in step 81. The voltage of V1 is checked by the check function fc for the normal time check result REno of the normal circuit network. Further, in step 85, the processing unit 3 simulates the voltage of the applied voltage value V1 by the inspection point TP connected to the faulty circuit network including the electronic component selected in step 81 to check the function fc. Check the result REab when checking the faulty circuit network. Further, in step 86, when the normal time inspection result REno is compared with the failure time inspection result REab and is different, the processing unit 3 is configured to include the inspection contents when the respective inspection results REno and REab are obtained. The inspection content of the specific circuit network of the electronic component selected in step 81 is used as the individual inspection data Dteo.

The processing unit 3 determines whether or not there are unselected parts in step 92 (that is, whether or not all the electronic parts have been selected in the part selection processing in step 81), and steps 81 to 86 are executed until there are no unselected parts. . When the processing unit 3 determines in the step 92 that there are no unselected parts (that is, all the electronic parts are selected in the part selection processing of the step 81), the processing unit 3 determines the individual inspection of all the electronic parts to be inspected. Whether or not the creation of the data Dteo has been completed (that is, whether or not there is an inspection target part ob which the individual inspection data Dteo has not created) (step 93).

When the processing unit 3 determines that the creation of the individual inspection document Dteo for all the electronic components to be inspected is completed (that is, the inspection target component ob which is not created by the individual inspection data Dteo) is completed in step 93, This inspection is completed by the data creation processing 90. On the other hand, the processing unit 3 determines in the step 93 that the preparation of the individual inspection data Dteo for all the electronic components to be inspected is not completed (that is, the inspection target component in which the individual inspection data Dteo is not created) When ob), the process moves to step 94.

At this time, for example, the normal circuit net list NEno of the group (TP1, TP2) of the circuit board 71 shown in FIG. 2 (List No. 100 [Check Point TP1, Resistance 72-1], List No. 101 [ Resistor 72-2, capacitor 73-1], list number 102 [capacitor 73-2, checkpoint TP2]), or group of normal circuit netlists NEno (TP1, TP4) (List No. 100 [Checkpoint TP1] , resistor 72-1], list number 101 [resistor 72-2, capacitor 73-1], list number 109 [capacitor 73-2, resistor 78-1], list number 110 [resistor 78-2, check point TP4] When the electronic component included in the netlist that does not include the semiconductor element such as the diode is used as the inspection target component ob, the voltage for applying the low voltage value V1 can be checked. The simulation of the function fc is made for the individual inspection data Dteo of all the electronic components included in the netlist.

On the other hand, as for the normal circuit net list NEno of (TP1, TP3) (for example, list number 100 [check point TP1, resistance 72-1], list number 103 [resistance 72-2, diode 74- 1], list number 104 [diode 74-2, resistor 77-1], list number 105 [resistor 77-2, checkpoint TP3), etc., or a group of normal circuit networks (TP3, TP4) Table NEno (for example, list number 105 [resistor 77-2, check point TP3], list number 104 [diode 74-2, resistor 77-1], list number 103 [resistor 72-2, diode 74-1 〕, list number 101 [resistor 72-2, capacitor 73-1], list number 109 [capacitor 73-2, resistor 78-1], list number 110 [resistor 78-2, check point TP4), etc. When the electronic component included in the net list including the diode 74 is used as the inspection target part ob, since the voltage value V1 of the applied voltage is less than the forward voltage value Vf of the diode 74, it is not distributed in the simulation. Current.

Therefore, for the resistor 72, the capacitor 73, and the resistor 78 among the electronic components included in the normal circuit net list NEno, the individual inspection data is created based on the normal circuit net list NEno of the other (TP, TP) groups. Dteo, but the electronic parts (resistors 75, 76, 77) other than this are not made into individual inspection materials Dteo. In the case of the diode 74, the simulation of the failure of the diode 74 can be performed. Therefore, the individual inspection data Dteo is created.

Therefore, in the example, the processing unit 3 determines in step 93 that the individual inspection data Dteo is an unprocessed inspection component part ob, and then defines the two voltage values V1 and V2 stored in the memory unit 4. The higher of the voltage value V2 is the voltage value of the applied voltage, that is, the voltage value of the applied voltage is increased (step 94), and the individual inspection of the electronic component for which the individual inspection data Dteo is not completed is performed. Made with the data Dteo. In this case, the processing unit 3 executes the second step 81 to 87 in the processing contents which are substantially equal to the processing contents in the first steps 81 to 87 described above, thereby creating the individual inspection material Dteo. The following mainly describes the steps different from the processing contents initially performed in steps 81 to 87, and the steps in which the processing contents are the same are omitted.

In the second step of the step 81 to the step 87, the individual inspection data Dteo for the electronic component that is not created for the individual inspection data Dteo is created. Therefore, in the second step 81, the processing unit 3 selects only the individual inspection materials Dteo as the unprocessed electronic components (in the present example, only the resistors 75, 76, and 77) as the inspection target component ob. Steps 82 to 86 are repeatedly executed until the individual inspection materials Dteo for all the inspection target parts ob are created in step 87.

In each of the second simulation processes 84 and 85, the voltage value V2 of the applied voltage exceeds the forward voltage value Vf of the diode 74 (that is, the voltage by applying the voltage value V2, the diode 74) Move to the ON state). Therefore, even when the electronic component included in the net list including the diode 74 is used as the inspection target part ob, a current can flow through the inspection target part ob in the simulation. Therefore, by performing the second step 81 to the step 87, the individual inspection materials Dteo of the electronic component selected as the inspection target part ob are all created. Finally, the processing unit 3 determines in step 87 that the individual inspection document Dteo is not the inspection target component ob, and the inspection data creation processing 90 shown in Fig. 6 is completed.

As described above, in the inspection data creation device 1 for performing the inspection data creation processing 90, the inspection data creation processing 90 (the inspection data creation method), and the computer-readable recording medium on which the program is recorded, The voltage value of the voltage applied to the net list (normal circuit net list NEno and fault circuit net list NEab) including the inspection target part ob in the simulation is set to be multi-stage (in the above example, the voltage value V1 is used) In the case of the individual inspection data Dteo for the substrate inspection device, the voltage value of the applied voltage is sequentially increased from the low side (the voltage value of the applied voltage is sequentially increased). In the case of the inspection target component ob included in the net meter that flows the current by applying a voltage, the processing of the individual inspection data Dteo is performed, and the voltage value is lower (in the case of the voltage value V1 and the voltage value V2). In this example, the electronic component in which the individual inspection data Dteo is created in the voltage value V1) is applied by a voltage after a higher voltage value (voltage value V2 in this example) is applied. Except ob side parts execution.

Therefore, the inspection data creation device 1, the inspection data creation processing 90 (inspection data creation method), and the computer-readable recording medium on which the program is recorded are executed by the inspection data creation processing 90. The calculation amount of the simulation when the voltage is applied to the voltage value of all the stages (two stages in this example) is performed on all the inspection target parts ob, and the calculation amount of the simulation can be sufficiently reduced while The substrate inspection apparatus performs a more secure inspection (not a check of a high voltage value V2 that only flows current in any net meter by applying a voltage, but an inspection that also includes application of a voltage of a lower voltage value V1. In the inspection, in particular, the inspection object part ob which can be used for the inspection of the application of the voltage with a low voltage value, the individual inspection data Dteo which is a safer inspection can be omitted for the inspection of the high voltage value. .

In the above, the series of individual inspection materials Dteo of the substrate inspection apparatus which can set the voltage value of the applied voltage to the voltage values V1 and V2 are described as an example. However, the application can be applied to the pair. In the case where the voltage value of the voltage is set to the individual inspection data Dteo of the substrate inspection apparatus in a plurality of stages (three stages, four stages, ...), the inspection data creation processing 90 can be applied as appropriate.

However, in the actual inspection target substrate to be inspected by the substrate inspection device, the parameter values of the plurality of circuit elements electrically connected to each other are formed (for example, when the circuit element is a resistor, the resistance value is a capacitor value). In the case of the electrostatic capacitance value, when the diode is a diode, the forward voltage value or the like is not consistent with the nominal value (the value used in the above simulation) described in the table, etc., and is within the allowable range ( The tolerance is uneven. Therefore, if the substrate inspection apparatus uses the individual inspection data Dteo created as described above, the actual formation is performed. The inspection of the plurality of circuit elements electrically connected to each other in the circuit board of the inspection target substrate may result in a different result from the simulation (that is, the circuit elements (inspection target parts that can be inspected in the simulation cannot be inspected) The case of the result of the failure).

Therefore, the processing unit 3 can perform the verification processing on the individual inspection data Dteo created as described above, and can improve the reliability of the individual inspection data Dteo. In the verification processing, the processing unit 3 is configured to check the individual inspection data Dteo for each circuit element in the individual inspection data creation processing, and to check the individual inspection data Dteo in the circuit network. In the state in which the parameter value of the circuit element other than the circuit component (inspection target component) to be inspected is changed within the allowable range (allowable difference) of the circuit component, the individual inspection data Dteo is used. Check the contents, perform normal-time simulation processing, and fault-time simulation processing to verify whether the difference between the normal-time inspection result and the failure-time inspection result is maintained.

Then, as a result of the verification processing, the individual inspection data Dteo in which the dissimilar state of the normal-time inspection result and the failure-time inspection result is maintained remains, and the individual inspection data Dteo in which the dissimilar state is not maintained is deleted. In the case of the circuit element which was originally inspected by the individual inspection data Dteo, the individual inspection data Dteo system was not included. By using the individual inspection data Dteo obtained by performing the verification process as described above, the substrate inspection apparatus can significantly reduce the problem in the case of performing inspection of the circuit elements constituting the circuit network formed on the actual inspection target substrate (in the case of In the simulation, it is impossible to check the occurrence of the failure of the original detectable circuit element (inspection target part), so the reliability of the individual inspection data Dteo can be greatly improved. Rise.

80~87‧‧‧Steps

Claims (20)

An inspection data creation apparatus includes: inspecting a probe point that is placed on a surface of an inspection target substrate and connected to a circuit net, and inspects an electrical interaction between the circuit board formed on the inspection target substrate The processing unit that supplies the individual inspection data for the circuit network when at least one of the plurality of circuit elements is connected, the processing unit performs a process of normal time analog processing according to the plurality of circuits The element is set to the normal circuit netlist in the normal state, and the normal network inspection result is obtained by performing the simulation checked by the predetermined inspection content on the circuit network in the normal state; the failure time simulation processing is based on the plural number At least one of the circuit elements is formed as a failure state as an inspection target, and the remaining circuit elements are formed into a fault circuit net table in all normal states, and the inspection contents are executed on the circuit network in the failure state. The inspection result of the failure is obtained by the simulation to be inspected; and the data for individual inspection is processed and processed. When the inspection result with the normal inspection result of the inspection failure of different contents, is formed as the individual inspection when the object of inspection with the inspection data. In the inspection data creation device according to the first aspect of the invention, the processing unit is configured to change the at least one circuit element to be inspected in a predetermined order in accordance with the normal circuit net list. Compensating the fault netlist of the foregoing fault circuit netlist, and according to the foregoing faulty power generated in the fault nettable creation process The road network table performs simulation processing when the foregoing faults are executed. The inspection data creation device according to the first aspect of the invention, wherein the processing unit performs the inspection on the inspection content accompanying application of a voltage to the circuit network in the normal time simulation processing and the failure time simulation processing. In the above simulation, the individual inspection data creation processing is performed to create the individual inspection data, and the normal inspection result of the normal time simulation processing is not different from the failure time inspection result of the simulation processing at the time of the failure. When the individual inspection data is originally the unprocessed inspection target, the normal voltage simulation processing, the failure time simulation processing, and the individual inspection data creation processing are executed by increasing the voltage value of the applied voltage. The inspection data creation device according to the second aspect of the invention, wherein the processing unit performs the inspection on the inspection content accompanying application of a voltage to the circuit network in the normal time simulation processing and the failure time simulation processing. In the above simulation, the individual inspection data creation processing is performed to create the individual inspection data, and the normal inspection result of the normal time simulation processing is not different from the failure time inspection result of the simulation processing at the time of the failure. When the individual inspection data is originally the unprocessed inspection target, the normal voltage simulation processing, the failure time simulation processing, and the individual inspection data creation processing are executed by increasing the voltage value of the applied voltage. The inspection data creation device according to the first aspect of the invention, wherein the processing unit performs a verification process for the individual inspection data created in the individual inspection data creation processing, The parameter value of the circuit element other than the inspection target to be inspected by the individual inspection data in the circuit network is changed within the allowable range of the circuit element, and the data for the individual inspection data is used. In the above-described inspection content, the normal-time simulation processing and the above-described failure-time simulation processing are executed to verify whether or not the dissimilar state between the normal-time inspection result and the failure-time inspection result is maintained. The inspection data creation device according to the second aspect of the invention, wherein the processing unit performs the verification processing on the individual inspection data created in the individual inspection data creation processing, In the state in which the parameter value of the circuit element other than the inspection target to be inspected by the individual inspection data in the circuit network is changed within the allowable range of the circuit element, the aforementioned information indicated by the individual inspection data is used. The content is checked, and the normal-time simulation processing and the above-described failure-time simulation processing are executed to verify whether the dissimilar state of the normal-time inspection result and the failure-time inspection result is maintained. The inspection data creation device according to the third aspect of the invention, wherein the processing unit performs the verification processing on the individual inspection data created in the individual inspection data creation processing, In the state in which the parameter value of the circuit element other than the inspection target to be inspected by the individual inspection data in the circuit network is changed within the allowable range of the circuit element, the aforementioned information indicated by the individual inspection data is used. The content is checked, and the normal-time simulation processing and the above-described failure-time simulation processing are executed to verify whether the dissimilar state of the normal-time inspection result and the failure-time inspection result is maintained. The inspection data creation device of the fourth aspect of the invention, wherein the processing unit performs a verification process for the individual inspection data created in the individual inspection data creation processing, In the state in which the parameter value of the circuit element other than the inspection target to be inspected by the individual inspection data in the circuit network is changed within the allowable range of the circuit element, the aforementioned information indicated by the individual inspection data is used. The content is checked, and the normal-time simulation processing and the above-described failure-time simulation processing are executed to verify whether the dissimilar state of the normal-time inspection result and the failure-time inspection result is maintained. An inspection data creation device for inspecting a test point on a surface of an inspection target substrate in a substrate inspection device having one or more types of inspection functions, and individually inspecting the inspection object The material for the individual inspection of the plurality of electronic components of the substrate includes: an inspection target component that is included in the plurality of electronic components as a result of the inspection based on the design data of the inspection target substrate, and is connected to the two The circuit net formed by the at least two or more electronic components of the above-mentioned inspection points, the normal circuit netlist in which the electronic components are all normal normal circuit nets, and the failure of only one of the inspection target components The memory unit and the processing unit of the fault circuit net of the faulty circuit network of the faulty circuit network in the state, the processing unit performs the following processing for all the inspection target components: normal time analog processing, which uses the aforementioned normal circuit The netlist is obtained by simulation for each inspection function of one or more types. The contact is connected to the check point and the normal to the circuit network of the above type 1 Checking the normal inspection result at the time of the function check; the simulation processing at the time of the failure, using the above-mentioned fault circuit netlist, and simulating and determining that the probe contact is connected to the fault circuit according to each of the inspection functions of the one or more types The failure check result when the faulty circuit net is detected by the inspection function of one or more types of the checkpoints of the net; and the individual inspection data creation processing, which is the normal state of each of the above-described one or more types of inspection functions The result of the time check and the result of the above-described failure time when the inspection function is the same as the normal inspection result is compared, and the inspection function of the normal time inspection result and the failure time inspection result are different. In the above, the inspection contents of the circuit net including the inspection target component are inspected by one of the inspection functions, and the individual inspection for checking whether the inspection target component is defective in any of the above-described failure states is used. data. The inspection data creation device according to claim 9, wherein the processing unit performs a process of selecting a component to be selected from the plurality of electronic components based on the design data; a table creation process for specifying a circuit network including at least two or more electronic components connected to two or more of the inspection points, including the inspection target component, based on the design data, and the circuit network The electronic component included is a network table of the normal circuit network as the normal circuit net as the normal circuit net table; and the fault net table creation process is based on the normal circuit net list. Will make the front The circuit network when the inspection target component fails in any one of the fault states is used as the fault circuit network to form a netlist of the fault circuit network as the fault circuit netlist. The inspection data creation device according to claim 9, wherein the inspection function is performed by applying a voltage to the circuit network, and the processing unit executes the normal time inspection in the individual inspection data creation processing. As a result, the inspection function that is different from the inspection result at the time of the failure is not present, and the individual inspection data is formed as an unprocessed component to be inspected, and the voltage value of the applied voltage is increased to execute the foregoing. The normal-time simulation processing, the above-described failure-time simulation processing, and the aforementioned individual inspection data creation processing. The inspection data creation device according to claim 10, wherein the inspection function is performed by applying a voltage to the circuit network, and the processing unit executes the normal time inspection in the individual inspection data creation processing. As a result, the inspection function that is different from the inspection result at the time of the failure is not present, and the individual inspection data is formed as an unprocessed component to be inspected, and the voltage value of the applied voltage is increased to execute the foregoing. The normal-time simulation processing, the above-described failure-time simulation processing, and the aforementioned individual inspection data creation processing. The inspection data creation device of the ninth aspect of the invention, wherein the processing unit performs the verification processing on the individual inspection data created in the individual inspection data creation processing, In the state in which the parameter value of the electronic component other than the component to be inspected, which is inspected by the individual inspection data in the circuit network, is changed within the allowable range of the electronic component, the above-described information for the individual inspection data is used. The content is checked, and the normal-time simulation processing and the above-described failure-time simulation processing are executed to verify whether the dissimilar state of the normal-time inspection result and the failure-time inspection result is maintained. The inspection data creation device of claim 10, wherein the processing unit performs a verification process for the individual inspection data created in the individual inspection data creation processing, except for the circuit The parameter content of the electronic component other than the component to be inspected, which is inspected by the individual inspection material in the network, is changed within the allowable range of the electronic component, and the inspection content indicated by the individual inspection material is used. And performing the aforementioned normal time simulation processing and the aforementioned failure time simulation processing to verify whether the dissimilar state of the normal time inspection result and the failure time inspection result is maintained. The inspection data creation device of the eleventh aspect of the invention, wherein the processing unit performs the verification processing on the individual inspection data created in the individual inspection data creation processing, except for the circuit The parameter content of the electronic component other than the component to be inspected, which is inspected by the individual inspection material in the network, is changed within the allowable range of the electronic component, and the inspection content indicated by the individual inspection material is used. And performing the aforementioned normal time simulation processing and the aforementioned failure time simulation processing to verify whether the dissimilar state of the normal time inspection result and the failure time inspection result is maintained. . The inspection data creation device of claim 12, wherein the processing unit performs a verification process for the individual inspection data created in the individual inspection data creation processing, except for the circuit The parameter content of the electronic component other than the component to be inspected, which is inspected by the individual inspection material in the network, is changed within the allowable range of the electronic component, and the inspection content indicated by the individual inspection material is used. And performing the aforementioned normal time simulation processing and the aforementioned failure time simulation processing to verify whether the dissimilar state of the normal time inspection result and the failure time inspection result is maintained. A method for preparing an inspection data, wherein a probe is placed in contact with a surface of a substrate to be inspected and connected to a circuit net, and an electrical connection is formed between the circuit board and the circuit substrate. When the at least one of the plurality of circuit elements is used for the individual inspection data for the circuit network, the following processing is performed: the normal-time simulation processing is based on when the plurality of circuit elements are all in the normal state. a normal circuit netlist that performs a normal time check result by performing a simulation checked by a predetermined inspection content on the circuit network in a normal state; and a fault-time simulation process based on at least one of the plurality of circuit elements The circuit element is formed as a failure state as an inspection target, and the remaining circuit elements are formed into a fault circuit net table in all normal states, and the circuit network in the failure state is obtained by performing simulation of the inspection contents. Check the result at the time of failure; and In the individual inspection data creation processing, the inspection contents when the normal inspection result and the failure time inspection result are different are formed as the individual inspection materials when the inspection target is inspected. A method for preparing an inspection data, which is formed by inspecting a surface of a substrate to be inspected in a substrate inspection apparatus having one or more types of inspection functions, and individually inspecting the inspection object In the memory unit, the memory unit is configured to include an inspection target component to be inspected by the plurality of electronic components based on the design data of the inspection target substrate. And a circuit network comprising at least two or more electronic components connected to the two or more of the inspection points, a normal circuit netlist in which the electronic components are all normal normal circuit nets, and Checking the fault circuit netlist of the fault circuit network of the above-mentioned circuit network in which the target component fails in any one of the fault states, and performing the following processing for all the inspection target components: normal time analog processing, which is used by the aforementioned memory unit The aforementioned normal circuit netlist read out is simulated according to each of the inspection functions of the one or more types The normal time inspection result when the probe is brought into contact with the inspection point connected to the normal circuit network and the inspection function is performed by the above-described one or more types of inspection functions; the failure time simulation processing is performed by using the above-mentioned memory The fault circuit net table read by the unit obtains the checkpoint that connects the probe to the faulty circuit network by simulation for each of the one or more types of inspection functions. And the inspection result of the failure when the faulty circuit network is inspected by the inspection function of one or more types; and the inspection data creation processing of the individual inspection data, wherein the normal inspection result of each of the one or more types of inspection functions is Comparing the above-described failure time inspection results when the inspection function is the same as the normal inspection result, and when the normal inspection result differs from the failure inspection result by one or more types, The inspection content of the circuit net including the inspection target component is checked by one of the inspection functions, and the individual inspection data for checking whether the inspection target component is defective in any one of the failure states described above is used. A computer-readable recording medium for recording a program, the computer is configured to make a probe contact with a surface of the inspection target substrate and connected to the circuit network, and to check the circuit formed on the inspection target substrate The at least one of the plurality of circuit elements electrically connected to each other of the network is used for the individual inspection data for the circuit network, and the computer performs the following processing: normal time simulation processing, which is based on the foregoing plural The circuit element is set to the normal circuit netlist in the normal state, and the normal network inspection result is obtained by performing the simulation checked by the predetermined inspection content on the circuit network in the normal state; the failure time simulation processing is based on the aforementioned At least one of the plurality of circuit elements is formed as a failure state as an inspection target, and the remaining circuit elements are formed into a fault circuit net table in all normal states, and the foregoing circuit is executed in the failure state. Content checked The result of the failure inspection is obtained by simulation, and the individual inspection data creation processing is performed by the above-mentioned inspection contents when the normal inspection result and the failure inspection result are different, and the individual inspection is performed when the inspection target is inspected. Inspection data. A computer-readable recording medium on which a program is recorded for causing a computer to make a probe contact with a surface of a substrate to be inspected in a substrate inspection device having one or more types of inspection functions, The individual inspection materials for the plurality of electronic components mounted on the inspection target substrate are individually inspected, and the memory portion is stored in the memory portion including the design data of the inspection target substrate and the inspection target among the plurality of electronic components. a test circuit component, and a circuit network comprising at least two or more electronic components connected to the two or more checkpoints, wherein the electronic component is a normal circuit netlist of all normal normal circuit nets, and Regarding the fault circuit net list of the fault circuit network of the above-described circuit network in which only the inspection target component is failed in any one of the fault states, the computer performs the following processing for all the inspection target components: normal time analog processing, Using the aforementioned normal circuit netlist read by the aforementioned memory unit, each type of one or more types is used. The function is to simulate the normal time inspection result when the probe is contacted with the inspection point connected to the normal circuit network and the inspection is performed by the inspection function of one or more types, and the simulation processing at the time of failure. Using the aforementioned fault circuit netlist read by the memory unit, each of the one or more types of inspection functions is simulated. a failure time inspection result when the probe is contacted with the inspection point connected to the faulty circuit network and the faulty circuit is inspected by the inspection function of one or more types; and an individual inspection data creation processing is performed Comparing the normal time inspection result of each type of inspection function and the failure time inspection result when the inspection function is the same as the normal inspection result, when the normal time inspection result and the failure When there is one or more types of inspection functions that are different in the inspection result, the inspection contents of the circuit net including the inspection target component are inspected by one of the inspection functions, and the inspection target component is in any of the foregoing. The above-mentioned individual inspection materials that are faulty in one fault state.