TW201622242A - Multi-layer circuit board - Google Patents

Abstract

A multi-layer circuit board comprises a substrate and a first circuit multi-layer. The first circuit multi-layer comprises a first polymer layer and a first conductive layer. The first polymer layer is disposed on a surface of the substrate. The material of the first polymer layer comprises a first trigger particle, a first polymer material, and a first curative agent mixed with each other. The material stable temperature of the first polymer layer is smaller than 80 degrees Celsius. The first conductive layer is mounted into a surface of the first polymer layer far away from the substrate.

Description

Laminated circuit board

This proposal relates to a laminated circuit board, and more particularly to a laminated circuit board formed at a low temperature.

In an electronic device, a circuit is usually formed on a substrate to electrically connect various electronic components. Or even in the field of wireless communication, an antenna element can be fabricated by forming a coil on a substrate.

In the conventional technique of manufacturing an antenna element, the coil is usually placed on an additional circuit board, and after the antenna element is completed, it is attached to the inner surface of the casing of the electronic device. However, such an approach tends to limit the circuit configuration within the electronic device and is less likely to shrink the size of the electronic device.

Therefore, there is a manufacturer that directly sets a polymer layer on the inner surface of the casing of the electronic device, and then provides a coil on the polymer layer to expand the flexibility of circuit preparation in the electronic device and to reduce the volume of the electronic device. However, when the polymer layer is cured on the inner surface of the casing, a high curing temperature is often required to cure the polymer layer. However, the allowable temperature of the casing itself is often lower than the curing temperature of the polymer layer. As a result, the casing may be deformed or damaged during the process of curing the polymer layer.

In view of the above problems, this proposal proposes a laminated circuit. The board can be used to manufacture a laminated circuit board in a lower temperature environment by using a polymer layer which can be cured at a lower temperature.

The proposal proposes a laminated circuit board comprising a substrate and a first line laminate. The first circuit layer includes a first polymer layer and a first conductive layer. The first polymer layer is disposed on one surface of the substrate. The material of the first polymer layer includes one of the first trigger particles, a first polymer material and a first curing agent mixed with each other. The material stability of the first polymer layer is less than 80 degrees Celsius. The first conductive layer is embedded on the surface of the first polymer layer away from the substrate.

According to the laminated circuit board of the present proposal, the laminated circuit board can be manufactured in a lower temperature environment by the material stable temperature of the polymer layer being less than 80 degrees Celsius. Therefore, when the casing of the electronic device is the substrate and the polymer layer is cured on the surface of the substrate, the casing is less likely to be deformed or damaged by the curing temperature of the polymer layer. Further, in other cases, the laminated circuit board can also apply various substrates which allow the temperature to be higher than the curing temperature of the polymer layer.

The above description of the contents of this proposal and the following description of the implementation of the proposal are used to demonstrate and explain the spirit and principle of this proposal, and provide a further explanation of the scope of the patent application of this proposal.

10, 20, 30, 40‧‧‧ laminated circuit boards

11, 21, 31, 41‧‧‧ substrates

111, 211, 311‧‧‧ upper surface

12‧‧‧Line stacking

121‧‧‧ polymer layer

121a, 231a‧‧‧ grooves

1211‧‧‧ surface

122‧‧‧ Conductive layer

122a, 222a, 322a, 422a‧‧‧ first feed point

122b, 232a, 332a, 422b‧‧‧ second feed point

22, 32, 42‧‧‧ first line stack

221, 321, 421‧‧‧ first polymer layer

2211, 3211‧‧‧ surface

222, 322, 422‧‧‧ first conductive layer

222b, 322b‧‧‧ first connection point

23, 33, 43‧‧‧ second line stack

231, 331, 431‧‧‧ second polymer layer

2311, 3311‧‧‧ surface

232, 332, 432‧‧‧ second conductive layer

232b, 332b‧‧‧second connection point

24, 34, 441, 442, 443, 444, 445, 446‧‧‧ conductive through holes

24a‧‧‧through holes

31a‧‧‧first through hole

310‧‧‧Substrate polymer layer

312‧‧‧ lower surface

321a‧‧‧first groove

331a‧‧‧second groove

34a‧‧‧second through hole

4221‧‧‧First conductive trace

4223‧‧‧3rd conductive trace

4225‧‧‧ fifth conductive trace

4227‧‧‧ seventh conductive trace

4322‧‧‧Second conductive trace

4324‧‧‧4th conductive trace

4326‧‧‧ sixth conductive trace

FIG. 1 is a perspective view of a laminated circuit board according to an embodiment of the present proposal.

2, 3, and 4 illustrate the manufacture of the laminated circuit board of FIG. Schematic diagram of the process profile.

FIG. 5 is a schematic perspective view of a laminated circuit board according to another embodiment of the present proposal.

Fig. 6, Fig. 7, Fig. 8, and Fig. 9 are schematic cross-sectional views showing the manufacturing process of the laminated circuit board of Fig. 5.

FIG. 10 is a perspective view of a laminated circuit board according to another embodiment of the present proposal.

11 , 12 and 13 are cross-sectional views showing the manufacturing process of the laminated circuit board of FIG. 10 .

Figure 14 is a perspective view showing a laminated circuit board according to another embodiment of the present proposal.

The detailed features and advantages of the present invention are described in detail below in the embodiments, which are sufficient to enable any person skilled in the art to understand the technical contents of the present invention and implement them according to the contents disclosed herein. And the drawings, any one of ordinary skill in the art can easily understand the purpose and advantages of this proposal. The following examples further illustrate the views of this proposal in detail, but do not limit the scope of this proposal by any point of view.

The proportions shown in the figures are for reference only and are not intended to limit the proposal.

Please refer to FIG. 1 , which is a perspective view of a laminated circuit board 10 according to an embodiment of the present proposal. In this embodiment, the laminated circuit board 10 package A substrate 11 and a wiring layer 12 are included. The substrate 11 can be a housing of an electronic device or a circuit board within the electronic device. The wiring layer 12 includes a polymer layer 121 and a conductive layer 122. The polymer layer 121 is provided on one of the upper surfaces 111 of the substrate 11. The material of the polymer layer 121 includes one of the trigger particles, a polymer material, a curing agent and a colorant. The material temperature of the polymer layer 121 is less than 80 degrees, and even more, the curing temperature of the polymer layer 121 is less than 80 degrees Celsius. The polymer layer 121 is electrically insulated. The conductive layer 122 is embedded on the surface 1211 of the polymer layer 121. The surface 1211 is away from the surface 1211 of the substrate 11. The exposed surface of the conductive layer 122 may be plated with a protective layer (not shown), and the material of the protective layer may be, for example but not limited to, gold or nickel. In the present embodiment, the material of the polymer layer 121 includes a coloring material, but is not limited thereto. In other embodiments, the material of the polymer layer 121 may also include a colorant as needed.

In the present embodiment, the thickness of the polymer layer 121 can be, for example but not limited to, 10 to 100 μm. The thickness of the conductive layer 122 can be, for example but not limited to, 10-20 μm. However, the thickness of the conductive layer 122 is smaller than the thickness of the polymer layer 121. The conductive layer 122 may be arranged in a pattern of coils. For example, the pattern of this coil can be a spiral pattern. Even more can be a square spiral pattern. Each of the two ends of the conductive layer 122 has a first feed point 122a and a second feed point 122b. The signal source can feed the conductive layer 122 by the first feed point 122a and the second feed point 122b. The manufacturer can change the capacitive coupling within the conductive layer 122 by appropriately adjusting the line width and line spacing of the conductive layer 122. Thereby, the imaginary inductance of the feeding of the integral coil can be designed to compensate for the high inductance effect generated by the conductive layer 122, and the compensation feed capacitor effect is adjusted, the input impedance matching is improved, and the excitation current intensity is improved.

In this embodiment, the material of the substrate 11 can be, for example but not limited to, selected from the group consisting of ferrite, polyethylene terephthalate (PET), and polyimide (PI). Group of. In other embodiments, the material of the substrate 11 can also be, for example but not limited to, glass, copper, iron or other high molecular polymer.

The triggering particles can be, for example but not limited to, ceramic particles, organometallic particles, metal chelates, or semiconductor materials having an energy gap of 3 electron volts (eV) or greater.

The structure of the organometallic particles is, for example, R-M-R or R-M-X, wherein M is a metal, R is an alkyl group, an aromatic hydrocarbon, a cycloalkane, a halogene, a heterocyclic ring or a carboxylic acid, and X is a halogen compound or an amine. M can be selected from the group consisting of gold, silver, copper, tin, aluminum, nickel and palladium.

The metal chelate can be formed by chelation of a metal with a chelating agent. The chelating agent may be Ammonium pyrrolidine dithiocarbamate (APDC), ehtylenediaminetetraacetic acid (EDTA), NTA (nitrilotri actiate) or diethylenetriamine pentaacetic acid (DTPA). ). For example, the metal chelate can be a copper-ethylenediaminetetraacetic acid (Cu-EDTA) chelate.

A semiconductor material having an energy gap of 3 electron volts (eV) or higher is selected from the group consisting of gallium nitride, zinc sulfide, tantalum carbide, zinc oxide, titanium oxide, aluminum gallium nitride, aluminum nitride, aluminum oxide, boron nitride, and tantalum nitride. And a group of cerium oxide.

The polymer material can be, for example but not limited to, selected from epoxy materials Group of (epoxy), polymethyl methacrylate (PMMA) and acrylic resin. Among them, the epoxy material is, for example, a mixture of bisphenol and epoxy resin.

The curing agent can be, for example but not limited to, a group selected from the group consisting of an amine crosslinking agent and a methylene bis acrylamide (MBA) crosslinking agent. Among them, the amine crosslinking agent is, for example, a dicyandiamide (DICY) crosslinking agent or an aniline crosslinking agent. Wherein, when the polymer material is an epoxy material and the curing agent is a dicyandiamide crosslinking agent, the curing temperature of the polymer layer 121 may be less than 60 degrees Celsius.

Referring to FIGS. 2, 3, and 4, a cross-sectional view showing the manufacturing process of the laminated circuit board 10 of FIG. 1 is shown. As shown in FIG. 2, the substrate 11 is provided, and the polymer layer 121 is formed on the upper surface 111 of the substrate 11, and the polymer layer 121 is cured in an environment lower than 80 degrees Celsius.

As shown in Fig. 3, the groove 121a is scribed on the surface 1211 of the polymer layer 121 by a laser or the like and corresponding to the position of the conductive layer 122 shown in Fig. 1. In the recess 121a, the polymer material is removed, leaving the trigger particles on the inner surface of the recess 121a. In the present embodiment, since the coloring material is mixed in the polymer layer 121, the selected laser beam can be a visible light laser, so that the polymer layer 121 absorbs the energy provided by the laser. In other embodiments, when the colorant is not mixed in the polymer layer 121, the selected laser may be a non-visible laser such as an ultraviolet laser.

As shown in FIG. 4, a conductive layer 122 is formed in the recess 121a. When the conductive layer 122 is formed, for example, but not limited to, using an electroless plating method to trigger the particles As a core, a conductive layer 122 is deposited in the recess 121a. In addition, a protective layer (not shown) may be plated on the exposed surface of the conductive layer 122. The fabrication of the laminated circuit board 10 is completed by the steps shown in Figs. 2 to 4 .

Referring to FIG. 5, a perspective view of a laminated circuit board 20 in accordance with another embodiment of the present disclosure is shown. In the present embodiment, the laminated circuit board 20 includes a substrate 21, a first wiring layer 22, a second wiring layer 23, and a conductive via 24.

The first wiring layer 22 includes a first polymer layer 221 and a first conductive layer 222. The first polymer layer 221 is disposed on the upper surface 211 of the substrate 21. The material of the first polymer layer 221 includes one of the first trigger particles, a first polymer material, a first curing agent and a first color material. The material stability temperature of the first polymer layer 221 is less than 80 degrees, and even more so that the curing temperature of the first polymer layer 221 is less than 80 degrees Celsius. The first polymer layer 221 is electrically insulated. The first conductive layer 222 is embedded on the surface 2211 of the first polymer layer 221 , and the surface 2211 is away from the surface 2211 of the substrate 21 . In the present embodiment, the material of the first polymer layer 221 includes the first color material, but is not limited thereto. In other embodiments, the material of the first polymer layer 221 may also include the first color material as needed.

The second wiring layer 23 includes a second polymer layer 231 and a second conductive layer 232. The second polymer layer 231 is disposed on the surface 2211 of the first wiring layer 22. The material of the second polymer layer 231 includes a second triggering particle, a second polymer material, a second curing agent and a second coloring material mixed with each other. The material stability temperature of the second polymer layer 231 is less than 80 degrees, and even more so is the second polymer layer 231. The curing temperature is less than 80 degrees Celsius. The second polymer layer 231 is electrically insulated. The second conductive layer 232 is embedded in a surface 2311 of the second polymer layer 231. The surface 2311 is away from the surface 2311 of the first wiring layer 22. The exposed surface of the second conductive layer 232 may be plated with a protective layer (not shown). In the present embodiment, the material of the second polymer layer 231 includes the second color material, but is not limited thereto. In other embodiments, the material of the second polymer layer 231 may also include the second colorant as needed.

The conductive vias 24 penetrate the second polymer layer 231 and are electrically connected to the first conductive layer 222 and the second conductive layer 232 .

In this embodiment, the size and material of the first circuit layer 22 and the second circuit layer 23 may be similar or even substantially the same as those of the circuit layer 12 shown in FIG. 1 , and thus will not be further described herein.

The first conductive layer 222 and the second conductive layer 232 may be disposed in a pattern of coils. For example, the pattern of this coil can be a spiral pattern. Even more can be a square spiral pattern. The first conductive layer 222 has a first feeding point 222a and a first connecting point 222b. The two ends of the second conductive layer 232 have a second feeding point 232a and a second connecting point 232b. The conductive vias 24 are electrically connected to the first connection point 222b and the second connection point 232b. The signal source can feed the first conductive layer 222 and the second conductive layer 232 by the first feed point 222a and the second feed point 232a. The manufacturer can change the capacitive coupling in the first conductive layer 222 and the second conductive layer 232 by appropriately adjusting the line width and the line pitch of the first conductive layer 222 and the second conductive layer 232. In addition, the first conductive layer 222 and the first conductive layer 222 can be changed by appropriately adjusting the positions and the positions of the first conductive layer 222 and the second conductive layer 232 when they are projected onto the substrate 21. Capacitive coupling between the two conductive layers 232. Thereby, the imaginary inductance of the feeding of the integral coil can be designed to compensate for the high inductance effect generated by the first conductive layer 222 and the second conductive layer 232, and the compensation feed capacitor effect is adjusted, the input impedance matching is improved, and the feed is improved. Into the excitation current intensity.

Referring to FIGS. 6 , 7 , 8 , and 9 , a cross-sectional view showing a manufacturing process of the laminated circuit board 20 of FIG. 5 is illustrated. As shown in FIG. 6, a substrate 21 and a first wiring layer 22 provided on the upper surface 211 of the substrate 21 are provided. The first polymer layer 221 and the first conductive layer 222 of the first wiring layer 22 can be manufactured in a similar manner to the polymer layer 121 and the conductive layer 122 shown in FIGS. 2, 3, and 4, Therefore, it will not be repeated here.

As shown in FIG. 7, the second polymer layer 231 is formed on the surface 2211 of the first polymer layer 221, and the second polymer layer 231 is cured in an environment of less than 80 degrees Celsius.

As shown in FIG. 8, the groove 231a is scribed on the surface 2311 of the second polymer layer 231 and corresponding to the position of the second conductive layer 232 shown in FIG. 5 by means of laser or the like, and correspondingly The through hole 24a is formed at the position of the conductive via 24 shown in FIG. The through hole 24a penetrates the second polymer layer 231. In the recess 231a and the through hole 24a, the second polymer material is removed, leaving the second triggering particles on the inner surface of the recess 231a and the inner surface of the through hole 24a. In the present embodiment, since the second color layer is mixed in the second polymer layer 231, the selected laser beam can be a visible light laser, so that the second polymer layer 231 absorbs the energy provided by the laser. When the second color layer is not mixed in the second polymer layer 231, the selected laser may be invisible. A laser of light, such as an ultraviolet laser.

As shown in FIG. 9, a second conductive layer 232 is formed in the recess 231a, and a conductive via 24 is formed in the through hole 24a. When the second conductive layer 232 and the conductive vias 24 are formed, for example, but not limited to, using an electroless plating method, the triggering particles are used as a core, and the second conductive layer 232 is deposited in the recess 231a and deposited in the through holes 24a. Conductive through hole 24. In addition, a protective layer (not shown) may be plated on the exposed surface of the second conductive layer 232. The fabrication of the laminated circuit board 20 is completed by the steps shown in Figs. 6 to 9.

Referring to FIG. 10, a perspective view of a laminated circuit board 30 in accordance with another embodiment of the present disclosure is shown. In the present embodiment, the laminated circuit board 30 includes a substrate 31, a first wiring layer 32, a second wiring layer 33, and a conductive via 34.

The first wiring layer 32 includes a first polymer layer 321 and a first conductive layer 322. The first polymer layer 321 is disposed on the upper surface 311 of the substrate 31. The material of the first polymer layer 321 includes one of the first trigger particles, a first polymer material, a first curing agent and a first color material. The material stability temperature of the first polymer layer 321 is less than 80 degrees, and even more so that the curing temperature of the first polymer layer 321 is less than 80 degrees Celsius. The first polymer layer 321 is electrically insulated. The first conductive layer 322 is embedded in a surface 3211 of the first polymer layer 321 . The surface 3211 is a surface 3211 away from the substrate 31 . The exposed surface of the first conductive layer 322 may be plated with a protective layer (not shown). In the present embodiment, the material of the first polymer layer 321 includes the first color material, but is not limited thereto. In other embodiments, the first polymer layer 321 The material can also include the first color material as required.

The second wiring layer 33 includes a second polymer layer 331 and a second conductive layer 332. The second polymer layer 331 is disposed on the lower surface 312 of the substrate 31 , and the first polymer layer 321 and the second polymer layer 331 are located on opposite sides of the substrate 31 .

The material of the second polymer layer 331 includes a second triggering particle, a second polymer material, a second curing agent and a second coloring material mixed with each other. The material stability temperature of the second polymer layer 331 is less than 80 degrees, and even more so that the curing temperature of the second polymer layer 331 is less than 80 degrees Celsius. The second polymer layer 331 is electrically insulated. The second conductive layer 332 is embedded in a surface 3311 of the second polymer layer 331 . The surface 3311 is away from the surface 3311 of the substrate 31 . The exposed surface of the second conductive layer 332 may be plated with a protective layer (not shown). In the present embodiment, the material of the second polymer layer 331 includes the second color material, but is not limited thereto. In other embodiments, the material of the second polymer layer 331 may also include the second colorant as needed.

The conductive vias 34 penetrate the first polymer layer 321 , the substrate 31 , and the second polymer layer 331 , and electrically connect the first conductive layer 322 and the second conductive layer 332 .

In this embodiment, the size and material of the first circuit layer 32 and the second circuit layer 33 may be similar or even substantially the same as those of the circuit layer 12 shown in FIG. 1 , and thus will not be further described herein.

The first conductive layer 322 and the second conductive layer 332 may be disposed in a pattern of coils. For example, the pattern of this coil can be a spiral pattern. Even more can be a square spiral pattern. Each of the two ends of the first conductive layer 322 has a first feed point 322a and a first connection point 322b, and the two ends of the second conductive layer 332 respectively have a second feed. An entry point 332a and a second connection point 332b. The conductive vias 34 are electrically connected to the first connection point 322b and the second connection point 332b. The signal source can feed the first conductive layer 322 and the second conductive layer 332 by the first feed point 322a and the second feed point 332a.

Referring to FIG. 11, FIG. 12 and FIG. 13, a schematic cross-sectional view showing the manufacturing process of the laminated circuit board 30 of FIG. 10 is shown. As shown in Fig. 11, a substrate 31 is provided. The substrate has a first through hole 31a. The position of the first through hole 31a corresponds to the position of the conductive through hole 34 shown in FIG. 10, and the outer diameter of the first through hole 31a may be larger than the outer diameter of the conductive through hole 34. , but not limited to this. In other embodiments, if the material of the substrate 31 is made of an insulating material, the outer diameter of the first through hole 31a may be substantially equal to the outer diameter of the conductive through hole 34.

A first polymer layer 321 is formed on the upper surface 311 of the substrate 31, a second polymer layer 331 is formed on the lower surface 312 of the substrate 31, and a substrate polymer layer 310 is filled in the first through hole 31a. The material of the substrate polymer layer 310 may be the same as the material of the first polymer layer 321 or the second polymer layer 331. The material of the substrate polymer layer 310 includes a substrate triggering particle, a substrate polymer material, and a substrate curing. And a substrate color, but are not limited thereto. In other embodiments, the material of the substrate polymer layer 310 may also include a substrate color material as needed. The substrate polymer layer 310 is electrically insulated. The first polymer layer 321, the substrate polymer layer 310, and the second polymer layer 331 are cured in an environment lower than 80 degrees Celsius.

As shown in FIG. 12, the first recess 321a is scribed on the surface 3211 of the first polymer layer 321 and corresponding to the first conductive layer 322 shown in FIG. 10 by means of laser or the like. The surface 3311 of the second polymer layer 331 and the phase The second recess 331a is scored corresponding to the position of the second conductive layer 332 shown in FIG. 10, and the second through hole 34a is formed corresponding to the position of the conductive via 34 shown in FIG. The second through hole 34 a penetrates the first polymer layer 321 , the substrate polymer layer 310 , and the second polymer layer 331 . In the first recess 321a, the second recess 331a, and the second through hole 34a, the first polymer material, the second polymer material, and the substrate polymer material are removed, leaving the first trigger particle in the first The inner surface of a recess 321a leaves the second triggering particle on the inner surface of the second recess 331a, and leaves the substrate triggering particles on the inner surface of the second through hole 34a. In this embodiment, since the first color layer, the substrate polymer layer 310, and the second polymer layer 331 are respectively mixed with the first color material, the substrate color material, and the second color material, the selected laser light can be selected. For the laser of visible light, the first polymer layer 321, the substrate polymer layer 310, and the second polymer layer 331 absorb the energy provided by the laser. When the first color layer, the substrate polymer layer 310, and the second polymer layer 331 are not mixed with the first color material, the substrate color material, and the second color material, the selected laser may be a non-visible laser. .

As shown in FIG. 13, a first conductive layer 322 is formed in the first recess 321a, a second conductive layer 332 is formed in the second recess 331a, and a conductive via 34 is formed in the second through hole 34a. When the first conductive layer 322, the second conductive layer 332, and the conductive vias 34 are formed, the first conductive layer 322 may be deposited in the first recess 321a by using, for example, but not limited to, an electroless plating method. A second conductive layer 332 is deposited in the second recess 331a, and a conductive via 34 is deposited in the second through hole 34a. In addition, a protective layer (not shown) may be plated on the exposed surface of the first conductive layer 322 and the exposed surface of the second conductive layer 332. By Figures 11 to 13 In the steps shown, the fabrication of the laminated circuit board 30 is completed.

Please refer to FIG. 14 , which is a perspective view of a laminated circuit board 40 according to another embodiment of the present proposal. The laminated circuit board 40 of the present embodiment is similar to the laminated circuit board 30 shown in Fig. 10, but the wiring pattern is slightly different. In the present embodiment, the laminated circuit board 40 includes a substrate 41, a first wiring layer 42, a second wiring layer 43, and a plurality of conductive vias 441, 442, 443, 444, 445, and 446. The projection of the first conductive layer 422 on the substrate 41 is biased on one side of the substrate 41, and the projection of the second conductive layer 432 on the substrate 41 is biased on the other side of the substrate 41. The projections of the first conductive layer 422 and the second conductive layer 432 on the substrate 41 overlap only the conductive vias 441, 442, 443, 444, 445, and 446.

The first conductive layer 422 includes odd-numbered conductive traces, that is, a first conductive trace 4221, a third conductive trace 4223, a fifth conductive trace 4225, and a seventh conductive trace 4227, and surrounds the substrate 41. The central position is arranged from the inside out. The second conductive layer 432 includes even-numbered conductive traces, that is, a second conductive trace 4322, a fourth conductive trace 4324, and a sixth conductive trace 4326, and is disposed around the center of the substrate 41 and is arranged from the inside to the outside. . The conductive vias 441, 442, 443, 444, 445, and 446 penetrate the first polymer layer 421, the substrate 41, and the second polymer layer 431.

The conductive via 441 is electrically connected to one end of the first conductive trace 4221 and one end of the second conductive trace 4322. The conductive via 442 is electrically connected to the other end of the second conductive trace 4322 and one end of the third conductive trace 4223. The conductive via 443 is electrically connected to the other end of the third conductive trace 4223 and one of the fourth conductive traces 4324 end. The conductive via 444 is electrically connected to the other end of the fourth conductive trace 4324 and one end of the fifth conductive trace 4225. The conductive via 445 is electrically connected to the other end of the fifth conductive trace 4225 and one end of the sixth conductive trace 4326. The conductive via 446 is electrically connected to the other end of the sixth conductive trace 4326 and one end of the seventh conductive trace 4227. The first feed point 422a of the first conductive layer 422 is located at one end of the first conductive trace 4221 with respect to the conductive via 441, and the second feed point 422b is located at one end of the seventh conductive trace 4227 with respect to the conductive via 446.

The first conductive layer 422 and the second conductive layer 432 are substantially Set to a single layer coil. The signal source can feed the first conductive layer 422 and the second conductive layer 432 by the first feed point 422a and the second feed point 422b. Since the single-layer coils provided by the first conductive layer 422 and the second conductive layer 432 have a skew direction with respect to the substrate 41, the direction of the magnetic lines of force caused by the coils is also skewed relative to the substrate 41. If the coil is used as an antenna, the direction of emission and the direction of reception are also skewed relative to the substrate 41, even with a deflection of 90 degrees.

In summary, the laminated circuit board of the present invention can be manufactured in a lower temperature environment by a material having a stable temperature of less than 80 degrees, or a curing temperature of the polymer layer being less than 80 degrees Celsius. Laminated circuit board. Therefore, when the casing of the electronic device is the substrate and the polymer layer is cured on the surface of the substrate, the casing is not deformed or damaged by the curing temperature of the polymer layer. Moreover, in other occasions, the laminated circuit board can also be applied with a temperature higher than that of the polymer layer. Various substrates for curing temperatures.

In addition, the laminated circuit board of the present proposal can change the capacitive coupling in the conductive layer by adjusting the line width and the line spacing of the conductive layer, thereby designing the imaginary inductance of the integral coil to compensate the conductive layer. The high inductance effect, and the adjustment compensates for the feed capacitance effect, improving the input impedance matching to improve the excitation current intensity.

In addition, the laminated circuit board of the present invention can also change the capacitance between the first conductive layer and the second conductive layer by adjusting the position and the amount of overlap of the first conductive layer and the second conductive layer when projected onto the substrate. Sexual coupling. In addition, by the positional arrangement of the first conductive layer and the second conductive layer, a single-layer coil having a bias property can be manufactured to obtain an electromagnetic characteristic having a bias property.

Although this proposal is disclosed above in the foregoing embodiments, it is not intended to limit the proposal. All changes and refinements are within the scope of the patent protection of this proposal without departing from the spirit and scope of this proposal. Please refer to the attached patent application scope for the scope of protection defined in this proposal.

10‧‧‧Laminated circuit board

11‧‧‧Substrate

111‧‧‧Upper surface

12‧‧‧Line stacking

121‧‧‧ polymer layer

1211‧‧‧ surface

122‧‧‧ Conductive layer

122a‧‧‧First feed point

122b‧‧‧second feed point

Claims (11)

A laminated circuit board comprising: a substrate; and a first circuit layer, comprising: a first polymer layer disposed on a surface of the substrate, the material of the first polymer layer comprising one of the first layers a triggering particle, a first polymer material and a first curing agent, wherein the first polymer layer has a material stable temperature of less than 80 degrees Celsius; and a first conductive layer is embedded in the first polymer layer away from the substrate One of the surfaces. The laminated circuit board of claim 1, wherein the first polymer layer has a curing temperature of less than 80 degrees Celsius. The laminated circuit board according to claim 1, wherein the material of the substrate is selected from the group consisting of ferrite, polyethylene terephthalate (PET), and polyimide (PI). The group formed. The laminated circuit board of claim 1, wherein the first polymer material is selected from the group consisting of epoxy resin and acrylic resin. The laminated circuit board of claim 1, wherein the first curing agent is selected from the group consisting of an amine crosslinking agent and a methylene bisacrylamide (MBA) crosslinking agent. The laminated circuit board of claim 1, wherein the material of the first polymer layer further comprises a color material, the first trigger particle, the first polymer material, and The first curing agents are mixed with each other. The layered circuit board of claim 1, further comprising a second circuit layer, comprising: a second polymer layer disposed on the surface of the first circuit layer away from the surface of the substrate, the second polymer layer The material comprises a second triggering particle, a second polymer material and a second curing agent, wherein the second polymer layer has a curing temperature of less than 80 degrees Celsius: and a second conductive layer is embedded in the first layer The two polymer layers are away from the surface of one of the first line laminates. The laminated circuit board of claim 7, further comprising a conductive via extending through the second polymer layer and electrically connecting the first conductive layer and the second conductive layer. The laminated circuit board of claim 1, further comprising a second circuit layer, comprising: a second polymer layer disposed on the other surface of the substrate, and the first polymer layer and the second high layer The molecular layer is located on opposite sides of the substrate, and the material of the second polymer layer comprises a second triggering particle, a second polymer material and a second curing agent mixed with each other, and the curing temperature of the second polymer layer Less than 80 degrees Celsius: and a second conductive layer embedded in the second polymer layer away from a surface of the substrate. The laminated circuit board of claim 9, further comprising a conductive via extending through the first polymer layer, the second polymer layer, and the substrate, and electrically connecting the circuit board a first conductive layer and the second conductive layer. The laminated circuit board of claim 9, further comprising a first conductive via, a second conductive via, and a third conductive via extending through the first polymer layer, the second polymer layer, and The first conductive layer includes a first conductive trace and a third conductive trace, the second conductive layer includes a second conductive trace and a fourth conductive trace, and the first conductive via is electrically One end of the first conductive trace and one end of the second conductive trace, the second conductive via is electrically connected to the other end of the second conductive trace and one end of the third conductive trace, the first The three conductive vias are electrically connected to the other end of the third conductive trace and one end of the fourth conductive trace.