TW201616561A - Semiconductor manufacturing method - Google Patents

Abstract

The present invention relates a semiconductor manufacturing method. The method has the following steps: Step S1: detaching a pluralities of wafers to a pluralities of cartridges; Step S2: a first delivering device sending the wafer to at least one buffer area; Step S4: a second delivering device sending the wafer to at least one wet etching zone for wet etching; Step S6: sending the wafer to a vacuum zone for vacuuming; Step S8: a third delivering device sending the wafer to at least one dry etching zone for dry etching.

Description

Semiconductor production method

The present invention relates to a semiconductor production method, and more particularly to a semiconductor production method integrating dry etching and wet etching.

Etching techniques currently used in the LCD process array and semiconductor related industries can be mainly divided into Wet Etching and Dry etching. The advantage of dry etching is that it has better performance for controlling minute structures, but its vacuum device has poor resistance to particles in the environment and products produced by process reactions. The advantages of wet etching are simple process and high production speed. Compared with high-quality etching options, however, since wet etching is a chemical etching, it is an isotropic etching, and there is a significant undercut after etching. Thus, it can be understood that dry etching and wet etching each have their own advantages and disadvantages.

In the conventional industry, dry etching and wet etching are performed separately. However, both dry etching and wet etching require a lot of manpower and cost, and the technical differences are enormous. Therefore, no one in the semiconductor field has thought of integrating the two processes. However, the inventors believe that if the two processes can be integrated, the advantages and disadvantages of dry etching and wet etching can be complemented, and the conventional single wet etching or dry etching process can be solved, and The problem of cost and time that cannot be matched with each other.

The advantages and spirit of the present invention will be further understood from the following detailed description and the appended claims.

A semiconductor production method of the present invention, the main purpose of which is to provide a method for simultaneously performing wet etching and dry etching to solve the cost and time that a conventional single wet etching or dry etching process cannot be matched with each other. The problem.

The semiconductor manufacturing method of the present invention comprises the following steps: Step S1: mounting a plurality of wafers to be etched on a plurality of cassettes; Step S2: transporting the plurality of wafers to be etched by using a first transport device Up to at least one buffer zone; Step S4: using the second transport device to transport the wafer to be etched in the buffer to the wet etched region of the wet etching system without the wafer to be etched for wet Etching; step S6: transporting the wet-etched wafer to the evacuation region by the second transport device to perform a vacuuming operation in the vacuuming region; and step S8: using the third transport device The wafer in the evacuated region is transported to a dry etched region where there is still space for dry etching.

The semiconductor production method as described above, wherein step S3 is performed after step S2: determining whether any of the plurality of wet etch regions of the plurality of wet etch regions can re-place the wafer to be etched; if yes, Step S4 is performed, and if NO, step S3 is repeated.

The semiconductor manufacturing method as described above, wherein step S5 is performed after step S4: determining whether the evacuated area is a repositionable wafer; if yes, proceeding to step S6; if not, repeating step S5 .

a semiconductor production method as described above, wherein the step is performed after step S6 Step S7: determining whether the dry etched region can reposition the wafer to be etched; if yes, proceeding to step S8; if not, repeating step S7.

The semiconductor manufacturing method as described above, wherein the first transporting device of the step S2 comprises at least one mechanical arm and at least one sliding rail device, and the mechanical arm is moved over the through-the-rail device.

The semiconductor production method as described above, further comprising the step S10: transporting the dry etched wafer into the wet etched region by a transport device to perform wet etching; in a further embodiment, at the step After S8, step S9 is performed: determining whether any of the plurality of wet etched regions of the plurality of wet etch regions can further accommodate the wafer to be etched; if yes, proceeding to step S10; if not, repeating the steps S9.

Therefore, the semiconductor production method of the present invention can integrate the two processes of the conventional dry etching and the wet etching, thereby taking advantage of the dry etching and the wet etching, and making up for the shortcomings of the two. Long complements, solving the traditional process of only a single wet etching or dry etching, and the cost and time of not being able to match each other, is extremely practical.

11, 12, 13, 14‧‧ ‧ Carmen

2‧‧‧First transport device

21‧‧‧ Robotic arm

22‧‧‧Slide device

3‧‧‧buffer

4‧‧‧ Wet etching system

41, 42, 43, 44‧‧‧ Wet etched areas

5‧‧‧Second transport device

6‧‧‧vacuum area

7‧‧‧ Third transport device

8‧‧‧dry etching system

81, 82, 83, 84‧‧‧ dry etching zone

S1~S8, S1~S10‧‧‧ steps

1 is a block diagram of an embodiment of a semiconductor manufacturing system of the present invention.

2A is a flow chart showing a first embodiment of the semiconductor production method of the present invention.

2B is a flow chart of a second embodiment of the semiconductor production method of the present invention.

Fig. 3A is a flow chart showing a third embodiment of the semiconductor production method of the present invention.

3B is a flow chart showing a fourth embodiment of the semiconductor production method of the present invention.

Please refer to FIG. 1. FIG. 1 is a structural diagram of an embodiment of a semiconductor production system of the present invention. The semiconductor production method of the present invention is implemented by a semiconductor production system including a plurality of cassettes 11, 12, 13, 14, a first transport device 2, a buffer zone 3, and a wet etching system. 4. A second transport device 5, a vacuuming zone 6, a third transporting device 7, and a dry etching system 8. The plurality of cassettes 11, 12, 13, and 14 are used to accommodate a plurality of wafers (not shown) to be etched. The first transport device 2 is located around the plurality of cassettes 11, 12, 13, 14 for pinching or transporting the plurality of wafers to be etched to the buffer zone 3. In a further embodiment, the first transport device 2 can be composed of a robot arm 21 and a slide rail device 22, so that the robot arm 21 can slide back and forth in the left and right directions through the rail device 22. The wafer to be etched in any of the cassettes 11, 12, 13, 14 is taken so that the wafer can be transported to the buffer zone 3. The wet etching system 4 has a plurality of wet etching regions 41, 42, 43, 44, and the wet etching system 4 is in a normal atmospheric or atmospheric environment, so that the first conveying device 2 is also The wafer to be etched of the buffer 3 is sandwiched or transported to any of the wet etched regions 41, 42, 43, 44 at normal temperature and normal pressure for wet etching. Next, the second transport device 5 (shown as a robot arm) is located at the periphery of the wet etching system 4 for clamping or transporting the wet etched wafer to the vacuuming region 6 To prepare for the dry etching process in the subsequent dry etching system 8. Specifically, the vacuuming region 6 is located at a side or a periphery of the dry etching system 8, and the vacuuming region 6 is connected to the dry etching system 8 and is electrically connected; thus, the vacuuming region 6 is transparently pumped. The air motor or the air pump (not shown) continuously draws air to maintain the internal state of the dry etching system 8 in a state close to vacuum. In addition, when the wet etching is completed, the wafer is transported to the evacuated region 6, by the second transport device 5 The wafer is gripped and transported into the evacuated region 6.

Further, the dry etching system 8 includes a plurality of dry etch regions 81, 82, 83, 84; the third transport device 7 (shown as a robot arm) is adjacent to the dry etch regions 81, 82, 83. 84, so that the wafer in the evacuated region 6 can be clamped or transported to any of the dry etched regions 81, 82, 83, 84. In the process, generally, the dry etching regions 81, 82, 83, 84 may further be provided with a gas injector (not shown) for etching a wafer or a semiconductor workpiece, and the gas injector may spray HF (hydrofluorination). acid) and NH _{3 are} gas (ammonia) gas, so that HF gas and NH ₃ gas for the silicon oxide mold (silicon oxide) on the wafer or etching a semiconductor substrate (susceptor). In addition, a semiconductor heating device may be disposed in the dry etching regions 81, 82, 83, and 84 for transmitting a plurality of heating lamps (not shown) or a heat exchange system disposed around the semiconductor substrate. The wafer or the semiconductor is heated to control the ambient temperature of the overall process of the wafer or semiconductor; and further, a plurality of exhaust conduits may be disposed in the space in the dry etching regions 81, 82, 83, and 84. It is used to evacuate and exhaust the exhaust gas of the process.

Further, in the semiconductor substrate processing system in the dry etching regions 81, 82, 83, 84, a control region for controlling the transfer and processing conditions of the semiconductor workpiece, such as the injection of the above HF gas and NH ₃ gas, may be further provided. The amount, temperature, pressure, and time (process time) at which the semiconductor substrate is exposed to the gas, and the like. The initial state data of each semiconductor substrate can be determined by prior detection, and the data of the environment and conditions are stored and controlled by the control area. Here, the initial state of the semiconductor substrate refers to a state before the wafer or the semiconductor substrate is processed; therefore, the semiconductor production system of the present invention can be controlled according to the initial state of the wafer or semiconductor and the process conditions of the semiconductor substrate. Or a change; for example, in the case of a process for etching a tantalum oxide mold, the semiconductor production system of the present invention can change the amount of etching to be performed according to the thickness (ie, the initial state) of the formed tantalum oxide film on the semiconductor substrate, and further Determine the process conditions. The initial state of the semiconductor substrate is within the standard range, and individual semiconductor workpieces can be individually processed or processed simultaneously according to actual conditions, thereby maintaining high productivity and maintaining a constant process quality level and yield.

In conjunction with the above semiconductor production system, the semiconductor production method of the present invention will be described below; in particular, the semiconductor production method of the present invention can also be applied to semiconductor fabrication equipment of other architectures and other configurations, and is not produced by the semiconductor disclosed in FIG. The system is limited. Please refer to FIG. 2A. FIG. 2A is a flow chart of a first embodiment of a semiconductor manufacturing method of the present invention. The semiconductor production method of the present invention comprises the following steps: Step S1, mounting a plurality of wafers to be etched on a plurality of cassettes 11, 12, 13, 14. Step S2: transporting the plurality of wafers to be etched to a buffer zone 3 by using a first transport device 2. Step S3: determining whether any of the plurality of wet etched regions 41, 42, 43, 44 is capable of accommodating the wafer to be etched; if yes (indicating at least one wet etched region 41) , 42, 42, 44 can be placed in the wafer), then proceed to step S4; if not (indicating that all wet etching regions 41, 42, 43, 44 have been placed, filled with wafers, can not be placed Wafer), then repeat step S3. Step S4: transporting the wafer to be etched of the buffer zone 3 to the wet etched regions 41, 42, 43, 44 of the wet etching system 4 without the wafer to be etched by the second transport device 5, For wet etching. Step S5: It is determined whether the vacuuming region 6 is a re-placeable wafer. If YES (indicating that there is still space), proceeding to step S6; if not (indicating that there is no space), repeating the determination of step S5. It should be noted that if the vacuuming area 6 is sufficiently large or the structure is properly designed, the step S5 may not be performed, that is, the step S5 may not be judged. Next, in step S6, the wet-etched wafer is transported to the vacuuming region 6 by the second transport device 5; then, the vacuuming operation is performed in the vacuuming region 6. Then, step S7: determining the dry etched area Whether the 81, 82, 83, 84 can be repositioned the wafer to be etched; if it is (indicating that at least one dry etched region 81, 82, 83, 84 can be repositioned), step S8 is performed, If no (indicating that there is no space), repeat step S7. Step S8: The wafer in the evacuated region 6 is transported to the still-etched dry etching regions 81, 82, 83, 84 by the third transport device 7 for dry etching.

As described above, the determining step of steps S3, S5, and S7 is preferably performed by a sensor, and a computer program calculates and analyzes whether the wafer can be re-inserted; therefore, the wet etching region 41 can be regarded as , 42, 43, 44 and the dry etched regions 81, 82, 83, 84, and the wafer to be etched is placed at any time for etching. In other embodiments, the fixing process (for example, a fixed-time etching operation or a fixed etching sequence) may be employed. In this case, the determining steps of steps S3, S5, and S7 may be omitted. The flowchart of the judging step is omitted, that is, as shown in FIG. 2B, where step S2 is performed, step S4 is directly performed, step S4 is performed, step S6 is directly performed, and step S6 is performed directly, step S8 is performed, and no analysis by computer is performed. Judge.

Here, the semiconductor manufacturing system and the semiconductor manufacturing method of the present invention are applicable semiconductor processing processes including, but not limited to, related etching processes for forming silicon oxide on a semiconductor substrate; for example, semiconductor evaporation (evaporation) or cleaning process.

Please refer to FIG. 3A, which is a flow chart of a third embodiment of the semiconductor manufacturing method of the present invention. Steps S1 to S8 of the method are the same as those of FIG. 1A, and therefore will not be described again. After step S8, proceeding to step S9: determining whether any of the plurality of wet etched regions 41, 42, 43, 44 is capable of accommodating the wafer to be etched; if yes (indicating If at least one of the wet etched regions 41, 42, 43, 44 can be placed in the wafer again, step S10 is performed; if not (indicating that all of the wet etched regions 41, 42, 43, 44 are accommodated and saturated) If the wafer cannot be placed in the wafer again, step S9 is repeated. step S10, the wafer after dry etching (for example, the second transport device 5 or the third transport device 7) is transported to the wet etch regions 41, 42, 43, 44 by a transport device to perform wet etching. As a result, after the wafer undergoes wet etching (step S4) and dry etching (step S8) in sequence, the wet etching can be performed again and again (step S10).

Certainly, as described above, the determining step of step S9 may also be omitted, and the flowchart of the step S9 is omitted, that is, as described in the fourth embodiment of FIG. 3B, wherein step S8 is performed directly to perform step S10, and no need to pass through the computer. Analyze and judge.

Therefore, the semiconductor production method of the present invention can be performed only by wet etching and dry etching, or can be wet, dry, wet, or even repeatedly and repeatedly repeated as needed. Etching, very flexible to match a variety of semiconductor production processes to solve the cost and time problems of traditional single wet etch or dry etch processes that cannot be matched with each other. In addition, the semiconductor production method of the present invention can simultaneously process a plurality of semiconductor substrates, prevent the process quality of the semiconductor substrate from being lowered, and improve the productivity (Through-put), thereby having great commercial value.

The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto. It is to be understood that the scope of the present invention is not limited to the spirit and scope of the present invention, and should be considered as a further embodiment of the present invention.

S1~S8‧‧‧Steps

Claims (7)

A semiconductor production method includes the following steps: Step S1: mounting a plurality of wafers to be etched on a plurality of cassettes (11, 12, 13, 14); and step S2: using a first transport device (2) Transporting the plurality of wafers to be etched to at least one buffer region (3); step S4: transporting the wafer to be etched of the buffer region (3) to the wet pattern by using the second transport device (5) There is no wet etched region (41, 42, 43, 44) of the wafer to be etched in the etching system (4) for wet etching; step S6: wet etching is performed by using the second transport device (5) The completed wafer is transported to the evacuation region (6) to perform a vacuuming operation in the evacuation region (6); Step S8: using the third transport device (7) to evacuate the vacuum region (6) The wafer is transported to a dry etched region (81, 82, 83, 84) that still has space for dry etching. The semiconductor manufacturing method according to claim 1, wherein the step S3 is performed after the step S2: determining whether any of the plurality of wet etching regions (41, 42, 43, 44) is rewritable. The etched wafer is to be etched; if yes, step S4 is performed, and if no, step S3 is repeated. The semiconductor production method of claim 1, wherein step S5 is performed after step S4: determining whether the vacuuming region (6) is a repositionable wafer; if yes, proceeding to step S6, if no Then, step S5 is repeated. The semiconductor manufacturing method of claim 1, wherein step S7 is performed after step S6: determining whether the dry etching region (81, 82, 83, 84) can reposition the wafer to be etched; if yes, Then, step S8 is performed, and if no, step S7 is repeated. The semiconductor production method of claim 1, wherein the first transport device of step S2 (2) comprising at least one robot arm (21) and at least one rail device (22), the robot arm (21) moving over the rail device (22). The semiconductor manufacturing method of claim 1, further comprising the step S10 of: transporting the dry etched wafer into the wet etched region (41, 42, 43, 44) by using a transport device to perform wet Etching. The semiconductor production method of claim 6, wherein the step S9 is performed after the step S8: determining whether any of the plurality of wet etched regions (41, 42, 43, 44) is etchable. The wafer to be etched is set; if yes, step S10 is performed, and if no, step S9 is repeated.