TW201527946A - Energy saving circuit for computer - Google Patents

Energy saving circuit for computer Download PDF

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TW201527946A
TW201527946A TW102141964A TW102141964A TW201527946A TW 201527946 A TW201527946 A TW 201527946A TW 102141964 A TW102141964 A TW 102141964A TW 102141964 A TW102141964 A TW 102141964A TW 201527946 A TW201527946 A TW 201527946A
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Taiwan
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pin
electrically connected
control module
display
pull
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TW102141964A
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Chinese (zh)
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Long Zhao
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Hongfujin Prec Ind Wuhan
Hon Hai Prec Ind Co Ltd
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Priority to TW102141964A priority Critical patent/TW201527946A/en
Publication of TW201527946A publication Critical patent/TW201527946A/en

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Abstract

The invention discloses an energy saving circuit for computer, used to control working state of a host and a display of the computer, thus to save energy. The energy saving circuit includes a power supply module, an infrared sensor module and a control module. The power supply module is electrically connected to the infrared sensor module, the control module and the display. The infrared sensor module is electronically connected to the control module, and is configured to detect whether the user leaves the display and transfer a corresponding detection signal to the control module. The control module is electronically connected to the host and the display, and is used to calculate a left time according to the detection signal, and control the host and the display to enter into different working states on the basis of the left time, so as to control the rank of energy consumption.

Description

電腦節能電路Computer energy-saving circuit

本發明涉及一種節能電路,尤其涉及一種電腦節能電路。The invention relates to an energy-saving circuit, in particular to a computer energy-saving circuit.

隨著電腦的快速發展,電腦在人們的工作和生活中應用的越來越廣泛,從而使得對電腦的節能也顯得越來越重要。然而,用戶在離開電腦時往往會因為某些原因而未關閉電腦,用戶長時間的離開而電腦還一直運行著,這就造成了對電能的極大浪費。With the rapid development of computers, computers are becoming more and more widely used in people's work and life, which makes the energy saving of computers more and more important. However, when the user leaves the computer, the computer is often not turned off for some reason, the user leaves for a long time and the computer is still running, which causes a great waste of electric energy.

鑒於上述問題,有必要提供一種電腦節能電路。In view of the above problems, it is necessary to provide a computer energy-saving circuit.

一種電腦節能電路,用於控制主機和顯示器的工作狀態,所述電腦節能電路包括電源模組、紅外感應模組以及控制模組,電源模組電性連接並提供工作電壓至紅外感應模組、控制模組及顯示器;該紅外感應模組電性連接至控制模組,用於探測用戶是否離開顯示器並將相應的探測訊號傳送給控制模組;該控制模組還電性連接至主機與顯示器,用於根據接收到的探測訊號計算用戶離開的時間,並根據用戶離開的時間的長短控制主機和顯示器進入不同的工作狀態以對主機和顯示器的能耗進行分級控制。A computer energy-saving circuit for controlling a working state of a host and a display, wherein the computer energy-saving circuit comprises a power module, an infrared sensor module and a control module, wherein the power module is electrically connected and provides a working voltage to the infrared sensor module, a control module and a display; the infrared sensor module is electrically connected to the control module, and is configured to detect whether the user leaves the display and transmit the corresponding detection signal to the control module; the control module is also electrically connected to the host and the display For calculating the time when the user leaves according to the received probe signal, and controlling the host and the display to enter different working states according to the length of time the user leaves, to hierarchically control the power consumption of the host and the display.

所述的電腦節能電路藉由紅外感應模組探測用戶是否離開顯示器的前方,控制模組根據離開時間的長短對顯示器和主機的能耗進行分級控制,從而達到節能的效果。The computer energy-saving circuit detects whether the user leaves the front of the display by the infrared sensing module, and the control module hierarchically controls the energy consumption of the display and the host according to the length of the departure time, thereby achieving the energy-saving effect.

圖1為本發明較佳實施方式的具有本發明電腦節能電路的功能模組圖。1 is a functional block diagram of a computer energy-saving circuit of the present invention in accordance with a preferred embodiment of the present invention.

圖2為圖1所示電腦節能電路的電路連接圖。2 is a circuit connection diagram of the computer energy-saving circuit shown in FIG. 1.

請參閱圖1,本發明較佳實施方式的電腦節能電路100用於控制顯示器200及主機300的工作狀態,以達到較佳的節能效果。該電腦節能電路100包括電源模組10、紅外感應模組20、控制模組30以及顯示介面模組40。Referring to FIG. 1, the computer energy-saving circuit 100 of the preferred embodiment of the present invention is used to control the working state of the display 200 and the host 300 to achieve better energy saving effects. The computer energy-saving circuit 100 includes a power module 10, an infrared sensor module 20, a control module 30, and a display interface module 40.

電源模組10電性連接至紅外感應模組20、控制模組30及顯示介面模組40,用於為紅外感應模組20、控制模組30及顯示介面模組40提供電源。請參閱圖2,電源模組10包括電源+5V_SB、電源開關SW1、第一分壓電阻R1、第二分壓電阻R2、第一電容C1和第二電容C2。在本實施方式中,該電源+5V_SB為電腦系統的+5V備用電源。電源開關SW1用於建立或斷開電源+5V_SB與控制模組30之間的電性連接,以選擇性地為該控制模組30提供電源。該第一電容C1一端接地,另一端電性連接至電源+5V_SB與電源開關之間的節點,用於對電源進行高頻濾波及防止電源瞬變影響控制模組30的工作。該第一分壓電阻R1一端電性連接於電源開關SW1與控制模組30之間,另一端電性連接於第二分壓電阻R2。第二分壓電阻R2的另一端接地。藉由第一分壓電阻R1和第二分壓電阻R2的分壓作用,該第一分壓電阻R1和第二分壓電阻R2之間節點的電壓值為紅外感應模組20及顯示介面模組40的工作電壓,在本實施例中該節點的電壓值為+3V。該第二電容C2一端接地,另一端電性連接至第一分壓電阻R1和第二分壓電阻R2之間的節點,用於對電源進行高頻濾波及防止電源瞬變影響顯示介面模組40的工作。The power module 10 is electrically connected to the infrared sensor module 20, the control module 30, and the display interface module 40 for supplying power to the infrared sensor module 20, the control module 30, and the display interface module 40. Referring to FIG. 2, the power module 10 includes a power supply +5V_SB, a power switch SW1, a first voltage dividing resistor R1, a second voltage dividing resistor R2, a first capacitor C1, and a second capacitor C2. In this embodiment, the power supply +5V_SB is a +5V standby power supply of the computer system. The power switch SW1 is used to establish or disconnect an electrical connection between the power supply +5V_SB and the control module 30 to selectively supply power to the control module 30. The first capacitor C1 is grounded at one end, and the other end is electrically connected to a node between the power supply +5V_SB and the power switch for high frequency filtering of the power supply and preventing power supply transients from affecting the operation of the control module 30. The first voltage dividing resistor R1 is electrically connected between the power switch SW1 and the control module 30, and the other end is electrically connected to the second voltage dividing resistor R2. The other end of the second voltage dividing resistor R2 is grounded. The voltage value of the node between the first voltage dividing resistor R1 and the second voltage dividing resistor R2 is the infrared sensing module 20 and the display interface module by the voltage dividing action of the first voltage dividing resistor R1 and the second voltage dividing resistor R2. The operating voltage of the group 40, in this embodiment, the voltage value of the node is +3V. The second capacitor C2 is grounded at one end, and the other end is electrically connected to a node between the first voltage dividing resistor R1 and the second voltage dividing resistor R2 for high frequency filtering of the power source and preventing power transients from affecting the display interface module. 40 jobs.

紅外感應模組20用於探測用戶是否離開顯示器200前方,並將探測訊號傳送給控制模組30。該紅外感應模組20包括紅外感應器21及第一上拉電阻R3,該紅外感應器21一端接地,另一端電性連接於控制模組30以傳遞探測訊號給該控制模組30,並藉由第一上拉電阻R3電性連接至電源模組10的第一分壓電阻R1和第二分壓電阻R2之間的節點,以將紅外感應器21輸出的探測訊號上拉至控制模組30能識別的電位。The infrared sensing module 20 is configured to detect whether the user leaves the front of the display 200 and transmit the detection signal to the control module 30. The infrared sensor module 20 includes an infrared sensor 21 and a first pull-up resistor R3. The infrared sensor 21 is grounded at one end, and the other end is electrically connected to the control module 30 to transmit a detection signal to the control module 30, and The first pull-up resistor R3 is electrically connected to the node between the first voltage dividing resistor R1 and the second voltage dividing resistor R2 of the power module 10 to pull up the detection signal output by the infrared sensor 21 to the control module. 30 identifiable potentials.

該控制模組30電性連接至主機300,並藉由顯示介面模組40與顯示器200電性連接,用於根據紅外感應模組20的探測訊號來實現對主機300和顯示器200的能耗的分級控制。控制模組30包括微型控制器31、時鐘電路32及重定電路33。在本實施方式中,該微型控制器31是ATMEL公司生產的型號為AT89C51的單片機。該微型控制器31包括電源引腳VCC、接地引腳GND、第一時鐘引腳XTAL1、第二時鐘引腳XTAL2、復位引腳RST、第一引腳P0.0、第二引腳P0.7、第三引腳P1.0、第四引腳P1.2、第五引腳P2.2以及第六引腳EA/VPP。該電源引腳VCC藉由電源開關SW1電連接至電源+5V_SB,該接地引腳GND接地,所述第一時鐘引腳XTAL1和第二時鐘引腳XTAL2電連接於時鐘電路32,所述重定引腳RST和第六引腳EA /VPP電連接於重定電路33,該第一引腳P0.0電連接至顯示介面模組40。所述第二引腳P0.7、第三引腳P1.0、第四引腳P1.2分別電性連接至主機300的睡眠模式信號點SLP_S3#、休眠模式信號點SLP_S4#、深度休眠模式信號點SUSWARN#,所述第二引腳P0.7與睡眠模式信號點SLP_S3#之間的節點通過第一下拉電阻R4接地;所述第三引腳P1.0與休眠模式信號點SLP_S4#之間的節點通過第二下拉電阻R5接地;所述第四引腳P1.2與深度休眠模式信號點SUSWARN#之間的節點通過一第三下拉電阻R6接地。所述第一下拉電阻R4、第二下拉電阻R5及第三下拉電阻R6是用於釋放相應引腳由高電位變成低電位時的多餘電荷。該微型控制器31的引腳P2.2電連接至紅外感應器21,用於接收紅外感應器21回饋的用戶是否離開的探測信號。睡眠模式信號點SLP_S3#的電位為邏輯低電平時,該主機300處於睡眠模式;休眠模式信號點SLP_S4#的電位為邏輯低電平時,該主機300處於休眠模式;深度休眠模式信號點SUSWARN#的電位為邏輯低電平時,該主機300處於深度休眠模式。主機300處於睡眠模式、休眠模式及深度休眠模式的功耗逐級降低。The control module 30 is electrically connected to the host 300 and electrically connected to the display 200 through the display interface module 40 for realizing energy consumption of the host 300 and the display 200 according to the detection signal of the infrared sensing module 20. Hierarchical control. The control module 30 includes a microcontroller 31, a clock circuit 32, and a reset circuit 33. In the present embodiment, the microcontroller 31 is a single-chip microcomputer model AT89C51 manufactured by ATMEL Corporation. The microcontroller 31 includes a power pin VCC, a ground pin GND, a first clock pin XTAL1, a second clock pin XTAL2, a reset pin RST, a first pin P0.0, and a second pin P0.7. The third pin P1.0, the fourth pin P1.2, the fifth pin P2.2, and the sixth pin EA/VPP. The power pin VCC is electrically connected to the power supply +5V_SB by the power switch SW1, the ground pin GND is grounded, and the first clock pin XTAL1 and the second clock pin XTAL2 are electrically connected to the clock circuit 32. The pin RST and the sixth pin EA /VPP are electrically connected to the reset circuit 33, and the first pin P0.0 is electrically connected to the display interface module 40. The second pin P0.7, the third pin P1.0, and the fourth pin P1.2 are electrically connected to the sleep mode signal point SLP_S3# of the host 300, the sleep mode signal point SLP_S4#, and the deep sleep mode, respectively. Signal point SUSWARN#, the node between the second pin P0.7 and the sleep mode signal point SLP_S3# is grounded through the first pull-down resistor R4; the third pin P1.0 and the sleep mode signal point SLP_S4# The node between the two is grounded through the second pull-down resistor R5; the node between the fourth pin P1.2 and the deep sleep mode signal point SUSWARN# is grounded through a third pull-down resistor R6. The first pull-down resistor R4, the second pull-down resistor R5, and the third pull-down resistor R6 are used to release excess charge when the corresponding pin changes from a high potential to a low potential. The pin P2.2 of the microcontroller 31 is electrically connected to the infrared sensor 21 for receiving a detection signal from the user that the infrared sensor 21 feeds back. When the potential of the sleep mode signal point SLP_S3# is a logic low level, the host 300 is in the sleep mode; when the potential of the sleep mode signal point SLP_S4# is a logic low level, the host 300 is in the sleep mode; the deep sleep mode signal point SUSWARN# When the potential is a logic low level, the host 300 is in a deep sleep mode. The power consumption of the host 300 in the sleep mode, the sleep mode, and the deep sleep mode is gradually reduced.

時鐘電路32用於給所述微型控制器31提供時鐘信號。該時鐘電路32包括晶振體Y1、第三電容C3以及第四電容C4。所述第三電容C3、第四電容C4的一端均接地,所述第三電容C3的另一端連接至所述晶振體Y1的一端後連接至第一時鐘引腳XTAL1,所述第四電容C4的另一端連接至所述晶振體Y1的另一端後連接至第二時鐘引腳XTAL2。The clock circuit 32 is used to provide a clock signal to the microcontroller 31. The clock circuit 32 includes a crystal body Y1, a third capacitor C3, and a fourth capacitor C4. One end of the third capacitor C3 and the fourth capacitor C4 are grounded, and the other end of the third capacitor C3 is connected to one end of the crystal oscillator Y1 and then connected to the first clock pin XTAL1, the fourth capacitor C4 The other end is connected to the other end of the crystal body Y1 and then connected to the second clock pin XTAL2.

重定電路33用於對微型控制器31進行復位。該重定電路33包括重定開關SW2、第二上拉電阻R7以及第四下拉電阻R8。該第二上拉電阻R7一端電性連接至電源引腳VCC,另一端連接至第六引腳EA/VPP並通過重定開關SW2連接至重定引腳RST。該復位引腳RST通過第四下拉電阻R8接地。The reset circuit 33 is for resetting the microcontroller 31. The reset circuit 33 includes a reset switch SW2, a second pull-up resistor R7, and a fourth pull-down resistor R8. The second pull-up resistor R7 is electrically connected to the power pin VCC at one end, and is connected to the sixth pin EA/VPP at the other end and is connected to the reset pin RST through the reset switch SW2. The reset pin RST is grounded through the fourth pull-down resistor R8.

顯示介面模組40包括金屬氧化物半導體場效應電晶體(Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET)Q1、自恢復保險絲FV1、視頻圖形陣列(Video Graphics Array,VGA)介面41、限流電阻R9、第五下拉電阻R10、第五電容C5以及第六電容C6。在本實施方式中,該MOSFET Q1是NPN型,該MOSFET Q1的柵極g電性連接至微型控制器31的第一引腳P0.0,且該柵極g通過第五下拉電阻R10接地;該MOSFET Q1的漏極d接地處理;該MOSFET Q1的源極s通過限流電阻R9電性連接至第一分壓電阻R1和第二分壓電阻R2之間;該VGA介面41通過自恢復保險絲FV1電性連接至MOSFET Q1的源極s;該第五電容C5一端接地,另一端電性連接至自恢復保險絲FV1和限流電阻R9之間;該第六電容C6一端接地,另一端電性連接至VGA介面41和自恢復保險絲FV1之間。The display interface module 40 includes a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) Q1, a self-recovering fuse FV1, a Video Graphics Array (VGA) interface 41, and a current limiting resistor. R9, a fifth pull-down resistor R10, a fifth capacitor C5, and a sixth capacitor C6. In this embodiment, the MOSFET Q1 is of the NPN type, the gate g of the MOSFET Q1 is electrically connected to the first pin P0.0 of the microcontroller 31, and the gate g is grounded through the fifth pull-down resistor R10; The drain d of the MOSFET Q1 is grounded; the source s of the MOSFET Q1 is electrically connected to the first voltage dividing resistor R1 and the second voltage dividing resistor R2 through the current limiting resistor R9; the VGA interface 41 passes the self-recovering fuse FV1 is electrically connected to the source s of the MOSFET Q1; the fifth capacitor C5 is grounded at one end, and the other end is electrically connected between the self-recovering fuse FV1 and the current limiting resistor R9; the sixth capacitor C6 is grounded at one end, and the other end is electrically connected. Connected between the VGA interface 41 and the self-recovery fuse FV1.

下面詳細說明電腦節能電路100的工作過程。The working process of the computer power saving circuit 100 will be described in detail below.

用戶在打開主機300和顯示器200的同時該電源開關SW1被連通,該微型控制器31自動將第四引腳P1.2、第三引腳P1.0、第二引腳P0.7按順序抬高電位至邏輯高電平,將第一引腳P0.0下拉電位至邏輯低電平,此時該MOSFET Q1處於截止狀態。此後該電腦節能電路100開始工作,該電源模組10為所述紅外感應模組20、控制模組30及顯示介面模組40提供合適的工作電壓。該紅外感應器21發射一連續的信號,以探測顯示器200用戶是否離開顯示器200。當用戶未離開顯示器200時,紅外感應器21將邏輯為高電平的探測信號傳遞給微型控制器31,此時,該微型控制器31各引腳輸出信號不變;當用戶離開顯示器200時,紅外感應器21將邏輯為低電平的探測信號傳遞給微型控制器31,此時該微型控制器31開始計時,當計時到一第一預設時間,如1分鐘時,該微型控制器31將第一引腳P0.0的拉高電位至邏輯高電平,此時該MOSFET Q1導通,從而該VGA介面41通過自恢復保險絲FV1接地,即該VGA介面41不再有電源供給,該顯示器200進入待機狀態。當計時到一第二預設時間,如到10分鐘時,該微型控制器31將第二引腳P0.7的電位下拉至邏輯低電平,由於該第二引腳P0.7與睡眠模式信號點SLP_S3#電性連接,從而將該睡眠模式信號點SLP_S3#的電位拉低至接地,此時該主機300進入睡眠狀態。當計時到第三預設時間,如30分鐘時,該微型控制器31將第三引腳P1.0的電位下拉至邏輯低電平,由於該第三引腳P1.0與休眠模式信號點SLP_S4#電性連接,從而將該休眠模式信號點SLP_S4#的電位拉低至接地,此時該主機300進入休眠狀態。當計時到一第四預設時間,如60分鐘時,該微型控制器31將第四引腳P1.2的電位下拉至邏輯低電平,由於該第四引腳P1.2與深度休眠模式信號點SUSWARN#電性連接,從而將該深度休眠模式信號點SUSWARN#的電位拉低至接地,此時該主機300進入深度休眠狀態。When the user turns on the host 300 and the display 200, the power switch SW1 is connected, and the micro controller 31 automatically lifts the fourth pin P1.2, the third pin P1.0, and the second pin P0.7 in order. High to logic high, pull the first pin P0.0 down to a logic low level, at this time the MOSFET Q1 is off. After that, the computer power-saving circuit 100 starts to work. The power module 10 provides a suitable working voltage for the infrared sensor module 20, the control module 30, and the display interface module 40. The infrared sensor 21 emits a continuous signal to detect whether the display 200 user is away from the display 200. When the user does not leave the display 200, the infrared sensor 21 transmits a detection signal that is logic high to the microcontroller 31. At this time, the output signals of the pins of the microcontroller 31 are unchanged; when the user leaves the display 200 The infrared sensor 21 transmits a logic low level detection signal to the microcontroller 31. At this time, the micro controller 31 starts timing, and when the timer reaches a first preset time, such as 1 minute, the micro controller 31 pulling the first pin P0.0 to a logic high level, at which time the MOSFET Q1 is turned on, so that the VGA interface 41 is grounded through the self-recovery fuse FV1, that is, the VGA interface 41 no longer has a power supply, The display 200 enters a standby state. When counting to a second preset time, such as up to 10 minutes, the microcontroller 31 pulls the potential of the second pin P0.7 to a logic low level due to the second pin P0.7 and the sleep mode. The signal point SLP_S3# is electrically connected, thereby pulling the potential of the sleep mode signal point SLP_S3# to ground, and the host 300 enters a sleep state. When counting to a third preset time, such as 30 minutes, the microcontroller 31 pulls the potential of the third pin P1.0 to a logic low level, due to the third pin P1.0 and the sleep mode signal point. The SLP_S4# is electrically connected to pull the potential of the sleep mode signal point SLP_S4# to ground, and the host 300 enters a sleep state. When counting to a fourth preset time, such as 60 minutes, the microcontroller 31 pulls the potential of the fourth pin P1.2 to a logic low level due to the fourth pin P1.2 and the deep sleep mode. The signal point SUSWARN# is electrically connected to pull the potential of the deep sleep mode signal point SUSWARN# to ground, and the host 300 enters the deep sleep state.

在上述計時過程中的任意時刻,當紅外感應器21探測到用戶回到顯示器200前方時,該紅外感應器21將邏輯為高電平的探測信號傳遞給微型控制器31,此時該微型控制器31開始計時,當計時一預訂時間,如5秒時,該微型控制器31將第四引腳P1.2、第三引腳P1.0、第二引腳P0.7中被拉低的引腳按順序抬高電位至邏輯高電平,將第一引腳P0.0下拉至邏輯低電平,從而該主機300和顯示器200經過分級的喚醒時間恢復正常工作,具體的,主機300和顯示器200處於待機、休眠、深度休眠的不同的工作狀態時,其喚醒時間是由短到長的。At any time during the above timing, when the infrared sensor 21 detects that the user returns to the front of the display 200, the infrared sensor 21 transmits a logic high level detection signal to the microcontroller 31, at which time the micro control The timer 31 starts counting. When counting a predetermined time, such as 5 seconds, the microcontroller 31 pulls down the fourth pin P1.2, the third pin P1.0, and the second pin P0.7. The pin sequentially raises the potential to a logic high level, and pulls the first pin P0.0 to a logic low level, so that the host 300 and the display 200 resume normal operation after the hierarchical wake-up time, specifically, the host 300 and When the display 200 is in different working states of standby, sleep, and deep sleep, the wake-up time is from short to long.

在任意時刻,若重定開關SW2接通,則主機300和顯示器200立即恢復正常工作。At any time, if the reset switch SW2 is turned on, the host 300 and the display 200 immediately resume normal operation.

所述的電腦節能電路100通過紅外感應器21探測用戶是否離開顯示器200的前方,微型控制器31根據離開時間來控制顯示器200和主機300的工作狀態,從而對顯示器200和主機300的能耗進行分級控制,達到較佳的節能的效果。The computer energy-saving circuit 100 detects whether the user leaves the front of the display 200 through the infrared sensor 21, and the micro-controller 31 controls the working state of the display 200 and the host 300 according to the departure time, thereby performing energy consumption on the display 200 and the host 300. Grading control to achieve better energy saving effect.

100‧‧‧電腦節能電路100‧‧‧Computer energy-saving circuit

200‧‧‧顯示器200‧‧‧ display

300‧‧‧主機300‧‧‧Host

10‧‧‧電源模組10‧‧‧Power Module

20‧‧‧紅外感應模組20‧‧‧Infrared sensor module

30‧‧‧控制模組30‧‧‧Control Module

40‧‧‧顯示介面模組40‧‧‧Display interface module

21‧‧‧紅外感應器21‧‧‧Infrared sensor

31‧‧‧微型控制器31‧‧‧Microcontroller

32‧‧‧時鐘電路32‧‧‧clock circuit

33‧‧‧重定電路33‧‧‧Re-circuit

41‧‧‧VGA介面41‧‧‧VGA interface

SW1‧‧‧電源開關SW1‧‧‧Power switch

SW2‧‧‧重定開關SW2‧‧‧Re-switch

Q1‧‧‧MOSFETQ1‧‧‧MOSFET

Y1‧‧‧晶振體Y1‧‧‧ crystal oscillator

FV1‧‧‧自恢復保險絲FV1‧‧‧ self-recovery fuse

R1‧‧‧第一分壓電阻R1‧‧‧ first voltage divider resistor

R2‧‧‧第二分壓電阻R2‧‧‧Second voltage divider resistor

R3‧‧‧第一上拉電阻R3‧‧‧First pull-up resistor

R4‧‧‧第一下拉電阻R4‧‧‧First pull-down resistor

R5‧‧‧第二下拉電阻R5‧‧‧second pull-down resistor

R6‧‧‧第三下拉電阻R6‧‧‧ third pull-down resistor

R7‧‧‧第二上拉電阻R7‧‧‧Second pull-up resistor

R8‧‧‧第四下拉電阻R8‧‧‧4th pull-down resistor

R9‧‧‧限流電阻R9‧‧‧ current limiting resistor

R10‧‧‧第五下拉電阻R10‧‧‧ fifth pull-down resistor

VCC‧‧‧電源引腳VCC‧‧‧Power pin

GND‧‧‧接地引腳GND‧‧‧ Grounding Pin

RST‧‧‧復位引腳RST‧‧‧Reset pin

XTAL1‧‧‧第一時鐘引腳XTAL1‧‧‧ first clock pin

XTAL2‧‧‧第二時鐘引腳XTAL2‧‧‧ second clock pin

P0.0‧‧‧第一引腳P0.0‧‧‧ first pin

P0.7‧‧‧第二引腳P0.7‧‧‧second pin

P1.0‧‧‧第三引腳P1.0‧‧‧ third pin

P1.2‧‧‧第四引腳P1.2‧‧‧ fourth pin

P2.2‧‧‧第五引腳P2.2‧‧‧ fifth pin

EA/VPP‧‧‧第六引腳EA/VPP‧‧‧ sixth pin

C1‧‧‧第一電容C1‧‧‧first capacitor

C2‧‧‧第二電容C2‧‧‧second capacitor

C3‧‧‧第三電容C3‧‧‧ third capacitor

C4‧‧‧第四電容C4‧‧‧fourth capacitor

C5‧‧‧第五電容C5‧‧‧ fifth capacitor

C6‧‧‧第六電容C6‧‧‧ sixth capacitor

+5V_SB‧‧‧電源+5V_SB‧‧‧Power supply

SLP_S3#‧‧‧睡眠模式信號點SLP_S3#‧‧‧Sleep mode signal point

SLP_S4#‧‧‧休眠模式信號點SLP_S4#‧‧‧Sleep mode signal point

SUSWARN#‧‧‧深度休眠模式信號點SUSWARN#‧‧‧Deep sleep mode signal point

no

200‧‧‧顯示器 200‧‧‧ display

300‧‧‧主機 300‧‧‧Host

10‧‧‧電源模組 10‧‧‧Power Module

20‧‧‧紅外感應模組 20‧‧‧Infrared sensor module

30‧‧‧控制模組 30‧‧‧Control Module

40‧‧‧顯示介面模組 40‧‧‧Display interface module

Claims (10)

一種電腦節能電路,用於控制主機和顯示器的工作狀態,其改良在於:所述電腦節能電路包括電源模組、紅外感應模組以及控制模組,電源模組電性連接並提供工作電壓至紅外感應模組、控制模組及顯示器;該紅外感應模組電性連接至控制模組,用於探測用戶是否離開顯示器並將相應的探測信號傳送給控制模組;該控制模組還電性連接至主機與顯示器,用於根據接收到的探測信號計算用戶離開的時間,並根據用戶離開的時間的長短控制主機和顯示器進入不同的工作狀態以對主機和顯示器的能耗進行分級控制。A computer energy-saving circuit for controlling the working state of the host and the display, wherein the computer energy-saving circuit comprises a power module, an infrared sensor module and a control module, and the power module is electrically connected and provides a working voltage to the infrared The sensing module, the control module and the display; the infrared sensing module is electrically connected to the control module, and is configured to detect whether the user leaves the display and transmit a corresponding detection signal to the control module; the control module is also electrically connected The host and the display are configured to calculate the time when the user leaves according to the received detection signal, and control the host and the display to enter different working states according to the length of time the user leaves, to perform hierarchical control on the power consumption of the host and the display. 如申請專利範圍第1項所述之電腦節能電路,其中所述電源模組包括電源、電源開關、第一分壓電阻及第二分壓電阻,電源通過電源開關選擇性地與控制模組電性連接,該第一分壓電阻一端電性連接於電源開關與控制模組之間,另一端電性連接於第二分壓電阻,第二分壓電阻另一端接地,該紅外感應模組電性連接至該第一分壓電阻和第二分壓電阻之間的節點,以以獲取工作電壓。The computer energy-saving circuit according to claim 1, wherein the power module comprises a power source, a power switch, a first voltage dividing resistor and a second voltage dividing resistor, and the power source is selectively electrically connected to the control module through the power switch. The first voltage dividing resistor is electrically connected between the power switch and the control module, the other end is electrically connected to the second voltage dividing resistor, and the other end of the second voltage dividing resistor is grounded, and the infrared sensing module is electrically connected. The node is connected to the node between the first voltage dividing resistor and the second voltage dividing resistor to obtain an operating voltage. 如申請專利範圍第1項所述之電腦節能電路,其中:所述紅外感應模組包括紅外感應器及第一上拉電阻,該紅外感應器一端接地,另一端電性連接於控制模組以傳送探測信號給該控制模組,並通過第一上拉電阻電性連接至電源模組以獲取工作電壓,並將該紅外感應器的探測信號的電位上拉至控制模組識別的電位。The computer energy-saving circuit of claim 1, wherein the infrared sensor module comprises an infrared sensor and a first pull-up resistor, the infrared sensor is grounded at one end, and the other end is electrically connected to the control module. The detection signal is sent to the control module, and is electrically connected to the power module through the first pull-up resistor to obtain the working voltage, and the potential of the detection signal of the infrared sensor is pulled up to the potential recognized by the control module. 如申請專利範圍第1項所述之電腦節能電路,其中所述控制模組包括微型控制器,該微型控制器包括電源引腳、接地引腳、第一引腳、第二引腳、第三引腳引腳、第四引腳以及第五引腳,該電源引腳電連接至電源,該接地引腳接地,該第一引腳輸出用於控制顯示器工作狀態的信號,所述第二引腳、第三引腳、第四引腳分別電性連接至主機的睡眠模式信號點、休眠模式信號點、深度休眠模式信號點,該微型控制器的第五引腳電連接至紅外感應器模組,用於接收紅外感應模組傳送的探測信號。The computer energy-saving circuit of claim 1, wherein the control module comprises a microcontroller, the power controller includes a power pin, a ground pin, a first pin, a second pin, and a third a pin pin, a fourth pin, and a fifth pin, the power pin is electrically connected to the power source, the ground pin is grounded, and the first pin outputs a signal for controlling the working state of the display, the second lead The pin, the third pin and the fourth pin are respectively electrically connected to the sleep mode signal point, the sleep mode signal point, and the deep sleep mode signal point of the host, and the fifth pin of the microcontroller is electrically connected to the infrared sensor mode. The group is configured to receive a detection signal transmitted by the infrared sensing module. 如申請專利範圍第4項所述之電腦節能電路,其中所述控制模組還包括時鐘電路,該時鐘電路包括晶振體、第三電容以及第四電容,該微型控制器還包括第一時鐘引腳、第二時鐘引腳,所述第三電容、第四電容的一端均接地,所述第三電容的另一端連接至所述晶振體的一端後連接至第一時鐘引腳,所述第四電容的另一端連接至所述晶振體的另一端後連接至第二時鐘引腳。The computer energy-saving circuit of claim 4, wherein the control module further includes a clock circuit, the clock circuit includes a crystal body, a third capacitor, and a fourth capacitor, and the microcontroller further includes a first clock a second clock pin, one end of the third capacitor and the fourth capacitor are grounded, and the other end of the third capacitor is connected to one end of the crystal oscillator body and then connected to the first clock pin, the first The other end of the four capacitor is connected to the other end of the crystal body and then connected to the second clock pin. 如申請專利範圍第4項所述之電腦節能電路,其中所述控制模組還包括重定電路,該重定電路包括重定開關、第二上拉電阻以及第四下拉電阻,該微型控制器包括第六引腳、復位引腳,該第二上拉電阻一端電性連接至電源引腳,另一端連接至第六引腳並通過重定開關連接至重定引腳,該復位引腳通過第四下拉電阻接地。The computer energy-saving circuit of claim 4, wherein the control module further comprises a reset circuit, the reset circuit includes a reset switch, a second pull-up resistor, and a fourth pull-down resistor, the microcontroller includes a sixth a pin, a reset pin, one end of the second pull-up resistor is electrically connected to the power pin, and the other end is connected to the sixth pin and is connected to the re-set pin through a reset switch, and the reset pin is grounded through the fourth pull-down resistor . 如申請專利範圍第1項所述之電腦節能電路,其中所述電腦節能電路還包括顯示介面模組,該顯示介面模組包括金屬氧化物半導體場效應電晶體、自恢復保險絲、視頻圖形陣列介面、限流電阻、第五下拉電阻,該金屬氧化物半導體場效應電晶體的柵極電性連接至控制模組以接收控制模組發出的控制顯示器工作狀態的信號,且該柵極通過第五下拉電阻接地;該金屬氧化物半導體場效應電晶體的漏極接地處理;該金屬氧化物半導體場效應電晶體的源極通過限流電阻電性連接至電源模組;該視頻圖形陣列介面通過自恢復保險絲電性連接至金屬氧化物半導體場效應電晶體的源極,該視頻圖形陣列介面還用於連接顯示器。The computer energy-saving circuit according to claim 1, wherein the computer energy-saving circuit further comprises a display interface module, wherein the display interface module comprises a metal oxide semiconductor field effect transistor, a self-recovering fuse, and a video graphic array interface. a current limiting resistor and a fifth pull-down resistor, the gate of the MOSFET is electrically connected to the control module to receive a signal sent by the control module to control the working state of the display, and the gate passes the fifth Pull-down resistor is grounded; the drain of the MOSFET is grounded; the source of the MOSFET is electrically connected to the power module through a current limiting resistor; the video graphics array interface passes through The recovery fuse is electrically connected to the source of the MOSFET, and the video graphics array interface is also used to connect the display. 如申請專利範圍第7項所述之電腦節能電路,其中當用戶未離開顯示器時,紅外感應器將邏輯為高電平的探測信號傳送到控制模組,該控制模組輸出為邏輯低電平的控制信號到金屬氧化物半導體場效應電晶體的柵極使金屬氧化物半導體場效應電晶體截止,顯示器正常工作;當用戶離開顯示器時,紅外感應器將邏輯為低電平的探測信號傳遞到控制模組,該控制模組輸出為邏輯高電平的控制信號以拉高金屬氧化物半導體場效應電晶體的柵極電位,此時該金屬氧化物半導體場效應電晶體導通,從而該視頻圖形陣列介面通過自恢復保險絲接地,即該視頻圖形陣列介面不再有電源供給,顯示器處於待機狀態。The computer energy-saving circuit according to claim 7, wherein when the user does not leave the display, the infrared sensor transmits a logic high level detection signal to the control module, and the control module outputs a logic low level. The control signal to the gate of the metal oxide semiconductor field effect transistor turns off the metal oxide semiconductor field effect transistor, and the display works normally; when the user leaves the display, the infrared sensor transmits a logic low detection signal to a control module, the control module outputs a logic high level control signal to pull up a gate potential of the metal oxide semiconductor field effect transistor, and the metal oxide semiconductor field effect transistor is turned on, thereby the video graphic The array interface is grounded through a self-recovery fuse, that is, the video graphics array interface no longer has a power supply, and the display is in a standby state. 如申請專利範圍第4項所述之電腦節能電路,其中所述第二引腳與睡眠模式信號點之間電連接有一第一下拉電阻,該第一下拉電阻另一端接地;所述第三引腳與休眠模式信號點之間電連接有一第二下拉電阻,該第二下拉電阻另一端接地;所述第四引腳與深度休眠模式信號點之間電連接有一第三下拉電阻,該第三下拉電阻另一端接地。The computer power-saving circuit of claim 4, wherein the second pin is electrically connected to the sleep mode signal point to have a first pull-down resistor, and the other end of the first pull-down resistor is grounded; A third pull-down resistor is electrically connected between the three pin and the sleep mode signal point, and the other end of the second pull-down resistor is grounded; and a third pull-down resistor is electrically connected between the fourth pin and the deep sleep mode signal point, The other end of the third pull-down resistor is grounded. 如申請專利範圍第9項所述之電腦節能電路,其中所述微型控制器根據用戶離開的時間的長短依次下拉第二引腳、第三引腳、第四引腳的電位,該微型控制器將第二引腳的電位下拉至邏輯低電平時,此時該睡眠模式信號點的電位拉低至接地,該主機進入睡眠狀態;該微型控制器將第三引腳的電位下拉至邏輯低電平時,此時該休眠模式信號點的電位拉低至接地,該主機進入休眠狀態;該微型控制器將第四引腳的電位下拉至邏輯低電平時,此時該深度休眠模式信號點的電位拉低至接地,該主機進入深度休眠狀態。
The computer energy-saving circuit according to claim 9, wherein the microcontroller sequentially pulls down potentials of the second pin, the third pin, and the fourth pin according to the length of time the user leaves, the microcontroller When the potential of the second pin is pulled down to a logic low level, the potential of the sleep mode signal point is pulled down to ground, and the host enters a sleep state; the microcontroller pulls the potential of the third pin to a logic low. Normally, at this time, the potential of the sleep mode signal point is pulled down to ground, and the host enters a sleep state; when the microcontroller pulls the potential of the fourth pin to a logic low level, the potential of the deep sleep mode signal point at this time Pulled low to ground, the host enters deep sleep.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113641132A (en) * 2021-08-18 2021-11-12 珠海格力电器股份有限公司 Robot timing energy-saving circuit and automatic machine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113641132A (en) * 2021-08-18 2021-11-12 珠海格力电器股份有限公司 Robot timing energy-saving circuit and automatic machine

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