TW201505213A - Optoelectronic component and method for the production thereof - Google Patents

Optoelectronic component and method for the production thereof Download PDF

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Publication number
TW201505213A
TW201505213A TW103117125A TW103117125A TW201505213A TW 201505213 A TW201505213 A TW 201505213A TW 103117125 A TW103117125 A TW 103117125A TW 103117125 A TW103117125 A TW 103117125A TW 201505213 A TW201505213 A TW 201505213A
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semiconductor wafer
cavity
upper side
optoelectronic semiconductor
optoelectronic
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TW103117125A
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Chinese (zh)
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Juergen Holz
Michael Zitzlsperger
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Osram Opto Semiconductors Gmbh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • H01L33/54Encapsulations having a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The invention concerns an optoelectronic component which comprises a housing with a cavity which is open towards an upper side of the housing. At the upper side of the housing the cavity has an opening area having a geometric basic shape. An optoelectronic semiconductor chip arrangement is disposed in the cavity. The optoelectronic semiconductor chip arrangement has an upper side having a first geometric shape. The geometric basic shape can be formed by extension from the first geometric shape. In addition, the opening area of the cavity has a bulge with respect to the geometric basic shape. A bonding wire is disposed between an electrical contact surface of the optoelectronic semiconductor chip arrangement and a bonding surface of the housing. The bonding surface is disposed in the bulge.

Description

光電組件及光電組件的製備方法 Photoelectric component and method for preparing photovoltaic module

本發明涉及一種如申請專利範圍第1項所述的光電組件及一種如申請專利範圍第13項所述的光電組件的製備方法。 The present invention relates to an optoelectronic component according to claim 1 and a method of producing the optoelectronic component according to claim 13 of the patent application.

由先前技術已知有多種光電組件,其中光電半導體晶片配置於光電組件之殼體的對該光電組件之發射側成敞開的空腔中。光電半導體晶片及可能存在的接合線和轉換元件因此通常以透明或染色的澆注材料來澆注,該澆注材料至少一部份填充於該空腔中。該澆注材料因此可形成光學反射器且用於保護所述晶片、所述接合線和所述轉換元件。 A variety of optoelectronic components are known from the prior art, wherein the optoelectronic semiconductor wafer is disposed in a cavity of the housing of the optoelectronic component that is open to the emitting side of the optoelectronic component. The optoelectronic semiconductor wafer and possibly the bonding wires and conversion elements are thus usually cast in a transparent or dyed potting compound, at least partially filled in the cavity. The potting material can thus form an optical reflector and serve to protect the wafer, the bond wires and the conversion element.

將澆注材料安裝於傳統光電組件之空腔時的一種困難性在於:須確保以澆注材料來可靠地覆蓋所述接合線且同時防止所述光電半導體晶片或所述轉換元件或其它發出輻射之表面的上側受到該澆注材料的污染。 One difficulty in mounting a potting material into a cavity of a conventional optoelectronic component is that it is ensured that the bonding wire is used to reliably cover the bonding wire while preventing the optoelectronic semiconductor wafer or the conversion component or other radiation-emitting surface. The upper side is contaminated by the casting material.

本發明的目的是製備一種光電組件。此目的藉由一種具有申請專利範圍第1項特徵的光電組件來達成。本發明的另一目的在於提供一種光電組件的製備方法。此目的藉由具有申請專利範圍第13項特徵的方法來達成。不同的其它形式描述在申請專利範圍各附屬項中。 It is an object of the invention to prepare an optoelectronic component. This object is achieved by an optoelectronic component having the features of claim 1 of the patent application. Another object of the present invention is to provide a method of preparing an optoelectronic component. This object is achieved by a method having the features of claim 13 of the patent application. Different other forms are described in the respective sub-items of the scope of the patent application.

光電組件包含一殼體,其具有一朝向該殼體之上側而敞開的空腔。此空腔在該殼體的上側具有一開口表面,其具有幾何基本形式。空腔中設置一光電半導體晶片配置。此光電半導體晶片配置的上側具有第一幾何形式。所述幾何基本形式可藉由第一幾何形式之延伸來形成。空腔的開口表面相對於該幾何基本形式而言另具有一凸起。在該半導體晶片配置之電性接觸面和殼體之接合面之間配置一接合線。該接合面配置在該凸起中。 The optoelectronic component includes a housing having a cavity that opens toward the upper side of the housing. The cavity has an open surface on the upper side of the housing which has a geometric basic form. An optoelectronic semiconductor wafer configuration is disposed in the cavity. The upper side of this optoelectronic semiconductor wafer configuration has a first geometric form. The geometric basic form can be formed by an extension of the first geometric form. The open surface of the cavity has a protrusion relative to the geometric basic form. A bonding wire is disposed between the electrical contact surface of the semiconductor wafer and the bonding surface of the housing. The joint surface is disposed in the projection.

此光電組件中有利的方式為,殼體之空腔中在全部側面上以大約相同的距離使該光電半導體晶片配置被空腔之壁面包圍著。這藉由“該空腔具有基本形式”來達成,該基本形式在幾何意義上類似於半導體晶片配置之第一幾何形式。由於空腔之外形(contour)順應(orient)於半導體晶片配置之形式,則在半導體晶片配置之全部側面上可使該半導體晶片配置和該空腔之壁面之間保持較小的距離。 An advantageous aspect of the optoelectronic component is that the optoelectronic semiconductor wafer arrangement is surrounded by the wall surface of the cavity at approximately the same distance on all sides of the cavity of the housing. This is achieved by "the cavity has a basic form" which is geometrically similar to the first geometric form of the semiconductor wafer configuration. Since the contour of the cavity is orientated in the form of a semiconductor wafer configuration, a small distance between the semiconductor wafer configuration and the wall surface of the cavity can be maintained on all sides of the semiconductor wafer configuration.

上述光電組件之另一優點在於:該接合面配置在空腔之凸起的區域中。因此,空腔之形式在該凸起之區域中不同於幾何基本形式,其類似於半導體晶片配置之第一幾何形式。此光電組件中,與該接合面相連接的接合線因此至少一部份延伸至空腔之凸起的區域中且在該處狹窄地由空腔之壁面所包圍著。接合面配置在空腔之凸起的區域中,這樣可使空腔之壁面在空腔之其餘部份中繞行該光電半導體晶片配置。 Another advantage of the above described optoelectronic component is that the mating surface is disposed in the raised region of the cavity. Thus, the form of the cavity differs from the geometric basic form in the region of the protrusion, which is similar to the first geometric form of the semiconductor wafer configuration. In the optoelectronic component, the bonding wire connected to the bonding surface thus extends at least in part to the raised area of the cavity and is narrowly surrounded by the wall surface of the cavity. The interface is disposed in the raised region of the cavity such that the wall of the cavity circumscribes the optoelectronic semiconductor wafer configuration in the remainder of the cavity.

在光電組件之一實施形式中,半導體晶片配置之上側的第一幾何形式是矩形形式。半導體晶片配置因此可有利地包含一傳統的半導體晶片。 In one embodiment of the optoelectronic component, the first geometric form of the upper side of the semiconductor wafer configuration is in the form of a rectangle. The semiconductor wafer configuration can thus advantageously comprise a conventional semiconductor wafer.

在光電組件之一實施形式中,空腔的開口表面具有一繞行式邊緣。因此,半導體晶片配置之上側邊緣和空腔之開口表面之邊緣之間的最短距離在該半導體晶片配置之上側邊緣的全部點上都介於30微米和600微米之間,較佳是介於100微米和300微米之間。空腔之繞行式邊緣因此可有利地特別靠近該半導體晶片配置之外形而繞行。 In one embodiment of the optoelectronic component, the open surface of the cavity has a circumscribed edge. Therefore, the shortest distance between the upper side edge of the semiconductor wafer configuration and the edge of the open surface of the cavity is between 30 microns and 600 microns at all points on the upper side edge of the semiconductor wafer configuration, preferably between 100 Between microns and 300 microns. The circumscribed edge of the cavity can thus advantageously be wrapped around the semiconductor wafer configuration.

在光電組件之一實施形式中,在半導體晶片配置之上側和空腔之開口表面之繞行式邊緣之間在垂直於殼體之上側的方向中存在一種小於60微米之高度差。此光電組件之殼體的空腔之深度因此可依據半導體晶片配置之高度來調整。於是,半導體晶片配置之上側和光電組件之殼體的上側大致上可互相成齊平狀。 In one embodiment of the optoelectronic component, there is a height difference of less than 60 microns in a direction perpendicular to the upper side of the housing between the upper side of the semiconductor wafer configuration and the circumscribed edge of the open surface of the cavity. The depth of the cavity of the housing of the optoelectronic component can thus be adjusted depending on the height of the semiconductor wafer configuration. Thus, the upper side of the semiconductor wafer configuration and the upper side of the housing of the optoelectronic component are substantially flush with each other.

在光電組件之一實施形式中,半導體晶片配置具有光電半導體晶片,其具有一上側。此光電半導體晶片例如可以是發光二極體(LED)晶片。此光電組件之半導體晶片配置因此適合用來發出電磁輻射,例如,發出可見光。 In one embodiment of the optoelectronic component, the semiconductor wafer arrangement has an optoelectronic semiconductor wafer having an upper side. This optoelectronic semiconductor wafer can be, for example, a light emitting diode (LED) wafer. The semiconductor wafer configuration of this optoelectronic component is thus suitable for emitting electromagnetic radiation, for example, emitting visible light.

在光電組件之一實施形式中,光電半導體晶片之上側形成一輻射發出面。由半導體晶片配置之光電半導體晶片所發出之電磁輻射可有利地發射至光電組件之殼體的上側。 In one embodiment of the optoelectronic component, a radiation emitting surface is formed on the upper side of the optoelectronic semiconductor wafer. The electromagnetic radiation emitted by the optoelectronic semiconductor wafer of the semiconductor wafer configuration can advantageously be emitted to the upper side of the housing of the optoelectronic component.

在光電組件之一實施形式中,在光電半導體晶片之上側配置一轉換元件。此轉換元件因此可用來將該半導體晶片配置之光電半導體晶片所發出之電磁輻射的波長進行轉換。於是,可形成該轉換元件,以吸收具有第一波長的電磁輻射且發出第二波長(典型上較第一波長還長)之電磁輻射。該轉換元件因此可具有一種埋入的發光材料。此埋入的發光材料例如可以是有機或無機的發光材料。此埋入的發光材料亦可具有量子點。 In one embodiment of the optoelectronic component, a conversion element is arranged on the upper side of the optoelectronic semiconductor wafer. This conversion element can thus be used to convert the wavelength of the electromagnetic radiation emitted by the optoelectronic semiconductor wafer of the semiconductor wafer configuration. Thus, the conversion element can be formed to absorb electromagnetic radiation having a first wavelength and emit electromagnetic radiation of a second wavelength (typically longer than the first wavelength). The conversion element can thus have a buried luminescent material. The embedded luminescent material can be, for example, an organic or inorganic luminescent material. The buried luminescent material can also have quantum dots.

在光電組件之一實施形式中,在空腔之圍繞半導體晶片配置的一區域中配置一種澆注材料。此澆注材料可有利地用來保護半導體晶片配置和上述接合線使不因外部的機械影響而受損。該澆注材料亦可作為由該光電半導體晶片配置所發出之電磁輻射的反射器。該澆注材料亦可用來將該光電半導體晶片配置所發出之電磁輻射之波長進行轉換。此外,該澆注材料亦可用來將該光電組件之光電半導體晶片配置所產生的廢熱由該光電半導體晶片配置排出。由於該光電組件之殼體之空腔具有一基本形式,其在幾何上類似於光電半導體晶片配置之第一幾何形式,且該空腔之壁面可狹窄地包圍著該光電半導體晶片配置之外形,則該空腔之圍繞半導體晶片配置的一區域中所配置的澆注材料具有彎月面(Menisken),其在空腔的壁面和半導體晶片配置之間只在小的範圍中下彎。因此,可有利地藉由該澆注材料來促成光電半導體晶片配置之一種基本上為完全的包封。 In one embodiment of the optoelectronic component, a potting material is disposed in a region of the cavity surrounding the semiconductor wafer configuration. This potting material can advantageously be used to protect the semiconductor wafer configuration and the bond wires described above from damage due to external mechanical influences. The potting material can also act as a reflector for the electromagnetic radiation emitted by the optoelectronic semiconductor wafer. The potting material can also be used to convert the wavelength of the electromagnetic radiation emitted by the optoelectronic semiconductor wafer configuration. In addition, the potting material can also be used to discharge waste heat generated by the optoelectronic semiconductor wafer configuration of the optoelectronic component from the optoelectronic semiconductor wafer configuration. Since the cavity of the housing of the optoelectronic component has a basic form that is geometrically similar to the first geometric form of the optoelectronic semiconductor wafer configuration, and the wall surface of the cavity can narrowly surround the optoelectronic semiconductor wafer configuration. The potting material disposed in a region of the cavity surrounding the semiconductor wafer configuration has a meniske that bends only in a small range between the wall surface of the cavity and the semiconductor wafer configuration. Thus, a substantially complete encapsulation of the optoelectronic semiconductor wafer configuration can be advantageously facilitated by the potting material.

在光電組件之一實施形式中,該澆注材料具有矽樹脂及/或環氧化物。該澆注材料因此亦可具有一種包含矽樹脂和環氧化物之混合材料。因此,有利方式是該澆注材料可成本有利地被取得且可簡易地加工。 In one embodiment of the optoelectronic component, the potting compound has an enamel resin and/or an epoxide. The potting material can therefore also have a mixed material comprising a resin and an epoxide. Advantageously, therefore, the potting material can be obtained cost-effectively and can be easily processed.

在光電組件之一實施形式中,該澆注材料具有一種發光材料。此發光材料例如可以是一種波長轉換用的發光材料。此澆注材料因此可有利地適合用來將該光電組件之光電半導體晶片配置所發出之電磁輻射的波長進行轉換。 In one embodiment of the optoelectronic component, the potting compound has a luminescent material. This luminescent material may be, for example, a luminescent material for wavelength conversion. This potting material can thus advantageously be adapted to convert the wavelength of the electromagnetic radiation emitted by the optoelectronic semiconductor wafer arrangement of the optoelectronic component.

在光電組件之一實施形式中,該澆注材料具有散射粒子。例如,該澆注材料可具有一種包含TiO2之散射粒子。有利的方式是該澆注材料具有散光特性且可作為由該光電組件之光電半導體晶片配置所發出之電磁輻射的反射器。 In one embodiment of the optoelectronic component, the potting material has scattering particles. For example, the potting material can have a scattering particle comprising TiO 2 . Advantageously, the potting material has astigmatic properties and acts as a reflector for the electromagnetic radiation emitted by the optoelectronic semiconductor wafer configuration of the optoelectronic component.

在光電組件之一實施形式中,所述接合線完全埋置於該澆注材料中。該光電組件之接合線因此可有利地受到保護使不因外部的機械作用而受損。此光電組件中所述接合線完全埋置於該澆注材料中,這樣可使該殼體之空腔具有幾何基本形式,其在幾何上類似於光電半導體晶片配置之上側的第一幾何形式。於是,空腔之外形複製光電半導體晶片配置之形式,這樣可在光電半導體晶片配置之全部側面上使光電半導體晶片配置和該空腔之壁面之間有小的距離。因此,在空腔之壁面和光電半導體晶片配置之間該澆注材料在表面上只形成小的彎月面,藉此使配置在光電半導體晶片配置和該空腔之 壁面之間的澆注材料之高度在該光電半導體晶片配置和該空腔之壁面之間只小範圍地下降。於是,“上述接合線之一部份突出於該澆注材料”之危險性下降。 In one embodiment of the optoelectronic component, the bond wires are completely embedded in the potting material. The bond wires of the optoelectronic component can thus advantageously be protected from damage by external mechanical action. The bond wires in the optoelectronic component are completely embedded in the potting material such that the cavity of the housing has a geometric basic form that is geometrically similar to the first geometric form of the upper side of the optoelectronic semiconductor wafer configuration. Thus, the form of the optoelectronic semiconductor wafer configuration is replicated outside the cavity such that there is a small distance between the optoelectronic semiconductor wafer configuration and the wall surface of the cavity on all sides of the optoelectronic semiconductor wafer configuration. Thus, between the wall surface of the cavity and the optoelectronic semiconductor wafer configuration, the potting material forms only a small meniscus on the surface, thereby allowing placement in the optoelectronic semiconductor wafer configuration and the cavity The height of the potting material between the walls decreases only a small extent between the optoelectronic semiconductor wafer arrangement and the wall surface of the cavity. Thus, the risk of "one of the above-mentioned bonding wires protruding from the casting material" is lowered.

光電組件之製備方法包括殼體的製備步驟,該殼體具有一朝向該殼體的上側敞開的空腔,其中該空腔在該殼體的上側具有一開口表面,其具有幾何基本形式,該空腔之開口表面相對於幾何基本形式而言另具有一凸起,以將光電半導體晶片配置設置於空腔中,該半導體晶片配置的上側具有第一幾何形式,其中該空腔之開口表面之幾何基本形式可藉由第一幾何形式之延伸而形成,且該凸起亦用來在該半導體晶片配置之電性接觸面和該殼體之配置在該凸起中的一接合面之間配置一接合線。 A method of fabricating an optoelectronic component includes a step of preparing a housing having a cavity open toward an upper side of the housing, wherein the cavity has an open surface on an upper side of the housing, the geometrical basic form The open surface of the cavity further has a protrusion relative to the geometric basic form to dispose the optoelectronic semiconductor wafer arrangement in the cavity, the upper side of the semiconductor wafer configuration having a first geometric form, wherein the open surface of the cavity The geometric basic form can be formed by the extension of the first geometric form, and the protrusion is also used to configure between the electrical contact surface of the semiconductor wafer configuration and a joint surface of the housing disposed in the protrusion. A bonding wire.

藉由本方法所製備的光電組件之殼體的空腔有利地具有幾何基本形式,其在幾何意義上類似於光電半導體晶片配置之第一幾何形式。於是,藉由本方法所製備的光電組件之殼體的空腔之外形可狹窄地圍繞著配置於空腔中的光電半導體晶片配置。在藉由本方法所製備的光電組件中,由於該接合面配置在空腔之空白區的區域中,則在空腔之其餘的區段中不必預先保留該接合面和該接合線所需的空間。在藉由本方法所製備的光電組件中,由於與該接合面連接的接合線至少部份地在空腔之空白區中延伸,則該接合線可有利地由該空腔之壁面狹窄地圍繞著。 The cavity of the housing of the optoelectronic component produced by the method advantageously has a geometric basic form which is geometrically similar to the first geometric form of the optoelectronic semiconductor wafer configuration. Thus, the cavity of the housing of the photovoltaic module prepared by the method can be configured to narrowly surround the optoelectronic semiconductor wafer disposed in the cavity. In the photovoltaic module prepared by the method, since the joint surface is disposed in the region of the blank area of the cavity, it is not necessary to retain the joint surface and the space required for the joint line in the remaining sections of the cavity. . In the optoelectronic component prepared by the method, since the bonding wire connected to the bonding surface extends at least partially in the blank area of the cavity, the bonding wire can advantageously be narrowly surrounded by the wall surface of the cavity .

在本方法之一實施方式中,本方法包括另一步驟以將一種澆注材料施加至空腔之包圍該光電半導體晶片之一區域中。有利的方式為,空腔之包圍光電半導體晶片配置之該區域中已施加的澆注材料可用來保護光電半導體晶片配置及該接合線使不受外部的機械作用所損傷。該澆注材料亦可作為由該光電半導體晶片配置所發出之電磁輻射的反射器。該澆注材料亦可用來將該光電半導體晶片配置所發出之電磁輻射之波長進行轉換。此外,該澆注材料亦可用來將該光電組件之光電半導體晶片配置所產生的廢熱由該光電半導體晶片配置排出。 In one embodiment of the method, the method includes the further step of applying a potting material to a region of the cavity surrounding the optoelectronic semiconductor wafer. Advantageously, the potting material applied in this region of the cavity surrounding the optoelectronic semiconductor wafer arrangement can be used to protect the optoelectronic semiconductor wafer arrangement and the bonding wires from external mechanical damage. The potting material can also act as a reflector for the electromagnetic radiation emitted by the optoelectronic semiconductor wafer. The potting material can also be used to convert the wavelength of the electromagnetic radiation emitted by the optoelectronic semiconductor wafer configuration. In addition, the potting material can also be used to discharge waste heat generated by the optoelectronic semiconductor wafer configuration of the optoelectronic component from the optoelectronic semiconductor wafer configuration.

本發明之上述特性、特徵和優點以及形式和方式(例如,如何達成)在與以下各實施例及圖式的說明相結合時將變得更清楚且更容易理解。 The above-described features, characteristics and advantages of the present invention, as well as the form and manner (e.g., how to achieve), will become more apparent and easier to understand when combined with the description of the following embodiments and drawings.

100‧‧‧光電組件 100‧‧‧Optoelectronic components

110‧‧‧垂直方向 110‧‧‧Vertical direction

200‧‧‧殼體 200‧‧‧shell

201‧‧‧上側 201‧‧‧ upper side

210‧‧‧接合線 210‧‧‧bonding line

220‧‧‧澆注材料 220‧‧‧casting materials

300‧‧‧空腔 300‧‧‧ cavity

310‧‧‧開口表面 310‧‧‧Open surface

311‧‧‧繞行式邊緣 311‧‧‧circle edge

320‧‧‧幾何基本形式 320‧‧‧Geometric basic form

330‧‧‧凸起 330‧‧‧ bumps

340‧‧‧距離(邊緣-晶片) 340‧‧‧ Distance (edge-wafer)

350‧‧‧寬度(凸起) 350‧‧‧Width (bump)

400‧‧‧光電半導體晶片配置 400‧‧‧Optoelectronic semiconductor wafer configuration

410‧‧‧上側 410‧‧‧ upper side

411‧‧‧邊緣 411‧‧‧ edge

420‧‧‧第一幾何形式 420‧‧‧First geometric form

430‧‧‧電性接觸面 430‧‧‧Electrical contact surface

440‧‧‧光電半導體晶片 440‧‧‧Optoelectronic semiconductor wafer

441‧‧‧上側 441‧‧‧ upper side

450‧‧‧轉換元件 450‧‧‧Transfer components

451‧‧‧上側 451‧‧‧ upper side

460‧‧‧空白區 460‧‧‧Blank area

500‧‧‧第一導線架區段 500‧‧‧First lead frame section

510‧‧‧晶片容納面 510‧‧‧ wafer receiving surface

520‧‧‧第一焊接接觸面 520‧‧‧First welding contact surface

600‧‧‧第二導線架區段 600‧‧‧Second lead frame section

610‧‧‧接合面 610‧‧‧ joint surface

620‧‧‧第二焊接接觸面 620‧‧‧Second welding contact surface

各圖式分別說明如下。 Each drawing is described as follows.

第1圖係光電組件的俯視圖。 Figure 1 is a top view of the optoelectronic component.

第2圖係光電組件的剖視圖。 Figure 2 is a cross-sectional view of the optoelectronic component.

第1圖顯示光電組件100之俯視圖。第2圖顯示光電組件100之剖視圖。此處,光電組件100沿著第1圖所示的剖面AA而被切開。光電組件100用來發出電磁輻射,例如,發出可見光。光電組件100例如可以是發光二極體-組件。 FIG. 1 shows a top view of the optoelectronic component 100. FIG. 2 shows a cross-sectional view of the optoelectronic component 100. Here, the photovoltaic module 100 is cut along the section AA shown in FIG. Photovoltaic assembly 100 is used to emit electromagnetic radiation, for example, to emit visible light. The optoelectronic component 100 can be, for example, a light emitting diode-assembly.

光電組件100包含殼體200。殼體200較佳是具有一種塑料且例如可藉由射出成形或轉移成形或其它的模鑄過程來製成。 Photovoltaic assembly 100 includes a housing 200. The housing 200 preferably has a plastic and can be formed, for example, by injection molding or transfer forming or other molding process.

在光電組件100之殼體200之上側201形成空腔300。空腔300形成一中空區,其朝向殼體200之上側201而敞開。在殼體200之上側201該空腔300具有一開口表面310。空腔300亦可視為形成在殼體200之上側201上的凹口。 A cavity 300 is formed on the upper side 201 of the housing 200 of the optoelectronic component 100. The cavity 300 defines a hollow region that opens toward the upper side 201 of the housing 200. The cavity 300 has an open surface 310 on the upper side 201 of the housing 200. The cavity 300 can also be considered a notch formed on the upper side 201 of the housing 200.

殼體300之開口表面310具有幾何基本形式320。圖式中所示的例子中,幾何基本形式320是矩形形式。此外,不同於幾何基本形式320,開口表面310可具有凸起330。在凸起330之區域中,開口表面310超越幾何基本形式320而延伸。凸起330在圖中所示的例子中同樣具有矩形形式且連接於矩形之幾何基本形式320。凸起330之外緣繼續延伸幾何基本形式320之外緣。凸起330之其餘的外緣平行於幾何基本形式320之外緣而延伸。凸起330具有一種較幾何基本形式320小很多的面積。例如,幾何基本形式320所具有的面積可以是凸起330之面積的十倍。整體而言,空腔300之開口表面310因此具有一種L-形之形態。 The open surface 310 of the housing 300 has a geometric basic form 320. In the example shown in the figures, the geometric basic form 320 is in the form of a rectangle. Moreover, unlike the geometric basic form 320, the open surface 310 can have protrusions 330. In the region of the protrusions 330, the open surface 310 extends beyond the geometric basic form 320. The projection 330 also has a rectangular form in the example shown in the figures and is connected to the geometric basic form 320 of the rectangle. The outer edge of the projection 330 continues to extend beyond the outer edge of the geometric basic form 320. The remaining outer edges of the projections 330 extend parallel to the outer edges of the geometric basic form 320. The protrusion 330 has a much smaller area than the geometric basic form 320. For example, the geometric basic form 320 may have an area that is ten times the area of the protrusions 330. Overall, the open surface 310 of the cavity 300 thus has an L-shaped configuration.

空腔300例如可形成為圓柱形。此種情況下,空腔300具有一種接合面,其形式對應於空腔300之開口表面310之形式。空腔300之由殼體200之材料所形成的壁面在該空腔300之接合面和開口表面310之間垂直地延伸著。然而,空腔300例如亦可具有截錐體形式。在此種情況下,空腔300由該接合面朝向該開口表面310而擴展或由該接合面朝向該開口表面310而變細。於是,空腔300之由殼體200之材料所形成的壁面以非直角的方式順應於殼體200之上側201的形式。 The cavity 300 can be formed, for example, in a cylindrical shape. In this case, the cavity 300 has a joint surface in the form of an open surface 310 of the cavity 300. The wall surface of the cavity 300 formed by the material of the housing 200 extends perpendicularly between the mating face of the cavity 300 and the open surface 310. However, the cavity 300 can, for example, also have the form of a truncated cone. In this case, the cavity 300 is expanded by the joint surface toward the opening surface 310 or is tapered by the joint surface toward the opening surface 310. Thus, the wall of the cavity 300 formed by the material of the housing 200 conforms to the upper side 201 of the housing 200 in a non-orthogonal manner.

光電組件100之殼體200之空腔300中設置光電半導體晶片配置400。光電半導體晶片配置400具有上側410。光電半導體晶片配置400之上側410具有第一幾何形式420,其在幾何意義上類似於空腔300之開口表面310之幾何基本形式320。這表示:幾何基本形式320可藉由光電半導體晶片配置400之上側410之第一幾何形式420之延伸而形成。在圖式所示的例子中,光電半導體晶片配置400之上側410具有矩形形式,其小於空腔300之開口表面310之矩形的幾何基本形式320。 An optoelectronic semiconductor wafer arrangement 400 is disposed in the cavity 300 of the housing 200 of the optoelectronic component 100. The optoelectronic semiconductor wafer configuration 400 has an upper side 410. The upper side 410 of the optoelectronic semiconductor wafer configuration 400 has a first geometric form 420 that is geometrically similar to the geometric basic form 320 of the open surface 310 of the cavity 300. This means that the geometric basic form 320 can be formed by the extension of the first geometric form 420 of the upper side 410 of the optoelectronic semiconductor wafer configuration 400. In the example shown in the figures, the upper side 410 of the optoelectronic semiconductor wafer configuration 400 has a rectangular form that is smaller than the rectangular geometric basic form 320 of the open surface 310 of the cavity 300.

光電半導體晶片配置400之上側410定向成平行於空腔300之開口表面310。較佳是將光電半導體晶片配置400設置在光電組件100之殼體200之空腔300中,使光電半導體晶片配置400之上側410在空腔300之開口表面310之區域中大約位於中央處。於是,光電半導體晶片配置400之上側410的邊緣411在平行於殼體200之上側201的方向中幾乎到處都沿著光電半導體晶片配置400之上側410的邊緣411而與空腔300之開口表面310之繞行式邊緣311隔開一大約固定的距離340。只有在空腔300之開口表面310之凸起330之區域中該空腔300之開口表面310之繞行式邊緣311和光電半導體晶片配置400之上側410的邊緣411之間的距離可有偏差。光電半導體晶片配置400之上側410的邊緣411和空腔300之開口表面310之繞行式邊緣311之間的距離340較佳是小於600微米,特別佳時小於300微米。例如,距離340可介於100微米和300微米之間。 The upper side 410 of the optoelectronic semiconductor wafer configuration 400 is oriented parallel to the open surface 310 of the cavity 300. Preferably, the optoelectronic semiconductor wafer arrangement 400 is disposed in the cavity 300 of the housing 200 of the optoelectronic component 100 such that the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 is approximately centrally located in the region of the open surface 310 of the cavity 300. Thus, the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer configuration 400 is nearly everywhere along the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 and the open surface 310 of the cavity 300 in a direction parallel to the upper side 201 of the housing 200. The bypass edge 311 is spaced apart by a fixed distance 340. The distance between the wraparound edge 311 of the open surface 310 of the cavity 300 and the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 may be offset only in the region of the protrusion 330 of the open surface 310 of the cavity 300. The distance 340 between the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 and the circumscribed edge 311 of the open surface 310 of the cavity 300 is preferably less than 600 microns, and particularly preferably less than 300 microns. For example, the distance 340 can be between 100 microns and 300 microns.

空腔300之開口表面310之凸起330具有寬度350。此凸起330之寬度350較佳是大約等於光電半導體晶片配置400之上側410的邊緣411和空腔300之開口表面310之繞行式邊緣311之間的距離340。由於該凸起330鄰接於開口表面310之幾何基本形式320之角隅區域而形成,則在此種情況下該空腔300之開口表面310之凸起330在平行於殼體200之上側201及垂直於光電半導體晶片配置400之上側410的邊緣411之方向中使光電半導體晶片配置400之上側410的邊緣411和空腔300之開口表面310之繞行式邊緣311之間的距離340不會增大。 The protrusion 330 of the open surface 310 of the cavity 300 has a width 350. The width 350 of the bump 330 is preferably approximately equal to the distance 340 between the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer configuration 400 and the circumscribed edge 311 of the open surface 310 of the cavity 300. Since the protrusion 330 is formed adjacent to the corner region of the geometrical form 320 of the opening surface 310, in this case the protrusion 330 of the opening surface 310 of the cavity 300 is parallel to the upper side 201 of the housing 200 and The distance 340 between the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 and the circumscribed edge 311 of the open surface 310 of the cavity 300 is not increased in the direction perpendicular to the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400. Big.

空腔300之深度和光電半導體晶片配置400之高度在垂直於殼體200之上側201之方向110中較佳是可互相調整。在光電半導體晶片配置400之上側401和殼體之上側201或空腔300之開口表面310之繞行式邊緣310之間較佳是存在一種小於60微米的高度差。因此,光電半導體晶片配置400之高度在垂直於殼體200之上側201的方向110中較佳是大致上小於空腔300之深度,使光電半導體晶片配置400之上側410緊靠在空腔300之開口表面310下方而配置著。 The depth of the cavity 300 and the height of the optoelectronic semiconductor wafer arrangement 400 are preferably mutually adjustable in a direction 110 that is perpendicular to the upper side 201 of the housing 200. Preferably, there is a height difference of less than 60 microns between the upper side 401 of the optoelectronic semiconductor wafer arrangement 400 and the top side 201 of the housing or the circumscribed edge 310 of the open surface 310 of the cavity 300. Accordingly, the height of the optoelectronic semiconductor wafer arrangement 400 is preferably substantially less than the depth of the cavity 300 in a direction 110 perpendicular to the upper side 201 of the housing 200 such that the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 abuts the cavity 300. The opening surface 310 is disposed below the opening surface 310.

光電半導體晶片配置400用於發出電磁輻射,例如,發出可見光。因此,在光電組件100之操作期間該電磁輻射發出至光電半導體晶片配置400之上側410。光電半導體晶片配置400包含一光電半導體晶片440。光電半導體晶片440例如可以是發光二極體(LED) 晶片。光電半導體晶片440具有上側441。光電半導體晶片440形成為可將電磁輻射發出至上側441。光電半導體晶片440之上側441因此形成一輻射發出面。光電半導體晶片440可以是表面發射式半導體晶片或容積(volume)發射式半導體晶片。在此種情況下,光電半導體晶片440形成為電磁輻射亦可經由光電半導體晶片44的其它外部表面而發出。 The optoelectronic semiconductor wafer configuration 400 is used to emit electromagnetic radiation, for example, to emit visible light. Thus, the electromagnetic radiation is emitted to the upper side 410 of the optoelectronic semiconductor wafer configuration 400 during operation of the optoelectronic component 100. The optoelectronic semiconductor wafer configuration 400 includes an optoelectronic semiconductor wafer 440. The optoelectronic semiconductor wafer 440 can be, for example, a light emitting diode (LED) Wafer. The optoelectronic semiconductor wafer 440 has an upper side 441. The optoelectronic semiconductor wafer 440 is formed to emit electromagnetic radiation to the upper side 441. The upper side 441 of the optoelectronic semiconductor wafer 440 thus forms a radiation emitting surface. The optoelectronic semiconductor wafer 440 can be a surface emitting semiconductor wafer or a volume emitting semiconductor wafer. In this case, the optoelectronic semiconductor wafer 440 is formed such that electromagnetic radiation can also be emitted via other external surfaces of the optoelectronic semiconductor wafer 44.

光電半導體晶片440之上側441可形成光電半導體晶片配置400之上側410。然而,在光電半導體晶片440之上側441上亦可配置光電半導體晶片配置400之其它元件。在第1圖和第2圖所示的例子中,光電半導體晶片配置400包含一轉換元件450,其配置在光電半導體晶片440之上側441。該轉換元件450之上側451形成光電半導體晶片配置400之上側410。不同於-或除了該轉換元件450,光電半導體晶片配置400亦可包含透明-陶瓷、玻璃、矽樹脂-澆注物或其它元件。在此種情況下,光電半導體晶片配置400之所述其它元件之上側可形成光電半導體晶片配置400之上側410。 The upper side 441 of the optoelectronic semiconductor wafer 440 can form an upper side 410 of the optoelectronic semiconductor wafer configuration 400. However, other components of the optoelectronic semiconductor wafer arrangement 400 may also be disposed on the upper side 441 of the optoelectronic semiconductor wafer 440. In the examples shown in FIGS. 1 and 2, the optoelectronic semiconductor wafer arrangement 400 includes a conversion element 450 disposed on the upper side 441 of the optoelectronic semiconductor wafer 440. The upper side 451 of the conversion element 450 forms an upper side 410 of the optoelectronic semiconductor wafer arrangement 400. Unlike or in addition to the conversion element 450, the optoelectronic semiconductor wafer configuration 400 can also comprise a transparent-ceramic, glass, silicone-casting or other component. In this case, the upper side of the other components of the optoelectronic semiconductor wafer configuration 400 can form the upper side 410 of the optoelectronic semiconductor wafer configuration 400.

該轉換元件450用於將光電半導體晶片440所發出之電磁輻射的波長進行轉換。於是,該轉換元件450可吸收由該光電半導體晶片440所發出之電磁輻射且發出不同(通常較長)波長的電磁輻射。由該轉換元件450所發出的電磁輻射然後發出至該轉換元件450之上側451。該轉換元件450可具有埋入的發光材料。例如,該轉換元件450可一種有機-或無機之發光材料。該埋入的發光材料例如亦可包含量子點。 The conversion element 450 is used to convert the wavelength of the electromagnetic radiation emitted by the optoelectronic semiconductor wafer 440. Thus, the conversion element 450 can absorb electromagnetic radiation emitted by the optoelectronic semiconductor wafer 440 and emit different (typically longer) wavelengths of electromagnetic radiation. The electromagnetic radiation emitted by the conversion element 450 is then emitted to the upper side 451 of the conversion element 450. The conversion element 450 can have a buried luminescent material. For example, the conversion element 450 can be an organic or inorganic luminescent material. The embedded luminescent material may, for example, also comprise quantum dots.

該轉換元件450形成為小板,其基本上完全覆蓋光電半導體晶片440之上側441。在角隅區域中,該轉換元件450當然具有一空白區460。在空白區460之區域中,光電半導體晶片440之上側441之一角隅區域保持著未被該轉換元件450所覆蓋。 The conversion element 450 is formed as a small plate that substantially completely covers the upper side 441 of the optoelectronic semiconductor wafer 440. In the corner region, the conversion element 450 of course has a blank area 460. In the region of the blank region 460, a corner region of the upper side 441 of the optoelectronic semiconductor wafer 440 remains uncovered by the conversion element 450.

在光電半導體晶片440之上側441之未被該轉換元件450所覆蓋的角隅區域中配置光電半導體晶片440之電性接觸面430。光電半導體晶片440之另一電性接觸面配置在光電半導體晶片440之與上側441相面對的下側。在光電半導體晶片440之電性接觸面430和另一接觸面之間,電壓可施加至光電半導體晶片440,以促使光電半導體晶片440發出電磁輻射。 The electrical contact surface 430 of the optoelectronic semiconductor wafer 440 is disposed in a corner region of the upper side 441 of the optoelectronic semiconductor wafer 440 that is not covered by the conversion element 450. The other electrical contact surface of the optoelectronic semiconductor wafer 440 is disposed on the lower side of the optoelectronic semiconductor wafer 440 that faces the upper side 441. Between the electrical contact surface 430 of the optoelectronic semiconductor wafer 440 and another contact surface, a voltage can be applied to the optoelectronic semiconductor wafer 440 to cause the optoelectronic semiconductor wafer 440 to emit electromagnetic radiation.

光電組件100之殼體200具有埋入的第一導線架區段500和埋入的第二導線架區段600。第一導線架區段500和第二導線架區段600分別具有可導電的材料(例如,金屬)。第一導線架區段500和第二導線架區段600在實體上互相隔開,但可由共同的導線架製成。第一導線架區段500和第二導線架區段600互相隔開地埋置於殼體200之材料中且在電性上互相隔離。 The housing 200 of the optoelectronic component 100 has a buried first leadframe section 500 and a buried second leadframe section 600. The first leadframe section 500 and the second leadframe section 600 each have an electrically conductive material (eg, metal). The first leadframe section 500 and the second leadframe section 600 are physically separated from each other but may be made of a common leadframe. The first leadframe section 500 and the second leadframe section 600 are embedded in the material of the housing 200 and are electrically isolated from one another.

第一導線架區段500具有晶片容納面510和一與晶片容納面510相面對的第一焊接接觸面520。第二導線架區段600具有一接合面610和一與接合面610相面對的第二焊接接觸面620。第一導線架區段500之晶片容納面510和第二導線架區段600之接合面610至少一部份未被殼體200之材料所覆蓋。晶片容納面510 和該接合面610在殼體200之空腔300之底面上可被接近(accessible)且形成殼體200之空腔300之底面的一些部份。第一導線架區段500之第一焊接接觸面520和第二導線架區段600之第二焊接接觸面620同樣至少部份地未被殼體200之材料所覆蓋。第一焊接接觸面520和第二焊接接觸面620可在殼體200之與上側201相面對的一背面上被接近。 The first leadframe section 500 has a wafer receiving surface 510 and a first solder contact surface 520 that faces the wafer receiving surface 510. The second leadframe section 600 has a joint surface 610 and a second weld contact surface 620 that faces the joint surface 610. At least a portion of the mating surface 610 of the wafer receiving surface 510 of the first leadframe section 500 and the second leadframe section 600 is not covered by the material of the housing 200. Wafer receiving surface 510 The joint surface 610 can be accessed on the bottom surface of the cavity 300 of the housing 200 and form portions of the bottom surface of the cavity 300 of the housing 200. The first weld contact surface 520 of the first leadframe section 500 and the second weld contact surface 620 of the second leadframe section 600 are also at least partially uncovered by the material of the housing 200. The first weld contact surface 520 and the second weld contact surface 620 can be accessed on a back surface of the housing 200 that faces the upper side 201.

第一導線架區段500之晶片容納面510配置在空腔300之底面的一區域中,該區域在垂直於殼體200之上側201之方向110中係配置在空腔300之開口表面310之具有幾何基本形式320之部份的下方。第二導線架區段600之接合面610配置在殼體200之空腔300之底面之一部份中,此部份在垂直方向110中係配置在空腔300之開口表面310之凸起330的下方。 The wafer receiving surface 510 of the first leadframe section 500 is disposed in a region of the bottom surface of the cavity 300, the region being disposed in the opening 110 of the cavity 300 in a direction 110 perpendicular to the upper side 201 of the housing 200. Below the portion of the geometric basic form 320. The joint surface 610 of the second leadframe section 600 is disposed in a portion of the bottom surface of the cavity 300 of the housing 200. The portion is disposed in the vertical direction 110 at a projection 330 of the open surface 310 of the cavity 300. Below.

藉由第二導線架區段600之接合面610配置在空腔300之底面之一部份中且該部份在垂直方向110中配置於空腔300之開口表面310之凸起330的下方,則空腔300之開口表面310之繞行式邊緣311在開口表面310之其餘的全部區段中可狹窄地跟隨光電半導體晶片配置400之由光電半導體晶片配置400之上側410的邊緣411所預設之外形。這樣就可在光電半導體晶片配置400之全部側面上確保:光電半導體晶片配置400之上側410之邊緣411和空腔300之開口表面310之繞行式邊緣311之間存在小的距離340。 The joint surface 610 of the second leadframe section 600 is disposed in a portion of the bottom surface of the cavity 300 and the portion is disposed in the vertical direction 110 below the protrusion 330 of the open surface 310 of the cavity 300, The bypass edge 311 of the open surface 310 of the cavity 300 can then narrowly follow the edge 411 of the optoelectronic semiconductor wafer configuration 400 from the upper side 410 of the optoelectronic semiconductor wafer configuration 400 in all of the remaining sections of the open surface 310. Outside shape. This ensures that there is a small distance 340 between the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 and the detour edge 311 of the open surface 310 of the cavity 300 on all sides of the optoelectronic semiconductor wafer configuration 400.

光電半導體晶片配置400配置在光電組件100之殼體200之空腔300中,使光電半導體晶片440之與上側441相面對的下側朝向第一導線架區段500之晶片容納面510且光電半導體晶片440之配置在光電半導體晶片440之下側上的另一電性接觸面可導電地與第一導線架區段500之晶片容納面510相連接。光電半導體晶片440例如可藉由焊劑或導電黏合劑而與第一導線架區段500之晶片容納面510相連接。 The optoelectronic semiconductor wafer arrangement 400 is disposed in the cavity 300 of the housing 200 of the optoelectronic component 100 such that the lower side of the optoelectronic semiconductor wafer 440 facing the upper side 441 faces the wafer receiving surface 510 of the first leadframe section 500 and is photovoltaic The other electrical contact surface of the semiconductor wafer 440 disposed on the underside of the optoelectronic semiconductor wafer 440 is electrically conductively coupled to the wafer receiving surface 510 of the first leadframe section 500. The optoelectronic semiconductor wafer 440 can be connected to the wafer receiving surface 510 of the first leadframe section 500, for example, by solder or a conductive adhesive.

光電半導體晶片440之配置在光電半導體晶片440之上側441上的電性接觸面430藉由一接合線210而可導電地與第二導線架區段600之接合面610相連接。該接合線210較佳是完全配置在殼體200之空腔300中。於是,該接合線210經由空腔300之配置在開口表面310之幾何基本形式320下方之部份而延伸至空腔300之配置在空腔300之開口表面310之凸起330下方之部份。 The electrical contact surface 430 of the optoelectronic semiconductor wafer 440 disposed on the upper side 441 of the optoelectronic semiconductor wafer 440 is electrically conductively coupled to the bonding surface 610 of the second leadframe section 600 by a bonding wire 210. The bond wire 210 is preferably fully disposed within the cavity 300 of the housing 200. Thus, the bond wire 210 extends through a portion of the cavity 300 disposed below the geometric basic form 320 of the open surface 310 to a portion of the cavity 300 disposed below the projection 330 of the open surface 310 of the cavity 300.

第一導線架區段500之第一焊接接觸面520和第二導線架區段600之第二焊接接觸面620形成光電組件100之電性終端面。電壓可經由第一焊接接觸面520和第二焊接接觸面620而施加至光電組件100之光電半導體晶片配置400之光電半導體晶片440。光電組件100例如可依據一種表面安裝用的方法以達成電性接觸。光電組件100因此形成一種表面安裝組件(SMD)。例如,用於形成光電組件100之終端面的焊接接觸面520、620可藉由回流(Reflow)-焊接而達成電性接觸。 The first solder contact surface 520 of the first leadframe section 500 and the second solder contact surface 620 of the second leadframe section 600 form an electrical termination surface of the optoelectronic component 100. The voltage can be applied to the optoelectronic semiconductor wafer 440 of the optoelectronic semiconductor wafer configuration 400 of the optoelectronic component 100 via the first solder contact surface 520 and the second solder contact surface 620. The optoelectronic component 100 can be electrically contacted, for example, according to a method of surface mounting. The optoelectronic component 100 thus forms a surface mount component (SMD). For example, the solder contact faces 520, 620 used to form the termination faces of the optoelectronic component 100 can be electrically contacted by reflow-welding.

在光電組件100之殼體200之空腔300之圍繞光電半導體晶片配置400之區域中配置一種澆注材料220。此澆注材料220例如可具有矽樹脂或環氧化物或是一種具有矽樹脂或環氧化物的混合材料。此澆注材料220在光學上可以是透明的,特別是可使光電半導體晶片配置400所發出之電磁輻射透過。然而,此澆注材料220亦可具有埋入的光學散射粒子,例如,具有TiO2之散射粒子。此澆注材料220亦可具有埋入的轉換粒子,其形成為可將電磁輻射的波長進行轉換。 A potting material 220 is disposed in the region of the cavity 300 of the housing 200 of the optoelectronic component 100 that surrounds the optoelectronic semiconductor wafer arrangement 400. The potting material 220 may, for example, have a enamel resin or an epoxide or a mixed material having a ruthenium resin or an epoxide. The potting material 220 can be optically transparent, particularly to allow electromagnetic radiation emitted by the optoelectronic semiconductor wafer arrangement 400 to pass therethrough. However, the potting material 220 can also have embedded optically scattering particles, such as scattering particles having TiO 2 . The potting material 220 can also have embedded conversion particles that are formed to convert the wavelength of the electromagnetic radiation.

此澆注粒子220用於保護光電半導體晶片配置400及上述接合線210使不因外部機械作用而造成損傷。於此,所述接合線210較佳是完全埋置於該澆注材料220中。光電半導體晶片配置400之垂直於光電半導體晶片配置400之上側410的各個側面較佳是儘可能完全由該澆注材料220所覆蓋著。該澆注材料220亦可作為由該光電半導體晶片配置400所發出之電磁輻射的光學反射器。該澆注材料220亦可將光電半導體晶片配置400所發出之電磁輻射的波長進行轉換。 The cast particles 220 serve to protect the optoelectronic semiconductor wafer arrangement 400 and the bond wires 210 from damage caused by external mechanical action. Here, the bonding wire 210 is preferably completely buried in the potting material 220. The respective sides of the optoelectronic semiconductor wafer arrangement 400 that are perpendicular to the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 are preferably covered as completely as possible by the potting material 220. The potting material 220 can also serve as an optical reflector for the electromagnetic radiation emitted by the optoelectronic semiconductor wafer arrangement 400. The potting material 220 can also convert the wavelength of the electromagnetic radiation emitted by the optoelectronic semiconductor wafer arrangement 400.

該澆注材料220較佳是以可流動的形式設置在空腔300之圍繞光電半導體晶片配置400之區域中且隨後予以硬化。於是,在該澆注材料220之面對該空腔300之開口表面310之一表面上形成彎月面,其區域中該澆注材料220可容易地針對垂直方向110而下彎。彎月面之形式基本上是由該澆注材料220之表面應力來決定。該澆注材料220之在彎月面之區域中所產生的垂度 越大,則光電半導體晶片配置400和空腔300之壁面之間的距離就越大。 The potting material 220 is preferably disposed in a flowable form in the region of the cavity 300 surrounding the optoelectronic semiconductor wafer arrangement 400 and subsequently hardened. Thus, a meniscus is formed on the surface of one of the opening surfaces 310 of the potting material 220 facing the cavity 300, in which the potting material 220 can be easily bent downward in the vertical direction 110. The form of the meniscus is essentially determined by the surface stress of the potting material 220. The sag produced by the potting material 220 in the region of the meniscus The larger the distance between the optoelectronic semiconductor wafer configuration 400 and the wall surface of the cavity 300, the greater the distance.

由於光電組件100之光電半導體晶片配置400之上側410之邊緣411和空腔300之開口表面310之繞行式邊緣311之間只存在小的距離340,則該澆注材料220在圍繞光電半導體晶片配置400之全部側面上只具有小的彎月面,使該澆注材料220只在小的範圍中下彎。在凸起330之區域中,由於凸起330之小的寬度350,則以該澆注材料220之小的垂度亦只形成小的彎月面。 Since there is only a small distance 340 between the edge 411 of the upper side 410 of the optoelectronic semiconductor wafer arrangement 400 of the optoelectronic component 100 and the circumscribed edge 311 of the open surface 310 of the cavity 300, the potting material 220 is disposed around the optoelectronic semiconductor wafer. There is only a small meniscus on all sides of the 400, so that the potting material 220 is only bent in a small range. In the region of the projection 330, due to the small width 350 of the projection 330, only a small meniscus is formed with a small sag of the casting material 220.

由於光電半導體晶片配置400之高度基本上等於空腔300之深度,則該澆注材料220基本上可完全覆蓋空腔300之壁面及光電半導體晶片配置400之垂直於光電半導體晶片配置400之上側410的各個側面。於是,空腔300基本上完全由該澆注材料220所填滿。 Since the height of the optoelectronic semiconductor wafer arrangement 400 is substantially equal to the depth of the cavity 300, the potting material 220 can substantially completely cover the wall surface of the cavity 300 and the optoelectronic semiconductor wafer configuration 400 perpendicular to the upper side 410 of the optoelectronic semiconductor wafer configuration 400. Various sides. Thus, the cavity 300 is substantially completely filled by the potting material 220.

空腔300之壁面和光電半導體晶片配置400之多個側面完全被覆蓋,這亦可藉由該澆注材料220填入至空腔300中時作用在該澆注材料220上的毛細效應來促成,由於在光電半導體晶片配置400和空腔300之壁面之間有小的距離340以及該凸起330之小的寬度350而使該毛細效應可自我調整。 The walls of the cavity 300 and the sides of the optoelectronic semiconductor wafer arrangement 400 are completely covered, which may also be facilitated by the capillary effect of the potting material 220 acting on the potting material 220 as it is filled into the cavity 300, due to There is a small distance 340 between the optoelectronic semiconductor wafer arrangement 400 and the wall surface of the cavity 300 and a small width 350 of the protrusion 330 to allow the capillary effect to self-adjust.

由於空腔300基本上由該澆注材料220完全填滿以及該澆注材料220之小的垂度,則可確保上述接合線210完全被該澆注材料220所覆蓋。 Since the cavity 300 is substantially completely filled by the potting material 220 and the small dip of the potting material 220, it is ensured that the bonding wire 210 is completely covered by the potting material 220.

本發明係依據較佳之實施例來詳述。然而,本發明不限於所揭示的實施例。反之,此行的專家可由此導出其它的不同實施例而未偏離本發明的保護範圍。。 The invention has been described in detail in accordance with the preferred embodiments. However, the invention is not limited to the disclosed embodiments. Conversely, the expert of this line may derive other different embodiments therefrom without departing from the scope of the invention. .

100‧‧‧光電組件 100‧‧‧Optoelectronic components

200‧‧‧殼體 200‧‧‧shell

201‧‧‧上側 201‧‧‧ upper side

210‧‧‧接合線 210‧‧‧bonding line

220‧‧‧澆注材料 220‧‧‧casting materials

300‧‧‧空腔 300‧‧‧ cavity

310‧‧‧開口表面 310‧‧‧Open surface

311‧‧‧繞行式邊緣 311‧‧‧circle edge

320‧‧‧幾何基本形式 320‧‧‧Geometric basic form

330‧‧‧凸起 330‧‧‧ bumps

340‧‧‧距離(邊緣-晶片) 340‧‧‧ Distance (edge-wafer)

350‧‧‧寬度(凸起) 350‧‧‧Width (bump)

400‧‧‧光電半導體晶片配置 400‧‧‧Opto-Semiconductor Wafer Configuration

410‧‧‧上側 410‧‧‧ upper side

411‧‧‧邊緣 411‧‧‧ edge

420‧‧‧第一幾何形式 420‧‧‧First geometric form

430‧‧‧電性接觸面 430‧‧‧Electrical contact surface

440‧‧‧光電半導體晶片 440‧‧‧Optoelectronic semiconductor wafer

441‧‧‧上側 441‧‧‧ upper side

450‧‧‧轉換元件 450‧‧‧Transfer components

451‧‧‧上側 451‧‧‧ upper side

460‧‧‧空白區 460‧‧‧Blank area

500‧‧‧第一導線架區段 500‧‧‧First lead frame section

510‧‧‧晶片容納面 510‧‧‧ wafer receiving surface

600‧‧‧第二導線架區段 600‧‧‧Second lead frame section

610‧‧‧接合面 610‧‧‧ joint surface

Claims (14)

一種光電組件(100),具有殼體(200),其具有一朝向該殼體(200)之上側(201)而敞開的空腔(300),該空腔(300)在該殼體(200)的上側(201)具有一開口表面(310),其具有幾何基本形式(320),該空腔(300)中配置有光電半導體晶片配置(400),該光電半導體晶片配置(400)的上側(410)具有第一幾何形式(420),該幾何基本形式(320)可藉由該第一幾何形式(420)之延伸而形成,該空腔(300)之開口表面(310)相對於該幾何基本形式(320)而言另具有一凸起(330),一接合線(210)配置於該光電半導體晶片配置(400)之電性接觸面(430)和該殼體(200)之接合面(610)之間,該接合面(610)配置於該凸起(330)中。 An optoelectronic component (100) having a housing (200) having a cavity (300) open toward an upper side (201) of the housing (200), the cavity (300) being in the housing (200) The upper side (201) has an open surface (310) having a geometric basic form (320) in which an optoelectronic semiconductor wafer configuration (400) is disposed, the upper side of the optoelectronic semiconductor wafer configuration (400) (410) having a first geometric form (420), which may be formed by extension of the first geometric form (420), the open surface (310) of the cavity (300) being relative to the The geometric basic form (320) further has a protrusion (330), and a bonding wire (210) is disposed on the electrical contact surface (430) of the optoelectronic semiconductor wafer arrangement (400) and the housing (200). Between the faces (610), the joint surface (610) is disposed in the projection (330). 如請求項1之光電組件(100),其中該光電半導體晶片配置(400)之上側(410)之第一幾何形式(420)是矩形形式。 The optoelectronic component (100) of claim 1, wherein the first geometric form (420) of the upper side (410) of the optoelectronic semiconductor wafer configuration (400) is in the form of a rectangle. 如請求項1或2之光電組件(100),其中該空腔(300)之開口表面(310)具有一繞行式邊緣(311),該光電半導體晶片配置(400)之上側(410)之邊緣(411)和空腔(300)之開口表面(310)之邊緣(311)之間的最短距離(340)在該光電半導體晶片配置(400)之上側(410)之邊緣(411)之全部點上都介於30微米和600微米之間,較佳是介於100微米和300微米之間。 The optoelectronic component (100) of claim 1 or 2, wherein the open surface (310) of the cavity (300) has a wraparound edge (311), and the optoelectronic semiconductor wafer configuration (400) has an upper side (410) The shortest distance (340) between the edge (411) and the edge (311) of the open surface (310) of the cavity (300) is at the edge (411) of the upper side (410) of the optoelectronic semiconductor wafer configuration (400). The dots are between 30 microns and 600 microns, preferably between 100 microns and 300 microns. 如請求項1至3中任一項之光電組件(100),其中在該光電半導體晶片配置(400)之上側(410)和該空腔(300)之開口表面(310)之繞行式邊緣(311)之間在垂直於殼體(200)之上側(201)的方向(110)中存在一種小於60微米的高度差。 The optoelectronic component (100) of any one of claims 1 to 3, wherein a bypass edge of the upper surface (410) of the optoelectronic semiconductor wafer configuration (400) and the open surface (310) of the cavity (300) There is a height difference between (311) in a direction (110) perpendicular to the upper side (201) of the casing (200) of less than 60 microns. 如請求項1至4中任一項之光電組件(100),其中該光電半導體晶片配置(400)具有光電半導體晶片(440),其具有上側(441)。 The optoelectronic component (100) of any one of claims 1 to 4, wherein the optoelectronic semiconductor wafer configuration (400) has an optoelectronic semiconductor wafer (440) having an upper side (441). 如請求項5之光電組件(100),其中該光電半導體晶片(440)之上側(441)形成輻射發出面。 The optoelectronic component (100) of claim 5, wherein the upper side (441) of the optoelectronic semiconductor wafer (440) forms a radiation emitting face. 如請求項5或6之光電組件(100),其中在該光電半導體晶片(440)之上側(441)上配置一轉換元件(450)。 The optoelectronic component (100) of claim 5 or 6, wherein a conversion element (450) is disposed on an upper side (441) of the optoelectronic semiconductor wafer (440). 如請求項1至7中任一項之光電組件(100),其中在該空腔(300)之圍繞該光電半導體晶片配置(400)之一區域中配置著澆注材料(220)。 The optoelectronic component (100) of any one of claims 1 to 7, wherein a potting material (220) is disposed in a region of the cavity (300) surrounding the optoelectronic semiconductor wafer configuration (400). 如請求項8之光電組件(100),其中該澆注材料(220)具有矽樹脂及/或環氧化物。 The photovoltaic module (100) of claim 8, wherein the casting material (220) has an enamel resin and/or an epoxide. 如請求項8或9之光電組件(100),其中該澆注材料(220)具有發光材料。 The optoelectronic component (100) of claim 8 or 9, wherein the potting material (220) has a luminescent material. 如請求項8至10中任一項之光電組件(100),其中該澆注材料(220)具有散射粒子。 The photovoltaic module (100) of any one of claims 8 to 10, wherein the potting material (220) has scattering particles. 如請求項8至11中任一項之光電組件(100),其中所述接合線(210)完全埋置於該澆注材料(220)中。 The optoelectronic component (100) of any one of claims 8 to 11, wherein the bond wire (210) is completely embedded in the potting material (220). 一種光電組件(100)的製備方法,具有以下步驟: -製備一殼體,其具有一朝向該殼體(200)之上側(201)而敞開的空腔(300),其中該空腔(300)在該殼體(200)之上側(201)具有開口表面(310),其具有幾何基本形式(320),該空腔(300)之開口表面(310)相對於該幾何基本形式(320)而言另具有一凸起(330);-將光電半導體晶片配置(400)設置於該空腔(300)中,其中該光電半導體晶片配置(400)之上側(410)具有第一幾何形式(420),該空腔(300)之開口表面(310)之幾何基本形式(320)可藉由該第一幾何形式(420)之延伸而形成;以及-將一接合線(210)配置於該光電半導體晶片配置(400)之電性接觸面(430)和該殼體(200)之配置於該凸起(330)中的一接合面(610)之間。 A method for preparing a photovoltaic module (100) has the following steps: Preparing a housing having a cavity (300) that opens toward the upper side (201) of the housing (200), wherein the cavity (300) has an upper side (201) of the housing (200) An open surface (310) having a geometric basic form (320), the open surface (310) of the cavity (300) having a protrusion (330) relative to the geometric basic form (320); A semiconductor wafer arrangement (400) is disposed in the cavity (300), wherein the upper side (410) of the optoelectronic semiconductor wafer configuration (400) has a first geometric form (420), an open surface of the cavity (300) (310) The geometric basic form (320) can be formed by the extension of the first geometric form (420); and - a bonding wire (210) is disposed on the electrical contact surface of the optoelectronic semiconductor wafer configuration (400) (430) And the housing (200) is disposed between a joint surface (610) in the protrusion (330). 如請求項13之製備方法,其中此製備方法包含以下的另一步驟:-將一種澆注材料(220)施加在該空腔(300)之圍繞光電半導體晶片(700)之一區域中。 The method of preparation of claim 13, wherein the method of preparation comprises the further step of: applying a potting material (220) in a region of the cavity (300) surrounding the optoelectronic semiconductor wafer (700).
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