TW201440273A - Resistive random-access memory sensor element - Google Patents

Resistive random-access memory sensor element Download PDF

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TW201440273A
TW201440273A TW102113038A TW102113038A TW201440273A TW 201440273 A TW201440273 A TW 201440273A TW 102113038 A TW102113038 A TW 102113038A TW 102113038 A TW102113038 A TW 102113038A TW 201440273 A TW201440273 A TW 201440273A
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layer
recess
oxide layer
electrode
oxide
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TW102113038A
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TWI517466B (en
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Chao-Sung Lai
Jer-Chyi Wang
Yu-Ren Ye
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Univ Chang Gung
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Abstract

The Resistive random-access memory sensor element is provided, which includes a first electrode, an insulation layer has a first recess disposed in the first electrode, a resistance conversion layer is disposed on a surface of the insulation layer and on an inner surface of the first recess so as to form a second recess, a second electrode disposed on the insulation layer and disposed within the second recess, a sensing film disposed on the second electrode and a third recess is formed therein to expose the portion surface of the second electrode, and a photoresist layer disposed on the sensing film and a fourth recess is formed therein to expose the portion surface of the sensing film, and a fifth recess is formed to align the second recess and a portion of surface of the second electrode is to be exposed.

Description

電阻式記憶體感測元件 Resistive memory sensing element

本發明係有關於一種記憶體元件,特別是電阻式記憶體多離子感測元件,藉由電阻轉換達到多離子選擇性及高感測度。 The invention relates to a memory component, in particular a resistive memory multi-ion sensing component, which achieves multi-ion selectivity and high-sensitivity by resistance conversion.

隨著醫療的日趨進步與優生教育的觀念普及,全球已逐漸邁入高齡化的社會形態,老年人口之比例大幅增加,有鑑於此,醫療保健與照顧已然成為現今21世紀最重要之課題之一,其中尤其以「居家照顧(Home care)」即時監控系統的建置,最具發展潛力與市場價值。所謂的醫療即時監控,是精確的觀察人類身體中之細微變化,藉此提早預防疾病之發生或及早進行疾病之治療。其中可觀察細微變化之部份有很多,包含汗水、尿液、口水中之酸鹼值與成分…等。而要實現此目標,必須建立一個可接受人體訊息轉換成精確的電子訊號之感測平台,此平台可稱之為轉換器(Transducer)。 With the advancement of medical care and the popularization of the concept of eugenics education, the world has gradually entered an aging society, and the proportion of the elderly population has increased significantly. In view of this, health care and care have become one of the most important issues in the 21st century. In particular, the establishment of the "Home Care" real-time monitoring system has the greatest development potential and market value. The so-called medical real-time monitoring is to accurately observe the subtle changes in the human body, so as to prevent the occurrence of diseases or the early treatment of diseases. There are many parts that can be observed for subtle changes, including the pH and composition of sweat, urine, and saliva. To achieve this goal, a sensing platform that accepts human body information into accurate electronic signals must be established. This platform can be called a Transducer.

目前已有許多感測元件的研究,其中開發之轉換器平台包括:離子選擇性電極(ISE,ion selective electrode)、離子感測場效電晶體(ISFET,ion sensitivefield-effect transistor)、光定址電位感測器(LAPS,light addressable potentiometric sensor)、離子感測有機場效電晶體(ISOFET,ion sensitive organic field effect transistor)、以及三五族電晶體(GaN FET)等感測平台。然而,目前這些感測平台,仍有待改善的部分,例如非理想效應,如時漂、遲滯、溫度等,以及封裝技術和參考電極整合等。在眾多種類的感測器中,又以離子感測場效電晶體(ISFET)最受注目和重視。 At present, there are many researches on sensing components, among which the converter platform developed includes: ion selective electrode (ISE), ion sensitive field-effect transistor (ISFET), optical addressing potential LAPS (light addressable potentiometric sensor), ion sensing organic ion field (ISOFET, ion sensitive organic field effect) Transistor, and sensing platforms such as GaN FETs. However, at present, these sensing platforms still have some parts to be improved, such as non-ideal effects such as time drift, hysteresis, temperature, etc., as well as packaging technology and reference electrode integration. Of the many types of sensors, ion-sensing field-effect transistors (ISFETs) have received the most attention and attention.

離子感測元件(ISFET)於1970年由P.Bergveld所提出,經過數十年先進們的研究與改良,已具備有體積小、反應速度快、壽命長且可與先進製程互相匹配等優點,而離子感測元件之其結構近似於金氧半導體場效電晶體(MOSFET,metal oxide semiconductor field effect transistor),只將金屬閘極的部份取代為待測溶液與參考電極。離子感測元件的感測機制主要是在不同待測溶液中,會有數量不同的酸、鹼或中性離子和感測薄膜表面進行反應和鍵結,在感測薄膜表面上產生一鍵結層,所形成的表面電位會造成平帶電壓(Vfb)變化,因此也造成其臨界電壓(Vth)發生變化,藉由在不同濃度的溶液中,經由表面電位變化來計算出其感測度。在離子感測元件中,EIS(Electrolyte Insulator Semiconductor)為其核心感測部分,其製程較ISFET離子感測元件更為簡易。由於離子感測場效電晶體具有較廣的應用範圍,可利用半導體技術進行大量生產與微型化,且反應快速而且構造堅硬,因此應用於生物感測器上有較大之商機與發展。 Ion-sensing devices (ISFETs) were proposed by P. Bergveld in 1970. After decades of research and improvement, they have the advantages of small size, fast response, long life and matching with advanced processes. The structure of the ion sensing element is similar to that of a metal oxide semiconductor field effect transistor (MOSFET), and only the portion of the metal gate is replaced by the solution to be tested and the reference electrode. The sensing mechanism of the ion sensing element is mainly that in different solutions to be tested, a different amount of acid, alkali or neutral ions and the surface of the sensing film are reacted and bonded to generate a bond on the surface of the sensing film. The surface potential formed by the layer causes a change in the flat band voltage (V fb ), which also causes a change in its threshold voltage (V th ). The sensitivity is calculated by changing the surface potential in different concentrations of the solution. . Among the ion sensing elements, EIS (Electrolyte Insulator Semiconductor) is its core sensing part, and its process is easier than ISFET ion sensing elements. Due to the wide application range of ion sensing field effect transistors, semiconductor technology can be used for mass production and miniaturization, and the reaction is fast and the structure is hard. Therefore, there are great opportunities and developments in the application of biosensors.

離子感測場效電晶體的感測機制主要是在不同待測溶液中,會有數量不同之酸、鹼或中性離子和感測薄膜表面進行反應和鍵結,使表面產生一鍵結層形成之電位,再利用此電位在不同濃度溶液中之變化來計算出感測度,而此感測模型又稱為 吸附鍵結模型(Site Binding Model)。離子感測場效電晶體目前可應用之領域範圍相當廣泛,舉凡食品檢測、工業廢棄物、醫學醫療檢測、環境、農業、飲用水檢測…等。而目前離子感測電晶體感測器發展所遭遇到的瓶頸,主要可歸納為三點:1.參考電極難以微型化、2.封裝之穩定性、以及3.感測薄膜之非理想效應。以第一點參考電極難以微型化來看,一個完整之感測系統必須包含許多部份,除了感測度高之感測元件及良好之訊號處理接線外,穩定且堅固之參考電極(Reference Electrode,RE)是相當必要的。因此,參考電極之微小化一直以來均是許多學者極力探討之研究,但確也是感測器微縮技術中最難解決之問題。而就目前所發展之感測系統而言,最普遍之參考電極為氯化銀電極(Ag/AgCl),但此電極卻有生存期短,且難以微小化與感測元件整合於同一晶片上的缺點。 The sensing mechanism of the ion-sensing field-effect transistor is mainly that in different solutions to be tested, there are a number of different acid, alkali or neutral ions and the surface of the sensing film reacts and bonds to form a bonding layer on the surface. Forming the potential, and then using the change of the potential in different concentration solutions to calculate the sensitivity, and the sensing model is also called Site Binding Model. Ion-sensing field-effect transistors are currently available in a wide range of applications, including food testing, industrial waste, medical and medical testing, environmental, agricultural, and drinking water testing. At present, the bottleneck encountered in the development of ion-sensing transistor sensors can be summarized into three points: 1. It is difficult to miniaturize the reference electrode, 2. The stability of the package, and 3. The non-ideal effect of the sensing film. In view of the difficulty in miniaturizing the first reference electrode, a complete sensing system must contain many parts, in addition to the highly sensitive sensing elements and good signal processing wiring, a stable and robust reference electrode (Reference Electrode, RE) is quite necessary. Therefore, the miniaturization of the reference electrode has been the research that many scholars have been discussing, but it is also the most difficult problem in the sensor miniature technology. For the currently developed sensing system, the most common reference electrode is a silver chloride electrode (Ag/AgCl), but this electrode has a short lifetime and is difficult to miniaturize and integrate the sensing element on the same wafer. Shortcomings.

因此,目前已有參考電極場效電晶體(Reference electrode field-effect transistor,REFET)元件設計出以取代傳統參考電極。其主要概念是利用一敏感性低的感測元件,搭配可提供系統電壓的準參考電極(qRE)。敏感性高的ISFET與敏感性低的ISFET分別由qRE得到輸出訊號,經過差動放大電路,所得到的輸出,便是扣掉雜訊所得到單純的離子濃度。 Therefore, reference electrode field-effect transistor (REFET) elements have been designed to replace conventional reference electrodes. The main concept is to use a low-sensitivity sensing element with a quasi-reference electrode (qRE) that provides the system voltage. The ISFET with high sensitivity and the ISFET with low sensitivity get the output signal from qRE respectively. After the differential amplifier circuit, the output is the simple ion concentration obtained by deducting the noise.

本發明的主要目的是提供一種電阻式記憶體感測元件,係利用此電阻式記憶體感測元件具有高低電阻轉換的特性,使得感測電晶體施加電場變化時,可以增加對不同離子感測之選擇性。 The main object of the present invention is to provide a resistive memory sensing component, which utilizes the characteristics of high and low resistance switching of the resistive memory sensing component, so that different sensing ions can be added when the sensing transistor applies an electric field change. Selectivity.

根據上述目的,本發明揭露一種電阻式記憶體感測元件之形成方法,包括:提供矽基板;形成第一氧化層在基板上;形成第一圖案化光阻層在第一氧化層上以定義出電阻式記憶體元件面積;蝕刻以移除部份第一氧化層以形成第一凹槽在基板上、且曝露出基板之部份表面;形成第二氧化層在第一氧化層之表面上且在第一凹槽之內表面以形成第二凹槽;沉積金屬層在第一氧化層上且填滿第二凹槽;形成一第三氧化層在金屬層上;形成一第二圖案化光阻層在第三氧化層上,使得在第三氧化層上定義該電阻式記憶體之一電極區域;蝕刻以移除部份第三氧化層且曝露出金屬層之部份表面;以及形成第三圖案化光阻層在第三氧化層上以定義一感測元件面積,且曝露出第三氧化層之部份表面以及曝露出金屬層之部份表面。 According to the above object, the present invention discloses a method for forming a resistive memory sensing element, comprising: providing a germanium substrate; forming a first oxide layer on the substrate; forming a first patterned photoresist layer on the first oxide layer to define Resisting the memory device area; etching to remove a portion of the first oxide layer to form a first recess on the substrate and exposing a portion of the surface of the substrate; forming a second oxide layer on the surface of the first oxide layer And forming a second recess on the inner surface of the first recess; depositing a metal layer on the first oxide layer and filling the second recess; forming a third oxide layer on the metal layer; forming a second pattern a photoresist layer on the third oxide layer such that an electrode region of the resistive memory is defined on the third oxide layer; etching to remove a portion of the third oxide layer and exposing a portion of the surface of the metal layer; and forming The third patterned photoresist layer is on the third oxide layer to define a sensing element area, and expose a portion of the surface of the third oxide layer and expose a portion of the surface of the metal layer.

另外,根據上述之形成方法,本發明還揭露一種電阻式記憶體感測元件,包含:第一電極;絕緣層,具有第一凹槽設置在第一電極上;電阻轉換層,設置在絕緣層之一表面及在第一凹槽之一內表面上以形成一第二凹槽;第二電極,設置在絕緣層及第二凹槽內;感測薄膜,設置在第二電極上且具有一第三凹槽以曝露出第二電極之部份表面;以及一光阻層,設置在該感測薄膜上且具有第四凹槽以曝露出該感測薄膜之部份表面且對準第二凹槽以及第五凹槽係對準於該第三凹槽以曝露出該第二電極之部份表面。 In addition, according to the above forming method, the present invention also discloses a resistive memory sensing element, comprising: a first electrode; an insulating layer having a first recess disposed on the first electrode; and a resistance conversion layer disposed on the insulating layer a surface and an inner surface of one of the first recesses to form a second recess; a second electrode disposed in the insulating layer and the second recess; and a sensing film disposed on the second electrode and having a a third recess to expose a portion of the surface of the second electrode; and a photoresist layer disposed on the sensing film and having a fourth recess to expose a portion of the surface of the sensing film and aligned with the second The recess and the fifth recess are aligned with the third recess to expose a portion of the surface of the second electrode.

為讓本發明之上述和其他目的、特徵和優點能更明顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下。 The above and other objects, features and advantages of the present invention will become more <RTIgt;

10‧‧‧基板 10‧‧‧Substrate

12‧‧‧第一氧化層 12‧‧‧First oxide layer

14‧‧‧第一凹槽 14‧‧‧First groove

16‧‧‧第二氧化層 16‧‧‧Second oxide layer

18‧‧‧第二凹槽 18‧‧‧second groove

20‧‧‧金屬層 20‧‧‧metal layer

22‧‧‧第三氧化層 22‧‧‧ third oxide layer

24‧‧‧圖案化第二光阻層 24‧‧‧ patterned second photoresist layer

26‧‧‧第三凹槽 26‧‧‧ third groove

28‧‧‧圖案化第三光阻層 28‧‧‧ patterned third photoresist layer

30‧‧‧第四凹槽 30‧‧‧fourth groove

32‧‧‧第五凹槽 32‧‧‧ fifth groove

第1圖係根據本發明所揭露之技術,表示在一基板上具 有一電阻轉換層之示意圖;第2圖係根據本發明所揭露之技術,表示在第二氧化層及第二凹槽內形成一金屬閘極之示意圖;第3圖係根據本發明所揭露之技術,表示在金屬層上形成一電阻轉換層之示意圖;第4圖係根據本發明所揭露之技術,表示在第三氧化層上形成具有圖案化之第二光阻層之示意圖;第5圖係根據本發明所揭露之技術,表示利用蝕刻方式移除部份第三氧化層之示意圖;第6圖係根據本發明所揭露之技術,表示在第三氧化層上形成第三光阻層之示意圖;第7A圖係表示利用不同pH值下之CV曲線來計算此感測薄膜對於氫離子的感測度;以及第7B圖係表示量測曲線示意圖。 Figure 1 is a diagram showing a technique on a substrate according to the disclosed technology A schematic diagram of a resistive switching layer; FIG. 2 is a schematic diagram showing the formation of a metal gate in the second oxide layer and the second recess according to the disclosed technology; and FIG. 3 is a technique according to the present invention. a schematic diagram showing the formation of a resistive switching layer on the metal layer; and FIG. 4 is a schematic view showing the formation of a patterned second photoresist layer on the third oxide layer according to the technique disclosed in the present invention; According to the technology disclosed in the present invention, a schematic diagram of removing a portion of a third oxide layer by etching is shown; and FIG. 6 is a schematic diagram showing formation of a third photoresist layer on a third oxide layer according to the disclosed technology. Figure 7A shows the CV curve at different pH values used to calculate the sensitivity of the sensing film for hydrogen ions; and Figure 7B shows the measurement curve.

本發明在此所探討的方向為一種電阻式記憶體感測元件結構及其形成方法。為了能徹底地瞭解本發明,將在下列的描述中提出詳盡的感測元件及其製造步驟。顯然地,本發明的實行並未限定此感測元件之技藝者所熟習的特殊細節,然而,對於本發明的較佳實施例,則會詳細描述如下。除了這些詳細描述之外,本發明還可以廣泛地施行在其他的實施例中,且本發明的範圍不受限定,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。 The direction of the invention discussed herein is a resistive memory sensing element structure and method of forming the same. In order to thoroughly understand the present invention, detailed sensing elements and their manufacturing steps will be presented in the following description. Obviously, the practice of the invention is not limited to the specific details of those skilled in the art of the present invention. However, the preferred embodiment of the invention will be described in detail below. The present invention may be widely practiced in other embodiments, and the scope of the present invention is not limited thereto, and may be modified and modified without departing from the spirit and scope of the invention. Therefore, the scope of patent protection of the present invention is defined by the scope of the claims appended hereto.

第1圖至第6圖係為本發明所揭露之電阻式記憶體感測 元件之形成步驟流程圖;而第7A圖係表示利用不同pH值下之CV曲線來計算此感測薄膜對於氫離子的感測度;以及第7B圖係表示量測曲線示意圖。 1 to 6 are the resistive memory sensing disclosed in the present invention. A flow chart of the steps of forming the elements; and FIG. 7A shows the CV curve at different pH values to calculate the sensitivity of the sensing film to hydrogen ions; and FIG. 7B shows a schematic curve of the measurement curve.

首先請參考第1圖,係根據本發明所揭露之技術,表示在一基板上具有一電阻轉換層之示意圖。在第1圖中,係先提供一基板10,基板10的材料可以是矽基板,用來做為電阻式記憶體感測元件之下電極(或第一電極)。接著,係利用一般沉積的方式,例如低壓化學氣相沉積法(LPCVD,low pressure chemical vapor deposition)形成一第一氧化層12在基板10上。接下來,利用半導體技術,先在第一氧化層12上形成一第一圖案化光阻層(未在圖中表示),其目的是為了在第一氧化層12上定義出電阻式記憶體元件面積。接著,利用蝕刻的方式、並且以基板10之表面做為蝕刻終止層(etching stop layer),蝕刻以移除部份的第一氧化層12,且在第一氧化層12內形成一第一凹槽14並且曝露出基板10的部份表面。 Referring first to Figure 1, there is shown a schematic diagram of a resistive switching layer on a substrate in accordance with the teachings of the present invention. In Fig. 1, a substrate 10 is provided first. The material of the substrate 10 may be a germanium substrate used as a lower electrode (or first electrode) of the resistive memory sensing element. Next, a first oxide layer 12 is formed on the substrate 10 by a general deposition method such as low pressure chemical vapor deposition (LPCVD). Next, using a semiconductor technique, a first patterned photoresist layer (not shown) is first formed on the first oxide layer 12 for the purpose of defining a resistive memory device on the first oxide layer 12. area. Then, by etching, and using the surface of the substrate 10 as an etching stop layer, etching is performed to remove a portion of the first oxide layer 12, and a first recess is formed in the first oxide layer 12. The groove 14 exposes a portion of the surface of the substrate 10.

緊接著,請繼續參考第1圖,同樣是利用沉積的方式,將厚度較薄的第二氧化層16以毯覆(blanket)的方式形成在第一氧化層12的表面以及在已曝露之基板10的表面上,此時在第一氧化層12及在第二氧化層16之間係形成一第二凹槽18,且此第二凹槽18對準於第一凹槽14。 Then, referring to FIG. 1 again, the second oxide layer 16 having a thin thickness is formed in a blanket manner on the surface of the first oxide layer 12 and on the exposed substrate by deposition. On the surface of the surface 10, a second recess 18 is formed between the first oxide layer 12 and the second oxide layer 16, and the second recess 18 is aligned with the first recess 14.

接著,請參考第2圖,係表示在第二氧化層及第二凹槽內形成一金屬閘極之示意圖。在第2圖中,當第一氧化層16形成之後,係將一金屬層20,其材料例如鉑、鎢以沉積的方式形成在第二氧化層16上以及將第二凹槽18填滿,此金屬層20係做為此電阻式記憶體感測元件之金屬閘極。在此要說明 的是,在本發明所述之實施例中,此金屬層20係做為此電阻式記憶體感測元件之上電極(或第二電極)。 Next, please refer to FIG. 2, which is a schematic view showing the formation of a metal gate in the second oxide layer and the second recess. In FIG. 2, after the first oxide layer 16 is formed, a metal layer 20 of a material such as platinum or tungsten is deposited on the second oxide layer 16 and the second recess 18 is filled. This metal layer 20 serves as the metal gate of the resistive memory sensing element. Here to explain In the embodiment of the present invention, the metal layer 20 serves as an upper electrode (or a second electrode) of the resistive memory sensing element.

接著,請參考第3圖,表示在金屬層上形成一電阻轉換層之示意圖。在第3圖中,同樣是利用沉積的方式,將第三氧化層22沉積在金屬層20上,在此第三氧化層22係做為電阻式記憶體感測元件之感測薄膜,此感測薄膜(第三氧化層)22的目的主要是在於:在不同的待測溶液中會有數量不同之酸性離子、鹼性離子或者中性離子和此感測薄膜22的表面進行反應和鍵結,使表面產生一鍵結層形成之電位,再利用此電位在不同濃度溶液中之變化來計算出感測度。 Next, please refer to FIG. 3, which shows a schematic diagram of forming a resistance conversion layer on the metal layer. In the third figure, the third oxide layer 22 is deposited on the metal layer 20 by deposition, and the third oxide layer 22 is used as a sensing film of the resistive memory sensing element. The purpose of the film (third oxide layer) 22 is mainly to: react and bond the surface of the sensing film 22 with a different amount of acidic ions, basic ions or neutral ions in different solutions to be tested. The surface is generated with a potential formed by a bonding layer, and the change in the concentration of the potential is used to calculate the sensitivity.

接下來,請參考第4圖,係表示在第三氧化層上形成具有圖案化之第二光阻層之示意圖。在第4圖中,係將一具有圖案化之第二光阻層24形成在第三氧化層22上,其目的係用以定義電阻式記憶體之上電極區域。在此要說明的是,第一氧化層12、第二氧化層16及第三氧化層22可以是具有高介電常數約為20~200之氧化層,例如氧化鍺(Ge2O3)層或者是二氧化矽(SiO2)層。 Next, please refer to FIG. 4, which is a schematic view showing the formation of a patterned second photoresist layer on the third oxide layer. In Fig. 4, a patterned second photoresist layer 24 is formed on the third oxide layer 22 for the purpose of defining an upper electrode region of the resistive memory. It should be noted that the first oxide layer 12, the second oxide layer 16, and the third oxide layer 22 may be an oxide layer having a high dielectric constant of about 20 to 200, such as a germanium oxide (Ge 2 O 3 ) layer. Or a layer of cerium oxide (SiO 2 ).

接著,請參考第5圖,係表示利用蝕刻方式移除部份第三氧化層之示意圖。在第5圖中,係根據第4圖中所揭露之具有圖案化第二光阻層24,以金屬層20做為蝕刻終止層,蝕刻以移除部份第三氧化層22,以形成一第三凹槽26在第三氧化層22內且將做為金屬閘極的金屬層20曝露出來。在本發明所述之實施例中,第三凹槽26設置的位置沒有對準於第二凹槽16。 Next, please refer to FIG. 5, which is a schematic view showing the removal of a portion of the third oxide layer by etching. In FIG. 5, according to the patterned second photoresist layer 24 disclosed in FIG. 4, the metal layer 20 is used as an etch stop layer, and etching is performed to remove a portion of the third oxide layer 22 to form a The third recess 26 is exposed within the third oxide layer 22 and will serve as a metal gate 20 of the metal gate. In the embodiment of the invention, the third recess 26 is disposed at a position that is not aligned with the second recess 16.

接著請參考第6圖,表示在第三氧化層上形成第三光阻 層之示意圖。在第6圖中,係將具有圖案第三光阻層28形成在第三氧化層22,用以定義出感測元件面積。接著,同樣參考第6圖,係利用蝕刻製程,移除部份第三光阻層28以形成第四凹槽30及第五凹槽32,其中第四凹槽30係曝露出第三氧化層22之部份表面且對準於第二凹槽18,而第五凹槽32係對準於第三凹槽26且同樣將金屬層20之部份表面曝露出來,且保留其他未移除之第三光阻層28以形成一電阻式記憶體感測元件。 Next, please refer to FIG. 6 to show that a third photoresist is formed on the third oxide layer. Schematic diagram of the layer. In Fig. 6, a patterned third photoresist layer 28 is formed on the third oxide layer 22 to define the sensing element area. Next, referring also to FIG. 6, an etching process is performed to remove a portion of the third photoresist layer 28 to form a fourth recess 30 and a fifth recess 32, wherein the fourth recess 30 exposes the third oxide layer. A portion of the surface of 22 is aligned with the second recess 18, and the fifth recess 32 is aligned with the third recess 26 and also exposes a portion of the surface of the metal layer 20, and remains unremoved. The third photoresist layer 28 is formed to form a resistive memory sensing element.

根據本發明所揭露之技術可以得知,一般的離子感測元件都是利用電容-電壓曲線(CV)在不同離子濃度下造成CV曲線的漂移來計算離子感測度(sensitivity),如第7A圖之氫離子感測,利用不同pH值下之CV曲線來計算此感測薄膜對於氫離子的感測度,然而,由IMIM結構無法量測其CV曲線,因此我們將利用電流-電壓曲線(JV)在不同離子濃度下造成JV曲線的漂移來計算離子感測度。 According to the technology disclosed by the present invention, it is known that a general ion sensing element calculates the ion sensitivity by using a capacitance-voltage curve (CV) to cause a drift of a CV curve at different ion concentrations, as shown in FIG. 7A. The hydrogen ion sensing uses the CV curve at different pH values to calculate the sensitivity of the sensing film to hydrogen ions. However, the CIM curve cannot be measured by the IMIM structure, so we will use the current-voltage curve (JV). The ion sensibility is calculated by causing a drift of the JV curve at different ion concentrations.

如第7B圖之量測曲線示意圖所示,當氫離子的濃度變化時,會造成電極的功函數漂移,而使得JV曲線產生變化,藉此來算出此感測薄膜對於氫離子的感測度。由於IMIS元件中含有MIS電阻式記憶體部分,當電阻式記憶體操作的時候,MIS元件會有高阻抗(HRS)與低阻抗(LRS)兩個狀態(未在圖中表示)。當電阻式記憶體設定成低阻抗時,供給電壓跨在MIS電阻式記憶體的壓降較小,相對的IMIS元件的等效電場(effective-field)較大;如果電阻式記憶體重設(Reset)成高阻抗時,供給電壓跨在MIM電阻式記憶體的壓降很大,相對的IMIM元件的等效電場會變的很小,藉著改變跨在IMIM元件 的等效電場,我們將可以調整IMIM離子感測元件對於不同離子感測的狀況。因此可以利用此電阻式記憶體感測元件具有高低電阻轉換的特性,使得感測電晶體施加電場變化時,可以增加對不同離子感測之選擇性。 As shown in the schematic diagram of the measurement curve of FIG. 7B, when the concentration of the hydrogen ions changes, the work function of the electrode is shifted, and the JV curve is changed, thereby calculating the sensitivity of the sensing film to hydrogen ions. Since the IMIS component contains the MIS resistive memory portion, when the resistive memory is operated, the MIS device has two states of high impedance (HRS) and low impedance (LRS) (not shown in the figure). When the resistive memory is set to a low impedance, the voltage drop across the MIS resistive memory is small, and the equivalent effective field of the IMIS component is large; if the resistive memory weight is set (Reset When the impedance is high, the voltage drop across the MIM resistive memory is large, and the equivalent electric field of the opposite IMIM component becomes small, by changing across the IMIM component. With the equivalent electric field, we will be able to adjust the condition of the IMIM ion sensing element for different ion sensing. Therefore, the resistive memory sensing element can be utilized to have high and low resistance switching characteristics, so that when the sensing transistor is applied with an electric field change, the selectivity to different ion sensing can be increased.

10‧‧‧基板 10‧‧‧Substrate

12‧‧‧第一氧化層 12‧‧‧First oxide layer

14‧‧‧第一凹槽 14‧‧‧First groove

16‧‧‧第二氧化層 16‧‧‧Second oxide layer

18‧‧‧第二凹槽 18‧‧‧second groove

20‧‧‧金屬層 20‧‧‧metal layer

22‧‧‧第三氧化層 22‧‧‧ third oxide layer

26‧‧‧第三凹槽 26‧‧‧ third groove

28‧‧‧圖案化第三光阻層 28‧‧‧ patterned third photoresist layer

30‧‧‧第四凹槽 30‧‧‧fourth groove

32‧‧‧第五凹槽 32‧‧‧ fifth groove

Claims (13)

一種電阻式記憶體感測元件之形成方法,包含:提供一基板;形成一第一氧化層在該基板上;形成一第一圖案化光阻層在該第一氧化層上以定義出該電阻式記憶體元件面積;蝕刻以移除部份該第一氧化層以形成一第一凹槽在該基板上、且曝露出該基板之部份表面;形成一第二氧化層在該第一氧化層之一表面上且在該第一凹槽之一內表面上,並且在該第一凹槽上形成一第二凹槽;沉積一金屬層在該第一氧化層上且填滿該第二凹槽;形成一第三氧化層在該金屬層上;形成一第二圖案化光阻層在該第三氧化層上,使得在該第三氧化層上定義該電阻式記憶體之一電極區域;蝕刻以移除部份第三氧化層以形成一第三凹槽且曝露出該金屬層之部份表面;形成一第三圖案化光阻層在該第三氧化層上以定義一感測元件面積;以及蝕刻以移除部份該第三圖案化光阻層以形成一第四凹槽及一第五凹槽,其中該第四凹槽曝露出該第三氧化層之部份表面以及該第五凹槽係對準於該第三凹槽且曝露出該金屬層之部份表面。 A method for forming a resistive memory sensing device, comprising: providing a substrate; forming a first oxide layer on the substrate; forming a first patterned photoresist layer on the first oxide layer to define the resistor An area of the memory device; etching to remove a portion of the first oxide layer to form a first recess on the substrate and exposing a portion of the surface of the substrate; forming a second oxide layer in the first oxide a surface of one of the layers and on an inner surface of the first recess, and a second recess is formed on the first recess; depositing a metal layer on the first oxide layer and filling the second Forming a third oxide layer on the metal layer; forming a second patterned photoresist layer on the third oxide layer, thereby defining an electrode region of the resistive memory on the third oxide layer Etching to remove a portion of the third oxide layer to form a third recess and expose a portion of the surface of the metal layer; forming a third patterned photoresist layer on the third oxide layer to define a sense Component area; and etching to remove portions of the third patterned photoresist layer Forming a fourth recess and a fifth recess, wherein the fourth recess exposes a portion of the surface of the third oxide layer and the fifth recess is aligned with the third recess and exposes the metal Part of the surface of the layer. 如申請專利範圍第1項所述之方法,其中該基板為矽基板。 The method of claim 1, wherein the substrate is a germanium substrate. 如申請專利範圍第1項所述之方法,其中該第一氧化層、 該第二氧化層及該第三氧化層係為具有高介電常數之氧化層。 The method of claim 1, wherein the first oxide layer, The second oxide layer and the third oxide layer are oxide layers having a high dielectric constant. 如申請專利範圍第1項所述之方法,其中該第一氧化層、該第二氧化層及該第三氧化層之材料係由氧化鍺及二氧化矽群組中所選出。 The method of claim 1, wherein the material of the first oxide layer, the second oxide layer and the third oxide layer is selected from the group consisting of cerium oxide and cerium oxide. 如申請專利範圍第1項所述之方法,其中該第三凹槽不對準於該第二凹槽。 The method of claim 1, wherein the third groove is not aligned with the second groove. 一種電阻式記憶體感測元件,包括:一第一電極;一絕緣層,具有一第一凹槽設置在該第一電極上;一電阻轉換層,設置在該絕緣層及在該第一凹槽之表面上以形成一第二凹槽;一第二電極,設置在該電阻轉換層上及該第二凹槽內;一感測薄膜,具有一第三凹槽設置在該第二電極上且曝露出該第二電極之部份表面;以及一保護層,設置在該感測薄膜上且具有一第四凹槽對應該第二凹槽以曝露出該感測薄膜之部份表面及一第五凹槽係對準於該第三凹槽以曝露出該第二電極之部份表面。 A resistive memory sensing component comprising: a first electrode; an insulating layer having a first recess disposed on the first electrode; a resistive switching layer disposed on the insulating layer and in the first recess a second groove is formed on the surface of the groove; a second electrode is disposed on the resistance conversion layer and the second groove; and a sensing film has a third groove disposed on the second electrode And exposing a portion of the surface of the second electrode; and a protective layer disposed on the sensing film and having a fourth recess corresponding to the second recess to expose a portion of the surface of the sensing film and A fifth groove is aligned with the third groove to expose a portion of the surface of the second electrode. 如申請專利範圍第6項所述之電阻式記憶體感測元件,其中該第一電極係為一矽基板。 The resistive memory sensing element of claim 6, wherein the first electrode is a germanium substrate. 如申請專利範圍第6項所述之電阻式記憶體感測元件,其中該絕緣層係為具有高介電常數之氧化層。 The resistive memory sensing element of claim 6, wherein the insulating layer is an oxide layer having a high dielectric constant. 如申請專利範圍第6項所述之電阻式記憶體感測元件,其中該絕緣層之材料係由氧化鍺及二氧化矽群組中所選出。 The resistive memory sensing element of claim 6, wherein the material of the insulating layer is selected from the group consisting of cerium oxide and cerium oxide. 如申請專利範圍第6項所述之電阻式記憶體感測元件,其 中該電阻轉換層係為一具有高介電常數之氧化層。 A resistive memory sensing element according to claim 6 of the patent application, The resistance conversion layer is an oxide layer having a high dielectric constant. 如申請專利範圍第6項所述之電阻式記憶體感測元件,其中該第二電極為一金屬層。 The resistive memory sensing element of claim 6, wherein the second electrode is a metal layer. 如申請專利範圍第11項所述之電阻式記憶體感測元件,其中該金屬層之材料係由鉑及鎢群組中所選出。 The resistive memory sensing element of claim 11, wherein the material of the metal layer is selected from the group consisting of platinum and tungsten. 如申請專利範圍第6項所述之電阻式記憶體感測元件,其中該感測薄膜係為一氧化層。 The resistive memory sensing element of claim 6, wherein the sensing film is an oxide layer.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI553636B (en) * 2014-10-27 2016-10-11 國立中山大學 Resistance random access memory and fabrication method thereof
TWI556245B (en) * 2015-02-16 2016-11-01 國立中山大學 Resistance random access memory
TWI561815B (en) * 2016-02-04 2016-12-11 Univ Chang Gung
US10461252B2 (en) 2016-04-27 2019-10-29 National Sun Yat-Sen University Resistive random access memory

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI553636B (en) * 2014-10-27 2016-10-11 國立中山大學 Resistance random access memory and fabrication method thereof
TWI556245B (en) * 2015-02-16 2016-11-01 國立中山大學 Resistance random access memory
US9711720B2 (en) 2015-02-16 2017-07-18 National Sun Yat-Sen University Resistive random access memory having stable forming voltage
US9853214B2 (en) 2015-02-16 2017-12-26 National Sun Yat-Sen University Resistive random access memory device with reduced power consumption
TWI561815B (en) * 2016-02-04 2016-12-11 Univ Chang Gung
US10461252B2 (en) 2016-04-27 2019-10-29 National Sun Yat-Sen University Resistive random access memory

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