TW201436254A - Single-piece photovoltaic structure - Google Patents

Abstract

A material is manufactured from a single piece of semiconductor material. The semiconductor material can be an n-type semiconductor. Such a manufactured material may have a top layer with a crystalline structure, transitioning into a transition layer, further transitioning into an intermediate layer, and further transitioning to the bulk substrate layer. The orientation of the crystalline pores of the crystalline structure align in layers of the material. The transition layer or intermediate layer includes a material that is substantially equivalent to intrinsic semiconductor. Also described is a method for manufacturing a material from a single piece of semiconductor material by exposing a top surface to an energy source until the transformation of the top surface occurs, while the bulk of the material remains unaltered. The material may exhibit photovoltaic properties.

Description

Single piece photovoltaic structure [Priority claim]

The present invention claims priority from U.S. Patent Application Serial No. 13/844,298, filed on March 15, 2013.

This invention relates to photovoltaic materials made from a semiconductor, and more particularly to novel materials made from a single piece of semiconductor material.

The methods described in this section can be implemented, but are not necessarily a method that has been previously conceived or implemented. Therefore, unless specifically stated otherwise, any method described in this section should not be assumed to be limited to the prior art by the effectiveness of the contents of this section.

Traditionally, methods of making photovoltaic materials generally require many additives added to the semiconductor. This additive contains gallium arsenide (GaAs), which is highly toxic and carcinogenic. When using additives in the manufacturing process of photovoltaic materials, it will increase the risk of harm to health and environmental impact. Therefore, for reduced use There is a high demand for the process of adding photovoltaic materials.

Traditional methods of manufacturing photovoltaic voltaic materials also require many steps or different processes, each of which is implemented at different times in different devices, which requires management and resources of the device itself. For example, different doping steps are used to fabricate different semiconductor wafers, and different types of wafers are bonded together in a specific manner to form a photovoltaic cell. The purpose of the doping step and the assembly of the wafer is to create a p-n junction or p-i-n junction between the wafers to achieve the overall photovoltaic effect of the assembled material. Every manufacturing process requires cost, so the need for a photovoltaic process that saves the necessary processes or steps to save costs is high.

New materials made from a single piece of semiconductor material will be described. Many techniques are also used to make new materials from a single piece of semiconductor material. In many embodiments, the fabrication of the material does not require multiple use of toxic additives and many doping steps, nor does it require assembly of different types of semiconductor wafers through multiple steps and processes.

100‧‧‧New materials

102‧‧‧ top surface

104‧‧‧ top

106‧‧‧Transition layer

108‧‧‧Intermediate

112‧‧‧large substrate layer

116‧‧‧

118‧‧‧ weft

200‧‧‧ top view

202‧‧‧ Crystalline pores

204‧‧‧ Crystalline pores

208‧‧‧square outline

210‧‧‧ Crystalline pores

212‧‧‧ Crystalline pores

214‧‧‧ profile

Section 215‧‧‧

216‧‧‧ Oblique cut surface

218‧‧‧ schema

300‧‧‧ Process

302‧‧‧Steps

304‧‧‧Steps

306‧‧‧Steps

308‧‧‧Steps

400‧‧‧Process

402‧‧‧Steps

404‧‧‧Steps

406‧‧‧Steps

500‧‧‧ configuration

501‧‧‧Semiconductor wafer

502‧‧‧Energy source

504‧‧‧Semiconductor wafer

506‧‧‧ bottom

600‧‧‧ Process

602‧‧‧ stage

604‧‧‧ stage

606‧‧‧ stage

700‧‧‧Application

702‧‧‧Electromagnetic radiation

704‧‧‧Transparent electrode

706‧‧‧ bottom electrode

The preferred embodiments of the invention are described by way of example and not by way of example. In the numbers shown in the figures in the drawings, like numerals represent like elements.

1 is a block diagram depicting a cross section of a new material fabricated from a semiconductor material in accordance with an embodiment of the present invention; 2A is a photograph showing a top surface of a new material fabricated from a semiconductor material according to an embodiment of the present invention and scanned by a scanning electron microscope; FIG. 2B is a schematic view showing a crystal structure according to an embodiment of the present invention. The coherent orientation of the bottom, which is distributed throughout the top surface of the new material; FIG. 2C is a block diagram and photograph showing the crystal structure from the semiconductor according to an embodiment of the present invention and scanned by a scanning electron microscope FIG. 3 and FIG. 4 are flow diagrams illustrating an exemplary step of fabricating a new material from a semiconductor material in accordance with an embodiment of the present invention; FIG. 5 is a block diagram in accordance with the present invention One embodiment shows a configuration of a portion of a component for a new material from a semiconductor material; FIG. 6 is a schematic diagram depicting deterioration of a semiconductor material upon cooling; and FIG. 7 is a block diagram showing a new material construction In the photovoltaic cell.

1 shows a cross-sectional view of a new material 100 fabricated from a semiconductor material, in accordance with an embodiment of the present invention. The new material 100 includes a top surface 102 of a top layer 104, a transition layer 106, an intermediate layer 108, and a large substrate layer 112. When the top layer 104, the transition layer 106, the intermediate layer 108, and the large substrate layer 112 reveal a line of coherence and separation as shown in FIG. 1, the layers can be changed in size and shape.

This new material is manufactured from semiconductor materials. The new material described later can be used as one of the embodiments of the semiconductor material, but other semiconductor materials can also be used as a substrate to manufacture new materials. For example, any half with some dopants The conductor material can serve as a substrate. In one embodiment, the semiconductor material is an n-type germanium wafer or a p-type germanium wafer, such as those typically used to fabricate semiconductors. In one example, the n-type germanium wafer contains a concentration of phosphorus between 10 and 11 to a power of 17 atoms per milliliter (atoms/cc), although other dopants can be used to create the n-type or The p-type semiconductor does not have to depart from the spirit of the preferred embodiment of the invention. In this embodiment, the germanium wafer is cut from one piece of the single crystal germanium, and a dopant can be added to create an n-type germanium wafer from the single crystal germanium. In other embodiments, the semiconductor used may comprise germanium or a compound semiconductor. In some embodiments, a polycrystalline semiconductor or an amorphous semiconductor can be used as a substrate.

In one embodiment, the germanium wafer used to fabricate the new material has a thickness of about 1 micrometer (μm), but a germanium wafer having a thickness greater than 1 micron can also be used to make new materials. In one embodiment, the top layer 104 has a thickness of between about 0.1 and 10 microns.

When the tantalum material is fabricated into a new material 100, the top layer 104 has a special structure and can be viewed by the top surface 102. In one embodiment, the composition of the crystalline or crystalline structure and the bright, translucent amorphous material are distributed over the top surface 102, as is the structure within the top layer 104.

2A and 2B are photographs showing a top surface of a new material produced from a semiconductor material scanned by a scanning electron microscope in accordance with an embodiment of the present invention. In FIG. 2A, new material is shown via top view 200 of top surface 102 in accordance with an embodiment of the present invention. Top view 200 shows a partially crystalline or crystalline pore at the top layer 104 having a coherent orientation at the bottom of the crystalline structure. The top view 200 further shows that the orientation of the crystalline or crystalline pores is clearly aligned with the crystal orientation of the large substrate 112 by indicating the edges of the front side of the pore walls. For example, the crystalline pores 202 and the crystalline pores 204 are enlarged and displayed. Shown on a grid overlay 208. The facet edges of the crystalline pores 202 and the crystalline pores 204 are aligned with each other at right angles as shown in Fig. 2A to exhibit the same crystal orientation of the single crystal large substrate 112. As shown in FIG. 2A, the Miller index of the crystal orientation of the large substrate 112 is <100>. As shown in FIG. 2B, the new material has crystalline pores 210 and crystalline pores 212 which are aligned with each other at an angle of 60 degrees. The pyramid shape of the crystal pores corresponds to the large substrate 112 having a crystal orientation with a Miller index of <111>. Referring to Figures 2A and 2B, the crystalline pores are shown along the 118 and weft 116, allowing the same form of facet or faceted edge when viewed from the top surface 102.

2C is a block diagram and photograph showing the distribution and size of crystalline pores in a new material fabricated from a semiconductor material in accordance with an embodiment of the present invention. Section 214 shows the distribution of crystalline pores in each of the top layer 104, the transition layer 106, and the intermediate layer 108. In one embodiment, the crystalline structure can be viewed by a discrete portion 215 of material that is shown to have a chamfered surface 216. When the portion 215 is separated, each of the top layer 104, the transition layer 106, the intermediate layer 108, and the large substrate layer 112 can be viewed from top to bottom.

The extended resistance analysis (SRA) of the top layer 104, the transition layer 106, the intermediate layer 108, and the large substrate layer 112 can be analyzed using the separated portion 215 of the new material 100 and determines the top layer 104, the transition layer 106, the intermediate layer 108, and the large substrate layer. 112 characteristics of each layer. In some embodiments, the extended resistance analysis of each layer may exhibit a difference in resistivity of at least two of the top layer 104, the transition layer 106, the intermediate layer 108, and the large substrate layer 112. For example, top layer 104, transition layer 106, intermediate layer 108, and large substrate layer 112 will have different ranges of resistivity. In accordance with an embodiment of the present invention, the drawing 218 is a top view of the separated portion 215 of the material, It shows each of the top layer 104, the transition layer 106, the intermediate layer 108, and the large substrate layer 112 via a scanning electron microscope. As shown in Figure 2C, the top surface 102 has a porous surface. In some embodiments of the invention, the top surface 102 may also have few or no holes. For example, top surface 102 is a thin layer of non-porous semiconductor material with holes in top layer 104 below top surface 102.

Referring to FIG. 1, in one embodiment, a distribution gradient of crystalline voids can be observed in the top layer 104, the transition layer 106, and the intermediate layer 108. In this embodiment, the large pore distribution increases as it approaches the top surface 102. In other embodiments, the distribution of crystalline pores may be substantially evenly distributed from top layer 104, transition layer 106 to intermediate layer 108. In one embodiment, some or all of the layers of the material (top layer 104, transition layer 106, and intermediate layer 108) have a homogenous single crystal structure with a large substrate layer 112 between the crystalline pores.

In some embodiments, the intermediate layer 108 composed of tantalum has the characteristics of little or no impurity, and thus the intermediate layer 108 has characteristics different from those of the n-type semiconductor. In an embodiment, the intermediate layer 108 is nearly or substantially equivalent to the essence. In one embodiment, the transition layer 106 and the intermediate layer 108 comprise a homogenous crystalline structure of the n-type germanium large substrate layer 112.

In an embodiment, the transition layer 106 has the same characteristics as the top layer 104. As shown in FIG. 1, the transition layer 106 has a coherent thickness and is assumed to be a flat plate shape. However, the thickness of the transition layer 106 is not necessarily a uniform thickness and is not necessarily a flat plate shape. In an embodiment, the thickness of the transition layer 106 does not exceed 1 micron.

In an embodiment, the intermediate layer 108 has characteristics of each of the top layer 104, the transition layer 106, and the large substrate layer 112. In an embodiment, the thickness of the intermediate layer 108 does not exceed 5 microns.

As shown in FIG. 1, the intermediate layer 108 has a coherent thickness and is assumed to be a flat plate shape. However, the thickness of the intermediate layer 108 is not necessarily a uniform thickness and is not necessarily a flat plate shape. In an embodiment, the intermediate layer 108 marks the boundary between the transition layer 106 and the large substrate layer 112 with little or no thickness. In some embodiments, the thickness of the intermediate layer 108 does not exceed 3 microns.

The large substrate layer 112 is used to make a non-degraded portion of the semiconductor material of the new material 100. Accordingly, the large substrate layer 112 has the same characteristics as the original semiconductor substrate. In one embodiment, the large substrate layer 112 is a single crystal n-type germanium. In one embodiment, the large substrate layer 112 contains a phosphorus concentration of 10 to 11 to 10 atoms per milliliter atomic weight, although other dopants can be used to form the n-type semiconductor without the need for the present invention. The spirit of the preferred embodiment is divergent. In an embodiment, the p-type semiconductor may also exhibit similar characteristics as the n-type semiconductor.

In accordance with an embodiment of the present invention, FIG. 3 shows an example of a process 300 for making a new material 100. In step 302, a surface of a semiconductor wafer is exposed to an energy source. An example of an energy source can be a heat source or a laser source. An example of a heat source can be a lamp furnace, although other furnaces can be used to provide the necessary energy source. The energy conducted to the semiconductor wafer is sufficient to increase the temperature of at least the top surface and the top of the semiconductor wafer. In one embodiment, the temperature of the top exceeds 800K. In an embodiment, the semiconductor wafer is an n-type semiconductor. In an embodiment, the p-type semiconductor exhibits the same characteristics as the n-type semiconductor. In one embodiment, the semiconductor wafer is an n-type germanium. In one embodiment, the n-type germanium comprises a partial concentration of phosphorus to form a dopant for the single crystal germanium. In one embodiment, the concentration of phosphorus in the crucible ranges from 10 to 11 to 10 and 17 to the atomic weight per milliliter.

In step 304, the semiconductor wafer is monitored when exposed to the energy source . In order to achieve the structure of the new material, a part of the semiconductor wafer does not need to undergo any deterioration process. In one embodiment, the portion that has not undergone deterioration is at the bottom of the wafer and is located on a different side of the semiconductor wafer exposed to the energy source. Accordingly, in one embodiment, the semiconductor wafer is monitored for detection when the top of the wafer has reached the desired stage and temperature without the need to transition the stage or structure of the bottom of the large substrate of the semiconductor wafer. This energy source can be controlled to maintain proper exposure to the wafer.

In step 306, whether the top of the wafer has reached the necessary stage or/and whether the temperature is determined. If not, the time of exposure to the energy source continues. If the top of the wafer has reached the necessary stage or/and temperature, the exposure of the energy source is terminated at step 308.

At step 310, the wafer is allowed to cool. The structure after cooling is a completed new material 100 structure, which has been described in the embodiment of Figures 1, 2A and 2B.

In some embodiments, new material 100 can be made after repeating or skipping step 300. In some embodiments, after a metamorphic process is performed on the germanium wafer, the new material 100 can be made from a single wafer.

In accordance with an embodiment of the present invention, FIG. 4 shows an embodiment of a time control process 400 for fabricating a new material 100. In step 402, the surface of a semiconductor wafer is exposed to energy source at time t=0. In step 404, the semiconductor wafer is exposed to the energy source system for a critical time t. According to an embodiment, at the critical time t, the top of the germanium wafer has deteriorated while the bottom remains unchanged. In one embodiment, the critical time t is determined based on the temperature of the heat source, the distance between the semiconductor surface and the heat source, and the thickness of the semiconductor wafer. Table 1 contains examples of possible combinations of conditions and conditions including heat source power, large substrate temperature, distance, thickness The atmosphere, and the processing time used in step 400, are used to make the new material 100.

In step 406, the wafer is allowed to cool. The structure after cooling completes the structure as new material 100, which is depicted in the embodiment of Figures 1, 2A and 2B.

5 shows a fabrication configuration 500 of an energy source 502, a semiconductor wafer 504, and a furnace bottom 506, in accordance with an embodiment of the present invention. In an embodiment, the semiconductor wafer 504 is disposed on the furnace bottom 506. The hearth 506 is not limited to a single piece of material, but may also comprise a composite or a structure of many materials. Energy source 502 transfers energy, thermal energy, and the like to increase the temperature of wafer 504. The thermal conductivity of the semiconductor wafer and the temperature of the furnace bottom 506 allow the top of the wafer 504 to deteriorate, while the characteristics of the bottom near the furnace bottom 506 remain degraded. In an embodiment, the temperature of the hearth 506 can be controlled.

In accordance with an embodiment of the present invention, FIG. 6 shows a metamorphic process 600 in which a wafer becomes a new material 100 as described in FIG. At the highest temperature, at stage 602, the top of a wafer is partially degraded. In one embodiment, the metamorphic process forms a transition layer as described for the transition layer 106 and the intermediate layer 108 (shown in Figure 1). In some embodiments, one of the transition layers is substantially equivalent to the essence.

In stage 604, the temperature is below the temperature of stage 602. In this phase During the wafer metamorphism process, an impurity gradient is formed. For example, impurities such as phosphorus form a gradient from top to bottom transition layers. In stage 606, the wafer is completely cooled and metamorphosed into a new material, such as new material 100 including top surface 102, top layer 104, transition layer 106, and intermediate layer 108.

FIG. 7 shows a block diagram of an embodiment of an application 700 for a new material 100. Application 700 utilizes the photovoltaic properties of new material 100 to demonstrate some embodiments of the present invention to form a photovoltaic cell having a new material. In this embodiment, a new material 100 is disposed between the transparent electrode 704 and the bottom electrode 706 to form a photovoltaic cell. Electromagnetic radiation 702 is transmitted to the surface of the new material 100 to cause electrons to be generated. Electromagnetic radiation that can be used to induce a photovoltaic effect in the new material 100 includes, but is not limited to, self-visible light and infrared light energy. Electrons flow from the surface to the large substrate layer. In one embodiment, the polarity of the intermediate layer near the intrinsic semiconductor is positive, and the polarity of the large substrate layer of the n-type semiconductor is negative. In one embodiment, different and individual characteristics of the top layer, transition layer, and large substrate layer of the new material 100 formed from the semiconductor wafer form an energy band gap gradient to achieve the photovoltaic effect of the self-new material 100.

Other features, aspects, and objectives of the present invention are obtained from a review of the drawings and claims. It is to be understood that other embodiments of the invention can be developed and are within the spirit and scope of the invention and the scope of the invention.

The foregoing description of the preferred embodiments of the invention has in the It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Various additions, deletions, and modifications are covered as such. Therefore, the scope of the invention is indicated by the scope of the appended claims rather than the foregoing description. In addition, the scope of the patent application, its elements and characteristics, etc. All changes in the meaning and scope of the effect are covered by its scope.

100‧‧‧New materials

102‧‧‧ top surface

104‧‧‧ top

106‧‧‧Transition layer

108‧‧‧Intermediate

112‧‧‧large substrate layer

116‧‧‧

118‧‧‧ weft

Claims (23)

A single-piece photovoltaic device comprising: a large substrate layer of a semiconductor material; an intermediate layer disposed on the large substrate layer, wherein the intermediate layer comprises a coherent crystal structure of the large substrate layer; a transition layer is disposed on The intermediate layer, wherein the transition layer comprises the coherent crystal structure of the large substrate layer, and if the intermediate layer is not the intermediate layer, the transition layer is substantially equivalent to the essence; and a top layer is disposed on the transition layer, wherein the top layer comprises At least one crystalline structure or an amorphous structure, the top layer comprising the coherent crystal structure of the large substrate layer; wherein the large substrate layer, the intermediate layer, the transition layer and the top layer are modified by a single piece of semiconductor material And formed. A single piece of photovoltaic material as claimed in claim 1 wherein the step of modifying comprises: exposing a top surface of the single piece of semiconductor material to an energy source, wherein the energy source heats a portion of the single piece of semiconductor material And discontinuing exposing the top surface of the single piece of semiconductor material to the energy source, wherein the exposing step and the suspending step degrade the single piece of semiconductor material into the structure, the structure comprising the large substrate layer, the middle layer, and the layer The transition layer and the top layer. A single piece of photovoltaic material according to claim 2, wherein the portion of the single piece of semiconductor material is heated to a temperature of at least 800K. A single piece of photovoltaic material according to claim 2, wherein the exposure and the middle The steps are carried out in a vacuum. A single piece of photovoltaic material as claimed in claim 2, wherein the heat treatment time of the portion is between 60 and 80 minutes. A single piece of photovoltaic material as claimed in claim 2, wherein the exposing step is performed until the top surface of the single piece of semiconductor material reaches a predetermined temperature, and thereafter the aborting step begins. A one-piece photovoltaic device according to claim 1, wherein the single-piece semiconductor material is n-type germanium, and the n-type germanium comprises one of phosphorus. A single piece of photovoltaic material according to claim 1 wherein the single piece of semiconductor material has a thickness of from 0.1 to 10 microns. A single piece of photovoltaic material according to claim 1 further comprising a porous top surface. A single piece of photovoltaic material as claimed in claim 1 wherein the photovoltaic element is produced when the single piece of photovoltaic material is exposed to light. The single piece photovoltaic cell of claim 1, wherein the large substrate layer, the intermediate layer, the transition layer, and the top layer have different ranges of resistivity. A photovoltaic device according to claim 1, wherein the photovoltaic device comprises: the single-piece photovoltaic material; a bottom electrode is disposed under the single-piece photovoltaic material; And a top electrode is disposed over the single piece of photovoltaic material. A method of making a single piece of photovoltaic voltaic comprises: The metamorphic process includes the steps of exposing a top surface of a single piece of semiconductor material to an energy source, wherein The energy source heats a portion of the single piece of semiconductor material; and discontinues exposing the top surface of the single piece of semiconductor material to the energy source, wherein the exposing step and the suspending step degrade the single piece of semiconductor material into a structure, The structure comprises: a large substrate layer of the semiconductor material; an intermediate layer disposed on the large substrate layer, wherein the intermediate layer comprises a coherent crystal structure of the large substrate layer; a transition layer is disposed on the intermediate layer, wherein the The transition layer comprises the coherent crystal structure of the large substrate layer, and if the intermediate layer is not the intermediate layer, the transition layer is substantially equivalent to the essence; and a top layer is disposed on the transition layer, wherein the top layer comprises at least one crystalline structure or a non- a crystalline structure, the top layer comprising the coherent crystalline structure of the large substrate layer. The method of claim 13 wherein the portion of the single piece of semiconductor material is heated to a temperature of at least 800K. The method of claim 13, wherein the exposing and the suspending step are performed in a vacuum. The method of claim 13, wherein the heat treatment time of the portion is between 60 and 80 minutes. The method of claim 13 wherein the exposing step is performed until the top surface of the single piece of semiconductor material reaches a predetermined temperature, and thereafter the aborting step begins. The method of claim 13 wherein the single piece of semiconductor material is n-type germanium and the n-type germanium comprises one of phosphorus. The method of claim 13 wherein the single piece of semiconductor material has a thickness of between 0.1 and 10 microns. According to the method of claim 13, further comprising a porous top surface. The method of claim 13 wherein the single piece of photovoltaic material is exposed to light to produce a photovoltaic effect. The method of claim 13, wherein the large substrate layer, the intermediate layer, the transition layer, and the top layer have different ranges of resistivity. A single-piece photovoltaic device comprises: a large substrate layer of an n-type germanium wafer; an intermediate layer disposed on the large substrate layer, wherein the intermediate layer comprises a coherent crystal structure of the large substrate layer; a transition layer Provided on the intermediate layer, wherein the transition layer comprises the coherent crystal structure of the large substrate layer, and if the intermediate layer is not the intermediate layer, the transition layer is substantially equivalent to the essence; and a top layer is disposed on the transition layer, wherein the transition layer The top layer comprises at least one crystalline structure or an amorphous structure, the top layer comprising the coherent crystal structure of the large substrate layer; wherein the large substrate layer, the intermediate layer, the transition layer and the top layer are formed by a metamorphic process, And including the steps of: exposing a top surface of the single piece of semiconductor material to an energy source, wherein the energy source heats a portion of the single piece of semiconductor material to a temperature of at least 800K, wherein the exposing step and the stopping step are performed in a vacuum; And discontinuing exposing the top surface of the single piece of semiconductor material to the energy source, The exposing step and the suspending step degrade the single piece of semiconductor material into a structure.