CN103456834A - System and method for processing a backside illuminated photodiode - Google Patents
System and method for processing a backside illuminated photodiode Download PDFInfo
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- CN103456834A CN103456834A CN201210436608XA CN201210436608A CN103456834A CN 103456834 A CN103456834 A CN 103456834A CN 201210436608X A CN201210436608X A CN 201210436608XA CN 201210436608 A CN201210436608 A CN 201210436608A CN 103456834 A CN103456834 A CN 103456834A
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- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
- H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PN homojunction type
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- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
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- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
- H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PN homojunction type
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Abstract
System and method for processing a semiconductor device surface to reduce dark current and white pixel anomalies. An embodiment comprises a method applied to a semiconductor or photodiode device surface adjacent to a photosensitive region, and opposite a side having circuit structures for the device. A doped layer may optionally be created at a depth of less than about 10 nanometers below the surface of the substrate and may be doped with a boron concentration between about 1E13 and 1E16. An oxide may be created on the substrate using a temperature sufficient to reduce the surface roughness below a predetermined roughness threshold, and optionally at a temperature between about 300 DEG C. and 500 DEG C. and a thickness between about 1 nanometer and about 10 nanometers. A dielectric may then be created on the oxide, the dielectric having a refractive index greater than a predetermined refractive threshold, optionally at least about 2.0.
Description
Technical field
The present invention relates to process the system and method for semiconductor device, in particular to the system and method for processing photodiode.
Background technology
The damage of the semiconductor device consisted of silicon (such as, photodiode) is the well-known phenomenon that makes the image acquisition device produce noise and error.The damage of semi-conductive crystalline texture may cause dark current and white pixel distortion owing to having changed the silicon structure in the photodiode when the operational light electric diode.In photodiode, silicon damages and may cause photodiode to cause irrelevantly the parasitic electrons irrelevant with photoreactivity.Even this parasitic electrons makes photodiode, not having photoconduction to send a telegraph the sub also recording light that produces reads.Therefore, due to the actual light quantity that inaccurately the reverberation electric diode detects, semi-conductive damage may cause inaccurately induction light of photodiode, thereby introduces noise in image.Dark current is in the situation that the unglazed electric current produced, the white pixel defect is the overload that the infringement of photodiode or excessive dark current are produced photodiode, make thus photodiode show always detected pure white light as it, but in fact do not have.
In camera and other videos or photograph device, usually use photodiode (such as, complementary metal oxide semiconductors (CMOS) (CMOS) diode) to carry out sensed image.Use in recent years backlight (BSI) to improve photodiode device.Usually, photoetching process is depositional fabric on the end face of Silicon Wafer or other substrates, such as, gate oxide, metal interconnecting piece etc.Early stage photodiode is collected light from top, and this top is identical with the face of having applied device architecture.The metal interconnecting piece be deposited on the end face of photodiode substrate may stop the part of the photosensitive region of photodiode, thereby has reduced the sensitiveness of picture quality and each photodiode.BSI collects light from the back side of photodiode substrate, in the situation that be deposited on the end face of substrate such as interference structures such as metal interconnected, gate oxides, and then substrate denuded or carried out in addition the photosensitive region that attenuate allows light to pass substrate and acts on photodiode.Under ideal situation, thereby reduce substrate thickness, make light can enter into the back side of device and the photosensitive region of directive photodiode, thereby eliminate obstruction and the interference brought by depositional fabric and metal interconnecting piece in obtaining the process of pattern.
Often by chemico-mechanical polishing, carry out the attenuate photodiode, thereby allow the operation of BSI.Yet, even also may there is irregular, crystallization distortion etc. on the inferior nano-scale surface of the substrate of high polishing, thereby produced unsettled Electronic Keying.The unsettled electronics of loosely bonding can cause occurring dark current and white pixel situation.Therefore, the minimizing of surface imperfection causes that dark current and white pixel are abnormal to be reduced and image device more accurately.
Summary of the invention
In order to solve problems of the prior art, according to an aspect of the present invention, provide a kind of processing method for semiconductor, having comprised: the semiconductor device with substrate is provided, described substrate is with first surface, and described first surface is the result that reduces described substrate; The described first surface place that approaches described substrate in described substrate generates doped layer; Generate the first oxide being enough to surface roughness is reduced at the temperature below default roughness threshold value on the described first surface at described substrate; And generating dielectric layer on the surface of described the first oxide, dielectric layer has the refractive index that is greater than default refraction threshold value.
In said method, described semiconductor device has photosensitive region adjacent with described first surface in described substrate and the circuit side relative with described first surface.
In said method, wherein, generate described the first oxide and described the first oxide is generated as to the thickness had between about 1 nanometer and about 10 nanometers at the temperature between about 300 ℃ and 500 ℃.
In said method, wherein, described dielectric layer has and is at least approximately 2.0 refractive index.
In said method, wherein, the layer of described doping is the p-type layer doped with boron.
In said method, wherein, the layer of described doping is the p-type layer doped with boron, and wherein, described doped layer has about 1E13 to the doping content between about 1E16, and wherein, the degree of depth of described doped layer is less than about 10 nanometers.
In said method, wherein, the layer of described doping is the p-type layer doped with boron, wherein, generates described p-type layer and comprises through the described first surface dopant implant thing of described substrate and the described first surface of described substrate is implemented to surface heat annealing.
In said method, further be included on described dielectric layer and use passivation layer.
In said method, wherein, described dielectric is a kind of in silicon nitride, carborundum and silicon dioxide.
According to a further aspect in the invention, also provide a kind of semiconductor device, having comprised: substrate has the first side and the circuit side relative with described the first side; The p-type layer, be arranged on the described first side place of described substrate; Low temperature oxide, be arranged on described first side of described substrate, the roughness of described the first side is reduced at the temperature below predetermined threshold value and forms being enough to; Dielectric cap, be arranged on described low temperature oxide, and the material of described dielectric cap has the refractive index on predetermined threshold value.
In above-mentioned semiconductor device, wherein, the roughness on the surface of described the first side is less than about 0.11 nanometer.
In above-mentioned semiconductor device, wherein, described dielectric cap has the thickness between about 100 nanometers and about 150 nanometers.
In above-mentioned semiconductor device, wherein, described low temperature oxide has the thickness between about 1 nanometer and about 10 nanometers.
In above-mentioned semiconductor device, wherein, the described material of described dielectric cap has the refractive index at least about 2.0.
In above-mentioned semiconductor device, wherein, described p-type layer is doped with boron and have the boron concentration between the extremely about 1E16 of about 1E13.
In above-mentioned semiconductor device, wherein, described p-type layer is the silicon germanium extension layer doped with boron.
In above-mentioned semiconductor device, wherein, the degree of depth of described p-type layer is less than about 10 nanometers.
According to another aspect of the invention, also provide a kind of photodiode device, having comprised: substrate has the photosensitive region adjacent with the first side and the circuit side relative with described the first side; Low temperature oxide, be arranged on described first side of described substrate, thereby the roughness of described the first side be reduced at the temperature below predetermined threshold value and form described low temperature oxide and to be configured to allow the light of preset wavelength at least through the photosensitive region that arrives described substrate described low temperature oxide being enough to; Dielectric cap, be arranged on described low temperature oxide, and the material of described dielectric cap has the refractive index more than predetermined threshold value; And passivation layer, be arranged on described dielectric cap.
In above-mentioned photodiode device, wherein, described low temperature oxide is the oxide of growing at the temperature between about 300 ℃ and 500 ℃.
In above-mentioned photodiode device, wherein, described photodiode device is back-illuminated photodiode, wherein, described first side of described substrate is the result that is applied to the reduction process of described substrate, and wherein, the roughness of described the first side is less than about 0.11 nanometer.
The accompanying drawing explanation
For comprehend embodiment and advantage thereof, the existing description of carrying out in connection with accompanying drawing as a reference, wherein:
Fig. 1 shows the flow chart of processing the method for photodiode according to principle of the present invention;
Fig. 2 is the sectional view of photodiode in BSI structure processing procedure;
Fig. 3 is the sectional view with the photodiode on carrier and active surface;
Fig. 4 to Fig. 6 is the sectional view according to the photodiode in active surface-treated intermediateness of principle of the present invention; And
Fig. 7 is the sectional view of the photodiode after extra back segment is processed.
Embodiment
Below, discuss manufacture and the use of various embodiments of the present invention in detail.Yet, should be appreciated that, the invention provides many applicable concepts that can realize in various specific environments.The specific embodiment of discussing only shows to be manufactured and uses concrete mode of the present invention, and be not used in, limits the scope of the invention.
Principle of the present invention relates to a kind of device and manufacture method thereof, and this device has the dielectric layer of the dark current, white pixel characteristic and the high index of refraction that reduce.Particularly, method described herein for be the surface characteristic of improving semiconductor, especially photodiode.
Thereby herein disclosed is a kind of method that semiconductor or photodiode device reduce dark current and white pixel of processing, the method can be applied to adjacent with photosensitive region and contrary with the circuit structure of device device surface.Can optionally generate doped layer at the substrate that probably is arranged in the substrate surface place.This doped layer can be doped with boron, and its concentration of dopant is between about 1E13 and about 1E16, and the degree of depth is less than about 10 nanometers.Can also use is enough to that the roughness of substrate surface is reduced to the temperature that (optionally is less than about 0.11 nanometer) below default roughness threshold value generates oxide on the surface of substrate.Can optionally at the temperature between about 300 ℃ and 500 ℃, form this oxide and its thickness between about 1 nanometer and about 10 nanometers.Can on this oxide, generate dielectric, this dielectric has the refractive index that is greater than default refraction threshold value, optionally is at least approximately 2.0.Therefore, can above this dielectric, use passivation layer.
The method has formed semiconductor or photodiode device, and this device is with the substrate of the p-type layer that optionally has doping.In the situation that photodiode, this device can be configured to the back-illuminated type device.P type layer can be silicon germanium extension layer, or by substrate surface dopant implant thing actuating surface thermal annealing are formed.By the low temperature oxide that optionally there is the thickness between about 1 nanometer and about 10 nanometers, be arranged on substrate and this low temperature oxide can form being enough to the roughness of substrate is reduced at the temperature that (preferably is less than about 0.11 nanometer) below predetermined threshold value.Can be arranged on the first oxide by the dielectric cap that optionally has the thickness between about 100 nanometers and about 150 nanometers and this dielectric cap has the refractive index more than predetermined threshold value, this refractive index can be preferably 2.0.
In connection with concrete context, that is, manufacture is described embodiment with the system and method for the photodiode device of the dark current reduced and white pixel resistance.Yet, also other execution modes can be applied to other devices, include, but are not limited to solar cell, light-emitting diode etc.
Refer now to Fig. 1, what this illustrated is flow chart, and this flow chart shows the method 100 of processing photodiode device according to principle of the present invention.Carry out describing method 100 in conjunction with sectional view Fig. 2-Fig. 7, these accompanying drawings are not proportionally drawn for purpose of explanation.
Originally, construct photodiode in frame 102 and according to purposes, it be processed into to BSI photodiode 216.Yet, principle of the present invention described herein for photodiode just for purpose clearly, those skilled in the art is to be appreciated that principle of the present invention is not limited to only photodiode, and can be used to wafer or chip-scale manufacture, or other treatment systems arbitrarily.
Fig. 2 shows the sectional view of photodiode in the process of BSI structure processing 200.Photodiode 216 has photosensitive region 202, and this zone can include, but are not limited to or need device circuitry element 214, such as shallow trench isolation from (STI) structure 206, interlayer dielectric layer 208, metal interconnecting piece 212, metal intermetallic dielectric layer 210 etc.Those skilled in the art will recognize, the structure of BSI photodiode 216 can according to the requirement of design or based on new or still undiscovered manufacturing technology changed.
Photodiode 216 can also have the bulk substrate 204 of wafer, and photodiode is made by it.Photodiode 216 can be made by the material that surpasses necessary thickness usually, and this thicker wafer substrate supports photodiode 216 in manufacture process.In the situation that BSI photodiode 216 can be removed excessive bulk substrate 204 after having manufactured photodiode 216, thereby fully the attenuate material is in order to allow photon penetrate this substrate back be thinned and absorbed by photosensitive region 202.
In frame 112, photodiode 216 can be at top or circuit side with carrier 302 or other supporting constructions, engage, in frame 114, by thinning back side, remove bulk substrate 204.Fig. 3 is the sectional view 300 of photodiode 216, has exposed carrier 302 and active surperficial 304.
Although what describe is that supported photodiode 216 engages with carrier 302, also can advantageously use applicable supporting construction arbitrarily.For example, in one embodiment, for the cutting apart and encapsulate of later stage, photodiode 216 can be assembled on the carrier wafer, maybe can be assembled in packaging part or be assemblied on interim carrier and in next step by separately.Alternatively, can be in the situation that do not have support substrates 302 to process photodiodes 216, the needs of subsequent processing steps are depended in this selection.
Remove bulk substrate 204 stayed circuit side with photodiode 216 contrary active surperficial 304.That is to say, the active surface of photodiode 216 is those surfaces that photon passes its photosensitive region that enters into photodiode 202, is summed up as non-carrier in photosensitive region 202.Usually, can remove bulk substrate 204 by chemico-mechanical polishing (CMP), yet also can advantageously be removed by etching, shearing etc.Yet, remove bulk substrate 204 by physical technology from photosensitive region 202 and may cause the crystalline texture of rough surface and substrate discontinuous, thus photodiode 216 active surperficial 304 on produce defect and dangling bonds.In by photodiode 216, obtaining the process of image, due to dark current or white pixel abnormal, these defects and dangling bonds may produce noise and inaccurate reading.Resulting active surperficial 304 should be smooth ideally, and roughness is 0, shows uniform crystal surface and there is no dangling bonds.
Can be optionally by the injection shown in frame 104 and annealing or the active surface applied p-type layer 404 to photodiode 216 by the epitaxy shown in frame 106.The p-type layer 404 of deposition and the interface 402 of resulting p-type layer and photodiode have been shown in Fig. 4, and these and carrier 302 relatively arrange and are positioned under the active layer 304 on photodiode 216.The injection technology of frame 4 can comprise that the p-type alloy injects (as shown in frame 116) and surface heat annealing (as shown in frame 118).Can be advantageously by by boron ion, boron difluoride (BF
2), diborane (C
2h
6) etc. boron (B) alloy that provides as the p-type alloy.Alternatively, according to the needs of device, any acceptor or p-type alloy be can use, aluminium (Al), indium (In), gallium (Ga) etc. included but not limited to.In the embodiment be particularly useful of Implantation embodiment, can utilize about 1E13 to the boron doped in concentrations profiled active surperficial 304 between about 1E15.Also can advantageously use the degree of depth to be less than Gauss's dopant profiles of about 10nm, but can be changed in order to meet requirement on devices.
Implantation may produce many point defects when impacting in the target crystal, such as, room and calking.Room is the lattice-site do not occupied by atom.In this case, ion and target atoms are collided mutually, thereby have given target atoms by a large amount of Energy Transfers, thereby make it leave the crystal positions of self.When this atom (or original ion itself) stops mobilely in solid, but calking has just appearred while in lattice, not finding room to stop.Can use surface heat annealing (as shown in frame 118) to repair the crystalline texture damage that Implantation is caused.Can use rapid thermal annealing (RTA), or can use alternatively and can limiting surface alloy layer move or reduce the local laser annealing that the heat budget of photodiode 216 is used.
Alternatively, in the epitaxial growth technology of frame 106, by the epitaxy in frame 120, deposit or growing p-type layer 404, and SiGe precursor and the boron alloy that can be about 10%-20% with germanium concentration in one embodiment form boron doped SiGe epitaxial loayer 404.A useful embodiment is less than the embodiment of the epitaxial loayer of about 10nm therein with the boron concentration deposit thickness between about 1E13 and about 1E16.Can, by applicable arbitrarily technique for epitaxy technique, include, but are not limited to vapor phase epitaxy (VPE), molecular beam epitaxy (MBE), liquid phase epitaxy (LPE) etc.In certain embodiments, with ion implantation technology 104, compare, SiGe epitaxial loayer technique 106 can be in the situation that do not need flash annealing that better layer thickness control, doping content and technology controlling and process are provided.
The surface of frame 108 can be proofreaied and correct and last modification step be applied to the active surperficial 304 of p-type layer 404 top, wherein this p-type layer 404 is applied or is applied directly on the photosensitive region that does not deposit p-type layer 404 202 of photodiode 216.Originally, in frame 122, can grow on active surperficial 304 or deposit low temperature oxide 502.Photodiode with oxide 500 has been shown in Fig. 5, and the deposition of oxide 502 causes the top oxide surface 504 relative with the circuit side of photodiode 216.Being grown in oxide 502 on active surperficial 304 can be approximately between 1nm and 10nm, and will most preferably be between about 1nm and 3nm.In addition, in certain embodiments, oxide 502 can be silica (for the photodiode based on silicon), or can be also other applicable oxides, especially during the substrate beyond photodiode 216 is used silicon.In addition, low temperature oxide, especially reduced to be positioned at the roughness of active surperficial 304 between the photosensitive region 202 of oxide 502 and photodiode 216 or p-type layer 404 (can use place) at the low temperature oxide of growth between about 300 ℃ and 500 ℃.In the embodiment be particularly useful, be enough to that active surperficial 304 roughness is reduced to growing low temperature oxide 502 at the temperature that below default threshold value, (preferably can be less than about 0.11hm).The oxide growth temperature that is about 420 ℃ provides the fastish oxide growth with sufficient blemish correction.Active surperficial 304 surface roughness is desirably 0nm, that is to say, under the microscope smooth surface still.According to observations, the oxide growth temperature of 420 ℃ can cause blemish or surface roughness to be less than about 0.11nm.Test points out, higher temperature is grow oxide, but the high-temperature oxide temperature to the correction of the blemish of photodiode 216 lower than low temperature oxide, make the roughness of active region 304 large.
In frame 124, there is the dielectric layer of high index of refraction or cover 602 and can preferably be applied in oxide 502 tops.Dielectric cap 602 and oxide 502 both will preferably be configured at least to allow predetermined optical wavelength or other electromagnetic energy through and arrive the photosensitive region 202 of photodiode 216.The optical property that device requirement that can be based on expectation and the performance of photodiode 216 are selected dielectric cap 602 and oxide.For example, infrared photodiode is will be preferably the most responsive to the Infrared wavelength of electromagnetic radiation, and dielectric cap 602 and oxide will have the high infrared radiation transmissivity thus.
As shown in Figure 6, can or cover 602 by dielectric layer and be deposited on the surface of oxide 504, thereby produce the photodiode 600 that coating is covered with, wherein dielectric cap surface 604 exposes for further processing.The overall refractive index of dielectric 602 materials is comprised of refractive index (n) and extinction coefficient (k).Refractive index n refers to the phase velocity of electromagnetic wave through material, and extinction coefficient k refers to the absorption loss water amount that Electromagnetic Wave Propagation experiences through material.Preferred refraction dielectric will have the extinction coefficient k that approaches as far as possible 0, that is to say that when electromagnetic wave passes material material does not absorb or transmitted all electromagnetic wave energies.Preferred dielectric substance also has the refractive index n on default refraction threshold value, most preferably more than 2.0.Higher refractive index n is easy to provide higher quantum efficiency in the photosensitive region 202 of photodiode 216.That is to say to there is the more photodiode 216 of high-quantum efficiency the electromagnetic energies that enter are changed into to electric current more, thereby produce more responsive and accurate device.
Possible dielectric material can include, but are not limited to silicon dioxide (SiO
2), silicon nitride (Si
3n
4), carborundum (SiC) etc.Therefore, in one embodiment, dielectric cap 602 will have at approximately 80nm and the approximately thickness between 250nm, and preferably have at approximately 100nm and the approximately thickness between 150nm.Should be noted that and can use silicon oxide dielectric lid 602 and can grow or deposit this silicon oxide dielectric lid at the temperature higher than low temperature oxide 502, because photodiode surface 304 has been repaired by the generation of 502 layers of low temperature oxides.Therefore, in an embodiment who is particularly useful, dielectric cap 602 can have multilayer, and can serve as the quantum efficiency that antireflecting coating further improves photodiode 216.In this multilayer embodiment, dielectric cap 602 can be preferably incorporated on it silicon dioxide layer that is covered with silicon nitride layer.
Can carry out extra back segment in frame 126 processes.Fig. 7 shows the photodiode 216 on the optional surface with back segment processing 700.In back segment is processed, passivation layer 702, metal wire 706, or barrier film 708 can for example, be deposited on the surface 604 of dielectric cap 602.In addition, such as, the parts of antireflecting coating, lenticule, filter etc. also can be applied to the surface 704 of this passivation layer 702.
Although described the present invention and advantage thereof in detail, should be appreciated that, can make various change in the situation that do not deviate from purport of the present invention and the scope that claims limit, replace and change.For example, can be in the situation that do not deviate from principle of the invention deletion or carry out some final back segments with different orders and process or p-type layer generating process.
And the application's scope is not limited in the specific embodiment of technique, machine, manufacture, material component, device, method and the step described in this specification.As those of ordinary skills, should understand, by the present invention, existing or Future Development for carry out with according to the essentially identical function of described corresponding embodiment of the present invention or obtain technique, machine, the manufacture of basic identical result, material component, device, method or step can be used according to the present invention.Therefore, claims should comprise that this technique, machine, manufacture, material component, device, method or step are in its scope.
Claims (10)
1. process method for semiconductor for one kind, comprising:
Semiconductor device with substrate is provided, and described substrate is with first surface, and described first surface is the result that reduces described substrate;
The described first surface place that approaches described substrate in described substrate generates doped layer;
Generate the first oxide being enough to surface roughness is reduced at the temperature below default roughness threshold value on the described first surface at described substrate; And
Generate dielectric layer on the surface of described the first oxide, dielectric layer has the refractive index that is greater than default refraction threshold value.
2. method according to claim 1, described semiconductor device has photosensitive region adjacent with described first surface in described substrate and the circuit side relative with described first surface.
3. method according to claim 1 wherein, generates described the first oxide and described the first oxide is generated as to the thickness had between about 1 nanometer and about 10 nanometers at the temperature between about 300 ℃ and 500 ℃.
4. method according to claim 1, wherein, described dielectric layer has and is at least approximately 2.0 refractive index.
5. method according to claim 1, wherein, the layer of described doping is the p-type layer doped with boron.
6. a semiconductor device comprises:
Substrate, have the first side and the circuit side relative with described the first side;
The p-type layer, be arranged on the described first side place of described substrate;
Low temperature oxide, be arranged on described first side of described substrate, the roughness of described the first side is reduced at the temperature below predetermined threshold value and forms being enough to;
Dielectric cap, be arranged on described low temperature oxide, and the material of described dielectric cap has the refractive index on predetermined threshold value.
7. semiconductor device according to claim 6, wherein, the roughness on the surface of described the first side is less than about 0.11 nanometer.
8. a photodiode device comprises:
Substrate, have the photosensitive region adjacent with the first side and the circuit side relative with described the first side;
Low temperature oxide, be arranged on described first side of described substrate, thereby the roughness of described the first side be reduced at the temperature below predetermined threshold value and form described low temperature oxide and to be configured to allow the light of preset wavelength at least through the photosensitive region that arrives described substrate described low temperature oxide being enough to;
Dielectric cap, be arranged on described low temperature oxide, and the material of described dielectric cap has the refractive index more than predetermined threshold value; And
Passivation layer, be arranged on described dielectric cap.
9. according to the described photodiode device of right 8, wherein, described low temperature oxide is the oxide of growing at the temperature between about 300 ℃ and 500 ℃.
10. photodiode device according to claim 8, wherein, described photodiode device is back-illuminated photodiode, wherein, described first side of described substrate is the result that is applied to the reduction process of described substrate, and wherein, the roughness of described the first side is less than about 0.11 nanometer.
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| US13/486,833 US9349902B2 (en) | 2012-06-01 | 2012-06-01 | System and method for reducing irregularities on the surface of a backside illuminated photodiode |
| US13/486,833 | 2012-06-01 |
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| CN106062970B (en) * | 2013-03-11 | 2018-05-08 | 英特尔公司 | The low-voltage avalanche photodide with re-entrant angle mirror for silicon-based photonics integration circuit |
| CN108767026B (en) * | 2018-06-11 | 2020-06-19 | 安徽鹰龙工业设计有限公司 | Silicon-based photovoltaic cell and manufacturing method thereof |
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| US20070210395A1 (en) * | 2006-02-24 | 2007-09-13 | Yasushi Maruyama | Solid-state imaging device, method for producing same, and camera |
| CN101179090A (en) * | 2006-09-29 | 2008-05-14 | 台湾积体电路制造股份有限公司 | Method for improving sensitivity of backside illuminated image sensors |
| US20110183460A1 (en) * | 2005-02-24 | 2011-07-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Light Shield for CMOS Imager |
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| US6759730B2 (en) | 2001-09-18 | 2004-07-06 | Agere Systems Inc. | Bipolar junction transistor compatible with vertical replacement gate transistor |
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| US20070210395A1 (en) * | 2006-02-24 | 2007-09-13 | Yasushi Maruyama | Solid-state imaging device, method for producing same, and camera |
| CN101179090A (en) * | 2006-09-29 | 2008-05-14 | 台湾积体电路制造股份有限公司 | Method for improving sensitivity of backside illuminated image sensors |
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