JPS6138630B2 - - Google Patents
Info
- Publication number
- JPS6138630B2 JPS6138630B2 JP53047446A JP4744678A JPS6138630B2 JP S6138630 B2 JPS6138630 B2 JP S6138630B2 JP 53047446 A JP53047446 A JP 53047446A JP 4744678 A JP4744678 A JP 4744678A JP S6138630 B2 JPS6138630 B2 JP S6138630B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- carrier concentration
- layer
- wafer
- junction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 13
- 238000005468 ion implantation Methods 0.000 claims description 12
- 239000012535 impurity Substances 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000001947 vapour-phase growth Methods 0.000 claims description 7
- 238000009826 distribution Methods 0.000 claims description 6
- 235000012431 wafers Nutrition 0.000 description 28
- 239000010410 layer Substances 0.000 description 18
- 230000035945 sensitivity Effects 0.000 description 18
- 230000003595 spectral effect Effects 0.000 description 15
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000002344 surface layer Substances 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 206010034972 Photosensitivity reaction Diseases 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000036211 photosensitivity Effects 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 239000007888 film coating Substances 0.000 description 1
- 238000009501 film coating Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
Description
本発明は受光素子の製造方法に関するものであ
り、特に気相成長法により生成された同一の大型
ウエハより製造された受光素子間において分光感
度特性、接合容量などのばらつきを減少させる受
光素子の製造方法に関するものである。
p―n接合を利用したフオトダイオードは周知
のように、入射フオトンによつて結晶中に励起さ
れたキヤリアを接合の内部電界によつて取り出す
ものである。この時、フオトダイオードの検出可
能な光の波長範囲は、通常価電子帯から伝導帯へ
の光学吸収を利用するため、禁制帯幅と密接な関
係にあり、その長波端(λc)は、λc〔μm〕
=1.24/Eg〔eV〕で決定される。一方短波長側
での検出感度は、基板結晶の吸収係数、反射率、
少数キヤリア拡散長、表面再結晶速度、素子構造
(たとえば不純物分布、p―n接合深さ)、など多
くのパラメータが複雑に関連し、一般に所望の分
光感度を得ることは困難である。
GaAs1-xPxなどの―V族化合物半導体結晶を
利用した可視光受光ダイオードでは、低コスト、
量産性などより一般に気相成長法で大量生産され
たエピタキシヤルウエハ(以下エピウエハと称す
る)を使用し、イオン注入法または熱拡散法でp
―n接合を形成し、受光素子を製造している。こ
の場合、1枚の大型ウエハに同一のp―n接合形
成条件で作製した素子間において、分光感度特
性、接合容量などの受光素子特性に大きなバラツ
キが生じる。このため、無作為抽出した素子の特
性より、同一ウエハで作成された他の素子の特性
を推定することができず、素子選別などに時間が
かかり、出産コストの上昇につながる。たとえば
低コストな気相成長法で作製された大型エピウエ
ハの場合、成長ガス中に含まれる不純物濃度の場
所的な不均一な流れのため、ウエハの各部で接合
容量、キヤリア濃度等にばらつきが生じてしま
う。この様子を第1図および、第1表に示す。
The present invention relates to a method for manufacturing a light receiving element, and in particular, a method for manufacturing a light receiving element that reduces variations in spectral sensitivity characteristics, junction capacitance, etc. between light receiving elements manufactured from the same large wafer produced by vapor phase epitaxy. It is about the method. As is well known, a photodiode using a pn junction extracts carriers excited in the crystal by incident photons using the internal electric field of the junction. At this time, the wavelength range of light that can be detected by a photodiode is closely related to the forbidden band width because it usually utilizes optical absorption from the valence band to the conduction band, and its long wavelength edge (λc) is λc [μm]
It is determined by = 1.24/Eg [eV]. On the other hand, the detection sensitivity on the short wavelength side depends on the absorption coefficient and reflectance of the substrate crystal.
Many parameters such as minority carrier diffusion length, surface recrystallization rate, device structure (for example, impurity distribution, pn junction depth) are intricately related, and it is generally difficult to obtain the desired spectral sensitivity. Visible light receiving diodes using −V group compound semiconductor crystals such as GaAs 1-x P x are low-cost,
For reasons of mass production, epitaxial wafers (hereinafter referred to as epi wafers) that are mass-produced using the vapor phase growth method are generally used, and epitaxial wafers are grown using the ion implantation method or thermal diffusion method.
-We form n-junctions and manufacture light-receiving elements. In this case, large variations occur in light-receiving device characteristics such as spectral sensitivity characteristics and junction capacitance among devices manufactured under the same pn junction formation conditions on one large wafer. For this reason, it is not possible to estimate the characteristics of other elements fabricated on the same wafer from the characteristics of randomly selected elements, and element selection takes time, leading to an increase in production costs. For example, in the case of large epitaxial wafers fabricated using low-cost vapor phase epitaxy, the impurity concentration contained in the growth gas flows locally non-uniformly, resulting in variations in junction capacitance, carrier concentration, etc. in each part of the wafer. I end up. This situation is shown in FIG. 1 and Table 1.
【表】
ただし、第1表において接合容量の測定は、ゼ
ロバイアス時、暗所で測定周波数は1KHzで行な
つた。
また、第1図は第1表に対応する測定場所を示
し、幅50mm高さ40mmの大型ウエハに通常の気相成
長を行なつた場合のウエハ各部のキヤリア濃度を
表わす図である。第1図より明らかなように成長
用ガス流に対して成長管の底側でキヤリア濃度n
〓4.0×1016cm-2,頂点側でn〓6.5×1016cm-2中央
でn〓5×1016cm-2,中央右側でn〓5.5×1016cm
-2中央左側でn〓6.0×1016cm-2と、成長管の底側
と頂点側でウエハ中のキヤリア濃度は1.6倍も相
違している。
また第2図はこのエピウエハーを使用して同一
p―n接合作成条件で作成された受光ダイオード
の分光感度特性のばらつきを示す図である。ただ
しp―n接合作成条件はZn+を70KeVで1014cm-2
イオン注入し、SiO2を約3000Åコートした後、
750゜c、30minN2気流中で熱処理し、p―n接
合を作成した。第2図において、Aはキヤリア濃
度の低い底側の素子の、Bはキヤリア濃度の高い
頂点側の素子の感度特性を示す。この図よりも明
らかなようにキヤリア濃度の低い素子Aにおいて
は長波長光感度の高い特性を示し、キヤリア濃度
の高い素子(B)においては長波長光感度のおさえら
れた特性を示し、同一のウエハより作製された受
光素子間で分光感度特性は大きく相違している。
本発明は上記の欠点に鑑みなされたもので、使
用する基板のキヤリア濃度を適当に選択すること
により、種々の分光感度をばらつかせるパラメー
タを制御し、所望の分光感度特性を得るものであ
る。
イオン注入法は導入される不純物量が充分に制
御されるため、ウエハ面内および深さ方向に対す
る不純物濃度の制御性に対して格段のメリツトを
もつ。一方GaAs1-xPx可視光受光ダイオードのよ
うに吸収係数の大きい半導体基板を使用する場
合、入射光の大半は約1μm以下のごく浅い表面
層で吸収されるため、約11μm以下の浅い表面層
のキヤリア濃度を充分制御する必要がある。イオ
ン注入法はこの要求を充分に満たす方法であり、
キヤリア濃度の面内および深さ方向の分布の制御
を充分に行なうことが可能である。
本発明はこのイオン注入法のメリツトを生か
し、高濃度不純物を有する半導体基板上に形成さ
れた比較的低キヤリア濃度を有する大型エピウエ
ハ上に、このエピウエハと同導電型(p型あるい
はn型)の不純物をイオン注入法で導入し、基板
表面より約0.1μm〜1μm程度に面内および深
さ方向におけるキヤリア濃度分布のよくそろつた
イオン注入層を形成することにより、分光感度を
ばらつかせるパラメータを制御し所望の分光感度
特性を得るものである。
以下、1実施例とともに本発明を説明する。
高濃度GaAs基板上に通常の方法で気相成長さ
れた低キヤリア濃度(n〓5×1015cm-3)の
GaAs0.68P0.38大型エペウエハをエツチング液で
表面層を軽く除去した後純水で充分洗浄する。次
にGaAs0.68P0.38エピウエハ上にこのウエハと同
じ導電型(N型)の不純物であるS+を200KeVで
7×1013cm-2,70KeVで3×1013cm-2イオン注入
する。そして、sio2を約2000〜3000Åコートの後
750゜cで30分間N2気流中で熱処理を行ない、表
面層約0.4μmにエピウエハより基板濃度の高い
N型層を形成する。さらに、その後ホトエツチン
グ法でsio2膜をプレナ型パターンに窓開けし
50KeVのZn+を1×1014cm-2注入し、再度sio2膜コ
ートの後750℃で30分間N2ガス中で熱処理を行な
い、p―n接合を形成し、1.05mm2のフオトダイ
オードを作製した。
本発明の方法による大型気相成長基板のばらつ
きを測定するため、底部、頂点部、中央部、中央
部左右の各部より各3チツプづつ選び出しステム
にマウントした。第2表にゼロバイアス時の各部
の接合容量を示す。[Table] However, in Table 1, the junction capacitance was measured at zero bias, in the dark, and at a measurement frequency of 1KHz. Further, FIG. 1 shows the measurement locations corresponding to Table 1, and is a diagram showing the carrier concentration in each part of the wafer when normal vapor phase growth is performed on a large wafer with a width of 50 mm and a height of 40 mm. As is clear from Figure 1, the carrier concentration n at the bottom side of the growth tube with respect to the growth gas flow is
〓4.0×10 16 cm -2 , n on the vertex side 〓 6.5 × 10 16 cm -2 at the center 〓 5×10 16 cm -2 , n on the right side of the center 〓 5.5 × 10 16 cm
-2 On the left side of the center, n = 6.0 × 10 16 cm -2 , which means that the carrier concentration in the wafer differs by a factor of 1.6 between the bottom side and the top side of the growth tube. Furthermore, FIG. 2 is a diagram showing variations in the spectral sensitivity characteristics of light receiving diodes fabricated using this epitaxial wafer under the same pn junction fabrication conditions. However, the conditions for creating a p-n junction are Zn + at 70KeV and 10 14 cm -2
After ion implantation and coating with approximately 3000Å of SiO2 ,
A p-n junction was created by heat treatment at 750°C for 30 min in N2 airflow. In FIG. 2, A shows the sensitivity characteristics of the element on the bottom side where the carrier concentration is low, and B shows the sensitivity characteristics of the element on the top side where the carrier concentration is high. As is clear from this figure, element A with a low carrier concentration exhibits high long-wavelength photosensitivity, while element (B) with a high carrier concentration exhibits characteristics with suppressed long-wavelength photosensitivity. Spectral sensitivity characteristics differ greatly between light receiving elements fabricated from wafers. The present invention has been made in view of the above-mentioned drawbacks, and by appropriately selecting the carrier concentration of the substrate used, parameters that cause various spectral sensitivities to vary can be controlled to obtain desired spectral sensitivity characteristics. . Since the ion implantation method can sufficiently control the amount of impurities introduced, it has a significant advantage in controlling the impurity concentration within the wafer surface and in the depth direction. On the other hand, when using a semiconductor substrate with a large absorption coefficient such as a GaAs 1-x P x visible light receiving diode, most of the incident light is absorbed in a very shallow surface layer of about 1 μm or less It is necessary to sufficiently control the carrier concentration in the shallow surface layer. Ion implantation is a method that fully satisfies this requirement.
It is possible to sufficiently control the distribution of carrier concentration in the plane and in the depth direction. The present invention utilizes the merits of this ion implantation method to inject large epitaxial wafers of the same conductivity type (p-type or n-type) as the epitaxial wafer with a relatively low carrier concentration, which is formed on a semiconductor substrate with a high concentration of impurities. By introducing impurities by ion implantation and forming an ion-implanted layer approximately 0.1 μm to 1 μm below the substrate surface with a uniform carrier concentration distribution in the plane and in the depth direction, parameters that cause variations in spectral sensitivity can be reduced. control to obtain desired spectral sensitivity characteristics. The present invention will be described below with one embodiment. Low carrier concentration (n = 5 × 10 15 cm -3 ) was grown by vapor phase growth on a high concentration GaAs substrate by a conventional method.
After lightly removing the surface layer of a GaAs 0.68 P 0.38 large Epee wafer with an etching solution, thoroughly wash it with pure water. Next, on the GaAs 0.68 P 0.38 epitaxial wafer, S + , an impurity of the same conductivity type (N type ) as this wafer, was injected at 7×10 13 cm -2 at 200 KeV and 3×10 13 cm -2 ions at 70 KeV. inject. Then, after coating about 2000-3000Å of sio 2
Heat treatment is performed at 750°C for 30 minutes in an N 2 stream to form an N-type layer with a higher substrate concentration than that of the epitaxial wafer in a surface layer of about 0.4 μm. Furthermore, the SIO 2 film was then opened into a planar pattern using a photoetching method.
50KeV Zn + was injected at 1×10 14 cm -2 , and after another SIO 2 film coating, heat treatment was performed at 750℃ for 30 minutes in N 2 gas to form a p-n junction, and a 1.05 mm 2 photodiode was formed. was created. In order to measure the variations in large-sized vapor-phase growth substrates produced by the method of the present invention, three chips each were selected from the bottom, top, center, left and right sides of the center and mounted on a stem. Table 2 shows the junction capacitance of each part at zero bias.
【表】
第2表より明らかなように本発明の方法によつ
て作成した受光素子は従来のもの(第1表)と比
べ、ばらつきが格段に少なく接合量のばらつきの
大きさは1/5以下である。また分光感度特性を第
3図に示すが、(Aはウエハ中央部、Bはウエハ
中央部より製作したフオトダイオードの分光感度
特性)そのばらつきも小さくなつている
第4図に本発明の方法により作成したフオトダ
イオードのキヤリア濃度分布を示す。ただしAは
低濃度キヤリア基板(n型層:第1の半導体
層)、Bは本発明で形成された、より高濃度のn
型薄層(第2の半導体層)、Cはイオン注入法で
形成されたP型層(第3および第4の半導体層)
である。
なお、この第4の半導体層は高キヤリア濃度の
薄層であり、電極金属とのコンタクト抵抗を低減
する役目をなしている。
上記の実施例はs+注入後、n型高濃度層形成の
ために750゜Cで30分間のN2気流中熱処理を行な
つているが、S+注入に続いてZn+の注入を行な
い、その後sio2コートの後750゜cで30分の熱処
理を行なつた場合でも分光感度特性における各素
子間のばらつきは小さく、上記側と同程度の効果
が得られた。
以上詳説したように、p―n接合型フオトダイ
オードにおいて、低キヤリア濃度のn型基板(大
型エピタキシヤルウエハに受光層となる基板と同
導電型で面内および深さ方向にキヤリア濃度が充
分制御された、より高濃度である薄層をイオン注
入法により形成し、この薄層上および内部にイオ
ン注入法によりp―n接合を形成することによつ
て、同一大型ウエハより作製された素子間の受光
感度特性のばらつきを低下できる。このため通常
の気相成長法で作製される、面内でのキヤリア濃
度のばらつきがある大型エピタキシヤルウエハを
使用しても、フオトダイオードの素子間のばらつ
きを少なくすることができ、素子選別によるコス
トアツプを押えることができる。また基板より高
濃度な薄層の形成にはイオン注入法が極めてすぐ
れ、またp型層形成と同時にn型高濃度層形成が
できるためコスト面での問題はない。
なお本発明の方法はp―n接合型フオトダイオ
ードに限らず、シヨツトキーバリア型フオトダイ
オードにも利用可能である。[Table] As is clear from Table 2, the photodetector produced by the method of the present invention has much less variation than the conventional one (Table 1), and the variation in bonding amount is 1/5. It is as follows. In addition, the spectral sensitivity characteristics are shown in Figure 3 (A is the spectral sensitivity characteristic of the photodiode manufactured from the center of the wafer, and B is the spectral sensitivity characteristic of the photodiode manufactured from the center of the wafer). The carrier concentration distribution of the photodiode created is shown. However, A is a low concentration carrier substrate (n-type layer: first semiconductor layer), and B is a higher concentration n-type layer formed in the present invention.
Type thin layer (second semiconductor layer), C is P type layer (third and fourth semiconductor layer) formed by ion implantation method
It is. Note that this fourth semiconductor layer is a thin layer with a high carrier concentration, and serves to reduce the contact resistance with the electrode metal. In the above example, after S + implantation, heat treatment was performed in a N2 stream at 750°C for 30 minutes to form an n-type high concentration layer, but Zn + was implanted following S + implantation. Even when heat treatment was performed at 750°C for 30 minutes after SIO 2 coating, the variation among each element in spectral sensitivity characteristics was small, and effects comparable to those on the above side were obtained. As explained in detail above, in a p-n junction photodiode, an n-type substrate with a low carrier concentration (the same conductivity type as the substrate that becomes the light-receiving layer on a large epitaxial wafer) is used to sufficiently control the carrier concentration in the plane and in the depth direction. By forming a thin layer with a higher concentration using the ion implantation method, and forming a p-n junction on and inside this thin layer using the ion implantation method, it is possible to connect devices fabricated from the same large wafer. Therefore, even if a large epitaxial wafer, which is fabricated by normal vapor phase growth and has in-plane carrier concentration variations, is used, the variations between photodiode elements can be reduced. It is possible to reduce the cost increase due to element selection.In addition, the ion implantation method is extremely superior in forming a thin layer with a higher concentration than the substrate, and it is possible to form an n-type high concentration layer at the same time as the p-type layer. The method of the present invention is applicable not only to pn junction type photodiodes but also to shot key barrier type photodiodes.
第1図は通常の気相成長法で作製される大型エ
ピタキシヤルウエハの面内でのキヤリア濃度のば
らつきを示す図、第2図は従来の大型エピタキシ
ヤルウエハより作製したフオトダイオード間の分
光感度特性におけるばらつきを示す図、第3図は
本発明による大型エピタキシヤルウエハより作製
したフオトダイオード間の分光感度特性における
ばらつきを示す図、第4図は本発明の1実施例に
おけるフオトダイオードのキヤリア濃度分布を示
す図である。
Figure 1 shows the variation in carrier concentration within the plane of a large epitaxial wafer fabricated using a conventional vapor phase growth method, and Figure 2 shows the spectral sensitivity between photodiodes fabricated from a conventional large epitaxial wafer. FIG. 3 is a diagram showing variations in spectral sensitivity characteristics between photodiodes fabricated from large epitaxial wafers according to the present invention, and FIG. 4 is a diagram showing carrier concentration of photodiodes in one embodiment of the present invention. It is a figure showing distribution.
Claims (1)
成長法により低キヤリア濃度の第1の半導体層を
設ける工程と、 上記第1の半導体層に同導電型となる不純物を
イオン注入し、上記第1の半導体層の上層部をイ
オン注入法によつてキヤリア濃度分布が充分に制
御された同導電型の高キヤリア濃度層に変換した
第2の半導体層を設ける工程と、 上記第2の半導体層の上層部に、イオン注入法
によつて、上記第2の半導体層とは異なる導電型
の第3の半導体層を設けてp―n接合を形成する
工程と、 上記第3の半導体層上または内部に上記第3の
半導体層と同導電型で高キヤリア濃度の第4の半
導体層を設ける工程と、 を具備することを特徴とする受光素子の製造方
法。[Claims] 1. A step of providing a first semiconductor layer with a low carrier concentration by vapor phase growth on a semiconductor substrate having a high impurity concentration, and adding an impurity having the same conductivity type to the first semiconductor layer. providing a second semiconductor layer in which the upper layer of the first semiconductor layer is converted into a high carrier concentration layer of the same conductivity type with a sufficiently controlled carrier concentration distribution by ion implantation; forming a pn junction by providing a third semiconductor layer of a conductivity type different from that of the second semiconductor layer in the upper layer of the second semiconductor layer by ion implantation; A method for manufacturing a light receiving element, comprising: providing a fourth semiconductor layer having the same conductivity type as the third semiconductor layer and having a high carrier concentration on or inside the third semiconductor layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4744678A JPS54139387A (en) | 1978-04-20 | 1978-04-20 | Production of photo detector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4744678A JPS54139387A (en) | 1978-04-20 | 1978-04-20 | Production of photo detector |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54139387A JPS54139387A (en) | 1979-10-29 |
JPS6138630B2 true JPS6138630B2 (en) | 1986-08-30 |
Family
ID=12775363
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4744678A Granted JPS54139387A (en) | 1978-04-20 | 1978-04-20 | Production of photo detector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54139387A (en) |
-
1978
- 1978-04-20 JP JP4744678A patent/JPS54139387A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS54139387A (en) | 1979-10-29 |
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