TW201427283A - Voltage controlled oscillator and phase locked loop - Google Patents
Voltage controlled oscillator and phase locked loop Download PDFInfo
- Publication number
- TW201427283A TW201427283A TW101150902A TW101150902A TW201427283A TW 201427283 A TW201427283 A TW 201427283A TW 101150902 A TW101150902 A TW 101150902A TW 101150902 A TW101150902 A TW 101150902A TW 201427283 A TW201427283 A TW 201427283A
- Authority
- TW
- Taiwan
- Prior art keywords
- voltage
- output
- signal
- controlled oscillator
- switching information
- Prior art date
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
本發明係有關於一種壓控振盪器(Voltage controlled oscillator;VCO),特別是有關於一種可補償斜率變化的壓控振盪器。 The present invention relates to a Voltage Controlled Oscillator (VCO), and more particularly to a voltage controlled oscillator that compensates for changes in slope.
第1圖為壓控振盪器的轉換曲線示意圖。橫軸為壓控振盪器的輸入電壓,縱軸為壓控振盪器的輸出頻率。由於製程(process)、電壓(voltage)及溫度(temperature)變化的影響,壓控振盪器的轉換曲線的斜率並不穩定。如第1圖所示,壓控振盪器具有不同的轉換曲線,其中每一轉換曲線具有不同的斜率。 Figure 1 is a schematic diagram of the conversion curve of a voltage controlled oscillator. The horizontal axis is the input voltage of the voltage controlled oscillator, and the vertical axis is the output frequency of the voltage controlled oscillator. The slope of the conversion curve of the voltage controlled oscillator is not stable due to variations in process, voltage, and temperature. As shown in Figure 1, the voltage controlled oscillator has different conversion curves, each of which has a different slope.
為了使轉換曲線覆蓋(cover)足夠的頻率範圍,習知的方式係提高壓控振盪器的輸入電壓。然而,外部裝置可能無法提供較大的電壓予壓控振盪器。另一解決方式係增加轉換曲線的斜率,但斜率大的轉換曲線易受到雜訊的干擾,進而影響電路整體的頻寬(bandwidth)及效率。 In order for the conversion curve to cover a sufficient frequency range, it is known to increase the input voltage of the voltage controlled oscillator. However, external devices may not be able to provide a large voltage to the voltage controlled oscillator. Another solution is to increase the slope of the conversion curve, but the conversion curve with a large slope is susceptible to noise interference, which in turn affects the overall bandwidth and efficiency of the circuit.
本發明提供一種壓控振盪器,包括一電壓產生單元、一第一轉換單元、一第二轉換單元、一計數器以及一控制單元。電壓產生單元根據一第一切換資訊,將一第一電壓以及一第二電壓之一者作為一輸出電壓。第一轉換單元根據一第二切換資訊,轉換輸出電壓,用以產生一輸出電流。第二轉換單元轉換輸出電流,用以產生一輸出信號。計數 器計算輸出信號的脈衝數量,用以產生一控制信號。控制單元根據控制信號,產生第一及第二切換資訊。在一第一期間,電壓產生單元將第一電壓作為輸出電壓,並且控制單元根據控制信號,得知一第一數位值。在一第二期間,電壓產生單元將第二電壓作為輸出電壓,並且控制單元根據控制信號,得知一第二數位值。在一第三期間下,電壓產生單元將一輸入電壓作為輸出電壓,並且控制單元根據第一及第二數位值,產生第二切換資訊,用以調整輸出電流。 The invention provides a voltage controlled oscillator comprising a voltage generating unit, a first converting unit, a second converting unit, a counter and a control unit. The voltage generating unit uses one of a first voltage and a second voltage as an output voltage according to a first switching information. The first converting unit converts the output voltage according to a second switching information to generate an output current. The second conversion unit converts the output current to generate an output signal. count The controller calculates the number of pulses of the output signal to generate a control signal. The control unit generates the first and second switching information according to the control signal. During a first period, the voltage generating unit uses the first voltage as an output voltage, and the control unit learns a first digit value according to the control signal. During a second period, the voltage generating unit uses the second voltage as an output voltage, and the control unit learns a second digit value based on the control signal. During a third period, the voltage generating unit uses an input voltage as the output voltage, and the control unit generates second switching information for adjusting the output current according to the first and second digit values.
為讓本發明之特徵和優點能更明顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳細說明如下: In order to make the features and advantages of the present invention more comprehensible, the preferred embodiments are described below, and are described in detail with reference to the accompanying drawings.
第2圖為本發明之壓控振盪器之示意圖。如圖所示,壓控振盪器200包括一電壓產生單元210、轉換單元220、230、一處理單元240以及一控制單元250。在本實施例中,壓控振盪器200具有一穩定的斜率,並不會隨著製程、電壓及溫度的漂移而大幅改變,因而可提供較佳的頻寛及效率。 Figure 2 is a schematic diagram of the voltage controlled oscillator of the present invention. As shown, the voltage controlled oscillator 200 includes a voltage generating unit 210, converting units 220, 230, a processing unit 240, and a control unit 250. In the present embodiment, the voltage controlled oscillator 200 has a stable slope and does not change greatly with the drift of the process, voltage and temperature, thereby providing better frequency and efficiency.
電壓產生單元210根據一切換資訊IM1的切換信號S0~S2,將電壓V1及V2之一者作為一輸出電壓Vco。本發明並不限定電壓產生單元210的內部架構。在本實施例中,電壓產生單元210包括一比較器211、一P型電晶體212、一分壓器213及開關214~216。 The voltage generating unit 210 uses one of the voltages V1 and V2 as an output voltage Vco according to the switching signals S0 to S2 of the switching information IM1. The present invention does not limit the internal architecture of the voltage generating unit 210. In this embodiment, the voltage generating unit 210 includes a comparator 211, a P-type transistor 212, a voltage divider 213, and switches 214-216.
比較器211接收一預設電壓Vbg,並耦接P型電晶體 212及分壓器213。P型電晶體212與分壓器213串聯於操作電壓VDD與GND之間。分壓器213具有電阻R1~R3。電阻R1~R3對預設電壓Vbg進行分壓,用以產生電壓V1及V2。開關214~216根據切換資訊IM1,將電壓V1、V2、Vin之一者作為輸出電壓Vco。在本實施例中,切換資訊IM1具有三切換信號S0~S2,用以控制開關214~216的導通與否。 The comparator 211 receives a predetermined voltage Vbg and is coupled to the P-type transistor 212 and the voltage divider 213. The P-type transistor 212 and the voltage divider 213 are connected in series between the operating voltages V DD and GND. The voltage divider 213 has resistors R1 to R3. The resistors R1 to R3 divide the preset voltage Vbg to generate voltages V1 and V2. The switches 214 to 216 use one of the voltages V1, V2, and Vin as the output voltage Vco based on the switching information IM1. In this embodiment, the switching information IM1 has three switching signals S0~S2 for controlling whether the switches 214-216 are turned on or off.
本發明並不限定切換信號的數量。在一可能實施例中,切換信號的數量與開關214~216的種類有關。舉例而言,若開關214~216係為相同型態的開關時,如均為P型電晶體或是均為N型電晶體,則切換信號的數量可能與開關214~216的數量相同。 The invention does not limit the number of switching signals. In a possible embodiment, the number of switching signals is related to the type of switches 214-216. For example, if the switches 214-216 are the same type of switches, such as P-type transistors or N-type transistors, the number of switching signals may be the same as the number of switches 214-216.
在其它實施例中,若開關214~216係為互補式開關時,如開關215為N型電晶體,而開關216為P型電晶體,則只需一切換信號,便可控制開關215及216。舉例而言,當一切換信號為一第一狀態(如高位準)時,開關215導通,而開關216不導通。當切換信號為一第二狀態(如低位準)時,開關216導通,而開關215不導通。 In other embodiments, if the switches 214-216 are complementary switches, such as the switch 215 is an N-type transistor, and the switch 216 is a P-type transistor, the switches 215 and 216 can be controlled by only one switching signal. . For example, when a switching signal is in a first state (such as a high level), the switch 215 is turned on, and the switch 216 is not turned on. When the switching signal is in a second state (eg, a low level), the switch 216 is turned on and the switch 215 is not turned on.
轉換單元220根據切換資訊IM2,轉換輸出電壓Vco,用以產生一輸出電流Ic。本發明並不限定轉換單元220的內部電路架構。只要能夠將電壓轉換成電流的電路架構,均可作為轉換單元220。在本實施例中,轉換單元220包括複數電流源以及複數開關。 The converting unit 220 converts the output voltage Vco according to the switching information IM2 to generate an output current Ic. The present invention does not limit the internal circuit architecture of the conversion unit 220. As long as the circuit structure capable of converting a voltage into a current can be used as the conversion unit 220. In the present embodiment, the conversion unit 220 includes a complex current source and a plurality of switches.
為方便說明,第2圖僅顯示電流源221~223以及開關224~226。電流源221~223接收操作電壓VDD,並根據輸出 電壓Vco,產生電流I1~I3。在本實施例中,開關224~226一對一地耦接電流源221~223,並根據切換資訊IM2,決定是否輸出相對應的電流。 For convenience of explanation, FIG. 2 only shows current sources 221 to 223 and switches 224 to 226. The current sources 221 to 223 receive the operating voltage V DD and generate currents I 1 to I 3 according to the output voltage Vco. In this embodiment, the switches 224-226 are coupled to the current sources 221 to 223 one-to-one, and determine whether to output a corresponding current according to the switching information IM2.
本發明並不限定切換資訊IM2如何控制開關224~226。在一可能實施例中,切換資訊IM2具有三切換信號(未顯示),分別導通或不導通開關224~226,但並非用以限制本發明。在其它實施例中,藉由控制開關224~226的種類,便可利用較少數量的切換信號,控制多個開關。在本實施例中,當開關224~226均被導通時,則輸出電流Ic為電流I1~I3的總合。當開關224及225被導通,並且開關226不導通時,則輸出電流Ic為電流I1及I2的總合。 The present invention does not limit how the switching information IM2 controls the switches 224-226. In a possible embodiment, the switching information IM2 has three switching signals (not shown) that respectively turn on or off the switches 224-226, but are not intended to limit the present invention. In other embodiments, by controlling the types of switches 224-226, a plurality of switches can be controlled with a smaller number of switching signals. In the present embodiment, when the switches 224 to 226 are both turned on, the output current Ic is the sum of the currents I 1 to I 3 . When the switches 224 and 225 are turned on, and the switch 226 is not turned on, the current Ic is output currents I 1 and I 2 sum.
轉換單元230轉換輸出電流Ic,用以產生一輸出信號Fc。本發明並不限定轉換單元230的內部電路架構。只要能夠將一電流轉換成一頻率的硬體電路架構,均可作為轉換單元230。在本實施例中,轉換單元230具有複數串聯的振盪胞(VCO cell)。為方便說明,第2圖僅顯示振盪胞231~233。 The conversion unit 230 converts the output current Ic to generate an output signal Fc. The present invention does not limit the internal circuit architecture of the conversion unit 230. As long as a current circuit capable of converting a current into a frequency can be used as the conversion unit 230. In the present embodiment, the conversion unit 230 has a plurality of oscillating cells (VCO cells) connected in series. For convenience of explanation, FIG. 2 only shows the oscillating cells 231 to 233.
處理單元240根據輸出信號Fc,產生一控制信號Sc。本發明並不限定處理單元240的內部架構。只要能夠將一頻率轉換成一數位碼的硬體電路架構,均可作為處理單元240。在本實施例中,處理單元240係為一計數器(Counter)241,用以根據切換信號S1及S2,計算輸出信號Fc的脈衝數量,並將計算後的結果作為一控制信號Sc。 Processing unit 240 generates a control signal Sc based on output signal Fc. The present invention is not limited to the internal architecture of processing unit 240. As long as the hardware circuit capable of converting a frequency into a digital code can be used as the processing unit 240. In this embodiment, the processing unit 240 is a counter 241 for calculating the number of pulses of the output signal Fc according to the switching signals S1 and S2, and using the calculated result as a control signal Sc.
控制單元250根據控制信號Sc,產生切換資訊IM1、IM2。本發明並不限定控制單元250的內部架構。只要能 夠提供適合的切換資訊的數位電路架構,均可作為控制單元250。在一可能實施例中,重置信號RES係用以重置(reset)處理單元240及控制單元250。 The control unit 250 generates switching information IM1, IM2 based on the control signal Sc. The invention does not limit the internal architecture of the control unit 250. As long as A digital circuit architecture capable of providing suitable switching information can be used as the control unit 250. In a possible embodiment, the reset signal RES is used to reset the processing unit 240 and the control unit 250.
在本實施例中,控制單元250藉由切換資訊IM1,令電壓產生單元210提供不同的輸出電壓。第3圖為本發明之切換資訊IM1之可能示意圖。為方便說明,切換資訊IM1具有切換信號S0~S2,但並非用以限制本發明。在其它實施例中,切換資訊IM1可利用其它數量的切換信號,令電壓產生單元210提供不同的輸出電壓。 In this embodiment, the control unit 250 causes the voltage generating unit 210 to provide different output voltages by switching the information IM1. Figure 3 is a schematic diagram of the switching information IM1 of the present invention. For convenience of explanation, the switching information IM1 has switching signals S0 to S2, but is not intended to limit the present invention. In other embodiments, the switching information IM1 may utilize other numbers of switching signals to cause the voltage generating unit 210 to provide different output voltages.
在期間T1,切換信號S1為一致能狀態(如高位準),因此,電壓產生單元210將電壓V1作為輸出電壓Vco。在本實施例中,控制單元250透過切換資訊IM2,導通轉換單元220內的所有開關224~226。轉換單元220根據輸出電壓Vco,產生相對應的輸出電流Ic。轉換單元230轉換輸出電流Ic,用以產生相對應的輸出信號Fc。此時,輸出信號Fc具有頻率F1。處理單元240根據頻率F1,產生控制信號Sc。控制單元250根據控制信號Sc,得知一數位值C1。在一可能實施例中,處理單元240計算輸出信號Fc的脈衝數量,並將計數結果作為一控制信號,提供予控制單元250。 In the period T1, the switching signal S1 is in a uniform energy state (e.g., a high level), and therefore, the voltage generating unit 210 uses the voltage V1 as the output voltage Vco. In this embodiment, the control unit 250 turns on all the switches 224-226 in the conversion unit 220 through the switching information IM2. The conversion unit 220 generates a corresponding output current Ic according to the output voltage Vco. The conversion unit 230 converts the output current Ic to generate a corresponding output signal Fc. At this time, the output signal Fc has a frequency F1. Processing unit 240 generates control signal Sc based on frequency F1. The control unit 250 knows a digital value C1 based on the control signal Sc. In a possible embodiment, the processing unit 240 calculates the number of pulses of the output signal Fc and provides the result of the counting to the control unit 250 as a control signal.
在期間T2,切換信號S2為高位準,因此,電壓產生單元210將電壓V2作為輸出電壓Vco。在本實施例中,控制單元250透過切換資訊IM2,導通轉換單元220內的所有開關224~226。轉換單元220根據輸出電壓Vco,產生相對應的輸出電流Ic。轉換單元230轉換輸出電流Ic,用以 產生相對應的輸出信號Fc。此時,輸出信號Fc具有頻率F2。處理單元240根據頻率F2,產生控制信號Sc。控制單元250根據控制信號Sc,得知一數位值C2。在本實施例中,處理單元240計算輸出信號Fc的脈衝數量,並將計數結果作為一控制信號,提供予控制單元250。 In the period T2, the switching signal S2 is at a high level, and therefore, the voltage generating unit 210 uses the voltage V2 as the output voltage Vco. In this embodiment, the control unit 250 turns on all the switches 224-226 in the conversion unit 220 through the switching information IM2. The conversion unit 220 generates a corresponding output current Ic according to the output voltage Vco. The conversion unit 230 converts the output current Ic for A corresponding output signal Fc is generated. At this time, the output signal Fc has a frequency F2. Processing unit 240 generates control signal Sc based on frequency F2. The control unit 250 knows a digital value C2 based on the control signal Sc. In the present embodiment, the processing unit 240 calculates the number of pulses of the output signal Fc, and supplies the result of the counting as a control signal to the control unit 250.
在期間T3,切換信號S0為高位準,因此,電壓產生單元210將輸入電壓Vin作為輸出電壓Vco。在本實施例中,控制單元250根據數位值C1及C2,產生切換資訊IM2,用以決定轉換單元220內被導通的開關的數量。 In the period T3, the switching signal S0 is at the high level, and therefore, the voltage generating unit 210 regards the input voltage Vin as the output voltage Vco. In the present embodiment, the control unit 250 generates switching information IM2 for determining the number of switches that are turned on in the conversion unit 220 based on the digital values C1 and C2.
在一可能實施例中,控制單元250係根據數位值C1及C2的差值△C,調整轉換單元220的輸出電流Ic。舉例而言,當差值△C大於一預設值時,表示壓控振盪器200的轉換曲線的斜率太大,需調小轉換單元230的輸出信號Fc的頻率。因此,控制單元250減少轉換單元220內的被導通的開關的數量,用以減小輸出電流Ic,並使得轉換單元230的輸出頻率Fc變小。 In a possible embodiment, the control unit 250 adjusts the output current Ic of the conversion unit 220 according to the difference ΔC of the digital values C1 and C2. For example, when the difference ΔC is greater than a predetermined value, it indicates that the slope of the conversion curve of the voltage controlled oscillator 200 is too large, and the frequency of the output signal Fc of the conversion unit 230 needs to be reduced. Therefore, the control unit 250 reduces the number of turned-on switches in the conversion unit 220 to reduce the output current Ic and make the output frequency Fc of the conversion unit 230 small.
當差值△C小於預設值時,表示壓控振盪器200的轉換曲線的斜率太小,需調大轉換單元230的輸出信號Fc的頻率。因此,控制單元250增加轉換單元220內的被導通的開關的數量,用以增加轉換單元220的輸出電流Ic,並使得轉換單元230的輸出信號Fc的頻率變大。 When the difference ΔC is smaller than the preset value, it means that the slope of the conversion curve of the voltage controlled oscillator 200 is too small, and the frequency of the output signal Fc of the conversion unit 230 needs to be increased. Therefore, the control unit 250 increases the number of turned-on switches in the conversion unit 220 to increase the output current Ic of the conversion unit 220 and causes the frequency of the output signal Fc of the conversion unit 230 to become large.
如第3圖所示,在期間T3,轉換單元230的輸出信號Fc具有頻率F3。此時,輸出信號Fc可作為壓控振盪器200的輸出信號。在本實施例中,在期間T3,處理單元240停止動作,並且控制單元250固定切換資訊IM1及IM2。 As shown in FIG. 3, in the period T3, the output signal Fc of the conversion unit 230 has the frequency F3. At this time, the output signal Fc can be used as an output signal of the voltage controlled oscillator 200. In the present embodiment, during the period T3, the processing unit 240 stops the operation, and the control unit 250 fixes the switching information IM1 and IM2.
第4圖為本發明之壓控振盪器之一應用實施例。在本實施例中,壓控振盪器係應用在一鎖相迴路(PLL)中,但並非用以限制本發明。在其它實施例中,壓控振盪器所產生的時脈信號亦可應用於其它電子電路中。如圖所示,鎖相迴路400包括一相位頻率偵測器(PFD)410、一電荷幫浦(Charge Pump)420、一低通濾波器(LPF)430、一壓控振盪器(VCO)440以及一除頻器(Divdier)450。 Figure 4 is an application example of a voltage controlled oscillator of the present invention. In the present embodiment, the voltage controlled oscillator is applied in a phase locked loop (PLL), but is not intended to limit the present invention. In other embodiments, the clock signal generated by the voltage controlled oscillator can also be applied to other electronic circuits. As shown, the phase locked loop 400 includes a phase frequency detector (PFD) 410, a charge pump 420, a low pass filter (LPF) 430, and a voltage controlled oscillator (VCO) 440. And a frequency divider (Divdier) 450.
相位頻率偵測器410根據一參考時脈Fref以及一回授時脈Ffb,產生一充電信號Up以及一放電信號Dn。電荷幫浦420根據充電信號Up及放電信號Dn,產生一控制電壓Vc。低通濾波器430處理控制電壓Vc,用以產生一輸入電壓Vin。壓控振盪器440根據輸入電壓Vin,產生一輸出信號Fc。除頻器450處理輸出信號Fc,用以產生回授時脈Ffb。 The phase frequency detector 410 generates a charging signal Up and a discharging signal Dn according to a reference clock Fref and a feedback clock Ffb. The charge pump 420 generates a control voltage Vc according to the charge signal Up and the discharge signal Dn. The low pass filter 430 processes the control voltage Vc for generating an input voltage Vin. The voltage controlled oscillator 440 generates an output signal Fc based on the input voltage Vin. The frequency divider 450 processes the output signal Fc to generate a feedback clock Ffb.
在本實施例中,第2圖所示的壓控振盪器200可作為壓控振盪器440。以第2圖為例,在鎖相迴路400開始運作前,先令電壓產生單元210將電壓V1及V2作為輸出電壓Vco,使得轉換單元230產生不同頻率的輸出信號Fc。處理單元240根據不同頻率,產生不同的控制信號Sc。控制單元250根據不同的控制信號Sc,得知相對應的數位值,再利用兩數位值的差值,決定轉換單元220的被導通開關的數量。 In the present embodiment, the voltage controlled oscillator 200 shown in FIG. 2 can be used as the voltage controlled oscillator 440. Taking FIG. 2 as an example, before the phase-locked loop 400 starts operating, the shilling voltage generating unit 210 uses the voltages V1 and V2 as the output voltage Vco, so that the converting unit 230 generates the output signals Fc of different frequencies. The processing unit 240 generates different control signals Sc according to different frequencies. The control unit 250 knows the corresponding digit value according to the different control signal Sc, and determines the number of the turned-on switches of the conversion unit 220 by using the difference between the two digit values.
由於壓控振盪器440本身具有調整的功能,其可根據偵測到的轉換斜率,產生一適當的轉換斜率。由於壓控振盪器440可提供較為穩定的轉換斜率,使其不易隨著製 程、電壓、溫度的變化而變化。因此,當鎖相迴路400開始運作時,壓控振盪器440便可提供最佳的轉換斜率,進而使得鎖相迴路400的穩定行為(settling behavior)較為穩定,並且不會大幅增加電路的複雜性。 Since the voltage controlled oscillator 440 itself has an adjustment function, it can generate an appropriate switching slope based on the detected switching slope. Since the voltage controlled oscillator 440 can provide a relatively stable conversion slope, it is difficult to follow Changes in process, voltage, and temperature. Therefore, when the phase locked loop 400 starts to operate, the voltage controlled oscillator 440 can provide an optimum switching slope, thereby making the settling behavior of the phase locked loop 400 relatively stable and without greatly increasing the complexity of the circuit. .
除非另作定義,在此所有詞彙(包含技術與科學詞彙)均屬本發明所屬技術領域中具有通常知識者之一般理解。此外,除非明白表示,詞彙於一般字典中之定義應解釋為與其相關技術領域之文章中意義一致,而不應解釋為理想狀態或過分正式之語態。 Unless otherwise defined, all terms (including technical and scientific terms) are used in the ordinary meaning Moreover, unless expressly stated, the definition of a vocabulary in a general dictionary should be interpreted as consistent with the meaning of an article in its related art, and should not be interpreted as an ideal state or an overly formal voice.
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.
200、440‧‧‧壓控振盪器 200, 440‧‧‧ voltage controlled oscillator
210‧‧‧電壓產生單元 210‧‧‧Voltage generating unit
220、230‧‧‧轉換單元 220, 230‧‧‧ conversion unit
240‧‧‧處理單元 240‧‧‧Processing unit
250‧‧‧控制單元 250‧‧‧Control unit
211‧‧‧比較器 211‧‧‧ comparator
212‧‧‧P型電晶體 212‧‧‧P type transistor
213‧‧‧分壓器 213‧‧ ‧ Voltage divider
214~216、224~226‧‧‧開關 214~216, 224~226‧‧‧ switch
221~223‧‧‧電流源 221~223‧‧‧current source
231~233‧‧‧振盪胞 231~233‧‧‧ oscillating cell
IM1、IM2‧‧‧切換資訊 IM1, IM2‧‧‧ Switching information
V1、V2‧‧‧電壓 V1, V2‧‧‧ voltage
Vco‧‧‧輸出電壓 Vco‧‧‧ output voltage
Vbg‧‧‧預設電壓 Vbg‧‧‧Preset voltage
R1~R3‧‧‧電阻 R1~R3‧‧‧ resistor
VDD、GND‧‧‧操作電壓 V DD , GND‧‧‧ operating voltage
S0~S2‧‧‧切換信號 S0~S2‧‧‧Switching signal
Ic‧‧‧輸出電流 Ic‧‧‧Output current
I1~I3‧‧‧電流 I 1 ~I 3 ‧‧‧ Current
Fc‧‧‧輸出信號 Fc‧‧‧ output signal
Sc‧‧‧控制信號 Sc‧‧‧ control signal
RES‧‧‧重置信號 RES‧‧‧Reset signal
T1~T3‧‧‧期間 During the period of T1~T3‧‧
F1~F3‧‧‧頻率 F1~F3‧‧‧ frequency
400‧‧‧鎖相迴路 400‧‧‧ phase-locked loop
410‧‧‧相位頻率偵測器 410‧‧‧ phase frequency detector
420‧‧‧電荷幫浦 420‧‧‧Charging pump
430‧‧‧低通濾波器 430‧‧‧ low pass filter
450‧‧‧除頻器 450‧‧‧Delephone
Fref‧‧‧參考時脈 Fref‧‧‧ reference clock
Ffb‧‧‧回授時脈 Ffb‧‧‧Restoration clock
Up‧‧‧充電信號 Up‧‧‧Charging signal
Dn‧‧‧放電信號 Dn‧‧‧discharge signal
Vc‧‧‧控制電壓 Vc‧‧‧ control voltage
Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage
241‧‧‧計數器 241‧‧‧ counter
第1圖為壓控振盪器(VCO)的轉換曲線示意圖。 Figure 1 is a schematic diagram of the conversion curve of a voltage controlled oscillator (VCO).
第2圖為本發明之壓控振盪器之示意圖。 Figure 2 is a schematic diagram of the voltage controlled oscillator of the present invention.
第3圖為本發明之切換資訊之一可能示意圖。 Figure 3 is a schematic diagram of one of the switching information of the present invention.
第4圖為本發明之壓控振盪器之一應用實施例。 Figure 4 is an application example of a voltage controlled oscillator of the present invention.
200‧‧‧壓控振盪器 200‧‧‧Variable Control Oscillator
210‧‧‧電壓產生單元 210‧‧‧Voltage generating unit
220、230‧‧‧轉換單元 220, 230‧‧‧ conversion unit
240‧‧‧處理單元 240‧‧‧Processing unit
250‧‧‧控制單元 250‧‧‧Control unit
211‧‧‧比較器 211‧‧‧ comparator
212‧‧‧P型電晶體 212‧‧‧P type transistor
213‧‧‧分壓器 213‧‧ ‧ Voltage divider
214~216、224~226‧‧‧開關 214~216, 224~226‧‧‧ switch
221~223‧‧‧電流源 221~223‧‧‧current source
231~233‧‧‧振盪胞 231~233‧‧‧ oscillating cell
IM1、IM2‧‧‧切換資訊 IM1, IM2‧‧‧ Switching information
V1、V2‧‧‧電壓 V1, V2‧‧‧ voltage
Vco‧‧‧輸出電壓 Vco‧‧‧ output voltage
Vbg‧‧‧預設電壓 Vbg‧‧‧Preset voltage
VDD、GND‧‧‧操作電壓 V DD , GND‧‧‧ operating voltage
R1~R3‧‧‧電阻 R1~R3‧‧‧ resistor
S0~S2‧‧‧切換信號 S0~S2‧‧‧Switching signal
Ic‧‧‧輸出電流 Ic‧‧‧Output current
I1~I3‧‧‧電流 I 1 ~I 3 ‧‧‧ Current
Fc‧‧‧輸出信號 Fc‧‧‧ output signal
Sc‧‧‧控制信號 Sc‧‧‧ control signal
RES‧‧‧重置信號 RES‧‧‧Reset signal
Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage
241‧‧‧計數器 241‧‧‧ counter
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101150902A TWI502897B (en) | 2012-12-28 | 2012-12-28 | Voltage controlled oscillator and phase locked loop |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101150902A TWI502897B (en) | 2012-12-28 | 2012-12-28 | Voltage controlled oscillator and phase locked loop |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201427283A true TW201427283A (en) | 2014-07-01 |
TWI502897B TWI502897B (en) | 2015-10-01 |
Family
ID=51725773
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW101150902A TWI502897B (en) | 2012-12-28 | 2012-12-28 | Voltage controlled oscillator and phase locked loop |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI502897B (en) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5936476A (en) * | 1997-11-18 | 1999-08-10 | Vlsi Technology, Inc. | VCO in CMOS technology having an operating frequency of 3 GHz and greater |
JP4435723B2 (en) * | 2005-08-08 | 2010-03-24 | 株式会社ルネサステクノロジ | Phase synchronization circuit and semiconductor integrated circuit device using the same |
TWI323565B (en) * | 2006-06-16 | 2010-04-11 | Realtek Semiconductor Corp | Voltage-controlled oscillator |
TWI325231B (en) * | 2006-11-20 | 2010-05-21 | Faraday Tech Corp | Automatic switching phase-locked loop |
US7895345B2 (en) * | 2007-04-13 | 2011-02-22 | Microsoft Corporation | Distributed routing table architecture and design |
JP2010130412A (en) * | 2008-11-28 | 2010-06-10 | Renesas Technology Corp | Semiconductor integrated circuit |
-
2012
- 2012-12-28 TW TW101150902A patent/TWI502897B/en active
Also Published As
Publication number | Publication date |
---|---|
TWI502897B (en) | 2015-10-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8878614B2 (en) | Phase-locked loop | |
US11128256B2 (en) | Oscillator circuit | |
TWI638526B (en) | Method and apparatus of frequency synthesis | |
JP2011040943A (en) | Phase-locked loop circuit | |
US20170310328A1 (en) | Signal generation circuit and signal generation method | |
CN103873054A (en) | Clock generator | |
JP2017143398A (en) | PLL circuit and electronic circuit | |
US8130048B2 (en) | Local oscillator | |
JP4593669B2 (en) | Variation correction method, PLL circuit, and semiconductor integrated circuit | |
US8373511B2 (en) | Oscillator circuit and method for gain and phase noise control | |
JP2014110491A (en) | Clock recovery circuit, light-receiving circuit, light-coupling device, and frequency synthesizer | |
TW201304422A (en) | Phase lock loop appararus and tuning voltage providing circuit thereof | |
TWI502897B (en) | Voltage controlled oscillator and phase locked loop | |
US9800250B2 (en) | Digitally controlled oscillator and electronic device including the same | |
JP5338148B2 (en) | Semiconductor integrated circuit, temperature change detection method | |
CN109799868B (en) | Error compensation method for phase difference value device of digital frequency generator | |
CN102801416B (en) | Phase lock loop circuit | |
US8373465B1 (en) | Electronic device and method for phase locked loop | |
JP3854908B2 (en) | Digital VCO and PLL circuit using the digital VCO | |
JP2012142814A (en) | Pll circuit | |
US9831766B2 (en) | Charge pump and associated phase-locked loop and clock and data recovery | |
JP2007295027A (en) | Spread spectrum clock generator | |
JP2013016995A (en) | Pll circuit | |
KR102316443B1 (en) | Delay locked circuit and method of controlling delay range for delay locked loop | |
KR101656759B1 (en) | Apparatus for frequency multiplier based on injection locking possible frequency fine controlling and method for driving the same |