TW201426859A - High aspect ratio micro-structure etching method using changeable power generator - Google Patents

High aspect ratio micro-structure etching method using changeable power generator Download PDF

Info

Publication number
TW201426859A
TW201426859A TW102140583A TW102140583A TW201426859A TW 201426859 A TW201426859 A TW 201426859A TW 102140583 A TW102140583 A TW 102140583A TW 102140583 A TW102140583 A TW 102140583A TW 201426859 A TW201426859 A TW 201426859A
Authority
TW
Taiwan
Prior art keywords
low
power
frequency signal
aspect ratio
layer
Prior art date
Application number
TW102140583A
Other languages
Chinese (zh)
Other versions
TWI534888B (en
Inventor
Tuqiang Ni
zi-yang Wu
Byung-Sool Moon
Original Assignee
Advanced Micro Fab Equip Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Fab Equip Inc filed Critical Advanced Micro Fab Equip Inc
Publication of TW201426859A publication Critical patent/TW201426859A/en
Application granted granted Critical
Publication of TWI534888B publication Critical patent/TWI534888B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The present invention discloses a high aspect ratio micro-structure etching method using changeable power generator. The high aspect ratio micro-structure etching method comprises the following steps: inputting a low-power low-frequency signal to stimulate plasma for performing a high aspect ratio micro-structure etching on the hard mask layer and amorphous carbon layer or organic mask layer of a wafer; changing the low power low-frequency signal input to a high power low-frequency signal input; using the high power low-frequency signal to stimulate plasma for performing a high aspect ratio micro-structure etching on the silica layer of the wafer. The present invention can be changed to high frequency power input or low frequency power output based on the requirement in order to avoid issues such as differences or repetitions from using high-frequency power generator to output low-frequency power. The present invention realizes a precise adjustment of power output for enhancing the yield rate and reducing the manufacturing cost.

Description

利用可切換功率發生器的高深寬比微結構刻蝕方法 High aspect ratio microstructure etching method using switchable power generator

本發明係關於一種半導體製備工藝的反應離子刻蝕工藝,具體關於一種利用可切換功率發生器的高深寬比微結構刻蝕方法。 The present invention relates to a reactive ion etching process for a semiconductor fabrication process, and more particularly to a high aspect ratio microstructure etching method using a switchable power generator.

高深寬比(HAR)結構在半導體製造,特別在電極反應中是非常常見的。經常在類似於小於50納米(nm)的極小特徵尺寸(CD,critical dimension)的情況下具有深寬比大於10:1的結構。特徵尺寸(CD)的縮小對光刻來說造成了巨大的困難。 High aspect ratio (HAR) structures are very common in semiconductor fabrication, particularly in electrode reactions. A structure having an aspect ratio greater than 10:1 is often used with a critical dimension (CD) similar to less than 50 nanometers (nm). The reduction in feature size (CD) poses great difficulties for lithography.

如圖1所示,進行高深寬比(HAR)結構刻蝕工藝時,半導體器件的結構包含設置在頂層的光刻膠層和底部抗反射層1’(photoresist layer and Arc layer)製造在光刻膠層和底部抗反射層1’下的硬掩膜層2’(hard mask layer),製造在硬掩膜2’下的不定型碳層或有機掩膜層3’(Carbon layer or organic mask layer),以及位於底層的二氧化矽層4’(SiO2 layer)。 As shown in FIG. 1, when a high aspect ratio (HAR) structure etching process is performed, the structure of the semiconductor device includes a photoresist layer and a bottom anti-reflective layer 1' (photoresist layer and Arc layer) disposed on the top layer. a hard mask layer under the adhesive layer and the bottom anti-reflective layer 1', and an amorphous carbon layer or organic mask layer 3' under the hard mask 2' (Carbon layer or organic mask layer) ), and the SiO2 layer located on the bottom layer.

為了光刻的精密度考慮,通常光刻膠層1’設置得很薄,然而這樣就導致光刻膠層1’不足以在進行深矽氧化刻蝕(deep silicon oxide etch)工藝中起到保護作用。所以就會在光刻膠層1’下沉積硬掩膜層2’(hard mask layer)和一個有機掩膜層3’(organic layer),作為在矽氧化刻蝕工藝中實際起作用的掩膜,通常硬掩膜層2’採用底部抗反射層(Barc layer)/介質抗反射層(Darc layer),而有機掩膜層3’採用富不定型碳層(C-rich layer)。不定型碳層的厚度通常超過150納米,有助於改善上述 深矽氧化刻蝕的刻蝕側壁形貌。 In order to consider the precision of photolithography, the photoresist layer 1' is usually thinly set, but this causes the photoresist layer 1' to be insufficient for protection in a deep silicon oxide etch process. effect. Therefore, a hard mask layer 2' and an organic mask layer 3' are deposited under the photoresist layer 1' as a mask which actually acts in the germanium oxide etching process. Typically, the hard mask layer 2' employs a bottom anti-reflective layer (Barc layer) / dielectric anti-reflective layer (Darc layer), while the organic mask layer 3' employs a C-rich layer. The thickness of the amorphous carbon layer usually exceeds 150 nm, which helps to improve the above. The etched sidewall morphology of the deep oxidized etch.

由於頂部的掩膜層較薄,通常採用低功率進行刻蝕,用小於1500W的高頻信號功率和小於500W的低頻信號功率進行刻蝕。而二氧化矽層刻蝕深度較深且材質較硬,通常採用高功率進行刻蝕,用1000-3000W的高頻信號功率和2500-6000W的低頻信號功率進行刻蝕。在多數的反應離子刻蝕(RIE,Reactive Ion Etching)系統中,都需要供應高頻功率輸出和低頻功率輸出。高頻信號功率也稱為源功率,利用于分子的解離,高頻信號功率的輸出頻率範圍為30兆赫茲到120兆赫茲。低頻信號功率也稱為偏置功率,用於控制離子轟擊,有助於各向異性刻蝕,低頻信號功率的輸出頻率範圍為0.2兆赫茲到15兆赫茲。高深寬比結構刻蝕工藝中通常對低頻信號功率輸出具有更高的要求。功率非常低的偏置功率(功率低於200W)適合應用於硬掩膜和不定型碳層穿孔刻蝕的步驟。而在硬掩膜和不定型碳層穿孔刻蝕中,若採用功率較高的偏置功率,則會造成刻蝕形貌損傷或特徵尺寸偏移(CD shift)的問題。高偏置功率(有時會大於5000W)適用於深氧化矽刻蝕工藝,因為在高深寬比連線孔的刻蝕(HAR contact etching)中離子轟擊是非常有幫助的。因此,大額定功率的低頻信號發生器,例如額定輸出功率為5000W或者7000W的低頻信號發生器,經常安裝在用於刻蝕高深寬比結構的刻蝕反應腔上。 Since the top mask layer is thin, etching is usually performed with low power, and etching is performed with a high frequency signal power of less than 1500 W and a low frequency signal power of less than 500 W. The cerium oxide layer has a deep etching depth and a hard material, and is usually etched with high power, and is etched with a high frequency signal power of 1000-3000 W and a low frequency signal power of 2500-6000 W. In most Reactive Ion Etching (RIE) systems, high frequency power output and low frequency power output are required. High-frequency signal power, also known as source power, is utilized for molecular dissociation, and the output frequency of high-frequency signal power ranges from 30 megahertz to 120 megahertz. Low-frequency signal power, also known as bias power, is used to control ion bombardment and contributes to anisotropic etching. The output frequency of low-frequency signal power ranges from 0.2 MHz to 15 MHz. High aspect ratio structure etching processes generally have higher requirements for low frequency signal power output. The very low power bias power (power below 200W) is suitable for the hard mask and amorphous carbon layer perforation etching steps. In hard mask and amorphous carbon layer perforation etching, if a higher power bias power is used, the problem of etched surface damage or CD shift may occur. High bias power (sometimes greater than 5000W) is suitable for deep ruthenium etch processes because ion bombardment is very helpful in high aspect ratio HAR contact etching. Therefore, a low-power signal generator with a large rated power, such as a low-frequency signal generator with a rated output of 5000 W or 7000 W, is often mounted on an etching reaction chamber for etching a high aspect ratio structure.

若單獨使用大額定輸出功率的低頻信號發生器,雖然該發生器的功率輸出範圍涵蓋了低功率輸出和高功率輸出,但當大額定輸出功率的低頻信號發生器輸出低功率時,該發生器通常無法精確地控制微小功率輸出,從而影響刻蝕效果和設備穩定。現有技術中常採用一個額定輸出功率大於5000W的低頻功率發生器,但當該低頻功率發生器輸出約200W的低功率的低頻信號時會產生誤差較大、重複性差的問題。 If the low-frequency signal generator with large rated output power is used alone, although the power output range of the generator covers low power output and high power output, when the low-frequency signal generator with large rated output power outputs low power, the generator It is often impossible to precisely control the tiny power output, which affects the etching effect and equipment stability. A low-frequency power generator with a rated output power greater than 5000 W is often used in the prior art, but when the low-frequency power generator outputs a low-power low-frequency signal of about 200 W, a problem of large error and poor repeatability occurs.

例如,當一個7000W的低頻功率發生器輸出200W的功率時,可能會產生正負35W的誤差(tolerance)。如果該7000W的低頻功率發生器用在硬掩膜刻蝕步驟中,一個35W的偏差可能會導致特徵尺寸偏移,以及工藝的不穩定。上述因素導致了現有高深寬比結構刻蝕工藝生成中較高的不穩定性。同時對於設備製造商提供更精確的功率輸出提出了更高的要求,提高了工藝難度。 For example, when a 7000W low frequency power generator outputs 200W of power, a positive or negative 35W tolerance may be generated. If the 7000W low frequency power generator is used in the hard mask etch step, a 35W deviation may result in feature size shifts and process instability. The above factors lead to higher instability in the formation of existing high aspect ratio structure etching processes. At the same time, it provides higher requirements for equipment manufacturers to provide more accurate power output, which increases the difficulty of the process.

本發明提供一種利用可切換功率發生器的高深寬比微結構刻蝕方法,便於在高深寬比微結構刻蝕過程中,高頻功率和低頻功率輸出都實現精確控制提高刻蝕工藝的穩定性。 The invention provides a high aspect ratio microstructure etching method using a switchable power generator, which facilitates precise control of high frequency power and low frequency power output during high aspect ratio microstructure etching process to improve stability of etching process. .

為實現上述目的,本發明提供一種利用可切換功率發生器的高深寬比微結構刻蝕方法,該微結構刻蝕方法所適用的等離子體刻蝕腔室包含:腔室,該腔室內分佈有等離子體;上電極,其設置於腔室內的頂部;下電極,其設置於腔室內的底部;該下電極上放置被刻蝕的晶圓;高頻信號源,其輸出高頻信號至下電極;高功率低頻信號源與低功率低頻信號源,該高功率低頻信號源與該低功率低頻信號源可切換地輸出高功率低頻信號或低功率低頻信號至下電極;上述晶圓包含有光刻膠層、設置在光刻膠層下的硬掩膜層、設置在硬掩膜層下的不定型碳層或有機掩膜層,和設置在不定型碳層或有機掩膜層下的二氧化矽層;其特點是,上述微結構刻蝕方法包含以下步驟;步驟1、輸入低功率低頻信號激發等離子體,對晶圓上硬掩膜層,以及不定型碳層或有機掩膜層進行高深寬比微結構刻 蝕;步驟1.1、低功率低頻信號源輸出低功率低頻信號至下電極激發等離子體;步驟1.2、對晶圓的硬掩膜層進行高深寬比微結構刻蝕;步驟1.3、對晶圓的不定型碳層或有機掩膜層進行高深寬比微結構刻蝕;步驟2、將低功率低頻信號輸入切換為高功率低頻信號輸入;步驟3、高功率低頻信號激發等離子體,對晶圓的二氧化矽層進行高深寬比微結構刻蝕。 To achieve the above object, the present invention provides a high aspect ratio microstructure etching method using a switchable power generator. The plasma etching chamber to which the microstructure etching method is applied includes a chamber in which a chamber is distributed. a plasma; an upper electrode disposed at a top of the chamber; a lower electrode disposed at a bottom of the chamber; an etched wafer placed on the lower electrode; a high frequency signal source that outputs a high frequency signal to the lower electrode a high-power low-frequency signal source and a low-power low-frequency signal source, the high-power low-frequency signal source and the low-power low-frequency signal source switchably output a high-power low-frequency signal or a low-power low-frequency signal to a lower electrode; the wafer includes lithography a glue layer, a hard mask layer disposed under the photoresist layer, an amorphous carbon layer or an organic mask layer disposed under the hard mask layer, and a dioxide disposed under the amorphous carbon layer or the organic mask layer The ruthenium layer is characterized in that the above-mentioned microstructure etch method comprises the following steps; Step 1. Input low-power low-frequency signal to excite plasma, on-wafer hard mask layer, and amorphous carbon layer or organic mask layer High aspect ratio microstructure Eclipse; step 1.1, low-power low-frequency signal source outputs low-power low-frequency signal to the lower electrode to excite the plasma; step 1.2, high-aspect ratio microstructure etching of the hard mask layer of the wafer; step 1.3, not for the wafer The shaped carbon layer or the organic mask layer is subjected to high aspect ratio microstructure etching; in step 2, the low power low frequency signal input is switched to the high power low frequency signal input; step 3, the high power low frequency signal is excited to the plasma, and the wafer is The yttrium oxide layer is subjected to high aspect ratio microstructure etching.

上述的步驟1中,低功率低頻信號的功率輸出小於1000瓦。 In the above step 1, the power output of the low power low frequency signal is less than 1000 watts.

上述步驟1中,對硬掩膜層,以及不定型碳層或有機掩膜層進行刻蝕時,刻蝕氣體採用CF4、CHF3、CH2F2、O2、N2氣體。 In the above step 1, when the hard mask layer, and the amorphous carbon layer or the organic mask layer are etched, the etching gas is CF 4 , CHF 3 , CH 2 F 2 , O 2 , N 2 gas.

上述步驟1中刻蝕氣體的壓強為30至100mT。 The pressure of the etching gas in the above step 1 is 30 to 100 mT.

上述的步驟3中,高功率低頻信號的功率輸出大於3000瓦。 In the above step 3, the power output of the high power low frequency signal is greater than 3000 watts.

上述步驟3中,二氧化矽層刻蝕時,刻蝕氣體採用CF4、C4F8、F4F6、CH2F2、Ar、O2氣體。 In the above step 3, when the ceria layer is etched, the etching gas is CF 4 , C 4 F 8 , F 4 F 6 , CH 2 F 2 , Ar, O 2 gas.

上述步驟3中刻蝕氣體的壓強為10至50mT。 The pressure of the etching gas in the above step 3 is 10 to 50 mT.

上述的步驟3之後還包含以下步驟:對晶圓進行後續工藝處理,完成後續工藝處理後關閉高功率低頻信號源。 After the above step 3, the following steps are further included: performing subsequent processing on the wafer, and turning off the high-power low-frequency signal source after completing the subsequent processing.

上述的晶圓中,光刻膠層處還可以設有底部抗反射層或介質抗反射層。 In the above wafer, a bottom anti-reflection layer or a dielectric anti-reflection layer may also be disposed at the photoresist layer.

本發明利用可切換功率發生器的高深寬比微結構刻蝕方法和現有技術的高深寬比微結構刻蝕技術相比,其優點在於,本發明採用可切換的高頻功率輸出和低頻功率輸出,在需要 高頻功率時採用高頻功率輸出對晶圓進行刻蝕,在需要低頻功率時採用低頻功率輸出對晶圓進行刻蝕,避免了採用高平功率發生器輸出低頻功率輸出時造成的誤差較大、重複性差的問題;實現功率輸出的精確調節,提高產品合格率,降低成本。 The present invention utilizes a high aspect ratio microstructure etch method of a switchable power generator compared to prior art high aspect ratio microstructure etch techniques, which has the advantage that the present invention employs switchable high frequency power output and low frequency power output. In need High-frequency power is used to etch the wafer with high-frequency power output. When low-frequency power is required, the low-frequency power output is used to etch the wafer, which avoids the error caused by the high-level power generator output low-frequency power output. The problem of poor repeatability; achieving precise adjustment of power output, improving product qualification rate and reducing cost.

1‧‧‧腔室 1‧‧‧ chamber

2‧‧‧上電極 2‧‧‧Upper electrode

3‧‧‧下電極 3‧‧‧ lower electrode

4‧‧‧晶圓 4‧‧‧ Wafer

41‧‧‧光刻膠層 41‧‧‧Photoresist layer

42‧‧‧硬掩膜層 42‧‧‧hard mask layer

43‧‧‧不定型碳層或有機掩膜層 43‧‧‧Indeterminate carbon or organic mask

44‧‧‧二氧化矽層 44‧‧‧ cerium oxide layer

5‧‧‧等離子體 5‧‧‧ Plasma

6‧‧‧低額定功率的低頻信號發生器 6‧‧‧Low-rated low-frequency signal generator

7‧‧‧高額定功率的低頻信號發生器 7‧‧‧High-rated low-frequency signal generator

8‧‧‧切換裝置 8‧‧‧Switching device

1’‧‧‧光刻膠層和底部抗反射層 1'‧‧‧Photoresist layer and bottom anti-reflective layer

2’‧‧‧硬掩膜層 2'‧‧‧ Hard mask layer

3’‧‧‧不定型碳層或有機掩膜層 3'‧‧‧Indeterminate carbon or organic mask

4’‧‧‧二氧化矽層 4'‧‧‧2 bismuth oxide layer

圖1為先前技術在準備進行高深寬比微結構刻蝕工藝時晶圓的結構示意圖;圖2為本發明利用可切換功率發生器的高深寬比微結構刻蝕方法所適用的等離子體刻蝕腔室的實施例一的結構示意圖;圖3為本發明利用可切換功率發生器的高深寬比微結構刻蝕方法的方法流程圖;圖4為本發明利用可切換功率發生器的高深寬比微結構刻蝕方法過程中進行掩膜刻蝕工藝時的晶圓結構示意圖;圖5為本發明利用可切換功率發生器的高深寬比微結構刻蝕方法過程中進行二氧化矽刻蝕工藝時的晶圓結構示意圖。 1 is a schematic view showing the structure of a wafer when a high aspect ratio microstructure etching process is prepared in the prior art; and FIG. 2 is a plasma etching method applicable to a high aspect ratio microstructure etching method using a switchable power generator. FIG. 3 is a schematic diagram of a method for a high aspect ratio microstructure etching method using a switchable power generator according to the present invention; FIG. 4 is a high aspect ratio of the present invention using a switchable power generator. Schematic diagram of the wafer structure during the mask etching process in the process of the microstructure etching method; FIG. 5 is a process of performing the cerium oxide etching process in the process of the high aspect ratio microstructure etching method using the switchable power generator Schematic diagram of the wafer structure.

以下結合附圖,進一步說明本發明的具體實施例。 Specific embodiments of the present invention are further described below in conjunction with the accompanying drawings.

本發明公開一種利用可切換功率發生器的高深寬比微結構刻蝕方法,適用於口徑為28納米或40納米、深度為300納米到1000納米的高深寬比微結構刻蝕工藝。 The invention discloses a high aspect ratio microstructure etching method using a switchable power generator, and is suitable for a high aspect ratio microstructure etching process with a diameter of 28 nm or 40 nm and a depth of 300 nm to 1000 nm.

如圖2所示,本發明利用可切換功率發生器的高深寬比微結構刻蝕方法所適用的一種等離子體刻蝕腔室的實施例一,該刻蝕腔室可進行反應離子刻蝕(RIE),用於對晶圓4進行高深寬比微結構刻蝕處理,該刻蝕腔室包含:腔室1、上電極2、下電極3、低額定功率的低頻信號發生器6、高額定功率的低頻信號發生器7、高頻信號發生器(圖中未標示)和切換裝置8。 As shown in FIG. 2, the present invention utilizes a plasma etching chamber to which a high aspect ratio microstructure etching method of a switchable power generator is applied, which can perform reactive ion etching ( RIE) for performing high aspect ratio microstructure etching on wafer 4, the etching chamber includes: chamber 1, upper electrode 2, lower electrode 3, low rated power low frequency signal generator 6, high rated A low frequency signal generator 7 for power, a high frequency signal generator (not shown) and a switching device 8.

腔室1包含有反應腔的外壁,形成一個密閉的反應腔室。 The chamber 1 contains an outer wall of the reaction chamber to form a closed reaction chamber.

等離子體5密封分佈於腔室1內,作為晶圓4的刻蝕氣體。 The plasma 5 is sealed and distributed in the chamber 1 as an etching gas for the wafer 4.

上電極2設置於腔室1內的頂部,該上電極2接地。 The upper electrode 2 is disposed at the top inside the chamber 1, and the upper electrode 2 is grounded.

下電極3設置於腔室1內的底部,該下電極3連接功率輸入,需要被刻蝕的晶圓4可通過靜電卡盤(圖中未標示)固定在下電極3上方,下電極3通過功率輸入激發等離子體5對晶圓4進行刻蝕。 The lower electrode 3 is disposed at the bottom of the chamber 1, and the lower electrode 3 is connected to the power input. The wafer 4 to be etched can be fixed above the lower electrode 3 through an electrostatic chuck (not shown), and the lower electrode 3 passes the power. The wafer 4 is etched by inputting the excitation plasma 5.

高頻信號發生器連接至下電極3,用於向腔室1輸出高頻功率信號,對腔室1內的等離子體5進行激發和分子解離。高頻信號發生器輸出功率通常採用1000W-5000W。 The high frequency signal generator is connected to the lower electrode 3 for outputting a high frequency power signal to the chamber 1 to excite and detach the plasma 5 in the chamber 1. The output power of the high-frequency signal generator is usually 1000W-5000W.

低額定功率的低頻信號發生器6可輸出功率小於1000瓦的低頻功率信號,較佳的可以為200瓦。該低額定功率的低頻信號發生器6用於輸出低功率的低頻信號至下電極3,當低額定功率的低頻信號發生器6與下電極3連接時,等離子體刻蝕腔室即採用低功率的低頻信號控制等離子體5轟擊並刻蝕晶圓4。 The low rated power low frequency signal generator 6 can output a low frequency power signal having a power of less than 1000 watts, preferably 200 watts. The low-rated low-frequency signal generator 6 is for outputting a low-power low-frequency signal to the lower electrode 3. When the low-rated low-frequency signal generator 6 is connected to the lower electrode 3, the plasma etching chamber uses low power. The low frequency signal controls the plasma 5 to bombard and etch the wafer 4.

高額定功率的低頻信號發生器7可輸出大於3000瓦的高頻功率信號,較佳的可以取5000瓦、7000瓦。該高額定功率的低頻信號發生器7用於輸出高功率的低頻信號至下電極3,當高額定功率的低頻信號發生器7與下電極3連接時,等離子體刻蝕腔室即採用高功率的低頻信號控制等離子體5轟擊並刻蝕晶圓4。 The high-rated low-frequency signal generator 7 can output a high-frequency power signal of more than 3000 watts, preferably 5,000 watts or 7,000 watts. The high-rated low-frequency signal generator 7 is for outputting a high-power low-frequency signal to the lower electrode 3. When the high-rated low-frequency signal generator 7 is connected to the lower electrode 3, the plasma etching chamber uses high power. The low frequency signal controls the plasma 5 to bombard and etch the wafer 4.

切換裝置8一端與下電極3電路連接,另一端與低額定功率的低頻信號發生器6、高額定功率的低頻信號發生器7切換連接,用於控制輸入下電極3的功率信號在低功率的低頻信號與高功率的低頻信號之間切換。該切換裝置8可以通過外接的 控制模組接收切換控制指令,或者直接採用手動控制,在低額定功率的低頻信號發生器6與高額定功率的低頻信號發生器7之間切換連接,實現下電極3在與低額定功率的低頻信號發生器6連接或與高額定功率的低頻信號發生器7連接之間切換。當下電極3通過切換裝置8與低額定功率的低頻信號發生器6建立連接時,則下電極3接收由低額定功率的低頻信號發生器6輸出的低功率低頻信號,並採用低功率低頻信號激發等離子體5刻蝕晶圓4。當下電極3通過切換裝置8與高額定功率的低頻信號發生器7建立連接時,則下電極3接收高額定功率的低頻信號發生器7輸出的高功率低頻信號,並採用高功率低頻信號激發等離子體5刻蝕晶圓4。 One end of the switching device 8 is electrically connected to the lower electrode 3, and the other end is switched and connected with a low-frequency signal generator 6 of low power rating and a low-frequency signal generator 7 of high power rating for controlling the power signal input to the lower electrode 3 at low power. Switch between low frequency signals and high power low frequency signals. The switching device 8 can be externally connected The control module receives the switching control command, or directly adopts manual control, and switches between the low-rated power low-frequency signal generator 6 and the high-rated low-frequency signal generator 7, so that the lower electrode 3 is at a low frequency with low rated power. The signal generator 6 is switched or switched between a connection with a high-rated low-frequency signal generator 7. When the lower electrode 3 is connected to the low-rated power low-frequency signal generator 6 through the switching device 8, the lower electrode 3 receives the low-power low-frequency signal output by the low-rated low-frequency signal generator 6, and is excited by the low-power low-frequency signal. The plasma 5 etches the wafer 4. When the lower electrode 3 is connected to the high-rated low-frequency signal generator 7 through the switching device 8, the lower electrode 3 receives the high-power low-frequency signal output from the high-rated low-frequency signal generator 7, and uses the high-power low-frequency signal to excite the plasma. Body 5 etches wafer 4.

本發明還公開了一種適用于利用可切換功率發生器的高深寬比微結構刻蝕方法的等離子體刻蝕腔室的實施例二,該刻蝕系統包含:腔室、上電極、下電極、高頻功率發生器和一種可切換輸出功率的低頻功率發生器。 The invention also discloses a second embodiment of a plasma etching chamber suitable for a high aspect ratio microstructure etching method using a switchable power generator, the etching system comprising: a chamber, an upper electrode, a lower electrode, A high frequency power generator and a low frequency power generator that can switch output power.

腔室包含有反應腔的外壁,形成一個密閉的反應腔室。 The chamber contains an outer wall of the reaction chamber to form a closed reaction chamber.

等離子體密封分佈於腔室內,作為晶圓的刻蝕氣體。 The plasma seal is distributed in the chamber as an etching gas for the wafer.

上電極設置於腔室內的頂部,該上電極接地。 The upper electrode is disposed at the top of the chamber, and the upper electrode is grounded.

下電極設置於腔室內的底部,該下電極連接功率輸入,需要被刻蝕的晶圓可通過靜電卡盤固定在下電極上方,下電極通過功率輸入激發等離子體對晶圓進行刻蝕。 The lower electrode is disposed at the bottom of the chamber, and the lower electrode is connected to the power input. The wafer to be etched can be fixed on the lower electrode through the electrostatic chuck, and the lower electrode etches the wafer by the power input excitation plasma.

高頻信號發生器連接至下電極,用於向腔室輸出高頻功率信號,對腔室內的等離子體進行激發和分子解離。高頻信號發生器輸出功率通常採用1000W-5000W。 A high frequency signal generator is coupled to the lower electrode for outputting a high frequency power signal to the chamber for excitation and molecular dissociation of the plasma within the chamber. The output power of the high-frequency signal generator is usually 1000W-5000W.

上述可切換輸出功率的低頻功率發生器的輸出端與下電極電路連接,用於可切換地向下電極輸出高功率低頻信號 或低功率低頻信號。該功率發生器可切換地輸出功率小於1000瓦的低頻功率或功率大於3000瓦的低頻功率。較佳的,低功率低頻信號輸出可採用200瓦。較佳的,高功率低頻信號輸出可採用5000瓦、7000瓦。 The output end of the low-frequency power generator capable of switching the output power is connected to the lower electrode circuit for outputting the high-power low-frequency signal to the lower electrode switchably Or low power low frequency signals. The power generator can switchably output low frequency power with a power of less than 1000 watts or low frequency power with a power greater than 3000 watts. Preferably, the low power low frequency signal output can be 200 watts. Preferably, the high power low frequency signal output can be 5000 watts or 7000 watts.

該可切換輸出功率的功率發生器可以通過外接的控制模組接收切換控制指令,或者直接採用手動控制,在低功率低頻信號輸出與高功率低頻信號輸出之間切換,實現可切換地向下電極輸入低功率低頻信號或高功率低頻信號。該功率發生器根據等離子體刻蝕腔室進行高深寬比微結構刻蝕工藝的具體要求,切換輸出低功率低頻信號輸出或高功率低頻信號輸出,由下電極以低功率低頻信號或高功率低頻信號激發等離子體刻蝕晶圓。 The power generator capable of switching output power can receive a switching control command through an external control module, or directly adopt manual control to switch between a low-power low-frequency signal output and a high-power low-frequency signal output, thereby realizing a switchable downward electrode Input low power low frequency signals or high power low frequency signals. The power generator performs specific requirements of a high aspect ratio microstructure etching process according to a plasma etching chamber, and switches output low-power low-frequency signal output or high-power low-frequency signal output, and low-power low-frequency signal or high-power low-frequency from the lower electrode. The signal excites the plasma to etch the wafer.

如圖3所示,本發明公開一種利用可切換功率發生器的高深寬比微結構刻蝕方法,該方法可適用於上述等離子體刻蝕(RIE)腔室的實施例一和實施例二中的任意一種。 As shown in FIG. 3, the present invention discloses a high aspect ratio microstructure etching method using a switchable power generator, which is applicable to the first and second embodiments of the plasma etching (RIE) chamber. Any of them.

該高深寬比微結構刻蝕方法包含以下步驟:在進行刻蝕之前,先將晶圓4放置在腔室1內的下電極3處,並通過靜電卡盤將晶圓4固定。 The high aspect ratio microstructure etching method includes the steps of placing the wafer 4 at the lower electrode 3 in the chamber 1 and fixing the wafer 4 through an electrostatic chuck before etching.

高頻信號發生器輸出高頻功率至下電極3,激發腔室1內的等離子體5分子解離。高頻信號發生器輸出功率不做限制,通常採用1000W-5000W。 The high frequency signal generator outputs high frequency power to the lower electrode 3, and the plasma 5 molecules in the excitation chamber 1 are dissociated. The output power of the high-frequency signal generator is not limited, and it is usually 1000W-5000W.

步驟1、如圖4所示,採用低功率低頻信號,對晶圓4上硬掩膜層42,以及不定型碳層或有機掩膜層43進行刻蝕。 Step 1. As shown in FIG. 4, the hard mask layer 42 on the wafer 4, and the amorphous carbon layer or the organic mask layer 43 are etched using a low power low frequency signal.

晶圓4的頂層設有光刻膠層41,該光刻膠層41處還可以設有底部抗反射層(Bare layer)或介質抗反射層(Darc layer),在光刻膠層41下生成有硬掩膜層42,在硬掩膜層42下生成有不定型碳層或有機掩膜層43,在不定型碳層或有機掩膜層43下即為二氧化矽層44。在步驟1採用低功率低頻信號刻蝕 晶圓掩膜層的工藝步驟中,根據光刻膠層41的設定的規則,在硬掩膜層42、不定型碳層或有機掩膜層43上進行了高深寬比(HAR)微結構刻蝕。在對硬掩膜層42、不定型碳層或有機掩膜層43進行刻蝕時,等離子體5可採用如30-100mT的壓強下,CF4,CHF3,CH2F2,O2,N2等反應氣體。 The top layer of the wafer 4 is provided with a photoresist layer 41. The photoresist layer 41 may further be provided with a bottom anti-reflection layer (Bare layer) or a dielectric anti-reflection layer (Darc layer), which is generated under the photoresist layer 41. There is a hard mask layer 42, an amorphous carbon layer or an organic mask layer 43 is formed under the hard mask layer 42, and the ceria layer 44 is formed under the amorphous carbon layer or the organic mask layer 43. Low-power low-frequency signal etching in step 1 In the process step of the wafer mask layer, a high aspect ratio (HAR) microstructure is performed on the hard mask layer 42, the amorphous carbon layer or the organic mask layer 43 according to the rules of the photoresist layer 41 setting. eclipse. When the hard mask layer 42, the amorphous carbon layer or the organic mask layer 43 is etched, the plasma 5 may be a reaction gas such as CF4, CHF3, CH2F2, O2, N2 or the like at a pressure of 30-100 mT.

步驟1.1、低額定功率的低頻信號發生器啟動,輸出低功率低頻信號至下電極3,激發等離子體5轟擊晶圓4。其中低額定功率的低頻信號發生器輸出功率為小於1000瓦,其輸出的低功率低頻信號的功率較佳的可採用小於500瓦,低功率低頻信號輸出更佳的可採用200瓦。 Step 1.1: A low-rated power low-frequency signal generator is activated to output a low-power low-frequency signal to the lower electrode 3, and the excitation plasma 5 bombards the wafer 4. The low-power signal generator with low power rating has an output power of less than 1000 watts, and the power of the low-power low-frequency signal output is preferably less than 500 watts, and the low-power low-frequency signal output is preferably 200 watts.

步驟1.2、等離子體刻蝕腔室對晶圓4的硬掩膜層42進行高深寬比微結構刻蝕。 Step 1.2: The plasma etching chamber performs high aspect ratio microstructure etching on the hard mask layer 42 of the wafer 4.

步驟1.3、等離子體刻蝕腔室對晶圓4的不定型碳層或有機掩膜層43進行高深寬比微結構刻蝕。 Step 1.3: The plasma etching chamber performs high aspect ratio microstructure etching on the amorphous carbon layer or the organic mask layer 43 of the wafer 4.

步驟2、低頻功率輸出切換,低額定功率的低頻信號發生器6關閉,高額定功率的低頻信號發生器7打開,使下電極3連接的低頻輸入由低額定功率發生器切換至高額定功率發生器。 Step 2, low-frequency power output switching, low-rated power low-frequency signal generator 6 is turned off, high-rated low-frequency signal generator 7 is turned on, so that low-frequency input connected to lower electrode 3 is switched from low-rated power generator to high-rated power generator .

其中,高額定功率的低頻信號發生器7的輸出功率為2500-7000瓦,輸出的高功率低頻信號的功率較佳的可採用大於3000瓦,更佳的可採用5000瓦、7000瓦。 Among them, the output power of the high-rated low-frequency signal generator 7 is 2500-7000 watts, and the power of the output high-power low-frequency signal can preferably be more than 3000 watts, and more preferably 5000 watts or 7000 watts.

步驟3、如圖5所示,高額定功率的低頻信號輸出至下電極3,激發等離子體5轟擊晶圓4,根據光刻膠層41設定的規則對晶圓4的二氧化矽層44進行高深寬比(HAR)微結構刻蝕。在對二氧化矽層44繼續擰刻蝕時,等離子體5可採用如10-50mT的壓強下,CF4、C4F8、F4F6、CH2F2、Ar、O2等反應氣體。 Step 3, as shown in FIG. 5, the low-frequency signal of high power rating is output to the lower electrode 3, the plasma 5 is excited to bombard the wafer 4, and the ceria layer 44 of the wafer 4 is subjected to the rules set by the photoresist layer 41. High aspect ratio (HAR) microstructure etch. When the ruthenium dioxide layer 44 is continuously etched, the plasma 5 can be reacted at a pressure of, for example, 10-50 mT, CF 4 , C 4 F 8 , F 4 F 6 , CH 2 F 2 , Ar, O 2 , etc. gas.

步驟4、完成上述步驟1至步驟3的高深寬比微結 構刻蝕後,對晶圓進行後續工藝處理。 Step 4, completing the high aspect ratio micro-junction of the above steps 1 to 3 After the etching, the wafer is subjected to subsequent processing.

步驟5、完成後續工藝處理後,關閉高額定功率的低頻信號發生器和高頻信號發生器,停止高頻信號以及高功率低頻信號輸出。 Step 5: After completing the subsequent process, the low-frequency signal generator and the high-frequency signal generator of high rated power are turned off, and the high-frequency signal and the high-power low-frequency signal output are stopped.

步驟6、工藝結束,靜電卡盤鬆開晶圓4,晶圓4退出等離子體刻蝕腔室。 Step 6. At the end of the process, the electrostatic chuck releases the wafer 4, and the wafer 4 exits the plasma etching chamber.

儘管本發明的內容已經通過上述較佳實施例作了詳細介紹,但應當認識到上述的描述不應被認為是對本發明的限制。在本領域技術人員閱讀了上述內容後,對於本發明的多種修改和替代都將是顯而易見的。因此,本發明的保護範圍應由所附的權利要求來限定。 Although the present invention has been described in detail by the preferred embodiments thereof, it should be understood that the foregoing description should not be construed as limiting. Various modifications and alterations of the present invention will be apparent to those skilled in the art. Therefore, the scope of the invention should be defined by the appended claims.

1‧‧‧腔室 1‧‧‧ chamber

2‧‧‧上電極 2‧‧‧Upper electrode

3‧‧‧下電極 3‧‧‧ lower electrode

Claims (10)

一種利用可切換功率發生器的高深寬比微結構刻蝕方法,該微結構刻蝕方法所適用的等離子體刻蝕腔室包含:一腔室(1),該腔室(1)內分佈有一等離子體(5);一上電極(2),其設置於所述該腔室(1)內的頂部;一下電極(3),其設置於所述該腔室(1)內的底部;該下電極(3)上放置被刻蝕的一晶圓(4);高頻信號源,其輸出高頻信號至所述該下電極(3);高功率低頻信號源與低功率低頻信號源,該高功率低頻信號源與該低功率低頻信號源可切換地輸出高功率低頻信號或低功率低頻信號至所述該下電極(3);所述該晶圓(4)包含有一光刻膠層、設置在該光刻膠層下的一硬掩膜層、設置在該硬掩膜層下的一不定型碳層或一有機掩膜層,和設置在所述該不定型碳層或有機掩膜層下的一二氧化矽層;其中該微結構刻蝕方法包含以下步驟:步驟1、輸入低功率低頻信號激發該等離子體(5),對該晶圓(4)上該硬掩膜層,以及該不定型碳層或該有機掩膜層進行高深寬比微結構刻蝕;步驟2、將低功率低頻信號輸入切換為高功率低頻信號輸入;步驟3、高功率低頻信號激發該等離子體(5),對該晶圓(4)的該二氧化矽層進行高深寬比微結構刻蝕。 A high aspect ratio microstructure etching method using a switchable power generator, the plasma etching chamber to which the microstructure etching method is applied includes: a chamber (1) having a distribution in the chamber (1) a plasma (5); an upper electrode (2) disposed at a top portion of the chamber (1); a lower electrode (3) disposed at a bottom portion of the chamber (1); An etched wafer (4) is placed on the lower electrode (3); a high frequency signal source that outputs a high frequency signal to the lower electrode (3); a high power low frequency signal source and a low power low frequency signal source, The high-power low-frequency signal source and the low-power low-frequency signal source switchably output a high-power low-frequency signal or a low-power low-frequency signal to the lower electrode (3); the wafer (4) includes a photoresist layer a hard mask layer disposed under the photoresist layer, an amorphous carbon layer or an organic mask layer disposed under the hard mask layer, and disposed on the amorphous carbon layer or organic mask a ruthenium dioxide layer under the film layer; wherein the microstructure etch method comprises the following steps: Step 1. Input a low-power low-frequency signal to excite the plasma Body (5), performing high aspect ratio microstructure etching on the hard mask layer on the wafer (4), and the amorphous carbon layer or the organic mask layer; and step 2, switching low power low frequency signals into input For high-power low-frequency signal input; step 3, the high-power low-frequency signal excites the plasma (5), and the high-aspect ratio microstructure etching of the ceria layer of the wafer (4). 如請求項1所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟1包含以下步驟:步驟1.1、低功率低頻信號源輸出低功率低頻信號至該下電極(3)激發該等離子體(5);步驟1.2、對該晶圓(4)的該硬掩膜層進行高深寬比微結構刻蝕;步驟1.3、對該晶圓(4)的該不定型碳層或該有機掩膜層進行高深寬比微結構刻蝕。 The high aspect ratio microstructure etching method using the switchable power generator according to claim 1, wherein the step 1 comprises the following steps: Step 1.1: The low power low frequency signal source outputs a low power low frequency signal to the lower electrode (3) Exciting the plasma (5); step 1.2, performing high aspect ratio microstructure etching on the hard mask layer of the wafer (4); step 1.3, the amorphous carbon layer on the wafer (4) or The organic mask layer is subjected to high aspect ratio microstructure etching. 如請求項1或2所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟1中,低功率低頻信號的功率輸出小於1000瓦。 A high aspect ratio microstructure etching method using a switchable power generator as claimed in claim 1 or 2, wherein in step 1, the power output of the low power low frequency signal is less than 1000 watts. 如請求項1或2所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟1中,對該硬掩膜層,以及該不定型碳層或該有機掩膜層進行刻蝕時,刻蝕氣體採用CF4、CHF3、CH2F2、O2、N2氣體。 A high aspect ratio microstructure etching method using a switchable power generator according to claim 1 or 2, wherein in step 1, the hard mask layer, and the amorphous carbon layer or the organic mask layer are subjected to When etching, the etching gas is CF 4 , CHF 3 , CH 2 F 2 , O 2 , N 2 gas. 如請求項4所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟1中刻蝕氣體的壓強為30至100mT。 A high aspect ratio microstructure etching method using a switchable power generator according to claim 4, wherein the pressure of the etching gas in the step 1 is 30 to 100 mT. 如請求項1所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟3中,高功率低頻信號的功率輸出大於3000瓦。 A high aspect ratio microstructure etching method using a switchable power generator as claimed in claim 1, wherein in step 3, the power output of the high power low frequency signal is greater than 3000 watts. 如請求項1所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟3中,該二氧化矽層刻蝕時,刻蝕氣體採用CF4、C4F8、F4F6、CH2F2、Ar、O2氣體。 The high aspect ratio microstructure etching method using the switchable power generator according to claim 1, wherein in the step 3, when the germanium dioxide layer is etched, the etching gas is CF 4 , C 4 F 8 , F 4 F 6 , CH 2 F 2 , Ar, O 2 gas. 如請求項7所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟3中刻蝕氣體的壓強為10至50mT。 A high aspect ratio microstructure etching method using a switchable power generator according to claim 7, wherein the pressure of the etching gas in the step 3 is 10 to 50 mT. 如請求項1所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中步驟3之後還包含以下步驟:對該晶圓(4)進行後續工藝處理,完成後續工藝處理後關閉高功率低頻信號源。 The high aspect ratio microstructure etching method using the switchable power generator according to claim 1, wherein the step 3 further comprises the following steps: performing subsequent processing on the wafer (4), and closing after completing the subsequent processing. High power low frequency signal source. 如請求項1所述的利用可切換功率發生器的高深寬比微結構刻蝕方法,其中該晶圓(4)中,該光刻膠層處還可以設有一底部抗反射層或一介質抗反射層。 The high aspect ratio microstructure etching method using the switchable power generator according to claim 1, wherein in the wafer (4), the photoresist layer may further be provided with a bottom anti-reflection layer or a dielectric anti-reflection layer. Reflective layer.
TW102140583A 2012-12-19 2013-11-07 High aspect ratio microstructure etching method using switchable power generator TWI534888B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210552540.1A CN103887146B (en) 2012-12-19 2012-12-19 Utilize the high aspect ratio microstructures lithographic method of switchable power generator

Publications (2)

Publication Number Publication Date
TW201426859A true TW201426859A (en) 2014-07-01
TWI534888B TWI534888B (en) 2016-05-21

Family

ID=50955984

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102140583A TWI534888B (en) 2012-12-19 2013-11-07 High aspect ratio microstructure etching method using switchable power generator

Country Status (2)

Country Link
CN (1) CN103887146B (en)
TW (1) TWI534888B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109427551B (en) * 2017-09-04 2021-05-25 中微半导体设备(上海)股份有限公司 Substrate etching method and corresponding processing device
CN109773292B (en) * 2019-03-01 2020-06-16 大连理工大学 Device and method for electrolyzing and processing high-depth-to-width-ratio microstructure by megasonic mask

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4312630B2 (en) * 2004-03-02 2009-08-12 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
JP5192209B2 (en) * 2006-10-06 2013-05-08 東京エレクトロン株式会社 Plasma etching apparatus, plasma etching method, and computer-readable storage medium
US8475673B2 (en) * 2009-04-24 2013-07-02 Lam Research Company Method and apparatus for high aspect ratio dielectric etch
KR101092172B1 (en) * 2009-12-24 2011-12-13 주식회사 디엠에스 Plasma reactor for changing selectively combination structure of inductive coils according to predetermined etching condition, and etching method using the plasma reactor
JP5916056B2 (en) * 2010-08-23 2016-05-11 東京エレクトロン株式会社 Plasma processing method and plasma processing apparatus
CN102543687B (en) * 2011-11-30 2015-08-05 中微半导体设备(上海)有限公司 The lithographic method of the lithographic method of mask layer, etching device and interlayer dielectric layer

Also Published As

Publication number Publication date
CN103887146B (en) 2016-08-31
CN103887146A (en) 2014-06-25
TWI534888B (en) 2016-05-21

Similar Documents

Publication Publication Date Title
TWI514462B (en) Method of etching features in silicon nitride films
JP4912907B2 (en) Plasma etching method and plasma etching apparatus
JP2018510515A (en) Method for etching an atomic layer
TW201145384A (en) Semiconductor device manufacturing method and plasma etching apparatus
US20150126033A1 (en) Method for deep silicon etching using gas pulsing
JP5064319B2 (en) Plasma etching method, control program, and computer storage medium
WO2002103773A1 (en) Dry-etcching method
JP4599212B2 (en) Plasma processing method
TWI552221B (en) Method for providing high etch rate
TWI534888B (en) High aspect ratio microstructure etching method using switchable power generator
JP2015115410A (en) Etching method
US8709952B2 (en) Etching method, etching apparatus, and computer-readable recording medium
TWI689007B (en) Etching method
JP2016207753A (en) Plasma etching method
US9607848B2 (en) Etch process with pre-etch transient conditioning
KR102254447B1 (en) Plasma etching method
JP2014216331A (en) Plasma etching method
JP2001156041A (en) Method for manufacturing semiconductor device and manufacturing apparatus for the same
JP4865361B2 (en) Dry etching method
JP4643916B2 (en) Method and apparatus for dry etching of interlayer insulating film
US20070212887A1 (en) Plasma etching method, plasma etching apparatus, control program and computer-readable storage medium
TWI576909B (en) Silicon on insulator etch
JP5171091B2 (en) Plasma processing method
US20070197040A1 (en) Plasma etching method, plasma etching apparatus, control program and computer-readable storage medium
JP5815459B2 (en) Plasma etching method