TW201418716A - Probe card structure 1 - Google Patents
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- TW201418716A TW201418716A TW101142065A TW101142065A TW201418716A TW 201418716 A TW201418716 A TW 201418716A TW 101142065 A TW101142065 A TW 101142065A TW 101142065 A TW101142065 A TW 101142065A TW 201418716 A TW201418716 A TW 201418716A
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Abstract
Description
本發明係與探針卡有關,更詳而言之是指一種探針卡結構(一)。 The present invention relates to a probe card, and more particularly to a probe card structure (1).
按,用以檢測電子產品之各精密電子元件間的電性連接是否確實的方法,是以一探針卡作為一檢測機與該待測電子物件之間的測試訊號與電源訊號之傳輸介面。而該待測電子元件通常係接收來自該檢測機之高頻電源訊號,藉以供應該待測電子元件所需之電源。 According to the method for detecting whether the electrical connection between the precision electronic components of the electronic product is true, a probe card is used as a transmission interface between the test signal and the power signal between the detecting machine and the electronic object to be tested. The electronic component to be tested generally receives the high frequency power signal from the detector to supply the power required for the electronic component to be tested.
然而,習用探針卡之電源訊號之傳送線路通常與測試訊號之傳送線路是呈同樣的阻抗設計,換言之,當檢測機傳送高頻的電源訊號至該探針卡時,該探針卡之電源線路於高頻時所產生之高阻抗,通常會造成電源訊號一定程度的衰減。如此一來,該待測電子元件便容易因為電源供給不足而停止作動或是產生測試訊號的誤判。 However, the transmission line of the power signal of the conventional probe card is usually designed with the same impedance as the transmission line of the test signal. In other words, when the detector transmits a high-frequency power signal to the probe card, the power supply of the probe card The high impedance generated by the line at high frequencies usually causes a certain degree of attenuation of the power signal. In this way, the electronic component to be tested is likely to stop operating due to insufficient power supply or to generate a misjudgment of the test signal.
有鑑於此,本發明之主要目的在於提供一種探針卡結構(一)可於傳輸高頻電源訊號時,避免電源訊號產生大幅衰減之情形。 In view of this, the main object of the present invention is to provide a probe card structure (1) for avoiding a large attenuation of a power signal when transmitting a high frequency power signal.
緣以達成上述目的,本發明所提供探針卡結構(一)用以將 一檢測機之電源訊號以及測試訊號傳輸予一待測電子物件,藉以透過該電源訊號供應電源予該待測電子物件,以及透過該測試訊號對該待測電子物件進行電性檢測;該探針卡結構(一)包含有複數根訊號針、至少一訊號同軸纜線、以及至少一電源同軸纜線;其中,該等訊號針以導電材料製成,且其一端用以點觸該待測電子物件;該訊號同軸纜線包含有位於中心位置之一第一訊號線、包覆該第一訊號線之第一介質層、以及位於該第一介質層外之第一接地線;該第一訊號線與該檢測機以及其中至少一訊號針之另一端電性連接,用以傳輸測試訊號至該待測電子物件;該電源同軸纜線包含有位於中心位置之一第二訊號線、包覆該第二訊號線之第二介質層、以及位於該第二介質層外之第二接地線;該第二訊號線與該檢測機以及另外至少一訊號針之另一端電性連接,用以傳輸電源訊號至該待測電子物件。 In order to achieve the above object, the probe card structure (1) provided by the present invention is used to The power signal and the test signal of the detector are transmitted to an electronic object to be tested, thereby supplying power to the electronic object to be tested through the power signal, and electrically detecting the electronic object to be tested through the test signal; The card structure (1) includes a plurality of signal pins, at least one signal coaxial cable, and at least one power coaxial cable; wherein the signal pins are made of a conductive material, and one end of the signal is used to touch the electronic device to be tested The signal coaxial cable includes a first signal line at a central position, a first dielectric layer covering the first signal line, and a first ground line outside the first dielectric layer; the first signal The line is electrically connected to the detecting machine and the other end of the at least one signal pin for transmitting the test signal to the electronic object to be tested; the power coaxial cable includes a second signal line located at a central position, covering the line a second dielectric layer of the second signal line and a second ground line outside the second dielectric layer; the second signal line is electrically connected to the detector and the other end of the at least one signal pin For transmitting the power signal to the electronic test object.
該電源同軸纜線與該訊號同軸纜線符合以下條件:ΦP1/ΦP2≧ΦS1/ΦS2;其中,ΦS1為該第一訊號線的線徑;ΦP1為該第二訊號線的線徑;ΦS2為該第一介質層的徑長;ΦP2為該第二介質層的徑長。 The power coaxial cable and the signal coaxial cable meet the following conditions: Φ P1 /Φ P2 ≧Φ S1 /Φ S2 ; wherein Φ S1 is the wire diameter of the first signal line; Φ P1 is the second signal line Wire diameter; Φ S2 is the diameter of the first dielectric layer; Φ P2 is the diameter of the second dielectric layer.
藉此,透過上述設計,便可使該電源同軸纜線具有低阻抗值之特性,進而避免該探針卡結構傳輸高頻電源訊號時,產生大幅衰減之情形。 Therefore, through the above design, the power coaxial cable can have the characteristics of low impedance value, thereby avoiding a large attenuation when the probe card structure transmits the high frequency power signal.
為能更清楚地說明本發明,茲舉較佳實施例並配合圖示詳細說明如後。 In order that the present invention may be more clearly described, the preferred embodiments are illustrated in the accompanying drawings.
請參閱圖1,本發明較佳實施例之探針卡結構用以將一檢測機100之電源端子110與訊號端子120所輸出的電源訊號以及測試訊號傳輸予一待測電子物件200,藉以透過該電源訊號供應電源予該待測電子物件200,以及透過該測試訊號對該待測電子物件200進行電性檢測。該探針卡結構包含有複數根訊號針10、一基板20、一載板30、一訊號同軸纜線40、以及一電源同軸纜線50。其中: Referring to FIG. 1 , the probe card structure of the preferred embodiment of the present invention is used to transmit the power signal and the test signal outputted by the power terminal 110 and the signal terminal 120 of the detector 100 to an electronic object 200 to be tested. The power signal supplies power to the electronic object 200 to be tested, and electrically detects the electronic object 200 to be tested through the test signal. The probe card structure includes a plurality of signal pins 10, a substrate 20, a carrier 30, a signal coaxial cable 40, and a power coaxial cable 50. among them:
該等訊號針10是以金屬製成,當然亦可以其他導電材料,其一端用以點觸該待測電子物件200之待受測部位或是代供電部位。 The signal pins 10 are made of metal. Of course, other conductive materials may be used. One end of the signal pins 10 is used to touch the to-be-tested part or the power supply part of the electronic object 200 to be tested.
該基板20於本實施例中為印刷電路板,且其中形成有以導體製成且貫穿該基板20之一第一訊號傳導體21、以及一第一電源傳導體22。 The substrate 20 is a printed circuit board in this embodiment, and a first signal conductor 21 made of a conductor and penetrating through the substrate 20 and a first power source conductor 22 are formed therein.
於本實施例中,該載板30為多層陶瓷板(Multi-Layer Ceramic;MLC),且與該基板20連接,並於其中形成有以導體製成之一第二訊號傳導體31以及一第二電源傳導體32。該第二訊號傳導體31之一端與該第一訊號傳導體21連接,而另一端則與用以點觸該待測電子物件200之待受測部位的訊號 針10連接。該第二電源傳導體32之一端則與該第一電源傳導體22連接,而另一端則連接用以點觸該待測電子物件200之待供電部位的訊號針10。 In this embodiment, the carrier 30 is a multi-layer ceramic (MLC) and is connected to the substrate 20, and a second signal conductor 31 made of a conductor and a first portion are formed therein. Two power conductors 32. One end of the second signal conductor 31 is connected to the first signal conductor 21, and the other end is connected to the signal to be tested of the electronic object 200 to be tested. The needle 10 is connected. One end of the second power conductor 32 is connected to the first power conductor 22, and the other end is connected to the signal pin 10 for touching the to-be-powered portion of the electronic object 200 to be tested.
請參閱圖2,該訊號同軸纜線40包含有位於中心位置之一第一訊號線41、包覆該第一訊號線41之第一介質層42、以及位於該第一介質層42外之第一接地線43。其中,該第一訊號線41用以連接該檢測機100之訊號端子120、以及該基板20之第一訊號傳導體21,用以傳輸該測試訊號。該第一介質層42用以隔離該第一訊號線41與該第一接地線43,藉以避免產生短路之情形。該第一接地線43則用以做為接地。 Referring to FIG. 2, the signal coaxial cable 40 includes a first signal line 41 at a central position, a first dielectric layer 42 covering the first signal line 41, and a first layer outside the first dielectric layer 42. A grounding wire 43. The first signal line 41 is connected to the signal terminal 120 of the detector 100 and the first signal conductor 21 of the substrate 20 for transmitting the test signal. The first dielectric layer 42 is used to isolate the first signal line 41 from the first ground line 43 to avoid a short circuit. The first ground line 43 is used as a ground.
該電源同軸纜線50同樣包含有位於中心位置之一第二訊號線51、包覆該第二訊號線51之第二介質層52、以及位於該第二介質層52外之第二接地線53。其中,該第一訊號線51用以連接該檢測機100之電源端子110、以及該基板20之第一電源傳導體22,用以傳輸該電源訊號。該第二介質層52同樣用以隔離該第二訊號線51與該第二接地線53,藉以避免產生短路之情形。該第二接地線53同樣用以做為接地。 The power coaxial cable 50 also includes a second signal line 51 at a central position, a second dielectric layer 52 covering the second signal line 51, and a second ground line 53 outside the second dielectric layer 52. . The first signal line 51 is connected to the power terminal 110 of the detector 100 and the first power conductor 22 of the substrate 20 for transmitting the power signal. The second dielectric layer 52 is also used to isolate the second signal line 51 from the second ground line 53 to avoid a short circuit. The second ground line 53 is also used as a ground.
是以,該訊號同軸纜線40之第一訊號線41、該基板20之第一訊號傳導體21、與該載板30之第二訊號傳導體31將串聯連接形成一訊號線路,用以傳導該檢測機100之訊號端子120輸出之測試訊號,並透過對應之該探針10而傳輸至該待測電子物件200。而該電源同軸纜線50之第二訊號線51、該 基板20之第一電源傳導體22、與該載板30之第二電源傳導體32將串聯連接形成一電源線路,用以傳導該檢測機100之電源端子110輸出之電源訊號,並透過對應之該探針10而傳輸至該待測電子物件200。 Therefore, the first signal line 41 of the signal coaxial cable 40, the first signal conductor 21 of the substrate 20, and the second signal conductor 31 of the carrier 30 are connected in series to form a signal line for conducting The test signal outputted by the signal terminal 120 of the detector 100 is transmitted to the electronic object 200 to be tested through the corresponding probe 10. And the second signal line 51 of the power coaxial cable 50, the The first power conductor 22 of the substrate 20 and the second power conductor 32 of the carrier 30 are connected in series to form a power line for conducting the power signal output from the power terminal 110 of the detector 100, and transmitting the corresponding power signal. The probe 10 is transmitted to the electronic object 200 to be tested.
如此一來,由於直接貫穿該基板20與該載板30之第一訊號傳導體21與第二訊號傳導體31,並不會與該基板20與該載板30產生足以影響阻抗值的電場反應,所以上述之訊號線路的阻抗值則主要由該訊號同軸纜線40之阻抗設計進行控制與調整。同理可證,上述之電源線路的阻抗值則主要由該電源同軸纜線40之阻抗設計進行控制與調整。 As a result, since the first signal conductor 21 and the second signal conductor 31 directly penetrate the substrate 20 and the carrier 30, an electric field reaction sufficient to affect the impedance value is not generated with the substrate 20 and the carrier 30. Therefore, the impedance value of the above signal line is mainly controlled and adjusted by the impedance design of the signal coaxial cable 40. Similarly, the impedance value of the above power supply line is mainly controlled and adjusted by the impedance design of the power coaxial cable 40.
藉此,該訊號同軸纜線40與該電源同軸纜線50便可依據以下條件進行設計:1. RP≦RS;2. EP≧ES;3. ΦP1≧ΦS1;4. ΦP1-ΦP2≦ΦS1-ΦS2;5. ΦP1/ΦP2≧ΦS1/ΦS2;配合圖2所示,其中,RS為該訊號同軸纜線40之訊號線41之電阻係數;RP為該電源同軸纜線50之訊號線51之電阻係數;ES為該訊號同軸纜線40之介質層42的介質常數;EP為該電源同軸纜線50之介質層52的介質常數;ΦS1為該訊號同軸纜線40之訊號線41的線徑;ΦP1為該電源同軸纜線50之訊號線51的線徑;ΦS2為該訊號同軸纜線40之介質層42的徑長;ΦP2為該電源同軸纜線50之介質層52的徑長。 Thereby, the signal coaxial cable 40 and the power coaxial cable 50 can be designed according to the following conditions: 1. R P ≦ R S ; 2. E P ≧ E S ; 3. Φ P1 ≧ Φ S1 ; Φ P1 -Φ P2 ≦Φ S1 -Φ S2 ;5. Φ P1 /Φ P2 ≧Φ S1 /Φ S2 ; as shown in Fig. 2, where R S is the resistivity of the signal line 41 of the signal coaxial cable 40 R P is the resistivity of the signal line 51 of the power coaxial cable 50; E S is the dielectric constant of the dielectric layer 42 of the signal coaxial cable 40; E P is the medium of the dielectric layer 52 of the power coaxial cable 50 Constant; Φ S1 is the wire diameter of the signal line 41 of the signal coaxial cable 40; Φ P1 is the wire diameter of the signal line 51 of the power coaxial cable 50; Φ S2 is the dielectric layer 42 of the signal coaxial cable 40 Diameter length; Φ P2 is the diameter of the dielectric layer 52 of the power coaxial cable 50.
如此一來,該電源同軸纜線50透過低電阻係數之設計,便可使其具有遠低於該訊號同軸纜線40之低電阻值,而透過高介電係數、以及訊號線51線徑與介質層52直徑的比值設計,更可使該電源同軸纜線50具有較高的電容值,使其於高頻時則具有極低之電抗值,進而使該電源同軸纜線50於傳輸高頻訊號時,具有遠低於該訊號同軸纜線40之極低阻抗值,而使得傳輸該檢測機100輸出之高頻電源訊號至該待測電子物件200時,可避免電源訊號產生大幅衰減之情形。 In this way, the power coaxial cable 50 is designed to have a low resistance value lower than the signal coaxial cable 40 through the low resistivity design, and the high dielectric constant and the signal line 51 diameter are The ratio of the diameter of the dielectric layer 52 is designed to make the power coaxial cable 50 have a higher capacitance value, so that it has a very low reactance value at a high frequency, thereby causing the power coaxial cable 50 to transmit a high frequency. When the signal has a very low impedance value which is much lower than the signal coaxial cable 40, so that the high frequency power signal outputted by the detector 100 is transmitted to the electronic object 200 to be tested, the power signal can be prevented from being greatly attenuated. .
另外,除上述設計外,亦可如圖3,設計使用多個該電源同軸纜線50並聯連接,藉以透過並聯線路之方式,來達到能更低化該電源線路的阻抗之效果。 In addition, in addition to the above design, as shown in FIG. 3, a plurality of the power coaxial cables 50 are designed to be connected in parallel, so as to achieve the effect of lowering the impedance of the power supply line by paralleling the lines.
當然,在實際實施上,可依該待測電子物件200待測試區域之間隙,設計僅使用該基板20、或是直接僅使用電源同軸纜線進行電源訊號之傳輸,亦可達到本發明之目的。另外,基板20或載板30之電源傳導體除上述使用直接貫穿的設計外,亦能直接佈設於基板20或載板30之表面、或是其他設計,使其電場反應並不會影響到整體之阻抗值,藉以避免基板20或載板30之電源傳導體的影響電源訊號之傳輸。再者,以上所述僅為本發明較佳可行實施例而已,舉凡應用本發明說明書及申請專利範圍所為之等效結構變化,理應包含在本發明之專利範圍內。 Of course, in actual implementation, according to the gap of the to-be-tested area of the electronic object 200 to be tested, it is also possible to design the transmission of the power signal by using only the substrate 20 or directly using only the power coaxial cable, and the purpose of the invention can also be achieved. . In addition, the power source conductor of the substrate 20 or the carrier 30 can be directly disposed on the surface of the substrate 20 or the carrier 30, or other designs, in addition to the above-mentioned design for direct penetration, so that the electric field reaction does not affect the whole. The impedance value is used to avoid the influence of the power conductor of the substrate 20 or the carrier 30 on the transmission of the power signal. Furthermore, the above description is only a preferred embodiment of the present invention, and equivalent structural changes in the scope of the present invention and the scope of the claims are intended to be included in the scope of the present invention.
10‧‧‧訊號針 10‧‧‧Signal needle
20‧‧‧基板 20‧‧‧Substrate
21‧‧‧第一訊號傳導體 21‧‧‧First Signal Conductor
22‧‧‧第一電源傳導體 22‧‧‧First power conductor
30‧‧‧載板 30‧‧‧ Carrier Board
31‧‧‧第二訊號傳導體 31‧‧‧Second signal conductor
32‧‧‧第二電源傳導體 32‧‧‧Second power conductor
40‧‧‧訊號同軸纜線 40‧‧‧ Signal coaxial cable
41‧‧‧第一訊號線 41‧‧‧First signal line
42‧‧‧第一介質層 42‧‧‧First dielectric layer
43‧‧‧第一接地線 43‧‧‧First grounding wire
50‧‧‧電源同軸纜線 50‧‧‧Power coaxial cable
51‧‧‧第二訊號線 51‧‧‧Second signal line
52‧‧‧第二介質層 52‧‧‧Second dielectric layer
53‧‧‧第二接地線 53‧‧‧Second grounding wire
100‧‧‧檢測機 100‧‧‧Detector
110‧‧‧電源端子 110‧‧‧Power terminal
120‧‧‧訊號端子 120‧‧‧ Signal Terminal
200‧‧‧待測電子物件 200‧‧‧Electronic objects to be tested
圖1為本發明較佳實施例之結構圖;圖2為訊號同軸纜線與電源同軸纜線之剖面圖;圖3揭示多組電源同軸纜線並聯之結構設計。 1 is a structural view of a preferred embodiment of the present invention; FIG. 2 is a cross-sectional view of a signal coaxial cable and a power coaxial cable; and FIG. 3 discloses a structural design of a plurality of power coaxial cables in parallel.
10‧‧‧訊號針 10‧‧‧Signal needle
20‧‧‧基板 20‧‧‧Substrate
21‧‧‧第一訊號傳導體 21‧‧‧First Signal Conductor
22‧‧‧第一電源傳導體 22‧‧‧First power conductor
30‧‧‧載板 30‧‧‧ Carrier Board
31‧‧‧第二訊號傳導體 31‧‧‧Second signal conductor
32‧‧‧第二電源傳導體 32‧‧‧Second power conductor
40‧‧‧訊號同軸纜線 40‧‧‧ Signal coaxial cable
50‧‧‧電源同軸纜線 50‧‧‧Power coaxial cable
100‧‧‧檢測機 100‧‧‧Detector
110‧‧‧電源端子 110‧‧‧Power terminal
120‧‧‧訊號端子 120‧‧‧ Signal Terminal
200‧‧‧待測電子物件 200‧‧‧Electronic objects to be tested
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AU2003279577A1 (en) * | 2002-11-21 | 2004-06-15 | Casio Computer Co., Ltd. | High frequency signal transmission structure |
US6727716B1 (en) * | 2002-12-16 | 2004-04-27 | Newport Fab, Llc | Probe card and probe needle for high frequency testing |
KR100791000B1 (en) * | 2006-10-31 | 2008-01-03 | 삼성전자주식회사 | Electrical test equipment for high speed test of wafer and testing method thereof |
TW201243343A (en) * | 2011-04-28 | 2012-11-01 | Mpi Corp | Probe card with high speed module and manufacturing method thereof |
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