TWI479157B - Probe card structure - Google Patents
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- TWI479157B TWI479157B TW101142068A TW101142068A TWI479157B TW I479157 B TWI479157 B TW I479157B TW 101142068 A TW101142068 A TW 101142068A TW 101142068 A TW101142068 A TW 101142068A TW I479157 B TWI479157 B TW I479157B
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Description
本發明係與探針卡有關,更詳而言之是指一種探針卡結構。The present invention relates to a probe card, and more particularly to a probe card structure.
按,用以檢測電子產品之各精密電子元件間的電性連接是否確實的方法,是以一探針卡作為一檢測機與該待測電子物件之間的測試訊號與電源訊號之傳輸介面。而該待測電子元件通常係接收來自該檢測機之高頻電源訊號,藉以供應該待測電子元件所需之電源。According to the method for detecting whether the electrical connection between the precision electronic components of the electronic product is true, a probe card is used as a transmission interface between the test signal and the power signal between the detecting machine and the electronic object to be tested. The electronic component to be tested generally receives the high frequency power signal from the detector to supply the power required for the electronic component to be tested.
然而,習用探針卡之電源訊號之傳送線路通常與測試訊號之傳送線路是呈同樣的阻抗設計,換言之,當檢測機傳送高頻的電源訊號至該探針卡時,該探針卡之電源線路於高頻時所產生之高阻抗,通常會造成電源訊號一定程度的衰減。如此一來,該待測電子元件便容易因為電源供給不足而停止作動或是產生測試訊號的誤判。However, the transmission line of the power signal of the conventional probe card is usually designed with the same impedance as the transmission line of the test signal. In other words, when the detector transmits a high-frequency power signal to the probe card, the power supply of the probe card The high impedance generated by the line at high frequencies usually causes a certain degree of attenuation of the power signal. In this way, the electronic component to be tested is likely to stop operating due to insufficient power supply or to generate a misjudgment of the test signal.
有鑑於此,本發明之主要目的在於提供一種探針卡結構可於傳輸高頻電源訊號時,避免電源訊號產生大幅衰減之情形。In view of the above, the main object of the present invention is to provide a probe card structure capable of avoiding a large attenuation of a power signal when transmitting a high frequency power signal.
緣以達成上述目的,本發明所提供探針卡結構用以將一檢測機之電源訊號以及測試訊號傳輸予一待測電子物件,藉以透 過該電源訊號供應電源予該待測電子物件,以及透過該測試訊號對該待測電子物件進行電性檢測;該探針卡結構包含有複數根訊針、一基板以及至少一電源同軸電纜;其中,該等訊號針以導電材料製成,且其一端用以點觸該待測電子物件;該基板以具有特定介質常數之介質材料製成,用以供與該檢測機連接,且其中埋設有以導體製成之一第一訊號傳導體;該第一訊號傳導體與該檢測機、以及其中至少一訊號針之另一端電性連接,用以透過對應之該訊號針傳輸該測試訊號至該待測電子物件;該電源同軸纜線包含有位於中心位置之一訊號線、包覆該訊號線之一介質層、以及位於該介質層外之接地線;該訊號線與該檢測機以及另外至少一訊號針之另一端電性連接,用以透過對應之該訊號針傳輸該電源訊號至該待測電子物件;該介質層用以隔離該訊號線與該接地線;該接地線用以做為接地。In order to achieve the above object, the probe card structure provided by the present invention is used for transmitting a power signal and a test signal of a detecting machine to an electronic object to be tested. The power signal is supplied to the electronic object to be tested, and the electronic object to be tested is electrically detected through the test signal; the probe card structure comprises a plurality of signal pins, a substrate and at least one power coaxial cable; Wherein, the signal pins are made of a conductive material, and one end thereof is used to touch the electronic object to be tested; the substrate is made of a dielectric material having a specific dielectric constant for connection with the detector, and embedded therein a first signal conductor formed by a conductor; the first signal conductor is electrically connected to the detector and the other end of the at least one signal pin for transmitting the test signal to the corresponding signal pin to The power electronic cable includes: a signal line located at a central location, a dielectric layer covering the signal line, and a ground line outside the dielectric layer; the signal line and the detector and the The other end of the at least one signal pin is electrically connected to transmit the power signal to the electronic object to be tested through the corresponding signal pin; the dielectric layer is used to isolate the signal line and A ground line; the ground line is used as a ground.
另外,為達上述目的,該電源同軸纜線符合以下條件:1/5≦ΦP1 /ΦP2 <1;其中,ΦP1 為該訊號線的線徑;ΦP2 為該介質層的徑長。In addition, for the above purpose, the power coaxial cable meets the following conditions: 1/5 ≦ Φ P1 / Φ P2 <1; wherein Φ P1 is the wire diameter of the signal line; Φ P2 is the path length of the dielectric layer.
藉此,透過上述設計,便可使該電源同軸纜線具有低阻抗值之特性,進而避免該探針卡結構傳輸高頻電源訊號時,產生大幅衰減之情形。Therefore, through the above design, the power coaxial cable can have the characteristics of low impedance value, thereby avoiding a large attenuation when the probe card structure transmits the high frequency power signal.
為能更清楚地說明本發明,茲舉較佳實施例並配合圖示詳 細說明如後。In order to more clearly illustrate the invention, the preferred embodiment Detailed description is as follows.
請參閱圖1,本發明較佳實施例之探針卡結構用以將一檢測機100之電源端子110與訊號端子120所輸出的電源訊號以及測試訊號傳輸予一待測電子物件200,藉以透過該電源訊號供應電源予該待測電子物件200,以及透過該測試訊號對該待測電子物件200進行電性檢測。該探針卡結構包含有複數根訊號針10、一基板20、一載板30、以及一電源同軸纜線40。其中:Referring to FIG. 1 , the probe card structure of the preferred embodiment of the present invention is used to transmit the power signal and the test signal outputted by the power terminal 110 and the signal terminal 120 of the detector 100 to an electronic object 200 to be tested. The power signal supplies power to the electronic object 200 to be tested, and electrically detects the electronic object 200 to be tested through the test signal. The probe card structure includes a plurality of signal pins 10, a substrate 20, a carrier 30, and a power coaxial cable 40. among them:
該等訊號針10是以金屬製成,當然亦可以其他導電材料,其一端用以點觸該待測電子物件200之待受測部位或是代供電部位。The signal pins 10 are made of metal. Of course, other conductive materials may be used. One end of the signal pins 10 is used to touch the to-be-tested part or the power supply part of the electronic object 200 to be tested.
該基板20其中一面用以供與該檢測機100連接。於本實施例中,該基板20為多層印刷電路板,且形成有以導體製成之一第一訊號傳導體21、一第一電源傳導體22、以及數個圍繞該第一訊號傳導體21與該第一電源傳導體22之第一接地傳導體23埋設於其中。該第一訊號傳導體21用以與該訊號端子120連接。One side of the substrate 20 is for connection to the detector 100. In this embodiment, the substrate 20 is a multilayer printed circuit board, and is formed with a first signal conductor 21 made of a conductor, a first power conductor 22, and a plurality of surrounding first signal conductors 21. The first ground conductor 23 of the first power conductor 22 is embedded therein. The first signal conductor 21 is connected to the signal terminal 120.
該載板30與該基板20之另外一面連接。於本實施例中,該載板30為多層陶瓷板(Multi-Layer Ceramic;MLC),且形成有以導體製成之一第二訊號傳導體31、一第二電源傳導體32、以及數個環繞該第二訊號傳導體31與該第二電源傳導體32之第二接地傳導體33埋設於其中。該第二訊號傳導體31 一端與該第一訊號傳導體21連接,而另一端則連接於用以點觸該待測電子物件200之待受測部位的訊號針10。該第二電源傳導體32一端與該第一電源傳導體22連接,而另一端則連接於用以點觸該待測電子物件200之待供電部位的訊號針100。The carrier 30 is connected to the other side of the substrate 20. In this embodiment, the carrier 30 is a multi-layer ceramic (MLC), and is formed with a second signal conductor 31, a second power conductor 32, and a plurality of conductors. A second ground conductor 33 surrounding the second signal conductor 31 and the second power conductor 32 is embedded therein. The second signal conductor 31 One end is connected to the first signal conductor 21, and the other end is connected to the signal pin 10 for touching the to-be-measured portion of the electronic object 200 to be tested. The second power conductor 32 has one end connected to the first power conductor 22 and the other end connected to the signal pin 100 for touching the to-be-powered portion of the electronic object 200 to be tested.
該電源同軸纜線40包含有位於中心位置之一訊號線41、包覆該訊號線41之介質層42、以及位於該介質層42外之接地線43。其中,該訊號線41連接該檢測機100之電源端子110、以及該基板20之第一電源傳導體22,用以傳輸該電源訊號。該介質層42用以隔離該訊號線41與該接地線43,藉以避免產生短路之情形。該接地線43用以做為接地。The power coaxial cable 40 includes a signal line 41 at a center position, a dielectric layer 42 covering the signal line 41, and a ground line 43 outside the dielectric layer 42. The signal line 41 is connected to the power terminal 110 of the detector 100 and the first power conductor 22 of the substrate 20 for transmitting the power signal. The dielectric layer 42 is used to isolate the signal line 41 from the ground line 43 to avoid a short circuit. The grounding wire 43 is used as a ground.
是以,該基板20之第一訊號傳導體21與該載板30之第二訊號傳導體31將串聯連接形成一訊號線路,用以傳導該檢測機100之訊號端子120輸出之測試訊號,並透過對應之該探針10而傳輸至該待測電子物件200之待測試部位。而該電源同軸纜線40之訊號線41、該基板20之第一電源傳導體22、與該載板30之第二電源傳導體32將串聯連接形成一電源線路,用以傳導該檢測機100之電源端子110輸出之電源訊號,並透過對應之該探針10而傳輸至該待測電子物件200之待供電部位。Therefore, the first signal conductor 21 of the substrate 20 and the second signal conductor 31 of the carrier 30 are connected in series to form a signal line for conducting the test signal outputted by the signal terminal 120 of the detector 100, and The probe 10 is transmitted to the to-be-tested portion of the electronic object 200 to be tested. The signal line 41 of the power coaxial cable 40, the first power conductor 22 of the substrate 20, and the second power conductor 32 of the carrier 30 are connected in series to form a power line for conducting the detector 100. The power signal outputted by the power terminal 110 is transmitted to the to-be-powered portion of the electronic object 200 to be tested through the corresponding probe 10.
如此一來,由於直接貫穿該基板20與該載板30之第一電源傳導體22與第二電源傳導體32,並不會與該基板20與該 載板30產生足以影響阻抗值的電場反應,所以上述之電源線路的阻抗值則主要由該電源同軸纜線40之阻抗設計進行控制與調整。藉此,該電源同軸纜線40便可依據以下條件進行設計:1. 1/5≦ΦP1 /ΦP2 <1;2. ΦP1 /ΦP2 ≧HS1 /TS1 ;3. ΦP1 /ΦP2 ≧HS2 /TS2 ;4. RP ≦RS1 ;5. RP ≦RS2 ;6. EP ≧ES1 ;7. EP ≧ES2 ;配合圖2至圖4所示,其中,ΦP1 為該訊號線41的線徑;ΦP2 為該介質層42的徑長;RP 為該訊號線41之電阻係數;RS1 為該第一訊號傳導體21之電阻係數;EP 為該介質層42的介質常數;ES 為該基板20的介質常數;HS1 為該第一訊號傳導體21之厚度;TS1 為該基板20於該第一訊號傳導體21周圍,與其相鄰之二個第一接地傳導體23之間的介質材料厚度;HS2 為該第二訊號傳導體31之厚度;TS2 為該載板30於該第二訊號傳導體31周圍,與其相鄰之二個第二接地傳導體33之間的介質材料厚度。如此一來,該電源同軸纜線40透過低電阻係數之設計,便可使其具有遠低於該訊號線路之低電阻值,而透過高介電係數、以及訊號線41線徑與介質層42直徑的比值設計,更可使該電源同軸纜線40具有較高的電容值,使其於高頻時則具有極低之電抗值,進而使該電源同軸纜線40於傳輸 高頻訊號時,具有遠低於該訊號線路之極低阻抗值,而使得傳輸該檢測機100輸出之高頻電源訊號至該待測電子物件200時,可避免電源訊號產生大幅衰減之情形。As a result, the first power conductor 22 and the second power conductor 32 directly penetrating the substrate 20 and the carrier 30 do not generate an electric field reaction sufficient to affect the impedance value of the substrate 20 and the carrier 30. Therefore, the impedance value of the above power supply line is mainly controlled and adjusted by the impedance design of the power coaxial cable 40. Thereby, the power coaxial cable 40 can be designed according to the following conditions: 1. 1/5 ≦ Φ P1 / Φ P2 <1; 2. Φ P1 / ΦP 2 ≧ HS 1 / T S1 ; 3. Φ P1 / Φ P2 ≧ H S2 / T S2 ;. 4 R P ≦ R S1;. 5 R P ≦ R S2; 6 E P ≧ E S1;. 7 E P ≧ E S2;. with Figures 2 to 4, Wherein Φ P1 is the wire diameter of the signal line 41; Φ P2 is the diameter of the dielectric layer 42; R P is the resistivity of the signal line 41; R S1 is the resistivity of the first signal conductor 21; P is the dielectric constant of the dielectric layer 42; E S is the dielectric constant of the substrate 20; H S1 is the thickness of the first signal conductor 21; T S1 is the substrate 20 around the first signal conductor 21, The thickness of the dielectric material between the two adjacent first ground conductors 23; H S2 is the thickness of the second signal conductor 31; T S2 is the carrier 30 around the second signal conductor 31, The thickness of the dielectric material between the two adjacent second ground conductors 33. In this way, the power coaxial cable 40 is designed to have a low resistance value that is much lower than the signal line, and the high dielectric constant, and the signal line 41 and the dielectric layer 42 are transmitted through the low resistivity. The ratio of the diameter design makes the power coaxial cable 40 have a higher capacitance value, so that it has a very low reactance value at a high frequency, so that the power coaxial cable 40 transmits a high frequency signal. When the high frequency power signal outputted by the detector 100 is transmitted to the electronic object 200 to be tested, the power signal can be prevented from being greatly attenuated.
當然,在實際實施上,可依該待測電子物件200待測試部位之間隙,設計僅使用該基板20、或是直接僅使用電源同軸纜線進行電源訊號之傳輸,亦可達到本發明之目的。另外,基板20或載板30之電源傳導體除上述使用直接貫穿的設計外,亦能直接佈設於基板20或載板30之表面、或是其他設計,使其電場反應並不會影響到整體之阻抗值,藉以避免基板20或載板30之電源傳導體的影響電源訊號之傳輸。再者,以上所述僅為本發明較佳可行實施例而已,舉凡應用本發明說明書及申請專利範圍所為之等效結構變化,理應包含在本發明之專利範圍內。Of course, in actual implementation, according to the gap between the parts to be tested of the electronic object to be tested 200, it is possible to design only use the substrate 20, or directly use only the power coaxial cable for transmission of the power signal, and achieve the purpose of the present invention. . In addition, the power source conductor of the substrate 20 or the carrier 30 can be directly disposed on the surface of the substrate 20 or the carrier 30, or other designs, in addition to the above-mentioned design for direct penetration, so that the electric field reaction does not affect the whole. The impedance value is used to avoid the influence of the power conductor of the substrate 20 or the carrier 30 on the transmission of the power signal. Furthermore, the above description is only a preferred embodiment of the present invention, and equivalent structural changes in the scope of the present invention and the scope of the claims are intended to be included in the scope of the present invention.
10‧‧‧訊號針10‧‧‧Signal needle
20‧‧‧基板20‧‧‧Substrate
21‧‧‧第一訊號傳導體21‧‧‧First Signal Conductor
22‧‧‧第一電源傳導體22‧‧‧First power conductor
23‧‧‧第一接地傳導體23‧‧‧First grounding conductor
30‧‧‧載板30‧‧‧ Carrier Board
31‧‧‧第二訊號傳導體31‧‧‧Second signal conductor
32‧‧‧第二電源傳導體32‧‧‧Second power conductor
33‧‧‧第二接地傳導體33‧‧‧Second grounding conductor
40‧‧‧電源同軸纜線40‧‧‧Power coaxial cable
41‧‧‧訊號線41‧‧‧Signal line
42‧‧‧介質層42‧‧‧ dielectric layer
43‧‧‧接地線43‧‧‧ Grounding wire
100‧‧‧檢測機100‧‧‧Detector
110‧‧‧電源端子110‧‧‧Power terminal
120‧‧‧訊號端子120‧‧‧ Signal Terminal
200‧‧‧待測電子物件200‧‧‧Electronic objects to be tested
圖1為本發明第一較佳實施例之結構圖;圖2為電源同軸纜線之剖面圖;圖3為圖1之A-A處的剖面圖;圖4為圖1之B-B處的剖面圖。1 is a cross-sectional view of a power coaxial cable; FIG. 3 is a cross-sectional view taken along line A-A of FIG. 1; and FIG. 4 is a cross-sectional view taken along line B-B of FIG.
10‧‧‧訊號針10‧‧‧Signal needle
20‧‧‧基板20‧‧‧Substrate
21‧‧‧第一訊號傳導體21‧‧‧First Signal Conductor
22‧‧‧第一電源傳導體22‧‧‧First power conductor
23‧‧‧第一接地傳導體23‧‧‧First grounding conductor
30‧‧‧載板30‧‧‧ Carrier Board
31‧‧‧第二訊號傳導體31‧‧‧Second signal conductor
32‧‧‧第二電源傳導體32‧‧‧Second power conductor
33‧‧‧第二接地傳導體33‧‧‧Second grounding conductor
40‧‧‧電源同軸纜線40‧‧‧Power coaxial cable
100‧‧‧檢測機100‧‧‧Detector
110‧‧‧電源端子110‧‧‧Power terminal
120‧‧‧訊號端子120‧‧‧ Signal Terminal
200‧‧‧待測電子物件200‧‧‧Electronic objects to be tested
Claims (8)
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US6727716B1 (en) * | 2002-12-16 | 2004-04-27 | Newport Fab, Llc | Probe card and probe needle for high frequency testing |
US20040239439A1 (en) * | 2002-11-21 | 2004-12-02 | Casio Computer Co., Ltd. | High frequency signal transmission structure |
US20080100314A1 (en) * | 2006-10-31 | 2008-05-01 | Samsung Electronics Co., Ltd. | Electrical test system including coaxial cables |
TW201243343A (en) * | 2011-04-28 | 2012-11-01 | Mpi Corp | Probe card with high speed module and manufacturing method thereof |
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2012
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Patent Citations (4)
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US20040239439A1 (en) * | 2002-11-21 | 2004-12-02 | Casio Computer Co., Ltd. | High frequency signal transmission structure |
US6727716B1 (en) * | 2002-12-16 | 2004-04-27 | Newport Fab, Llc | Probe card and probe needle for high frequency testing |
US20080100314A1 (en) * | 2006-10-31 | 2008-05-01 | Samsung Electronics Co., Ltd. | Electrical test system including coaxial cables |
TW201243343A (en) * | 2011-04-28 | 2012-11-01 | Mpi Corp | Probe card with high speed module and manufacturing method thereof |
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