TW201417072A - Display panel and driving method thereof - Google Patents

Abstract

A display panel includes a first display portion, a second display portion, and a data driver. The first display portion includes a plurality of first scan lines and first data lines. The first scan lines are configured to transmit a plurality of the first scanning signals sequentially. The second display portion includes a plurality of second scan lines and second data lines. The second scan lines are arranged in parallel to the first scan lines along a direction in which the first scanning signals are transmitted, and sequentially transmit the second scanning signals after the first scanning signals are sequentially transmitted. The data driver includes a plurality of data output pins, in which each data output pin is electrically connected to one of the first data lines and one of the second data lines.

Description

Display panel and driving method thereof

The present invention relates to an electronic device, and more particularly to a display panel.

In recent years, display panels have been widely used in various electronic devices such as computers, televisions, mobile phones, and the like due to the development of display technologies.

A conventional display panel includes a data driver, a scan driver, a data line, a scan line, and a display portion. The data line and the scan line are alternately arranged to divide the display portion into a plurality of pixels. When the screen is updated, the scan driver sequentially sends the scan signal to each scan line to sequentially open the columns of pixels, and the data driver sequentially transmits the data signals to the columns of pixels according to the opened display area.

However, as the resolution of display panels increases, the design of data drivers becomes more complex and the number of data lines required increases. The complexity of the data driver will increase the difficulty of its implementation, and the increase in the number of data lines will cause the load of the data driver to become larger, which will delay the data signal and eventually lead to deterioration of display quality.

Therefore, the above problems are urgently resolved.

One aspect of the present invention is a display panel including a first display portion, a second display portion, and a data drive. The first display portion includes a plurality of sections A scan line and a plurality of first data lines. The first scan line is configured to sequentially transmit a plurality of first scan signals, and the first data lines are alternately arranged with the first scan lines. The second display unit is arranged in parallel with the first display unit. The second display portion includes a plurality of second scan lines and a plurality of second data lines. The second scan line is different from the first scan line, is arranged side by side with the first scan line in the direction of the first scan signal transmission, and is used to sequentially transmit the plurality of second scans after the first scan signal is sequentially transmitted. Signal. The second data line and the second scan line are alternately arranged. The data driver includes a plurality of data output pins, wherein each of the data output pins is electrically connected to one of the first data line and one of the second data lines.

Another aspect of the present invention is a driving method of a display panel. The driving method includes: providing a display panel, the display panel includes a first display portion, a second display portion, and a data driver, wherein the first display portion includes a plurality of first a scan line and a plurality of first data lines, wherein the first scan line is interleaved with the first data line and configured to transmit a plurality of first scan signals, and the second display portion includes a plurality of second scan lines and a plurality of second data lines. The second scan line is different from the first scan line and the second data lines are alternately arranged. The second scan line is arranged in parallel with the first scan line in the direction of the first scan signal transmission, and the data driver includes a plurality of data output pins. Each of the data output pins is electrically connected to one of the first data line and the second data line; the first scan signal is sequentially transmitted to the first display portion through the first scan line; The scan lines sequentially transmit the plurality of second scan signals to the second display portion; and output the plurality of data signals through the data output pins of the data driver, and pass through the first and second Data signals transmitted to the feed line a first display unit and second display unit.

The spirit and scope of the present disclosure will be apparent from the following description of the preferred embodiments of the present disclosure. Modifications do not depart from the spirit and scope of the disclosure.

As used herein, "connected" may mean that two or more elements are in direct physical or electrical contact with each other, or indirectly in physical or electrical contact with each other, and "connected" may also refer to two or more elemental elements. Interoperate or act.

FIG. 1a is a schematic diagram of a display panel 100 according to an embodiment of the invention. The display panel 100 includes a first display portion 110, a second display portion 120, a data driver 130, a first gate driver 140, and a second gate driver 150. The first display unit 110 and the second display unit 120 may each include a plurality of pixels arranged in a matrix, and the pixels may display a picture according to the data signal output by the data driver 130, and the first display unit 110 and the second display unit 120 can be arranged side by side and display different parts of the same picture (for example: respectively display the left and right halves of the same picture).

The first display portion 110 may include a plurality of scan lines S_1, S_2, . . . , S_n and a plurality of data lines D_1, D_2, . . . , D_m. The data lines D_1, D_2, ..., D_m are alternately arranged with the scanning lines S_1, S_2, ..., S_n.

The scan lines S_1, S_2, ..., S_n are used to sequentially transmit a plurality of first scan signals to each column of pixels of the first display portion 110, thereby turning on a switch (such as a thin film transistor switch) in the pixel to enable data The data signals outputted by the driver 130 are sequentially written into each column of the pixels of the first display unit 110 through the data lines D_1, D_2, ..., D_m.

The second display portion 120 includes a plurality of scanning lines S_n+1, S_n+2, . . . , S_2n, and a plurality of data lines D_m+1, D_m+2, . . . , D_2m. The data lines D_m+1, D_m+2, ..., D_2m are alternately arranged with the scanning lines S_n+1, S_n+2, ..., S_2n. The scan lines S_n+1, S_n+2, ..., S_2n are arranged side by side with the scan lines S_1, S_2, ..., S_n in the direction in which the first scan signals are transmitted, that is, the scan lines S_n+1 are juxtaposed with the scan lines S_1. In the second display portion 120, the scanning line S_n+2 is arranged in parallel with the scanning line S_2 in the second display portion 120, and so on. The scan lines S_n+1, S_n+2, ..., S_2n and the scan lines S_1, S_2, ..., S_n are different from each other and are not connected. In other words, the scan lines S_1, S_2, ..., S_n and the scan lines S_n+1, S_n+2, ..., S_2n have no physical connection relationship with each other, and the spacing thereof can be adjusted according to actual application requirements.

The scan lines S_n+1, S_n+2, ..., S_2n are used to sequentially transmit a plurality of second scan signals after the plurality of first scan signals are sequentially transmitted, thereby turning on the switches in the pixels, so that the data driver 130 The output data signal is sequentially written into each column of pixels of the second display portion 120 through the data lines D_m+1, D_m+2, ..., D_2m, and the open relationship in this embodiment is exemplified by a thin film transistor. Not limited to this.

The data driver 130 includes a plurality of data output pins pin_1, pin_2, ..., pin_m, wherein each of the data output pins pin_1, pin_2, ..., pin_m is electrically connected to the data lines D_1, D_2, ..., D_m One of the data lines D_m+1, D_m+2, ..., D_2m; that is, the data output pin pin_1 can be connected to the data line D_1 and the data line D_m+1, and the data output pin pin_2 can be connected to the data line. D_1 and data line D_m+1, and so on. In addition, the data driver 130 can be implemented in practice. The integrated circuit is implemented, but is not limited thereto.

Referring also to Figure 1b, which is a timing diagram of the operation of display panel 100 in Figure 1a. As shown in FIG. 1a and FIG. 1b, the scan line S_1 may first transmit the first scan signal to the first column of pixels of the first display unit 110, so that the data signal output by the data driver 130 passes through the data lines D_1, D_2, ..., D_m is written into the first column of pixels of the first display portion 110, and the second scan signal S_2 can be further transmitted to the second column of pixels of the first display portion 110 for output by the data driver 130. The data signals are written into the second column of pixels of the first display portion 110 through the data lines D_1, D_2, ..., D_m, and so on. After the scan line S_n transmits the first scan signal to the last column of pixels of the first display portion 110, the scan line S_n+1 may then transmit the second scan signal to the first column of pixels of the second display portion 120, so that the data driver 130 The output data signals are respectively written into the first column of pixels of the second display unit 110 through the data lines D_m+1, D_m+2, . . . , D_2m, and the second scan signal can be further transmitted to the second display by the scan lines S_n+2. The second column of pixels of the portion 120 is such that the data signals output by the data driver 130 are respectively written into the second column of the second display portion 120 through the data lines D_m+1, D_m+2, ..., D_2m, and so on. .

It should be noted that, in the above operation, the data lines D_1, D_2, ..., D_m and the data lines D_m+1, D_m+2, ..., D_2m can be simultaneously used to transmit the data signals output by the data driver 130 to the first display. The portion 110 and the second display portion 120 determine the column of pixels to be written into the data signal according to the scanning signals transmitted by the scanning lines S_1, S_2, ..., S_n and the scanning lines S_n+1, S_n+2, ..., S_2n. Each column of pixels of the first display portion 110 can be sequentially written with a data signal during the first conduction period T1, and the second display Each column of pixels of the display unit 120 can be sequentially written with a data signal during the second on period T2.

Through the above-mentioned setting and operation, the output data pins pin_1, pin_2, . . . , pin_m of the data driver 130 can be half of the number of all data lines D_1, D_2, . . . , D_2m in the display panel 100, so that the data driver 130 can be greatly reduced. Design complexity. In addition, by the arrangement of the first display portion 110 and the second display portion 120, the scan lines S_1, S_2, ..., S_n and the scan lines S_n+1, S_n+2, ..., S_2n can respectively transmit the scan signals to the first The display unit 110 and the second display unit 120, in this way, only one scanning line needs to be provided for each column of pixels, so that the total number of output data pins pin_1, pin_2, ..., pin_m of the data driver 130 can be reduced, and the display can be further improved. The aperture ratio of the pixels in the panel 100, for example, a single column of pixels in the display panel 100 has a better aperture ratio than a pixel in which a plurality of scan lines are disposed on a single column of pixels.

In addition, since the high frequency signal is susceptible to the capacitance, the voltage level of the signal is insufficient. In some embodiments of the present invention, the duration of each scan signal may include a preliminary time and a pixel charging time. Taking the scanning signal of the scanning line S_1 as an example, the preparation time may be Tp, and the pixel charging time may be Ts1. The preparation time Tp can make the scanning signal have a sufficient time transition state (for example, low potential charging is high potential or high potential discharging is low potential), so that the pixel internal crystal can have a pixel charging time. Sufficient time for data writing.

Furthermore, in some embodiments of the present invention, the scan signals transmitted by the scan lines S_1, S_2, . . . , S_2n are respectively generated in a frame period, and any two adjacent first scan signals and any Two adjacent The second scan signals have a time delay Td with each other. The so-called picture period here may be a period of one full screen update. In some cases, one picture period of the display panel 100 may be 1/60 second, that is, the full picture is updated 60 times per second. Moreover, in some embodiments, the length of the time delay Td may be equal to the pixel charging time Ts1 of the scan signal of the scan line S_1.

In addition, in some embodiments of the present invention, the first gate driver 140 is disposed on one side of the first display portion 110, electrically connected to the scan lines S_1, S_2, . . . , S_n, and is configured to sequentially generate the first scan signal. . The second gate driver 150 is disposed on one side of the second display portion, and is electrically connected to the scan lines S_n+1, S_n+2, . . . , S_2n, and is configured to sequentially generate the second scan signals. In some embodiments, the first gate driver 140 is electrically connected to the second gate driver 150 and used as a gate driving circuit to enable the second gate driver 150 to be connected to the first gate driver 140. Second scan signal. In practice, the first gate driver 140 and the second gate driver 150 can be implemented by shifting a shift register, but are not limited thereto.

In view of the above, an embodiment of the present invention is a display panel provided with two display portions, wherein scan lines distributed on different display portions are arranged side by side and are separated from each other, and there is no physical direct connection relationship, and the scan signals are respectively separated. It is transmitted to different display sections through scan lines on different display sections. Since the scan lines distributed on different display portions and juxtaposed to each other can be responsible for turning on or off a part of the number (for example, half) of pixels, the setting is such that the load of the separately arranged scan lines can be effectively reduced. In addition, the display panel in some embodiments described above does not need to quickly switch the high frequency signal of the multiplexed circuit, and the charging of each column of pixels in the display panel is compared with the display panel using the multiplexed circuit. Time is not fast due to multiplexed circuits It is reduced by speed switching, so it can be manufactured by an amorphous silicon (a-si) process with low electron mobility.

FIG. 2a is a schematic diagram of a display panel 200 according to an embodiment of the invention. The display panel 200 includes a first display portion 110, a second display portion 120, and a material drive 130. The structures of the first display unit 110, the second display unit 120, and the data driver 130 in the display panel 200 are substantially the same as the corresponding structures in the display panel 100, and thus are not described herein.

As shown in the figure, the display panel 200 further includes a multiplex circuit 260 electrically connected to the data output pins pin_1, pin_2, ..., pin_m of the data driver 130. And the data lines D_1, D_2, ..., D_2m are used to selectively turn on one of the data output pins pin_1, pin_2, ..., pin_m and the data lines D_1, D_2, ..., D_2m. In practice, the multiplex circuit 260 can be implemented with a plurality of switches.

Through the above setting and operation, each of the output pins pin_1, pin_2, ..., pin_m of the data driver 130 can be connected to a plurality of data lines but only connected to a single data line at the same time, so that the data output pins can be greatly reduced. Pin_1, pin_2, ..., pin_m can also significantly reduce the load of the data driver 130, and ensure the picture quality of the display panel.

In an embodiment of the invention, when the scan lines S_1, S_2, ..., S_n sequentially transmit the first scan signal, the multiplex circuit 260 turns on the data output pins pin_1, pin_2, ..., pin_m and the first data line D_1, D_2, ..., D_m, when the second scan lines S_1, S_2, ..., S_n sequentially transmit the second scan signal, the multiplex circuit 260 turns on the data output pins pin_1, pin_2, ..., pin_m and the second data line D_m+ 1, D_m+2, ..., D_2m.

Figure 2b is a timing diagram of the operation of display panel 200 in Figure 2a. As shown in FIGS. 2a and 2b, the multiplex circuit 260 can cause the output pins pin_1, pin_2, ..., pin_m of the data driver 130 and the data lines D_1, D_2, ... in the first on period T1 of the frame period frame. D_m is respectively connected and simultaneously disconnected from the second data lines D_m+1, D_m+2, ..., D_2m, and the output pins pin_1, pin_2, ..., pin_m and data line D_m of the data driver 130 are in the second conduction period T2. +1, D_m+2, ..., D_2m are respectively connected and disconnected from the data lines D_1, D_2, ..., D_m, respectively. In this way, each column of pixels of the first display unit 110 and the second display unit 120 can be sequentially written with data signals.

Figure 2c is a schematic diagram of multiplex circuit 260 in Figure 2a. The multiplex circuit 260 can include a plurality of first switches M11, M12, ..., M1m, and a plurality of second switches M21, M22, ..., M2m. The first switches M11, M12, ..., M1m are electrically connected between the data output pins pin_1, pin_2, ..., pin_m and the data lines D_1, D_2, ..., D_m, respectively. The second switches M21, M22, ..., M2m are electrically connected between the data output pins pin_1, pin_2, ..., pin_m and the data lines D_m+1, D_m+2, ..., D_2m, respectively. In some embodiments, the first switches M11, M12, . . . , M1m may be connected to each other and jointly controlled by a first control line SW1, and the second switches M21, M22, . . . , M2m may be connected to each other and jointly The second control line SW2 is controlled.

Referring again to FIG. 2b, the first conduction period T1 in a picture period frame, the control signal transmitted by the first control line SW1 can turn on the first switches M11, M12, . . . , M1m to turn on the data output pin pin_1, Pin_2, ..., pin_m and data lines D_1, D_2, ..., D_m. In one painting The second conduction period T2 in the face period frame, the control signal transmitted by the second control line SW2 can turn on the second switches M21, M22, ..., M2m to turn on the data output pins pin_1, pin_2, ..., pin_m and the data line D_m+1, D_m+2, ..., D_2m. It should be noted that when the control signal transmitted by the first control line SW1 turns on the first switches M11, M12, . . . , M1m, the control signal transmitted by the second control line SW2 can turn off the second switches M21, M22, . M2m, with pin data output pins pin_1, pin_2, ..., pin_m and data lines D_m+1, D_m+2, ..., D_2m, and vice versa, so as to avoid data output pins pin_1, pin_2, ..., pin_m at the same time Connect (or transmit data signals) to data lines D_1, D_2, ..., D_m and data lines D_m+1, D_m+2, ..., D_2m to avoid increasing the load of data driver 130.

In view of the above, some embodiments of the present invention utilize a multiplexed circuit to turn on only one data line at a time, thereby reducing the load on the data drive. In addition, in some embodiments of the present invention, the control signals of the multiplex circuit generally correspond to half of the picture period, so the frequency of the control signals is lower and the power consumed is compared. It is lower and it is less likely to reduce the charging time of pixels when switching.

Another aspect of the present invention is a method of driving a display panel. This driving method can be used to drive a display panel having the same or similar structure as the aforementioned 1a or 2a. For convenience of description, the following driving methods are described by taking the embodiments shown in FIGS. 1a to 1b and FIGS. 2a to 2c as an example, but are not limited to the illustrated embodiments.

It should be noted that in the steps of the following driving methods, there is no specific order unless otherwise stated. In addition, the following steps may also Executed at the same time, or overlap in execution time.

In an embodiment of the invention, the driving method includes the following steps: (a) providing a display panel 100, the display panel 100 includes a first display portion 110, a second display portion 120, and a data driver 130, the first display portion 110 including a plurality of The first scan lines S_1, S_2, ..., S_n and the plurality of first data lines D_1, D_2, ..., D_m, the first scan lines S_1, S_2, ..., S_n are interleaved with the first data lines D_1, D_2, ..., D_m And configured to transmit a plurality of first scan signals, the second display portion 110 includes a plurality of second scan lines S_n+1, S_n+2, . . . , S_2n, and a plurality of second data lines D_m+1, D_m+2, . D_2m, the second scan lines S_n+1, S_n+2, ..., S_2n are different from the first scan lines S_1, S_2, ..., S_n and are interleaved with the second data lines D_m+1, D_m+2, ..., D_2m The second scan line S_n+1, S_n+2, ..., S_2n is arranged in parallel with the first scan lines S_1, S_2, ..., S_n in the direction of the first scan signal transmission, and the data driver 130 includes a plurality of data output connections. The foot, each of the data output pins pin_1, pin_2, ..., pin_m is electrically connected to the first data line D_1 One of D_2, ..., D_m and one of the second data lines D_m+1, D_m+2, ..., D_2m; (b) sequentially transmitting the first scan through the first scan lines S_1, S_2, ..., S_n Signaling to the first display unit 110; (c) sequentially transmitting the plurality of second scanning signals to the second display portion 120 through the second scanning lines S_n+1, S_n+2, ..., S_2n; and (d) by means of data The data output pins pin_1, pin_2, ..., pin_m of the driver 130 output a plurality of data signals, and transmit the data signals to the first display portion 110 and the second display portion through the first and second data lines D_1, D_2, ..., D_m. 120.

Through the above driving method, the output of the data driver 130 can be made. The material pins pin_1, pin_2, ..., pin_m are half of the number of all data lines D_1, D_2, ..., D_2m in the display panel 100, so that the design complexity of the data driver 130 can be greatly reduced. In addition, the scanning rate of the display panel 100 can be maintained while reducing the total number of output data pins pin_1, pin_2, . . . , pin_m of the data driver 130 at the same time.

In an embodiment of the invention, the step of transmitting the data signal through the first and second data lines D_1, D_2, ..., D_2m further comprises: transmitting the first and second data lines D_1, D_2, ..., D_2m at different times respectively. The data signal is transmitted to the first display unit 110 and the second display unit 120. Thus, the load of the data driver 130 for the first and second data lines D_1, D_2, . . . , D_2m can be reduced to reduce the display time delay (RC delay).

In an embodiment of the invention, the step of transmitting the data signal through the first and second data lines D_1, D_2, ..., D_2m further comprises: between the first conduction period T1 in a picture period frame, the first scanning line S_1 , S_2, . . . , S_n sequentially transmit the first scan signal, and turn on the data output pins pin_1, pin_2, . . . , pin_m and the first data lines D_1, D_2, . . . , D_2; and one of the second time frames in the frame period During the on period T2, the second scan lines S_n+1, S_n+2, ..., S_2n sequentially transmit the second scan signal, and turn on the data output pins pin_1, pin_2, ..., pin_m and the second data lines D_1, D_2, ... D_2, wherein the second conduction period T2 is different from the first conduction period T2.

In an embodiment of the invention, any two adjacent first scan signals and any two adjacent second scan signals have a time delay (such as Td) in the frame period frame.

In an embodiment of the invention, the duration of each scan signal may include a period of preparation time, such that the scan signal has a sufficient time transition state, such as low potential charge to high potential or high potential discharge to low potential.

In view of the above, with the embodiment of the present invention, the data output pin of the data driver can be reduced by half, and the complexity of the data driver is greatly reduced. In addition, by using another embodiment of the present invention, it is possible to avoid the load of the data driver being increased when the data output pin of the data driver is reduced, and the picture quality of the display panel is ensured.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and retouched without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

100, 200‧‧‧ display panel

110‧‧‧First Display Department

Pin_1-pin_m‧‧‧Output data pin

M11-M1m‧‧‧ first switch

120‧‧‧Second display

130‧‧‧Data Drive

140‧‧‧First Gate Driver

150‧‧‧Second gate driver

260‧‧‧Multiplex circuit

S_1-S_n‧‧‧ scan line

S_n+1-S_2n‧‧‧ scan line

D_1-D_m‧‧‧ data line

D_m+1-D_2m‧‧‧ data line

M21-M2m‧‧‧ second switch

SW1‧‧‧ first control line

SW2‧‧‧ second control line

Frame‧‧‧screen time

T1‧‧‧First conduction period

T2‧‧‧Second conduction period

Td‧‧‧ time delay

Ts1‧‧‧ time delay

Tp‧‧‧ time delay

1a is a schematic diagram of a display panel according to an embodiment of the invention; FIG. 1b is a timing diagram of operation of the display panel in FIG. 1a; and FIG. 2a is a display panel according to an embodiment of the invention Figure 2b is a timing diagram of the operation of the display panel in Figure 2a; Figure 2c is a schematic diagram of the multiplexed circuit in Figure 2a.

100‧‧‧ display panel

110‧‧‧First Display Department

120‧‧‧Second display

130‧‧‧Data Drive

140‧‧‧First Gate Driver

150‧‧‧Second gate driver

S_1-S_n‧‧‧ scan line

S_n+1-S_2n‧‧‧ scan line

D_1-D_m‧‧‧ data line

D_m+1-D_2m‧‧‧ data line

Pin_1-pin_m‧‧‧Output data pin

Claims (9)

A display panel includes: a first display portion, comprising: a plurality of first scan lines for sequentially transmitting a plurality of first scan signals; and a plurality of first data lines interleaved with the first scan lines a second display portion, arranged in parallel with the first display portion, comprising: a plurality of second scan lines, different from the first scan lines, in a direction in which the first scan signals are transmitted a scan line is arranged in parallel, and is configured to sequentially transmit a plurality of second scan signals after the first scan signals are sequentially transmitted; and a plurality of second data lines are alternately arranged with the second scan lines; A data driver includes a plurality of data output pins, wherein each of the data output pins is electrically connected to one of the first data lines and one of the second data lines. The display panel of claim 1, further comprising: a multiplex circuit electrically connected between the data output pins of the data driver and the first and second data lines for selectively Turning on the data output pins and one of the first and second data lines. The display panel of claim 2, wherein the first scans When the lines sequentially transmit the first scan signals, the multiplex circuit is configured to turn on the data output pins and the first data lines, and when the second scan lines sequentially transmit the second scan signals The multiplex circuit is configured to turn on the data output pins and the second data lines. The display panel of claim 2, wherein the multiplex circuit further comprises: a plurality of first switches electrically connected between the data output pins and the first data lines, and in a frame period One of the first conduction periods is used to respectively turn on the data output pins and the first data lines; and the plurality of second switches are electrically connected to the data output pins and the second data lines respectively. And during the second conduction period of the picture period, the data output pins and the second data lines are respectively turned on, wherein the second conduction period is different from the first conduction period. The display panel of claim 1, further comprising: a first gate driver disposed on one side of the first display portion, electrically connected to the first scan lines, and configured to sequentially generate the a scan signal; and a second gate driver disposed on one side of the second display portion, electrically connected to the second scan lines, and configured to sequentially generate the second scan signals; 1. The second scan signal is generated during a picture period, and any two adjacent first scan signals and any two adjacent ones are generated. The second scan signals have a time delay with each other. A display panel driving method includes: providing a display panel, the display panel includes a first display portion, a second display portion, and a data driver, the first display portion including a plurality of first scan lines and a plurality of strips a data line, the first scan lines are alternately arranged with the first data lines and configured to transmit a plurality of first scan signals, and the second display portion includes a plurality of second scan lines and a plurality of second data lines, The second scan lines are different from the first scan lines, and the second data lines are alternately arranged. The second scan lines are arranged side by side with the first scan lines in the direction in which the first scan signals are transmitted. The data driver includes a plurality of data output pins, each of the data output pins being electrically connected to one of the first data lines and one of the second data lines; The first scan line sequentially transmits the first scan signals to the first display portion; sequentially transmitting the plurality of second scan signals to the second display portion through the second scan lines; and by using the data driver These data output pin outputs a plurality of data signals, and transmitting the plurality of data signals transmitted through the plurality of first and second data line to the first display section and the second display portion. The driving method of claim 6, wherein the step of transmitting the data signals through the first and second data lines further comprises: transmitting the data signals through the first and second data lines at different times respectively To the first display portion and the second display portion. The driving method of claim 7, wherein the step of transmitting the data signals through the first and second data lines further comprises: during a first conduction period of a picture period, the first scanning lines are And transmitting the first scan signals, and turning on the data output pins and the first data lines; and during the second conduction period of the picture period, the second scan lines sequentially transmitting the And scanning the data output pins and the second data lines, wherein the second conduction period is different from the first conduction period. The driving method of claim 8, wherein any two adjacent first scan signals and any two adjacent second scan signals have a time delay with each other during the picture period.