CN109785810B - Scanning driving circuit, display device and scanning driving method - Google Patents
Scanning driving circuit, display device and scanning driving method Download PDFInfo
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- CN109785810B CN109785810B CN201910010448.4A CN201910010448A CN109785810B CN 109785810 B CN109785810 B CN 109785810B CN 201910010448 A CN201910010448 A CN 201910010448A CN 109785810 B CN109785810 B CN 109785810B
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Abstract
The application discloses a scanning driving circuit, a display device and a scanning driving method. The scanning driving circuit comprises a first scanning line, a second scanning line and a scanning driving chip, wherein the first scanning line is connected with at least one first pixel in the first pixel area; a second scanning line is connected with at least one second pixel in the second pixel area; the scanning driving chip is electrically connected with the first scanning line and used for driving the first scanning line to output a first scanning signal, and is also electrically connected with the second scanning line and used for driving the second scanning line to output a second scanning signal; the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first opening level corresponding to the first scanning signal is smaller than a second opening level corresponding to the second scanning signal. According to the technical scheme, the problem that the display panel of the display device is not uniform in charging is solved, and the display effect is improved.
Description
Technical Field
The present disclosure relates to display technologies, and in particular, to a scan driving circuit, a display device, and a scan driving method.
Background
As display devices, especially liquid crystal display devices, have been developed to have larger sizes and higher resolutions, the problem of non-uniform charging in regions of the display panel of the display device having different distances from the scan driving chip has become more serious. In general, the scan driving chip of the display device is disposed at a side of the display panel, and accordingly, the charging effect is the best in an area on the display panel close to the scan driving chip, and the charging effect is gradually deteriorated as the distance between the area on the display panel and the scan driving chip increases. At present, a timing control chip is usually used to adjust data signals in an area with a different distance from a scan driving chip, and the data signals are used to compensate for display differences caused by charging unevenness. However, since the data signal is directly related to the display gray scale, the data signal is often saturated in the high gray scale display state and the low gray scale display state, and it is difficult to effectively compensate the difference caused by the non-uniform charging, which results in the poor display effect of the display device.
Content of application
The present application provides a scan driving circuit, which aims to solve the technical problem of uneven charging in different areas of the display panel and improve the display effect of the display device.
In order to achieve the above object, the present application provides a scan driving circuit for a display device, where the display device includes a display panel, the display panel includes a first pixel area and a second pixel area, the first pixel area includes first pixels arranged in an array, and the second pixel area includes second pixels arranged in an array; the scanning driving circuit comprises a first scanning line, a second scanning line and a scanning driving chip, wherein the first scanning line is connected with at least one first pixel in the first pixel area; the second scanning line is connected with at least one second pixel in the second pixel area; the scanning driving chip is electrically connected with the first scanning line and used for driving the first scanning line to output a first scanning signal, and the scanning driving chip is also electrically connected with the second scanning line and used for driving the second scanning line to output a second scanning signal; the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first turn-on level corresponding to the first scanning signal is smaller than a second turn-on level corresponding to the second scanning signal.
Optionally, the first pixels are arranged in a rectangular array, and one first scan line is connected to the first pixels in the same row in the first pixel region; the second pixels are arranged in a rectangular array shape, and one second scanning line is connected with the second pixels in the same row in the second pixel area; the first scanning lines and the second scanning lines are connected to the scanning driving chip at intervals.
Optionally, the number of the scanning driving chips is two, the two scanning driving chips are respectively disposed on two opposite sides of the display panel, two ends of the first scanning line are respectively electrically connected to the two scanning driving chips, and two ends of the second scanning line are respectively electrically connected to the two scanning driving chips.
Optionally, the first pixel region includes a first pixel sub-region and a second pixel sub-region, and the first pixel sub-region and the second pixel sub-region are respectively located at two sides of the second pixel region.
Optionally, the scan driving chip includes a shift register, a potential converter, and an output buffer, which are connected in sequence, where the shift register is used to generate a pulse signal that is output in order according to a synchronization signal and a clock signal; the potential converter is used for converting the pulse signals which are sequentially output into a first initial scanning signal and a second initial scanning signal according to a first opening level, a second opening level and a closing level; the output buffer is configured to amplify the first initial scan signal and the second initial scan signal to improve driving capability of the first initial scan signal and the second initial scan signal, and generate the first scan signal and the second scan signal.
Optionally, the scan driving circuit further includes a power management chip, where the power management chip includes a first digital-to-analog conversion module and a second data conversion module, an output end of the first digital-to-analog conversion module is connected to an input end of the potential converter, and the first digital-to-analog conversion module is configured to generate a first start level according to a first level code; the output end of the second digital-to-analog conversion module is connected to the input end of the potential converter, and the second digital-to-analog conversion module is used for generating a second starting level according to a second level code.
Optionally, the scan driving circuit further includes a power management chip, where the power management chip includes a digital-to-analog conversion module, a first voltage-dividing resistor, and a second voltage-dividing resistor, an output end of the digital-to-analog conversion module is connected to an input end of the potential converter, and the digital-to-analog conversion module is configured to generate a second start level according to a level code; a first end of the first voltage-dividing resistor is connected to an output end of the digital-to-analog conversion module, and a second end of the first voltage-dividing resistor is connected to an input end of the potential converter; the first end of the second voltage-dividing resistor is connected to the second end of the first voltage-dividing resistor, and the second end of the second voltage-dividing resistor is grounded; a ratio of the resistance value of the second voltage dividing resistor to the sum of the resistance values of the first voltage dividing resistor and the second voltage dividing resistor is equivalent to a ratio of the first turn-on level to the second turn-on level.
In order to achieve the above object, the present application further provides a display device, which includes a display panel and a scan driving circuit, wherein the display panel includes a first pixel area and a second pixel area, the first pixel area includes first pixels arranged in an array, and the second pixel area includes second pixels arranged in an array; the scanning driving circuit comprises a first scanning line, a second scanning line and a scanning driving chip, wherein the first scanning line is connected with at least one first pixel in the first pixel area; the second scanning line is connected with at least one second pixel in the second pixel area; the scanning driving chip is electrically connected with the first scanning line and used for driving the first scanning line to output a first scanning signal, and the scanning driving chip is also electrically connected with the second scanning line and used for driving the second scanning line to output a second scanning signal; the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first turn-on level corresponding to the first scanning signal is smaller than a second turn-on level corresponding to the second scanning signal.
In order to achieve the above object, the present application further provides a scan driving method for a display device, where the display device includes a display panel, the display panel includes a first pixel area and a second pixel area, the first pixel area includes first pixels arranged in an array, and the second pixel area includes second pixels arranged in an array;
the scan driving method includes the steps of:
acquiring a starting instruction;
controlling a first scanning line connected with the first pixel to output a first scanning signal and a second scanning line connected with the second pixel to output a second scanning signal according to the starting instruction;
the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first turn-on level corresponding to the first scanning signal is smaller than a second turn-on level corresponding to the second scanning signal.
Optionally, a first on duration corresponding to the first on level is equal to a second on duration corresponding to the second on level.
In the technical scheme of the application, the scanning driving circuit is used for a display device, the display device comprises a display panel, the display panel comprises a first pixel area and a second pixel area, the first pixel area comprises first pixels which are arranged in an array mode, and the second pixel area comprises second pixels which are arranged in an array mode; the scanning driving circuit comprises a first scanning line, a second scanning line and a scanning driving chip, wherein the first scanning line is connected with at least one first pixel in the first pixel area; a second scanning line is connected with at least one second pixel in the second pixel area; the scanning driving chip is electrically connected with the first scanning line and used for driving the first scanning line to output a first scanning signal, and is also electrically connected with the second scanning line and used for driving the second scanning line to output a second scanning signal; the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first opening level corresponding to the first scanning signal is smaller than a second opening level corresponding to the second scanning signal. Divide into different pixel regions through the region on with display panel according to the difference with scanning driver chip distance far and near to respectively for each pixel region provides different scanning signal, it is specific, for providing the scanning signal that the level is bigger for the farther pixel region of distance scanning driver chip, with the uneven charging of compensation display panel different regions, effectively avoided the signal saturation problem that appears easily when compensating through adjusting data signal simultaneously, thereby improved display device's display effect.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a display device according to an embodiment of a scan driving circuit of the present application;
FIG. 2 is a schematic structural diagram of a display device according to another embodiment of the present application;
FIG. 3 is a schematic structural diagram of the scan driver chip shown in FIGS. 1 and 2;
FIG. 4 is a timing diagram of the signals in FIG. 3;
FIG. 5 is a schematic diagram of a power management chip in another embodiment of the scan driver circuit of the present application;
fig. 6 is a schematic structural diagram of a power management chip in another embodiment of the scan driving circuit of the present application.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 100 | Display panel | 110 | A |
| 111 | |
110a | |
| 110b | Second pixel sub-region | 120 | A second pixel region |
| 210 | A |
220 | The |
| 230 | |
231 | |
| 232 | Electric |
233 | |
| 310 | |
320 | |
| 410 | First digital-to- |
420 | Second digital-to- |
| 430 | Digital-to-analog conversion module | G1 | First stage scanning signal |
| G2 | Second level scanning signal | G3 | Third stage scanning signal |
| G4 | Fourth order scanning signal | Gn | Nth stage scanning signal |
| Gn+1 | N +1 th stage scanning signal | VGH1 | First on level |
| VGH2 | Second on level | VGL | Off level |
| VDD | Logic level | VSS | Ground level |
| STV | Synchronization signal | CKV | Clock signal |
| R1 | First voltage dividing resistor | R2 | Second voltage dividing resistor |
The implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that if directional indications (such as up, down, left, right, front, and back … …) are referred to in the embodiments of the present application, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
The application provides a scanning driving circuit to solve the problem that different areas in a display panel of a display device are charged unevenly, and the display effect of the display device is improved.
In an embodiment of the present application, as shown in fig. 1, the scan driving circuit is used in a display device, the display device includes a display panel 100, the display panel 100 includes a first pixel area 110 and a second pixel area 120, the first pixel area 110 includes first pixels 111 arranged in an array, and the second pixel area 120 includes second pixels 121 arranged in an array; the scan driving circuit includes a first scan line 210, a second scan line 220 and a scan driving chip 230, wherein the first scan line 210 is connected to at least one first pixel 111 in the first pixel region 110; a second scan line 220 connected to at least one second pixel 121 in the second pixel region 120; the scan driving chip 230 is electrically connected to the first scan line 210 for driving the first scan line 210 to output a first scan signal, and the scan driving chip 230 is further electrically connected to the second scan line 220 for driving the second scan line 220 to output a second scan signal; the first pixel region 110 is disposed close to the scan driving chip 230 relative to the second pixel region 120, and a first turn-on level corresponding to the first scan signal is smaller than a second turn-on level corresponding to the second scan signal.
Specifically, in the display device, a plurality of pixels are arranged in an array on the display panel 100, and each pixel includes a thin film transistor and a pixel electrode for controlling the display state of the pixel. The scanning line in the scanning driving circuit is connected with the gate electrode of the thin film transistor, and in the application, the scanning line is briefly described as being connected with the gate electrode of the pixel; the data line 320 in the data driving circuit is connected to the drain electrode of the thin film transistor, and in this application, the data line 320 is connected to the drain electrode of the pixel; and the pixel electrode is connected with the source electrode of the thin film transistor in the corresponding pixel. The display panel is controlled to display a certain picture by the cooperation of the scan driving chip 230 and the corresponding scan line thereof, and the data driving chip 310 and the corresponding data line 320 thereof. Hereinafter, the scanning driving circuit will be described in detail by taking an example in which the thin film transistor is an n-type transistor. In the case where the thin film transistor is an n-type transistor, the corresponding on level is high. When the scanning signal on the scanning line is at the turn-on level, i.e. in the high level state, the thin film transistor is turned on, at this time, the source and drain electrodes are conducted, and the data signal on the data line charges the pixel to deflect the liquid crystal so as to display a certain gray scale. Further, in order to display a color picture, color filters may be respectively disposed corresponding to the pixels to form pixel groups, and in one pixel group, at least one pixel disposed opposite to the red color filter, one pixel disposed opposite to the green color filter, and one pixel disposed opposite to the blue color filter are included to display a plurality of colors. In general, the scan lines extend in the lateral direction of the display panel 100, and the data lines 320 extend in the longitudinal direction of the display panel 100, and there are many different driving schemes according to the connection manner of the scan lines and the data lines to the respective pixels, but the scan driving is generally performed in rows. In the present embodiment, the display panel 100 includes the first pixel region 110 and the second pixel region 120, and since the scan driving chip 230 is disposed at the left side of the display panel 100 shown in fig. 1, the first pixel region 110 at the left side is closer to the scan driving chip 230 than the second pixel region 120 at the right side. The first pixel region 110 includes first pixels 111 arranged in an array, the second pixel region includes second pixels 121 arranged in an array, the first scan line 210 is connected to the first pixels 111 in the first pixel region 110 to provide the first pixels 111 with a first scan signal, and the second scan line 220 is connected to the second pixels 121 in the second pixel region 120 to provide the second pixels 121 with a second scan signal. Since the first pixel region 110 is closer to the scan driving chip 230 than the second pixel region 120, when the first scan signal is transmitted to the first pixel 111 through the first scan line 210, the waveform thereof is attenuated or distorted slightly, and when the second scan signal is transmitted to the second pixel 121 through the second scan line 220, the waveform thereof is attenuated or distorted severely, and if the first turn-on level of the first scan signal is consistent with the second turn-on level of the second scan signal, scan driving voltage differences are formed in different regions of the display panel 100, resulting in non-uniformity of display. In order to compensate for the scan driving voltage difference, the second turn-on level VGH2 corresponding to the second scan signal is greater than the first turn-on level VGH1 corresponding to the first scan signal, so that the turn-on levels finally applied to the gate electrode of the first pixel 111 and the gate electrode of the second pixel 121, which are transmitted through the first scan line and the second scan line, are equivalent, and further, the turn-on degrees of the tfts are substantially consistent among the pixels having different distances from the scan driving chip 230, so that the charging states of the tfts are consistent, thereby ensuring the display uniformity of the entire display panel and improving the display effect of the display device. It should be noted that the core of the scheme of this embodiment is to divide a plurality of pixels originally connected to the same scan line according to different distances from the scan driving chip 230 to form different pixel regions, and provide corresponding scan driving signals to the different pixel regions through different scan lines, so that the turn-on degrees of the thin film transistors in the pixels at different distances from the scan driving chip 230 are substantially the same, thereby substantially making the charging states of the pixels the same, ensuring the uniformity of display, and improving the display effect, regardless of the specific driving architecture mode between the scan lines and the pixels, and between the data lines and the pixels. Meanwhile, in the scheme of the embodiment, different scanning lines are arranged for different pixel areas on the display panel to provide different scanning signals, so that the problem of uneven display is compensated, and the data signals of the pixels do not need to be adjusted, so that the problem of data signal saturation under high gray scale or low gray scale is avoided, and the effect of the display device is improved more reliably.
In this embodiment, the scan driving circuit is used for a display device, the display device includes a display panel 100, the display panel 100 includes a first pixel area 110 and a second pixel area 120, the first pixel area 110 includes first pixels 111 arranged in an array, and the second pixel area 120 includes second pixels 121 arranged in an array; the scan driving circuit includes a first scan line 210, a second scan line 220 and a scan driving chip 230, wherein the first scan line 210 is connected to at least one first pixel 111 in the first pixel region 110; a second scan line 220 connected to at least one second pixel 121 in the second pixel region 120; the scan driving chip 230 is electrically connected to the first scan line 210 for driving the first scan line 210 to output a first scan signal, and the scan driving chip 230 is further electrically connected to the second scan line 220 for driving the second scan line 220 to output a second scan signal; the first pixel region 110 is disposed close to the scan driving chip 230 relative to the second pixel region 120, and a first turn-on level corresponding to the first scan signal is smaller than a second turn-on level corresponding to the second scan signal, so as to compensate for a scan driving voltage difference between the first pixel region 110 and the second pixel region 120. The display panel is divided into different pixel areas according to different distances from the scanning driving chip, different scanning signals are respectively provided for the pixel areas, specifically, the scanning signals with larger opening levels are provided for the pixel areas farther away from the scanning driving chip, uneven charging in different areas of the display panel is compensated, meanwhile, the problem of signal saturation which easily occurs when uneven display is compensated through adjusting data signals is effectively avoided, and therefore the display effect of the display device is improved.
Further, as shown in fig. 1, the first pixels 111 are arranged in a rectangular array, and a first scan line 210 connects the first pixels in the same row in the first pixel region 110; the second pixels 121 are arranged in a rectangular array, and a second scan line 220 is connected to the second pixels 121 in the same row in the second pixel region 120; the first scan lines 210 and the second scan lines 220 are alternately connected to the scan driving chip. In order to reduce the attenuation and distortion of signals on the scanning lines, when the scanning lines are arranged, the shortest or nearly shortest path between the scanning control chip and the target pixel is often selected to arrange the scanning lines. That is, in the present embodiment, the first scan lines 210 and the second scan lines 220 are alternately disposed in a range from the scan control chip 330 to the second pixel region 120, i.e., mainly including the display panel region of the first pixel region 110. And under the condition that the odd-numbered scanning line is the first scanning line, the even-numbered scanning line is the second scanning line, and on the contrary, under the condition that the even-numbered scanning line is the first scanning line, the odd-numbered scanning line is the first scanning line. The layout mode is beneficial to reducing the total length of the first scanning line and the second scanning line so as to reduce the attenuation or distortion of signals, and the layout of the first scanning line and the second scanning line is simple and beautiful, so that the process is simplified and possible problems are found in the maintenance process.
In another embodiment of the present application, as shown in fig. 2, the number of the scan driving chips is two, the two scan driving chips 230 are respectively disposed on two opposite sides of the display panel 100, two ends of the first scan line are respectively electrically connected to the two scan driving chips 230, and two ends of the second scan line are respectively electrically connected to the two scan driving chips 230. In general, the scan lines extend in a lateral direction of the display panel 100, and the scan driving chips 230 are respectively disposed at left and right sides of the display panel 100. Two ends of the scan line are electrically connected to the two scan driving chips 230, respectively, and in the driving process, the two scan driving chips 230 output the same scan driving signal, thereby implementing the bilateral driving of the display panel, reducing the difference between the scan driving signals received by the pixels on the left and right sides, and improving the display effect of the display device.
Further, in this embodiment, as shown in fig. 2, the first pixel region includes a first pixel sub-region 110a and a second pixel sub-region 110b, and the first pixel sub-region 110a and the second pixel sub-region 110b are respectively located at two sides of the second pixel region. That is, the first pixel region in the present application is not necessarily disposed continuously, and considering that the scan driving chip 230 is disposed on both sides of the display panel 100, the first pixel region 110 is formed in the pixel regions closer to both sides of the display panel 100, that is, the first pixel sub-region 110a and the second pixel sub-region 110b, and the second pixel region 120 is formed in the middle of the display panel 100, accordingly, the first turn-on level VGH1 corresponding to the first scan signal is smaller than the second turn-on level VGH2 corresponding to the second scan signal, so as to compensate for the non-uniformity of the driving in the two side regions and the middle region of the display panel, and improve the display effect of the display device.
In the above embodiment of the present application, as shown in fig. 3, the scan driving chip 230 includes a shift register 231, a potential converter 232 and an output buffer 233, which are connected in sequence, wherein the shift register 231 is configured to generate a pulse signal of an ordered output according to the synchronization signal STV and the clock signal CKV; the potential converter 232 is used for converting the sequentially output pulse signals into a first initial scanning signal and a second initial scanning signal according to a first turn-on level VGH1, a second turn-on level VGH2 and a turn-off level VGL; the output buffer 233 is used for amplifying the first initial scan signal and the second initial scan signal to increase the driving capability of the first initial scan signal and the second initial scan signal, and generate the first scan signal and the second scan signal. An input buffer may be further disposed at the input end of the shift register 231, or the input buffer and the shift register may be integrally disposed, so as to improve the signal-to-noise ratio of the synchronization signal STV and the clock signal CKV, and reduce the adverse effect of interference on the output signal. Fig. 4 is a timing diagram illustrating the generation of signals involved in the scan driving chip. The first scan signal and the second scan signal are generated in a similar manner except that the first scan signal is generated according to the first turn-on level VGH1 and the turn-off level VGL, and the second scan signal is generated according to the second turn-on level VGH2 and the turn-off level VGL. Taking the first scanning signal as an example, a synchronization signal STV is provided before the scanning starts, and is input to the first stage S/R of the shift register under the action of the falling edge of the clock signal CKV, the subsequent clock signal controls the time of each S/R output signal, and the pulse signal from each S/R output terminal is used to generate the corresponding first scanning signal. Since the pulse signal directly outputted from the shift register 231 is usually a logic voltage with high/low levels of 3.3V/0V, and the first turn-on level VGH1 of the first scan signal is much higher than 3.3V, and the turn-off level VGL may be lower than 0V, the pulse signal is converted into the first initial scan signal and the second initial scan signal by the level shifter 232. The potential converter 232 converts the low swing signal VDD/VSS into a high swing signal VGH1/VGL, i.e. a first initial scan signal, according to the logic level VDD and the ground level VSS input therein, wherein VGH1> VDD, and VGL < VSS, so as to ensure normal operation of the display device. Further, since the driving capability of the first initial scan signal directly output by the potential converter 232 is very low, the output buffer 233 is required to further amplify the first initial scan signal to obtain the first scan signal with a certain driving capability. Similarly, the generation principle of the second scan signal can refer to the first scan signal. In fig. 4, assuming that n is an odd number, the first-stage scan signal G1 and the third-stage scan signal G3 … correspond to the first scan signal Gn, and the second-stage scan signal G2 and the fourth-stage scan signal G4 … correspond to the second scan signal Gn +1, which is an n + 1-th scan signal Gn.
In another embodiment of the present application, as shown in fig. 5, the scan driving circuit further includes a power management chip, the power management chip includes a first digital-to-analog conversion module 410 and a second digital-to-analog conversion module 420, an output end of the first digital-to-analog conversion module 410 is connected to an input end of the potential converter, the first digital-to-analog conversion module 410 is configured to generate a first turn-on level VGH1 according to the first level code; the output terminal of the second DAC module 420 is coupled to the input terminal of the level shifter, and the second DAC module 420 is configured to generate the second turn-on level VGH2 according to the second level code. In this embodiment, two digital-to-analog conversion modules are arranged to generate a first turn-on level VGH1 and a second turn-on level VHG2, respectively, to provide a high level for the scan driving chip, and further generate a first scan signal and a second scan signal to drive the display panel.
In yet another embodiment of the present application, as shown in fig. 6, the scan driving circuit further includes a power management chip, the power management chip includes a digital-to-analog conversion module 430, a first voltage dividing resistor R1 and a second voltage dividing resistor R2, an output end of the digital-to-analog conversion module 430 is connected to an input end of the potential converter, and the digital-to-analog conversion module 430 is configured to generate a second on level according to the level code; a first end of the first voltage-dividing resistor R1 is connected to the output end of the digital-to-analog conversion module 430, and a second end of the first voltage-dividing resistor R1 is connected to the input end of the potential transformer; the first end of the second divider resistor R2 is connected to the second end of the first divider resistor R1, and the second end of the second divider resistor R2 is grounded; the ratio of the resistance of the second voltage-dividing resistor R2 to the sum of the resistances of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is equivalent to the ratio of the first turn-on level VGH1 to the second turn-on level VHG2, i.e., R2/(R1+ R2) ═ VGH1/VGH 2. In this embodiment, the voltage divider circuit formed by the first voltage divider resistor R1 and the second voltage divider resistor R2 only needs one digital-to-analog conversion module to generate the second turn-on level VGH2, and generates the first turn-on level VGH1 under the action of the voltage divider circuit, so as to realize the output of different turn-on levels, and further generate the first scan signal and the second scan signal, thereby being beneficial to reducing the process cost of the display device and the energy consumption of the display device during the operation process.
The present application further provides a display device, as shown in fig. 1, the display device includes a display panel 100 and a scan driving circuit, wherein the display panel 100 includes a first pixel area 110 and a second pixel area 120, the first pixel area 110 includes first pixels 111 arranged in an array, and the second pixel area 120 includes second pixels 121 arranged in an array. The specific structure of the scan driving circuit refers to the above embodiments, and since the display device adopts all the technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The present application further provides a scan driving method for a display device, as shown in fig. 1, the display device includes a display panel 100, the display panel 100 includes a first pixel area 110 and a second pixel area 120, the first pixel area 110 includes first pixels 111 arranged in an array, and the second pixel area 120 includes second pixels 121 arranged in an array;
the scanning driving method includes the steps of:
s100, acquiring a starting instruction;
step S200, according to the start instruction, controlling the first scan line 210 connected to the first pixel 111 to output a first scan signal, and controlling the second scan line 220 connected to the second pixel 121 to output a second scan signal;
the first pixel region 110 is disposed close to the scan driving chip 230 relative to the second pixel region 120, and a first turn-on level corresponding to the first scan signal is smaller than a second turn-on level corresponding to the second scan signal.
Specifically, since the scan driving chip 230 is disposed at the left side of the display panel 100 shown in fig. 1, the first pixel region 110 at the left side is closer to the scan driving chip 230 than the second pixel region 120 at the right side. The first pixel region 110 includes first pixels 111 arranged in an array, the second pixel region includes second pixels 121 arranged in an array, and the first scan line 210 is controlled to output a first scan signal and the second scan line 220 outputs a second scan signal according to a start instruction of the display device. Since the first pixel region 110 is closer to the scan driving chip 230 than the second pixel region 120, when the first scan signal is transmitted to the first pixel 111 through the first scan line 210, the waveform thereof is attenuated or distorted slightly, and when the second scan signal is transmitted to the second pixel 121 through the second scan line 220, the waveform thereof is attenuated or distorted severely, and if the first turn-on level of the first scan signal is consistent with the second turn-on level of the second scan signal, scan driving voltage differences are formed in different regions of the display panel 100, resulting in non-uniformity of display. In order to compensate for the scan driving voltage difference, the second turn-on level VGH2 corresponding to the second scan signal is greater than the first turn-on level VGH1 corresponding to the first scan signal, so that the turn-on levels finally applied to the gate electrode of the first pixel 111 and the gate electrode of the second pixel 121, which are transmitted through the first scan line and the second scan line, are equivalent, and further, the turn-on degrees of the tfts are substantially consistent among the pixels having different distances from the scan driving chip 230, so that the charging states of the tfts are consistent, thereby ensuring the display uniformity of the entire display panel and improving the display effect of the display device. Meanwhile, the problem of uneven display is compensated by providing different scanning signals, and the data signals of all pixels are not required to be adjusted, so that the problem of data signal saturation under high gray scale or low gray scale is avoided, and the effect of the display device is improved more reliably.
Further, a first on duration corresponding to the first on level is equal to a second on duration corresponding to the second on level, where the first on duration is a duration of a high level in one period of the first scanning signal, and the second on duration is a duration of a high level in one period of the second scanning signal. And in the time interval corresponding to the first opening time length and the second opening time length, the corresponding pixel is in an opening charging state. In order to ensure that pixels in different areas on the display panel have enough charging time, the first starting time is set to be equal to the second starting time, so that the problem of insufficient charging is avoided, and the display effect of the display device is improved.
The above description is only an alternative embodiment of the present application, and not intended to limit the scope of the present application, and all modifications and equivalents of the structure, which can be directly or indirectly applied to other related technical fields within the spirit of the present application are included in the scope of the present application.
Claims (8)
1. A scanning driving circuit is used for a display device, and the display device comprises a display panel and is characterized in that the display panel comprises a first pixel area and a second pixel area, the first pixel area comprises first pixels which are arranged in an array mode, and the second pixel area comprises second pixels which are arranged in an array mode;
the scan driving circuit includes:
the first scanning line is connected with at least one first pixel in the first pixel area;
the second scanning line is connected with at least one second pixel in the second pixel area;
the scanning driving chip is electrically connected with the first scanning line and used for driving the first scanning line to output a first scanning signal, and the scanning driving chip is also electrically connected with the second scanning line and used for driving the second scanning line to output a second scanning signal;
the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first turn-on level corresponding to the first scanning signal is smaller than a second turn-on level corresponding to the second scanning signal;
the scanning driving circuit further comprises a power management chip, and the power management chip comprises:
the output end of the digital-to-analog conversion module is connected with the input end of the potential converter, and the digital-to-analog conversion module is used for generating a second starting level according to the level code;
a first voltage dividing resistor, a first end of which is connected to the output end of the digital-to-analog conversion module, and a second end of which is connected to the input end of the potential converter;
a first end of the second voltage-dividing resistor is connected to a second end of the first voltage-dividing resistor, and a second end of the second voltage-dividing resistor is grounded;
a ratio of a resistance value of the second divider resistor to a sum of resistance values of the first divider resistor and the second divider resistor is equivalent to a ratio of the first turn-on level to the second turn-on level;
the first pixels are arranged in a rectangular array shape, and one first scanning line is connected with the first pixels in the same row in the first pixel area;
the second pixels are arranged in a rectangular array shape, and one second scanning line is connected with the second pixels in the same row in the second pixel area;
the first scanning lines and the second scanning lines are connected to the scanning driving chip at intervals.
2. The scan driving circuit of claim 1, wherein the number of the scan driving chips is two, the two scan driving chips are respectively disposed at two opposite sides of the display panel, two ends of the first scan line are respectively electrically connected to the two scan driving chips, and two ends of the second scan line are respectively electrically connected to the two scan driving chips.
3. The scan drive circuit of claim 2, wherein the first pixel region comprises a first pixel sub-region and a second pixel sub-region, the first pixel sub-region and the second pixel sub-region being respectively located on both sides of the second pixel region.
4. The scan driving circuit according to any one of claims 1 to 3, wherein the scan driving chip comprises, connected in sequence:
the shift register is used for generating a pulse signal which is output in order according to the synchronous signal and the clock signal;
the potential converter is used for converting the pulse signals which are sequentially output into a first initial scanning signal and a second initial scanning signal according to a first opening level, a second opening level and a closing level; and the combination of (a) and (b),
an output buffer for amplifying the first initial scan signal and the second initial scan signal to improve driving capability of the first initial scan signal and the second initial scan signal, and generating the first scan signal and the second scan signal.
5. The scan driver circuit of claim 4, wherein the power management chip further comprises:
the output end of the first digital-to-analog conversion module is connected to the input end of the potential converter, and the first digital-to-analog conversion module is used for generating a first starting level according to a first level code;
and the output end of the second digital-to-analog conversion module is connected to the input end of the potential converter, and the second digital-to-analog conversion module is used for generating a second starting level according to a second level code.
6. A display device, characterized in that the display device comprises:
the display panel comprises a first pixel area and a second pixel area, wherein the first pixel area comprises first pixels which are arranged in an array mode, and the second pixel area comprises second pixels which are arranged in an array mode;
the scan drive circuit of any of claims 1 to 5.
7. A scan driving method for the display device according to claim 6, wherein the display panel comprises a first pixel region and a second pixel region, the first pixel region comprises first pixels arranged in an array, and the second pixel region comprises second pixels arranged in an array;
the scan driving method includes the steps of:
acquiring a starting instruction;
controlling a first scanning line connected with the first pixel to output a first scanning signal and a second scanning line connected with the second pixel to output a second scanning signal according to the starting instruction;
the first pixel area is arranged close to the scanning driving chip relative to the second pixel area, and a first turn-on level corresponding to the first scanning signal is smaller than a second turn-on level corresponding to the second scanning signal.
8. The scan driving method as claimed in claim 7, wherein a first on duration corresponding to the first on level is equal to a second on duration corresponding to the second on level.
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| CN110310604B (en) * | 2019-06-29 | 2022-07-12 | 合肥视涯技术有限公司 | Scanning driving circuit, display panel and driving method of display panel |
| CN110299111B (en) * | 2019-06-29 | 2020-11-27 | 合肥视涯技术有限公司 | Scanning driving circuit, display panel and driving method of display panel |
| CN111951691B (en) * | 2020-08-25 | 2022-07-19 | 上海天马微电子有限公司 | Display panel and display device |
| CN112509528B (en) * | 2020-11-03 | 2022-06-07 | 重庆惠科金渝光电科技有限公司 | Gate drive circuit, display device and gate drive method of display panel |
| TWI767654B (en) * | 2021-04-16 | 2022-06-11 | 友達光電股份有限公司 | Display device and driving method thereof |
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| TWI459350B (en) * | 2012-10-24 | 2014-11-01 | Au Optronics Corp | Display panel and driving method thereof |
| CN103871342B (en) * | 2012-12-13 | 2017-02-08 | 厦门天马微电子有限公司 | Bilateral drive unit for grid driving, TFT array substrate and flat display |
| US8981374B2 (en) * | 2013-01-30 | 2015-03-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
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