TW201322495A - Light-mixing multichip package structure - Google Patents

Light-mixing multichip package structure Download PDF

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Publication number
TW201322495A
TW201322495A TW100143319A TW100143319A TW201322495A TW 201322495 A TW201322495 A TW 201322495A TW 100143319 A TW100143319 A TW 100143319A TW 100143319 A TW100143319 A TW 100143319A TW 201322495 A TW201322495 A TW 201322495A
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Taiwan
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light
light emitting
substrate body
emitting diode
unit
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TW100143319A
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Chinese (zh)
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Chia-Tin Chung
Shih-Neng Tai
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Paragon Sc Lighting Tech Co
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Publication of TW201322495A publication Critical patent/TW201322495A/en

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Abstract

A light-mixing multichip package structure includes a substrate unit, a light-emitting unit, a package unit, and a frame unit. The light-emitting unit includes a plurality of first light-emitting groups and a plurality of second light-emitting groups. The first light-emitting groups and the second light-emitting groups are electrically connected in series. Each first light-emitting group includes a plurality of first parallel connection units electrically connected in parallel, and each first parallel connection unit includes at least one blue LED chip. Each second light-emitting group includes at least one red LED chip. The package unit includes a phosphor resin body covering the first light-emitting groups and the second light-emitting groups. The frame unit includes a surrounding light-reflecting frame surrounding the first light-emitting groups, the second light-emitting groups, and the phosphor resin body.

Description

混光式多晶封裝結構Mixed light polycrystalline package structure

本發明係有關於一種多晶封裝結構,尤指一種混光式多晶封裝結構。The invention relates to a polycrystalline package structure, in particular to a light-mixing polycrystalline package structure.

關於發光二極體(LED)與傳統光源的比較,發光二極體具有體積小、省電、發光效率佳、壽命長、操作反應速度快、且無熱輻射與水銀等有毒物質的污染…等優點。因此近幾年來,發光二極體的應用面已極為廣泛。過去由於發光二極體的亮度還無法取代傳統的照明光源,但隨著技術領域的不斷提升,目前已研發出高照明輝度的高功率發光二極體,其足以取代傳統的照明光源。然而,傳統使用發光二極體所製成的發光結構皆有演色性與利用率不足的情況。故,如何藉由結構的設計,來提升LED的演色性與利用率,已成為該項事業人士所欲解決的重要課題。Regarding the comparison between a light-emitting diode (LED) and a conventional light source, the light-emitting diode has a small volume, power saving, good luminous efficiency, long life, fast operation response, and no pollution of toxic substances such as heat radiation and mercury, etc. advantage. Therefore, in recent years, the application of light-emitting diodes has been extremely extensive. In the past, the brightness of the light-emitting diodes could not replace the traditional illumination source. However, with the continuous improvement of the technical field, high-power light-emitting diodes with high illumination brightness have been developed, which is sufficient to replace the traditional illumination source. However, the conventional light-emitting structures made using the light-emitting diodes have a situation in which color rendering and utilization are insufficient. Therefore, how to improve the color rendering and utilization of LEDs through the design of the structure has become an important issue that the business person wants to solve.

本發明實施例在於提供一種混光式多晶封裝結構,其可用於增加LED演色性及LED利用率。Embodiments of the present invention provide a hybrid optical polycrystalline package structure that can be used to increase LED color rendering and LED utilization.

本發明其中一實施例所提供的一種混光式多晶封裝結構,其包括:一基板單元、一發光單元、一封裝單元、及一邊框單元。基板單元包括一基板本體。發光單元包括多個設置於基板本體上且電性連接於基板本體的第一發光群組及多個設置於基板本體上且電性連接於基板本體的第二發光群組,其中上述多個第一發光群組與上述多個第二發光群組串聯在一起,每一個第一發光群組包括多個並聯在一起的第一並聯單元,每一個第一並聯單元包括至少一個藍色發光二極體晶片,每一個第二發光群組包括至少一紅色發光二極體晶片。封裝單元包括一設置於基板本體上以同時覆蓋上述多個第一發光群組與上述多個第二發光群組的螢光膠體。邊框單元包括一透過塗佈方式而圍繞地成形於基板本體上的圍繞式反光框體,其中圍繞式反光框體同時圍繞上述多個第一發光群組、上述多個第二發光群組、及螢光膠體,且螢光膠體接觸圍繞式反光框體。A light-mixing polycrystalline package structure according to one embodiment of the present invention includes: a substrate unit, a light-emitting unit, a package unit, and a frame unit. The substrate unit includes a substrate body. The light-emitting unit includes a plurality of first light-emitting groups disposed on the substrate body and electrically connected to the substrate body, and a plurality of second light-emitting groups disposed on the substrate body and electrically connected to the substrate body, wherein the plurality of light-emitting units a light-emitting group is connected in series with the plurality of second light-emitting groups, each of the first light-emitting groups includes a plurality of first parallel units connected in parallel, each of the first parallel units including at least one blue light-emitting diode The body wafer, each of the second light-emitting groups includes at least one red light-emitting diode wafer. The package unit includes a phosphor colloid disposed on the substrate body to simultaneously cover the plurality of first light-emitting groups and the plurality of second light-emitting groups. The frame unit includes a surrounding reflective frame that is formed around the substrate body by a coating method, wherein the surrounding reflective frame simultaneously surrounds the plurality of first lighting groups, the plurality of second lighting groups, and Fluorescent colloid, and the fluorescent colloid contacts the surrounding reflective frame.

綜上所述,本發明實施例所提供的多晶封裝結構,其可透過“上述多個第一發光群組與上述多個第二發光群組串聯在一起,每一個第一發光群組包括多個並聯在一起的第一並聯單元,且每一個第二發光群組包括多個並聯在一起的第二並聯單元”的設計,以使得本發明的多晶封裝結構可用於增加LED演色性及LED利用率。In summary, the polycrystalline package structure provided by the embodiment of the present invention is permeable to the plurality of first lighting groups and the plurality of second lighting groups in series, each of the first lighting groups includes a plurality of first parallel cells connected in parallel, and each of the second lighting groups includes a plurality of second parallel cells in parallel" design, such that the polycrystalline package structure of the present invention can be used to increase LED color rendering properties and LED utilization.

為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,然而所附圖式僅提供參考與說明用,並非用來對本發明加以限制者。For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings.

[第一實施例][First Embodiment]

請參閱圖1A至圖1E所示,本發明第一實施例提供一種混光式多晶封裝結構Z,其包括:一基板單元1、一發光單元2、一限流單元C1、一邊框單元3、及一封裝單元4。As shown in FIG. 1A to FIG. 1E , a first embodiment of the present invention provides a light-mixing polycrystalline package structure Z, which includes: a substrate unit 1 , an illumination unit 2 , a current limiting unit C1 , and a frame unit 3 . And a package unit 4.

首先,基板單元1包括一基板本體10、一位於基板本體10上表面的第一置晶區域11、及一位於基板本體10上表面的第二置晶區域12。舉例來說,基板本體10可包括一電路基板100、一設置於電路基板100底部的散熱層101、多個設置於電路基板100上表面的導電焊墊102、及一設置於電路基板100上表面並用於露出上述多個導電焊墊102的絕緣層103。因此,散熱層101可用於增加電路基板100的散熱效能,並且上述多個絕緣層103可為一種可用於只讓上述多個導電焊墊102裸露出來並且達到局限焊接區域的防焊層。然而,上述對於基板本體10的界定並非用以限定本發明。First, the substrate unit 1 includes a substrate body 10, a first crystallized region 11 on the upper surface of the substrate body 10, and a second crystallized region 12 on the upper surface of the substrate body 10. For example, the substrate body 10 can include a circuit substrate 100, a heat dissipation layer 101 disposed on the bottom of the circuit substrate 100, a plurality of conductive pads 102 disposed on the upper surface of the circuit substrate 100, and a top surface disposed on the circuit substrate 100. And used to expose the insulating layer 103 of the plurality of conductive pads 102. Therefore, the heat dissipation layer 101 can be used to increase the heat dissipation performance of the circuit substrate 100, and the plurality of insulation layers 103 can be a solder resist layer that can be used to expose only the plurality of conductive pads 102 and reach a localized solder region. However, the above definition of the substrate body 10 is not intended to limit the invention.

再者,發光單元2包括多個設置於基板本體10上且電性連接於基板本體10的第一發光群組2A及多個設置於基板本體10上且電性連接於基板本體10的第二發光群組2B。上述多個第一發光群組2A與上述多個第二發光群組2B皆設置於第一置晶區域11上且串聯在一起。每一個第一發光群組2A包括多個並聯在一起的第一並聯單元20A,且每一個第一並聯單元20A包括至少一個藍色發光二極體晶片200A。每一個第二發光群組2B包括至少一紅色發光二極體晶片200B。舉例來說,上述多個第一發光群組2A與上述多個第二發光群組2B可交替地串聯在一起,且每一個第一發光群組2A的工作電流與每一個第二發光群組2B的工作電流可以非常相近。當每一個第一並聯單元20A使用多個藍色發光二極體晶片200A時,每一個第一並聯單元20A所使用的藍色發光二極體晶片200A的數量皆需相同。The light-emitting unit 2 includes a plurality of first light-emitting groups 2A disposed on the substrate body 10 and electrically connected to the substrate body 10, and a plurality of second light-emitting groups 2A disposed on the substrate body 10 and electrically connected to the substrate body 10. Illumination group 2B. The plurality of first lighting groups 2A and the plurality of second lighting groups 2B are all disposed on the first crystallizing region 11 and connected in series. Each of the first lighting groups 2A includes a plurality of first parallel units 20A connected in parallel, and each of the first parallel units 20A includes at least one blue light emitting diode wafer 200A. Each of the second light-emitting groups 2B includes at least one red light-emitting diode wafer 200B. For example, the plurality of first lighting groups 2A and the plurality of second lighting groups 2B may be alternately connected in series, and the operating current of each of the first lighting groups 2A and each of the second lighting groups The operating current of 2B can be very similar. When each of the first parallel cells 20A uses a plurality of blue light emitting diode chips 200A, the number of blue light emitting diode chips 200A used in each of the first parallel cells 20A needs to be the same.

此外,限流單元C1包括至少一電性設置於第二置晶區域12上的限流晶片C10。當然本發明也可以因應不同的電流需求,而使用多個電性設置於第二置晶區域12上的限流晶片C10。限流晶片C10可電性連接於發光單元2,以提供一特定且穩定的電流給發光單元2使用。舉例來說,限流晶片C10可透過打線的方式,以電性設置於基板單元1的第二置晶區域12上且電性連接於一用於提供定電壓電源的定電壓源供應器S1與發光單元2之間(如圖1D所示)。換言之,設計者可預先在基板單元1上規劃出一預定的第二置晶區域12,以使得限流晶片C10可電性地放置在基板單元1的第二置晶區域12所界定的範圍內。另外,因為限流晶片C10可作為定電壓源供應器S1與發光單元2之間的橋樑,以使得發光單元2能夠從定電壓源供應器S1得到穩定的電流供應。In addition, the current limiting unit C1 includes at least one current limiting wafer C10 electrically disposed on the second crystallizing region 12. Of course, the present invention can also use a plurality of current limiting wafers C10 electrically disposed on the second crystallizing region 12 in response to different current demands. The current limiting chip C10 can be electrically connected to the light emitting unit 2 to provide a specific and stable current for the light emitting unit 2. For example, the current limiting chip C10 can be electrically connected to the second crystallizing region 12 of the substrate unit 1 and electrically connected to a constant voltage source supplier S1 for supplying a constant voltage power supply. Between the light-emitting units 2 (as shown in Figure 1D). In other words, the designer can pre-plan a predetermined second crystallizing region 12 on the substrate unit 1 such that the current limiting wafer C10 can be electrically placed within the range defined by the second crystallizing region 12 of the substrate unit 1. . In addition, since the current limiting wafer C10 can serve as a bridge between the constant voltage source supplier S1 and the light emitting unit 2, the light emitting unit 2 can obtain a stable current supply from the constant voltage source supplier S1.

再者,本發明可更進一步包括一控制單元5(如圖1D所示),其具有至少一選擇性電性連接於限流單元C1的PWM控制模組50(PWM為Pulse Width Modulation(脈衝寬度變調)的縮寫),以使得限流單元C1電性連接於控制單元5與發光單元2之間,當然控制單元5亦可省略不用。舉例來說,當控制單元5電性連接於定電壓源供應器S1與限流單元C1之間時,限流單元C1可用來控制上述多個藍色發光二極體晶片200A與上述多個紅色發光二極體晶片200B來產生一預定的脈衝頻率(例如50Hz、60Hz、…120Hz...等等)。Furthermore, the present invention may further include a control unit 5 (shown in FIG. 1D) having at least one PWM control module 50 selectively coupled to the current limiting unit C1 (PWM is Pulse Width Modulation). The abbreviation of the transposition) is such that the current limiting unit C1 is electrically connected between the control unit 5 and the lighting unit 2, and of course the control unit 5 can also be omitted. For example, when the control unit 5 is electrically connected between the constant voltage source supply S1 and the current limiting unit C1, the current limiting unit C1 can be used to control the plurality of blue LED chips 200A and the plurality of red The LED chip 200B is used to generate a predetermined pulse frequency (e.g., 50 Hz, 60 Hz, ... 120 Hz, etc.).

另外,邊框單元3包括一可透過塗佈方式而環繞地成形於基板本體10上表面的圍繞式反光框體30及一可透過塗佈方式而環繞地成形於基板本體10上表面的圍繞式不透光框體31,其中圍繞式反光框體30圍繞發光單元2的多個藍色發光二極體晶片200A與多個紅色發光二極體晶片200B,以形成一對應於第一置晶區域11的第一膠體限位空間300,且圍繞式不透光框體31圍繞限流單元C1的限流晶片C10,以形成一對應於第二置晶區域12的第二膠體限位空間310。此外,圍繞式反光框體30與圍繞式不透光框體31彼此分離一特定距離。圍繞式反光框體30具有一因上述塗佈方式所形成的接合凸部3000(或一接合凹部),圍繞式不透光框體31也具有一因上述塗佈方式所形成的接合凸部3100(或一接合凹部),亦即當圍繞式反光框體30與圍繞式不透光框體31的圍繞成形製作程序快結束時,接合凸部(3000,3100)即會自然產生。In addition, the frame unit 3 includes a surrounding reflective frame 30 that is circumferentially formed on the upper surface of the substrate body 10 by a coating method, and a surrounding type that is circumferentially formed on the upper surface of the substrate body 10 by a coating method. The light-transmitting frame body 31, wherein the surrounding reflective frame body 30 surrounds the plurality of blue light-emitting diode chips 200A of the light-emitting unit 2 and the plurality of red light-emitting diode chips 200B to form a corresponding one of the first crystal-crystalline regions 11 The first colloidal limiting space 300 is disposed, and the surrounding opaque frame 31 surrounds the current limiting wafer C10 of the current limiting unit C1 to form a second colloidal limiting space 310 corresponding to the second crystallizing region 12. Further, the surrounding reflective frame body 30 and the surrounding opaque frame body 31 are separated from each other by a specific distance. The surrounding reflective frame body 30 has an engagement projection 3000 (or an engagement recess) formed by the above-described coating method, and the surrounding opaque frame 31 also has an engagement projection 3100 formed by the above coating method. (or an engagement recess), that is, when the surrounding reflective frame 30 and the surrounding opaque frame 31 are completed at the end of the forming process, the engaging projections (3000, 3100) are naturally generated.

舉例來說,圍繞式反光框體30(或圍繞式不透光框體31)的製作方法,至少包括下列幾個步驟:(1)首先,環繞地塗佈液態膠材(圖未示)於基板本體10上表面,其中液態膠材可被隨意地圍繞成一預定的形狀(例如圓形、方形、長方形等等),液態膠材的觸變指數(thixotropic index)可介於4至6之間,塗佈液態膠材於基板本體10上表面的壓力可介於350至450 kpa之間,塗佈液態膠材於基板本體10上表面的速度可介於5至15 mm/s之間,並且環繞地塗佈液態膠材於基板本體10上表面的起始點與終止點為大約相同的位置,因此起始點與終止點會有一膠體些許凸出的外觀;(2)然後,再固化液態膠材以形成圍繞式反光框體30,其中液態膠材可透過烘烤的方式硬化,烘烤的溫度可介於120至140度之間,且烘烤的時間可介於20至40分鐘之間。因此,圍繞式反光框體30的上表面可呈現一圓弧形,圍繞式反光框體30相對於基板本體10上表面之圓弧切線T的角度θ可介於40至50度之間,圍繞式反光框體30的頂面相對於基板本體10上表面的高度H可介於0.3至0.7 mm之間,圍繞式反光框體30底部的寬度D可介於1.5至3 mm之間,圍繞式反光框體30的觸變指數可介於4至6之間,且圍繞式反光框體30可為一內部混有多個無機添加顆粒的白色熱硬化反光框體。For example, the manufacturing method of the surrounding reflective frame body 30 (or the surrounding opaque frame body 31) includes at least the following steps: (1) First, a liquid glue (not shown) is applied circumferentially. The upper surface of the substrate body 10, wherein the liquid glue can be randomly surrounded into a predetermined shape (for example, a circle, a square, a rectangle, etc.), and the thixotropic index of the liquid glue can be between 4 and 6. The pressure applied to the upper surface of the substrate body 10 may be between 350 and 450 kPa, and the speed at which the liquid glue is applied to the upper surface of the substrate body 10 may be between 5 and 15 mm/s, and The liquid material is circumferentially coated on the upper surface of the substrate body 10 at a position similar to the end point, so that the starting point and the end point have a colloidal appearance; (2) then resolidifying the liquid The glue material forms a surrounding reflective frame body 30, wherein the liquid glue material can be hardened by baking, the baking temperature can be between 120 and 140 degrees, and the baking time can be between 20 and 40 minutes. between. Therefore, the upper surface of the surrounding reflective frame body 30 can have a circular arc shape, and the angle θ of the circular tangential line T of the surrounding reflective frame body 30 relative to the upper surface of the substrate body 10 can be between 40 and 50 degrees. The height H of the top surface of the reflective frame body 30 relative to the upper surface of the substrate body 10 may be between 0.3 and 0.7 mm, and the width D of the bottom of the surrounding reflective frame body 30 may be between 1.5 and 3 mm. The haptic index of the frame 30 may be between 4 and 6, and the surrounding reflective frame 30 may be a white thermosetting reflective frame with a plurality of inorganic added particles mixed therein.

再者,封裝單元4包括一填充於第一膠體限位空間300內以覆蓋發光單元2的螢光膠體40及一填充於第二膠體限位空間310內以覆蓋限流晶片C10的不透光膠體41。當限流晶片C10被不透光膠體41所覆蓋時,限流晶片C10可避免受到光源的照射而產生損壞的情況。螢光膠體40與不透光膠體41彼此分離一特定距離,且圍繞式反光框體30與不透光膠體41彼此分離一特定距離。換言之,封裝單元4包括一設置於基板本體10上以同時覆蓋上述多個第一發光群組2A與上述多個第二發光群組2B的螢光膠體40,圍繞式反光框體30可同時圍繞上述多個第一發光群組2A、上述多個第二發光群組2B、及螢光膠體40,且螢光膠體40接觸圍繞式反光框體30。限流晶片C10被不透光膠體41所覆蓋,限流晶片C10與不透光膠體41皆被一圍繞式不透光框體31所圍繞,且不透光膠體41接觸圍繞式不透光框體31。In addition, the package unit 4 includes a phosphor colloid 40 filled in the first colloidal limiting space 300 to cover the light emitting unit 2 and an opaque filled in the second colloidal limiting space 310 to cover the current limiting chip C10. Colloid 41. When the current limiting wafer C10 is covered by the opaque colloid 41, the current limiting wafer C10 can be prevented from being damaged by the irradiation of the light source. The fluorescent colloid 40 and the opaque colloid 41 are separated from each other by a certain distance, and the surrounding reflective frame 30 and the opaque colloid 41 are separated from each other by a specific distance. In other words, the package unit 4 includes a phosphor colloid 40 disposed on the substrate body 10 to simultaneously cover the plurality of first light-emitting groups 2A and the plurality of second light-emitting groups 2B. The surrounding reflective frame 30 can simultaneously surround The plurality of first light-emitting groups 2A, the plurality of second light-emitting groups 2B, and the fluorescent colloid 40, and the fluorescent colloid 40 contacts the surrounding reflective frame body 30. The current limiting wafer C10 is covered by the opaque colloid 41, and the current limiting wafer C10 and the opaque colloid 41 are surrounded by a surrounding opaque frame 31, and the opaque colloid 41 contacts the surrounding opaque frame. Body 31.

另外,第一實施例的基板單元1更進一步包括有至少一貫穿基板本體10的隔熱狹縫13,且隔熱狹縫13可位於發光單元2與限流單元C1之間或位於圍繞式反光框體30與圍繞式不透光框體31之間。因此,透過隔熱狹縫13的使用,可大大減少限流單元C1與發光單元2之間的熱傳路徑,進而使得本發明可有效減緩由限流單元C1的一或多個限流晶片C10所產生的熱量傳導至發光單元2的速度。In addition, the substrate unit 1 of the first embodiment further includes at least one heat insulating slit 13 penetrating through the substrate body 10, and the heat insulating slit 13 may be located between the light emitting unit 2 and the current limiting unit C1 or in a surrounding reflective manner. The frame 30 is spaced between the surrounding opaque frame 31. Therefore, through the use of the heat insulating slit 13, the heat transfer path between the current limiting unit C1 and the light emitting unit 2 can be greatly reduced, so that the present invention can effectively slow down one or more current limiting chips C10 of the current limiting unit C1. The generated heat is conducted to the speed of the light emitting unit 2.

[第二實施例][Second embodiment]

請參閱圖2所示,本發明第二實施例提供一種混光式多晶封裝結構。由圖2與圖1E的比較可知,本發明第二實施例與第一實施例最大的差別在於:每一個第一發光群組2A包括至少一藍色發光二極體晶片200A。每一個第二發光群組2B包括多個並聯在一起的第二並聯單元20B,且每一個第二並聯單元20B包括至少一個紅色發光二極體晶片200B。舉例來說,上述多個第一發光群組2A與上述多個第二發光群組2B可交替地串聯在一起,且每一個第一發光群組2A的工作電流與每一個第二發光群組2B的工作電流可以非常相近。當每一個第二並聯單元20B使用多個紅色發光二極體晶片200B時,每一個第二並聯單元20B所使用的紅色發光二極體晶片200B的數量皆需相同。Referring to FIG. 2, a second embodiment of the present invention provides a light mixing polycrystalline package structure. 2 and FIG. 1E, the greatest difference between the second embodiment of the present invention and the first embodiment is that each of the first light-emitting groups 2A includes at least one blue light-emitting diode wafer 200A. Each of the second lighting groups 2B includes a plurality of second parallel units 20B connected in parallel, and each of the second parallel units 20B includes at least one red light emitting diode wafer 200B. For example, the plurality of first lighting groups 2A and the plurality of second lighting groups 2B may be alternately connected in series, and the operating current of each of the first lighting groups 2A and each of the second lighting groups The operating current of 2B can be very similar. When each of the second parallel cells 20B uses a plurality of red light emitting diode chips 200B, the number of red light emitting diode chips 200B used in each of the second parallel cells 20B needs to be the same.

[第三實施例][Third embodiment]

請參閱圖3所示,本發明第三實施例提供一種混光式多晶封裝結構。由圖3與圖1E(或圖2)的比較可知,本發明第三實施例與第一(或第二)實施例最大的差別在於:每一個第一發光群組2A包括多個並聯在一起的第一並聯單元20A,且每一個第一並聯單元20A包括至少一個藍色發光二極體晶片200A。每一個第二發光群組2B包括多個並聯在一起的第二並聯單元20B,且每一個第二並聯單元20B包括至少一個紅色發光二極體晶片200B。舉例來說,上述多個第一發光群組2A與上述多個第二發光群組2B可交替地串聯在一起,且每一個第一發光群組2A的工作電流與每一個第二發光群組2B的工作電流可以非常相近。當每一個第一並聯單元20A使用多個藍色發光二極體晶片200A時,每一個第一並聯單元20A所使用的藍色發光二極體晶片200A的數量皆需相同。當每一個第二並聯單元20B使用多個紅色發光二極體晶片200B時,每一個第二並聯單元20B所使用的紅色發光二極體晶片200B的數量皆需相同。Referring to FIG. 3, a third embodiment of the present invention provides a light mixing polycrystalline package structure. 3 and FIG. 1E (or FIG. 2), the greatest difference between the third embodiment of the present invention and the first (or second) embodiment is that each of the first lighting groups 2A includes a plurality of parallel groups. The first parallel unit 20A, and each of the first parallel units 20A includes at least one blue light emitting diode wafer 200A. Each of the second lighting groups 2B includes a plurality of second parallel units 20B connected in parallel, and each of the second parallel units 20B includes at least one red light emitting diode wafer 200B. For example, the plurality of first lighting groups 2A and the plurality of second lighting groups 2B may be alternately connected in series, and the operating current of each of the first lighting groups 2A and each of the second lighting groups The operating current of 2B can be very similar. When each of the first parallel cells 20A uses a plurality of blue light emitting diode chips 200A, the number of blue light emitting diode chips 200A used in each of the first parallel cells 20A needs to be the same. When each of the second parallel cells 20B uses a plurality of red light emitting diode chips 200B, the number of red light emitting diode chips 200B used in each of the second parallel cells 20B needs to be the same.

[第四實施例][Fourth embodiment]

請參閱圖4A及4B所示,本發明第四實施例提供一種混光式多晶封裝結構Z。由圖4A與圖1C的比較、或由圖4B與圖1B的比較可知,本發明第四實施例與第一實施例最大的差別在於:第四實施例的基板單元1可省略隔熱狹縫13的製作。舉例來說,當限流單元C1不會產生過多的熱量時,則可考慮使用本發明第四實施例的方案。Referring to FIG. 4A and FIG. 4B, a fourth embodiment of the present invention provides a light-mixing polycrystalline package structure Z. 4A is a comparison with FIG. 4B and FIG. 1B, the maximum difference between the fourth embodiment of the present invention and the first embodiment is that the substrate unit 1 of the fourth embodiment can omit the thermal insulation slit. 13 production. For example, when the current limiting unit C1 does not generate excessive heat, the solution of the fourth embodiment of the present invention can be considered.

[第五實施例][Fifth Embodiment]

請參閱圖5A及4B所示,本發明第四實施例提供一種混光式多晶封裝結構Z。由圖4A與圖1C的比較、或由圖4B與圖1B的比較可知,本發明第四實施例更進一步包括:一橋式整流單元C2,其包括至少一設置於基板本體10上且裸露在外的橋式整流器C20。限流單元C1的限流晶片C10電性連接於發光單元2與橋式整流單元C2的橋式整流器C20之間,且橋式整流單元C2的橋式整流器C20電性連接於限流單元C1的限流晶片C10與一交流電源S2之間。舉例來說,限流單元C1與橋式整流單元C2皆可透過打線的方式,以電性連接於交流電源S2與發光單元2之間(如圖5B所示)。因為橋式整流單元C2可將交流電源S2轉換成直流電源,且限流單元C1可限制供應給發光單元2的直流電流量,以使得發光單元2能夠得到穩定的直流電流供應。Referring to FIGS. 5A and 4B, a fourth embodiment of the present invention provides a light-mixing polycrystalline package structure Z. 4A and FIG. 1B, the fourth embodiment of the present invention further includes: a bridge rectifier unit C2 including at least one disposed on the substrate body 10 and exposed Bridge rectifier C20. The current limiting chip C10 of the current limiting unit C1 is electrically connected between the light emitting unit 2 and the bridge rectifier C20 of the bridge rectifier unit C2, and the bridge rectifier C20 of the bridge rectifier unit C2 is electrically connected to the current limiting unit C1. The current limiting chip C10 is connected between an AC power source S2. For example, the current limiting unit C1 and the bridge rectifier unit C2 can be electrically connected between the alternating current power source S2 and the light emitting unit 2 by wire bonding (as shown in FIG. 5B). Since the bridge rectifier unit C2 can convert the AC power source S2 into a DC power source, and the current limiting unit C1 can limit the amount of DC current supplied to the light-emitting unit 2, the light-emitting unit 2 can obtain a stable DC current supply.

[第六實施例][Sixth embodiment]

請參閱圖6所示,本發明第六實施例提供一種混光式多晶封裝結構。由圖6與圖5C的比較可知,本發明第六實施例與第五實施例最大的差別在於:每一個第一發光群組2A包括至少一藍色發光二極體晶片200A。每一個第二發光群組2B包括多個並聯在一起的第二並聯單元20B,且每一個第二並聯單元20B包括至少一個紅色發光二極體晶片200B。舉例來說,上述多個第一發光群組2A與上述多個第二發光群組2B可交替地串聯在一起,且每一個第一發光群組2A的工作電流與每一個第二發光群組2B的工作電流可以非常相近。當每一個第二並聯單元20B使用多個紅色發光二極體晶片200B時,每一個第二並聯單元20B所使用的紅色發光二極體晶片200B的數量皆需相同。Referring to FIG. 6, a sixth embodiment of the present invention provides a light mixing polycrystalline package structure. 6 and FIG. 5C, the greatest difference between the sixth embodiment and the fifth embodiment of the present invention is that each of the first light-emitting groups 2A includes at least one blue light-emitting diode wafer 200A. Each of the second lighting groups 2B includes a plurality of second parallel units 20B connected in parallel, and each of the second parallel units 20B includes at least one red light emitting diode wafer 200B. For example, the plurality of first lighting groups 2A and the plurality of second lighting groups 2B may be alternately connected in series, and the operating current of each of the first lighting groups 2A and each of the second lighting groups The operating current of 2B can be very similar. When each of the second parallel cells 20B uses a plurality of red light emitting diode chips 200B, the number of red light emitting diode chips 200B used in each of the second parallel cells 20B needs to be the same.

[第七實施例][Seventh embodiment]

請參閱圖7所示,本發明第七實施例提供一種混光式多晶封裝結構。由圖7與圖5C(或圖6)的比較可知,本發明第七實施例與第五(或第六)實施例最大的差別在於:每一個第一發光群組2A包括多個並聯在一起的第一並聯單元20A,且每一個第一並聯單元20A包括至少一個藍色發光二極體晶片200A。每一個第二發光群組2B包括多個並聯在一起的第二並聯單元20B,且每一個第二並聯單元20B包括至少一個紅色發光二極體晶片200B。舉例來說,上述多個第一發光群組2A與上述多個第二發光群組2B可交替地串聯在一起,且每一個第一發光群組2A的工作電流與每一個第二發光群組2B的工作電流可以非常相近。當每一個第一並聯單元20A使用多個藍色發光二極體晶片200A時,每一個第一並聯單元20A所使用的藍色發光二極體晶片200A的數量皆需相同。當每一個第二並聯單元20B使用多個紅色發光二極體晶片200B時,每一個第二並聯單元20B所使用的紅色發光二極體晶片200B的數量皆需相同。Referring to FIG. 7, a seventh embodiment of the present invention provides a light mixing polycrystalline package structure. 7 and FIG. 5C (or FIG. 6), the greatest difference between the seventh embodiment and the fifth (or sixth) embodiment of the present invention is that each of the first lighting groups 2A includes a plurality of parallel groups. The first parallel unit 20A, and each of the first parallel units 20A includes at least one blue light emitting diode wafer 200A. Each of the second lighting groups 2B includes a plurality of second parallel units 20B connected in parallel, and each of the second parallel units 20B includes at least one red light emitting diode wafer 200B. For example, the plurality of first lighting groups 2A and the plurality of second lighting groups 2B may be alternately connected in series, and the operating current of each of the first lighting groups 2A and each of the second lighting groups The operating current of 2B can be very similar. When each of the first parallel cells 20A uses a plurality of blue light emitting diode chips 200A, the number of blue light emitting diode chips 200A used in each of the first parallel cells 20A needs to be the same. When each of the second parallel cells 20B uses a plurality of red light emitting diode chips 200B, the number of red light emitting diode chips 200B used in each of the second parallel cells 20B needs to be the same.

[第八實施例][Eighth Embodiment]

請參閱圖8所示,本發明第八實施例提供一種混光式多晶封裝結構。由圖8與圖5A的比較可知,本發明第八實施例與第五實施例最大的差別在於:限流單元C1的限流晶片C10與橋式整流單元C2的橋式整流器C20可同時被不透光膠體41所覆蓋,限流晶片C10、橋式整流器C20、及不透光膠體41皆被圍繞式不透光框體31所圍繞,且不透光膠體41接觸圍繞式不透光框體31。Referring to FIG. 8 , an eighth embodiment of the present invention provides a light mixing polycrystalline package structure. It can be seen from the comparison between FIG. 8 and FIG. 5A that the maximum difference between the eighth embodiment and the fifth embodiment of the present invention is that the current limiting chip C10 of the current limiting unit C1 and the bridge rectifier C20 of the bridge rectifier unit C2 can be simultaneously Covered by the transparent colloid 41, the current limiting chip C10, the bridge rectifier C20, and the opaque colloid 41 are surrounded by the surrounding opaque frame 31, and the opaque colloid 41 contacts the surrounding opaque frame. 31.

[第九實施例]Ninth Embodiment

請參閱圖9所示,本發明第九實施例提供一種混光式多晶封裝結構。第九實施例所使用的每一個第一發光群組2A包括多個並聯在一起的第一並聯單元20A,且每一個第一並聯單元20A包括至少一個藍色發光二極體晶片200A及至少一個紅色發光二極體晶片200B。另外,第九實施例所使用的每一個第二發光群組2B包括多個並聯在一起的第二並聯單元20B,且每一個第二並聯單元20B包括至少一個藍色發光二極體晶片200A及至少一個紅色發光二極體晶片200B。舉例來說,每一個第一發光群組2A的工作電流與每一個第二發光群組2B的工作電流可以非常相近。當每一個第一並聯單元20A使用多個藍色發光二極體晶片200A及多個紅色發光二極體晶片200B時,每一個第一並聯單元20A所使用的藍色發光二極體晶片200A的數量皆需相同,且每一個第一並聯單元20A所使用的紅色發光二極體晶片200B的數量皆需相同。當每一個第二並聯單元20B使用多個藍色發光二極體晶片200A及多個紅色發光二極體晶片200B時,每一個第二並聯單元20B所使用的藍色發光二極體晶片200A的數量皆需相同,且每一個第二並聯單元20B所使用的紅色發光二極體晶片200B的數量皆需相同。Referring to FIG. 9, a ninth embodiment of the present invention provides a light-mixing polycrystalline package structure. Each of the first lighting groups 2A used in the ninth embodiment includes a plurality of first parallel units 20A connected in parallel, and each of the first parallel units 20A includes at least one blue light emitting diode chip 200A and at least one Red light emitting diode chip 200B. In addition, each of the second lighting groups 2B used in the ninth embodiment includes a plurality of second parallel units 20B connected in parallel, and each of the second parallel units 20B includes at least one blue light emitting diode chip 200A and At least one red light emitting diode wafer 200B. For example, the operating current of each of the first lighting groups 2A and the operating current of each of the second lighting groups 2B may be very similar. When each of the first parallel cells 20A uses a plurality of blue light emitting diode chips 200A and a plurality of red light emitting diode chips 200B, each of the blue light emitting diode chips 200A used by the first parallel cells 20A The number needs to be the same, and the number of red LED chips 200B used in each of the first parallel units 20A needs to be the same. When each of the second parallel cells 20B uses a plurality of blue light emitting diode chips 200A and a plurality of red light emitting diode chips 200B, each of the blue light emitting diode chips 200A used by the second parallel cells 20B The number needs to be the same, and the number of red LED chips 200B used in each of the second parallel units 20B needs to be the same.

[第一實施例至第九實施例][First to Ninth Embodiments]

再者,請參閱圖10所示,上述第一實施例至第九實施例中,基板單元1包括多個設置於基板本體10上表面的正極焊墊P及多個設置於基板本體10上表面的負極焊墊N。其中,每一個藍色發光二極體晶片200A具有一正極201及一負極202,每一個藍色發光二極體晶片200A的正極201對應於上述多個正極焊墊P中的至少兩個,且每一個藍色發光二極體晶片200A的負極201對應於上述多個負極焊墊N中的至少兩個。此外,每一個紅色發光二極體晶片200B具有一正極201及一負極202,每一個紅色發光二極體晶片200B的正極201對應於上述多個正極焊墊P中的至少兩個,每一個紅色發光二極體晶片200B的負極202對應於上述多個負極焊墊N中的至少兩個。The first embodiment to the ninth embodiment, the substrate unit 1 includes a plurality of positive pads P disposed on the upper surface of the substrate body 10 and a plurality of upper surfaces disposed on the substrate body 10. Negative solder pad N. Each of the blue light emitting diode chips 200A has a positive electrode 201 and a negative electrode 202, and the positive electrode 201 of each of the blue light emitting diode chips 200A corresponds to at least two of the plurality of positive electrode pads P, and The negative electrode 201 of each of the blue light-emitting diode wafers 200A corresponds to at least two of the plurality of negative electrode pads N described above. In addition, each of the red LED chips 200B has a positive electrode 201 and a negative electrode 202, and the positive electrode 201 of each of the red light emitting diode chips 200B corresponds to at least two of the plurality of positive electrode pads P, each of which is red. The negative electrode 202 of the light emitting diode wafer 200B corresponds to at least two of the plurality of negative electrode pads N described above.

此外,本發明更進一步包括:一導線單元W,其包括多條第一導線W1及多條第二導線W2。其中,每兩條第一導線W1分別電性連接於每一個相對應的藍色發光二極體晶片200A的正極201與上述至少兩個所對應的正極焊墊P中的其中一個之間及電性連接於每一個相對應的藍色發光二極體晶片200A的負極202與上述至少兩個所對應的負極焊墊N中的其中一個之間。每兩條第二導線W2分別電性連接於每一個相對應的紅色發光二極體晶片200B的正極201與上述至少兩個所對應的正極焊墊P中的其中一個之間及電性連接於每一個相對應的紅色發光二極體晶片200B的負極202與上述至少兩個所對應的負極焊墊N中的其中一個之間。Furthermore, the present invention further includes a wire unit W including a plurality of first wires W1 and a plurality of second wires W2. Each of the two first wires W1 is electrically connected between one of the positive electrodes 201 of each corresponding blue light-emitting diode wafer 200A and one of the at least two corresponding positive electrode pads P. The connection between the negative electrode 202 of each corresponding blue light-emitting diode wafer 200A and one of the at least two corresponding negative electrode pads N is connected. Each of the two second wires W2 is electrically connected between the positive electrode 201 of each corresponding red LED chip 200B and one of the at least two corresponding positive electrode pads P, and is electrically connected to Between the negative electrode 202 of each corresponding red LED wafer 200B and one of the at least two corresponding negative electrode pads N described above.

藉此,因為每一個藍色發光二極體晶片200A的正極201與負極202或每一個紅色發光二極體晶片200B的正極201與負極202分別具有至少一個備用正極焊墊P及至少一個備用負極焊墊N,所以當第一導線W1的一末端打在(焊接在)其中一個正極焊墊P或負極焊墊N上而失敗時(造成浮焊,亦即第一導線W1與“正極焊墊P或負極焊墊N”之間沒有產生電性連接),製造者不需清除因為打線失敗而形成於正極焊墊P表面上的焊渣(或負極焊墊N表面上的焊渣),第一導線W1的一末端即可打在另外一個正極焊墊P(或另外一個負極焊墊N)上,以節省打線的時間(提升打線的效率)並增加打線的良率。Therefore, since the positive electrode 201 and the negative electrode 202 of each of the blue light-emitting diode chips 200A or the positive electrode 201 and the negative electrode 202 of each of the red light-emitting diode chips 200B have at least one spare positive electrode pad P and at least one standby negative electrode, respectively. Pad N, so when one end of the first wire W1 is hit (welded) on one of the positive pad P or the negative pad N (failure occurs, that is, the first wire W1 and the "positive pad" There is no electrical connection between the P or the negative electrode pad N", and the manufacturer does not need to remove the slag (or the slag on the surface of the negative electrode pad N) formed on the surface of the positive electrode pad P due to the failure of the wire bonding, One end of one wire W1 can be placed on the other positive electrode pad P (or another negative electrode pad N) to save the wire bonding time (increasing the efficiency of the wire bonding) and increase the wire bonding yield.

[實施例的可能功效][Possible efficacy of the embodiment]

綜上所述,本發明實施例所提供的多晶封裝結構,其可透過“上述多個第一發光群組與上述多個第二發光群組串聯在一起,每一個第一發光群組包括多個並聯在一起的第一並聯單元,且每一個第二發光群組包括多個並聯在一起的第二並聯單元”的設計,以使得本發明的多晶封裝結構可用於增加LED演色性及LED利用率。In summary, the polycrystalline package structure provided by the embodiment of the present invention is permeable to the plurality of first lighting groups and the plurality of second lighting groups in series, each of the first lighting groups includes a plurality of first parallel cells connected in parallel, and each of the second lighting groups includes a plurality of second parallel cells in parallel" design, such that the polycrystalline package structure of the present invention can be used to increase LED color rendering properties and LED utilization.

以上所述僅為本發明之較佳可行實施例,非因此侷限本發明的專利範圍,故舉凡運用本發明說明書及圖式內容所為的等效技術變化,均包含於本發明的範圍內。The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Therefore, equivalent technical changes that are made by the present invention and the contents of the drawings are included in the scope of the present invention.

S1...定電壓電源供應器S1. . . Constant voltage power supply

S2...交流電源S2. . . AC power

Z...多晶封裝結構Z. . . Polycrystalline package structure

1...基板單元1. . . Substrate unit

10...基板本體10. . . Substrate body

100...電路基板100. . . Circuit substrate

101...散熱層101. . . Heat sink

102...導電焊墊102. . . Conductive pad

P...正極焊墊P. . . Positive electrode pad

N...負極焊墊N. . . Negative electrode pad

103...絕緣層103. . . Insulation

11...第一置晶區域11. . . First crystal area

12...第二置晶區域12. . . Second crystal area

13...隔熱狹縫13. . . Thermal insulation slit

2...發光單元2. . . Light unit

2A...第一發光群組2A. . . First lighting group

20A...第一並聯單元20A. . . First parallel unit

200A...藍色發光二極體晶片200A. . . Blue light emitting diode chip

2B...第二發光群組2B. . . Second lighting group

20B...第二並聯單元20B. . . Second parallel unit

200B...紅色發光二極體晶片200B. . . Red light emitting diode chip

201...正極201. . . positive electrode

202...負極202. . . negative electrode

3...邊框單元3. . . Border unit

30...圍繞式反光框體30. . . Surrounding reflective frame

T...圓弧切線T. . . Arc tangent

θ...角度θ. . . angle

H...高度H. . . height

D...寬度D. . . width

300...第一膠體限位空間300. . . First colloid limit space

3000...接合凸部3000. . . Joint projection

31...圍繞式不透光框體31. . . Surrounding opaque frame

310...第二膠體限位空間310. . . Second colloidal limit space

3100...接合凸部3100. . . Joint projection

4...封裝單元4. . . Package unit

40...螢光膠體40. . . Fluorescent colloid

41...不透光膠體41. . . Opaque colloid

5...控制單元5. . . control unit

50...PWM控制模組50. . . PWM control module

C1...限流單元C1. . . Current limiting unit

C10...限流晶片C10. . . Current limiting chip

C2...橋式整流單元C2. . . Bridge rectifier unit

C20...橋式整流器C20. . . Bridge rectifier

W...導線單元W. . . Wire unit

W1...第一導線W1. . . First wire

W2...第二導線W2. . . Second wire

圖1A為本發明第一實施例的立體示意圖。1A is a perspective view of a first embodiment of the present invention.

圖1B為本發明第一實施例的側視剖面示意圖。Figure 1B is a side cross-sectional view showing the first embodiment of the present invention.

圖1C為本發明第一實施例的上視示意圖。1C is a top plan view of a first embodiment of the present invention.

圖1D為本發明第一實施例的功能方塊圖。Figure 1D is a functional block diagram of a first embodiment of the present invention.

圖1E為本發明第一實施例的電路示意圖。1E is a schematic circuit diagram of a first embodiment of the present invention.

圖2為本發明第二實施例的電路示意圖。2 is a circuit diagram of a second embodiment of the present invention.

圖3為本發明第三實施例的電路示意圖。Fig. 3 is a circuit diagram showing a third embodiment of the present invention.

圖4A為本發明第四實施例的上視示意圖。4A is a top plan view of a fourth embodiment of the present invention.

圖4B為本發明第四實施例的側視剖面示意圖。4B is a side cross-sectional view showing a fourth embodiment of the present invention.

圖5A為本發明第五實施例的上視示意圖。Fig. 5A is a top plan view showing a fifth embodiment of the present invention.

圖5B為本發明第五實施例的功能方塊圖。Figure 5B is a functional block diagram of a fifth embodiment of the present invention.

圖5C為本發明第五實施例的電路示意圖。FIG. 5C is a schematic circuit diagram of a fifth embodiment of the present invention.

圖6為本發明第六實施例的電路示意圖。Figure 6 is a circuit diagram showing a sixth embodiment of the present invention.

圖7為本發明第七實施例的電路示意圖。Fig. 7 is a circuit diagram showing a seventh embodiment of the present invention.

圖8為本發明第八實施例的上視示意圖。Figure 8 is a top plan view of an eighth embodiment of the present invention.

圖9為本發明第九實施例的發光單元的電路示意圖。FIG. 9 is a circuit diagram of a light emitting unit according to a ninth embodiment of the present invention.

圖10為本發明使用多個備用焊墊的局部上視示意圖。Figure 10 is a partial top plan view of a plurality of spare pads using the present invention.

S1...定電壓電源供應器S1. . . Constant voltage power supply

2...發光單元2. . . Light unit

2A...第一發光群組2A. . . First lighting group

20A...第一並聯單元20A. . . First parallel unit

200A...藍色發光二極體晶片200A. . . Blue light emitting diode chip

2B...第二發光群組2B. . . Second lighting group

200B...紅色發光二極體晶片200B. . . Red light emitting diode chip

C1...限流單元C1. . . Current limiting unit

Claims (21)

一種混光式多晶封裝結構,其包括:一基板單元,其包括一基板本體;一發光單元,其包括多個設置於該基板本體上且電性連接於該基板本體的第一發光群組及多個設置於該基板本體上且電性連接於該基板本體的第二發光群組,其中上述多個第一發光群組與上述多個第二發光群組串聯在一起,每一個第一發光群組包括多個並聯在一起的第一並聯單元,每一個第一並聯單元包括至少一個藍色發光二極體晶片,每一個第二發光群組包括至少一紅色發光二極體晶片;一封裝單元,其包括一設置於該基板本體上以同時覆蓋上述多個第一發光群組與上述多個第二發光群組的螢光膠體;以及一邊框單元,其包括一透過塗佈方式而圍繞地成形於該基板本體上的圍繞式反光框體,其中該圍繞式反光框體同時圍繞上述多個第一發光群組、上述多個第二發光群組、及該螢光膠體,且該螢光膠體接觸該圍繞式反光框體。A light-mixing polycrystalline package structure comprising: a substrate unit comprising a substrate body; a light-emitting unit comprising a plurality of first light-emitting groups disposed on the substrate body and electrically connected to the substrate body And a plurality of second lighting groups disposed on the substrate body and electrically connected to the substrate body, wherein the plurality of first lighting groups are connected in series with the plurality of second lighting groups, each first The light-emitting group includes a plurality of first parallel cells connected in parallel, each of the first parallel cells includes at least one blue light-emitting diode chip, and each of the second light-emitting groups includes at least one red light-emitting diode chip; The package unit includes a phosphor colloid disposed on the substrate body to cover the plurality of first light-emitting groups and the plurality of second light-emitting groups simultaneously, and a frame unit including a through-coating method a surrounding reflective frame formed on the substrate body, wherein the surrounding reflective frame simultaneously surrounds the plurality of first lighting groups, the plurality of second lighting groups, and Light colloid, and the colloid contacting the fluorescent reflector housing surrounding the formula. 如申請專利範圍第1項所述之混光式多晶封裝結構,其中上述多個第一發光群組與上述多個第二發光群組交替地串聯在一起,每一個第一並聯單元所使用的藍色發光二極體晶片的數量皆相同,且每一個第一發光群組的工作電流與每一個第二發光群組的工作電流相近。The light-mixing polycrystalline package structure according to claim 1, wherein the plurality of first light-emitting groups and the plurality of second light-emitting groups are alternately connected in series, and each of the first parallel units is used. The number of blue light-emitting diode chips is the same, and the operating current of each first light-emitting group is similar to the operating current of each second light-emitting group. 如申請專利範圍第1項所述之混光式多晶封裝結構,其中該圍繞式反光框體具有一因上述塗佈方式所形成的接合凸部,該圍繞式反光框體的上表面為一圓弧形,該圍繞式反光框體相對於該基板本體上表面之圓弧切線的角度介於40至50度之間,該圍繞式反光框體的頂面相對於該基板本體上表面的高度介於0.3至0.7 mm之間,該圍繞式反光框體底部的寬度介於1.5至3 mm之間,該圍繞式反光框體的觸變指數介於4至6之間,且該圍繞式反光框體為一內部混有多個無機添加顆粒的白色熱硬化反光框體。The light-mixing polycrystalline package structure according to claim 1, wherein the surrounding reflective frame has an engaging convex portion formed by the coating method, and the upper surface of the surrounding reflective frame is a a circular arc shape, the angle of the surrounding reflective frame relative to the arc of the upper surface of the substrate body is between 40 and 50 degrees, and the height of the top surface of the surrounding reflective frame relative to the upper surface of the substrate body is Between 0.3 and 0.7 mm, the width of the bottom of the surrounding reflective frame is between 1.5 and 3 mm, and the surrounding reflective frame has a thixotropic index between 4 and 6, and the surrounding reflective frame The body is a white thermosetting reflective frame body in which a plurality of inorganic added particles are mixed. 如申請專利範圍第1項所述之混光式多晶封裝結構,其中該基板單元包括多個設置於該基板本體上表面的正極焊墊及多個設置於該基板本體上表面的負極焊墊,其中每一個藍色發光二極體晶片具有一正極及一負極,每一個藍色發光二極體晶片的正極對應於上述多個正極焊墊中的至少兩個,每一個藍色發光二極體晶片的負極對應於上述多個負極焊墊中的至少兩個,其中每一個紅色發光二極體晶片具有一正極及一負極,每一個紅色發光二極體晶片的正極對應於上述多個正極焊墊中的至少兩個,每一個紅色發光二極體晶片的負極對應於上述多個負極焊墊中的至少兩個。The light-mixing polycrystalline package structure of claim 1, wherein the substrate unit comprises a plurality of positive electrode pads disposed on an upper surface of the substrate body and a plurality of negative electrode pads disposed on an upper surface of the substrate body. Each of the blue light emitting diode chips has a positive electrode and a negative electrode, and a positive electrode of each of the blue light emitting diode chips corresponds to at least two of the plurality of positive electrode pads, each of the blue light emitting diodes The negative electrode of the bulk wafer corresponds to at least two of the plurality of negative electrode pads, wherein each of the red light emitting diode chips has a positive electrode and a negative electrode, and a positive electrode of each of the red light emitting diode chips corresponds to the plurality of positive electrodes At least two of the pads, the negative electrode of each of the red light emitting diode chips corresponds to at least two of the plurality of negative electrode pads. 如申請專利範圍第4項所述之混光式多晶封裝結構,更進一步包括:一導線單元,其包括多條第一導線及多條第二導線,其中每兩條第一導線分別電性連接於每一個相對應的藍色發光二極體晶片的正極與上述至少兩個所對應的正極焊墊中的其中一個之間及電性連接於每一個相對應的藍色發光二極體晶片的負極與上述至少兩個所對應的負極焊墊中的其中一個之間,其中每兩條第二導線分別電性連接於每一個相對應的紅色發光二極體晶片的正極與上述至少兩個所對應的正極焊墊中的其中一個之間及電性連接於每一個相對應的紅色發光二極體晶片的負極與上述至少兩個所對應的負極焊墊中的其中一個之間。The light-mixing polycrystalline package structure of claim 4, further comprising: a wire unit comprising a plurality of first wires and a plurality of second wires, wherein each of the two first wires is electrically Connecting a positive electrode of each corresponding blue light emitting diode chip to one of the at least two corresponding positive electrode pads and electrically connecting to each corresponding blue light emitting diode chip Between the negative electrode and one of the at least two corresponding negative electrode pads, wherein each of the two second wires is electrically connected to the positive electrode of each corresponding red light emitting diode chip and the at least two One of the corresponding positive electrode pads is electrically connected between one of the negative electrodes of each corresponding red light emitting diode chip and one of the at least two corresponding negative electrode pads. 如申請專利範圍第1項所述之混光式多晶封裝結構,更進一步包括:一限流單元,其包括至少一設置於該基板本體上且電性連接於該發光單元與一定電壓電源之間的限流晶片,其中上述至少一限流晶片被一不透光封裝膠體所覆蓋,且上述至少一限流晶片與該圍繞式不透光框體皆被一圍繞式不透光框體所圍繞。The light-mixing polycrystalline package structure of claim 1, further comprising: a current limiting unit, comprising at least one disposed on the substrate body and electrically connected to the light emitting unit and a certain voltage power source; The current limiting chip, wherein the at least one current limiting chip is covered by an opaque encapsulant, and the at least one current limiting chip and the surrounding opaque frame are surrounded by a opaque frame around. 如申請專利範圍第1項所述之混光式多晶封裝結構,更進一步包括:一限流單元及一橋式整流單元,其中該限流單元包括至少一設置於該基板本體上的限流晶片,該橋式整流單元包括至少一設置於該基板本體上的橋式整流器,上述至少一限流晶片電性連接於該發光單元與上述至少一橋式整流器之間,上述至少一橋式整流器電性連接於上述至少一限流晶片與一交流電源之間,上述至少一限流晶片被一不透光封裝膠體所覆蓋,且上述至少一限流晶片與該圍繞式不透光框體皆被一圍繞式不透光框體所圍繞。The light-mixing polycrystalline package structure of claim 1, further comprising: a current limiting unit and a bridge rectifier unit, wherein the current limiting unit comprises at least one current limiting chip disposed on the substrate body The bridge rectifier unit includes at least one bridge rectifier disposed on the substrate body, the at least one current limiting chip is electrically connected between the light emitting unit and the at least one bridge rectifier, and the at least one bridge rectifier is electrically connected Between the at least one current limiting chip and an AC power source, the at least one current limiting chip is covered by an opaque encapsulant, and the at least one current limiting chip and the surrounding opaque frame are surrounded by The opaque frame is surrounded by. 一種混光式多晶封裝結構,其包括:一基板單元,其包括一基板本體;一發光單元,其包括多個設置於該基板本體上且電性連接於該基板本體的第一發光群組及多個設置於該基板本體上且電性連接於該基板本體的第二發光群組,其中上述多個第一發光群組與上述多個第二發光群組串聯在一起,每一個第一發光群組包括至少一藍色發光二極體晶片,每一個第二發光群組包括多個並聯在一起的第二並聯單元,每一個第二並聯單元包括至少一個紅色發光二極體晶片;一封裝單元,其包括一設置於該基板本體上以同時覆蓋上述多個第一發光群組與上述多個第二發光群組的螢光膠體;以及一邊框單元,其包括一透過塗佈方式而圍繞地成形於該基板本體上的圍繞式反光框體,其中該圍繞式反光框體同時圍繞上述多個第一發光群組、上述多個第二發光群組、及該螢光膠體,且該螢光膠體接觸該圍繞式反光框體。A light-mixing polycrystalline package structure comprising: a substrate unit comprising a substrate body; a light-emitting unit comprising a plurality of first light-emitting groups disposed on the substrate body and electrically connected to the substrate body And a plurality of second lighting groups disposed on the substrate body and electrically connected to the substrate body, wherein the plurality of first lighting groups are connected in series with the plurality of second lighting groups, each first The light emitting group includes at least one blue light emitting diode chip, each of the second light emitting groups includes a plurality of second parallel cells connected in parallel, each of the second parallel cells including at least one red light emitting diode chip; The package unit includes a phosphor colloid disposed on the substrate body to cover the plurality of first light-emitting groups and the plurality of second light-emitting groups simultaneously, and a frame unit including a through-coating method a surrounding reflective frame formed on the substrate body, wherein the surrounding reflective frame simultaneously surrounds the plurality of first lighting groups, the plurality of second lighting groups, and Light colloid, and the colloid contacting the fluorescent reflector housing surrounding the formula. 如申請專利範圍第8項所述之混光式多晶封裝結構,其中上述多個第一發光群組與上述多個第二發光群組交替地串聯在一起,每一個第二並聯單元所使用的紅色發光二極體晶片的數量皆相同,且每一個第一發光群組的工作電流與每一個第二發光群組的工作電流相近。The light-mixing polycrystalline package structure according to claim 8, wherein the plurality of first light-emitting groups and the plurality of second light-emitting groups are alternately connected in series, and each of the second parallel units is used. The number of red light-emitting diode chips is the same, and the operating current of each first light-emitting group is close to the operating current of each second light-emitting group. 如申請專利範圍第8項所述之混光式多晶封裝結構,其中該圍繞式反光框體具有一因上述塗佈方式所形成的接合凸部,該圍繞式反光框體的上表面為一圓弧形,該圍繞式反光框體相對於該基板本體上表面之圓弧切線的角度介於40至50度之間,該圍繞式反光框體的頂面相對於該基板本體上表面的高度介於0.3至0.7 mm之間,該圍繞式反光框體底部的寬度介於1.5至3 mm之間,該圍繞式反光框體的觸變指數介於4至6之間,且該圍繞式反光框體為一內部混有多個無機添加顆粒的白色熱硬化反光框體。The light-mixing polycrystalline package structure according to claim 8, wherein the surrounding reflective frame has an engaging convex portion formed by the coating method, and the upper surface of the surrounding reflective frame is a a circular arc shape, the angle of the surrounding reflective frame relative to the arc of the upper surface of the substrate body is between 40 and 50 degrees, and the height of the top surface of the surrounding reflective frame relative to the upper surface of the substrate body is Between 0.3 and 0.7 mm, the width of the bottom of the surrounding reflective frame is between 1.5 and 3 mm, and the surrounding reflective frame has a thixotropic index between 4 and 6, and the surrounding reflective frame The body is a white thermosetting reflective frame body in which a plurality of inorganic added particles are mixed. 如申請專利範圍第8項所述之混光式多晶封裝結構,其中該基板單元包括多個設置於該基板本體上表面的正極焊墊及多個設置於該基板本體上表面的負極焊墊,其中每一個藍色發光二極體晶片具有一正極及一負極,每一個藍色發光二極體晶片的正極對應於上述多個正極焊墊中的至少兩個,每一個藍色發光二極體晶片的負極對應於上述多個負極焊墊中的至少兩個,其中每一個紅色發光二極體晶片具有一正極及一負極,每一個紅色發光二極體晶片的正極對應於上述多個正極焊墊中的至少兩個,每一個紅色發光二極體晶片的負極對應於上述多個負極焊墊中的至少兩個。The light-mixing polycrystalline package structure according to claim 8 , wherein the substrate unit comprises a plurality of positive electrode pads disposed on an upper surface of the substrate body and a plurality of negative electrode pads disposed on an upper surface of the substrate body Each of the blue light emitting diode chips has a positive electrode and a negative electrode, and a positive electrode of each of the blue light emitting diode chips corresponds to at least two of the plurality of positive electrode pads, each of the blue light emitting diodes The negative electrode of the bulk wafer corresponds to at least two of the plurality of negative electrode pads, wherein each of the red light emitting diode chips has a positive electrode and a negative electrode, and a positive electrode of each of the red light emitting diode chips corresponds to the plurality of positive electrodes At least two of the pads, the negative electrode of each of the red light emitting diode chips corresponds to at least two of the plurality of negative electrode pads. 如申請專利範圍第11項所述之混光式多晶封裝結構,更進一步包括:一導線單元,其包括多條第一導線及多條第二導線,其中每兩條第一導線分別電性連接於每一個相對應的藍色發光二極體晶片的正極與上述至少兩個所對應的正極焊墊中的其中一個之間及電性連接於每一個相對應的藍色發光二極體晶片的負極與上述至少兩個所對應的負極焊墊中的其中一個之間,其中每兩條第二導線分別電性連接於每一個相對應的紅色發光二極體晶片的正極與上述至少兩個所對應的正極焊墊中的其中一個之間及電性連接於每一個相對應的紅色發光二極體晶片的負極與上述至少兩個所對應的負極焊墊中的其中一個之間。The light-mixing polycrystalline package structure of claim 11, further comprising: a wire unit comprising a plurality of first wires and a plurality of second wires, wherein each of the two first wires is electrically Connecting a positive electrode of each corresponding blue light emitting diode chip to one of the at least two corresponding positive electrode pads and electrically connecting to each corresponding blue light emitting diode chip Between the negative electrode and one of the at least two corresponding negative electrode pads, wherein each of the two second wires is electrically connected to the positive electrode of each corresponding red light emitting diode chip and the at least two One of the corresponding positive electrode pads is electrically connected between one of the negative electrodes of each corresponding red light emitting diode chip and one of the at least two corresponding negative electrode pads. 如申請專利範圍第8項所述之混光式多晶封裝結構,更進一步包括:一限流單元,其包括至少一設置於該基板本體上且電性連接於該發光單元與一定電壓電源之間的限流晶片,其中上述至少一限流晶片被一不透光封裝膠體所覆蓋,且上述至少一限流晶片與該圍繞式不透光框體皆被一圍繞式不透光框體所圍繞。The light-mixing polycrystalline package structure of claim 8, further comprising: a current limiting unit, comprising at least one disposed on the substrate body and electrically connected to the light emitting unit and a certain voltage power source; The current limiting chip, wherein the at least one current limiting chip is covered by an opaque encapsulant, and the at least one current limiting chip and the surrounding opaque frame are surrounded by a opaque frame around. 如申請專利範圍第8項所述之混光式多晶封裝結構,更進一步包括:一限流單元及一橋式整流單元,其中該限流單元包括至少一設置於該基板本體上的限流晶片,該橋式整流單元包括至少一設置於該基板本體上的橋式整流器,上述至少一限流晶片電性連接於該發光單元與上述至少一橋式整流器之間,上述至少一橋式整流器電性連接於上述至少一限流晶片與一交流電源之間,上述至少一限流晶片被一不透光封裝膠體所覆蓋,且上述至少一限流晶片與該圍繞式不透光框體皆被一圍繞式不透光框體所圍繞。The light-mixing polycrystalline package structure of claim 8, further comprising: a current limiting unit and a bridge rectifier unit, wherein the current limiting unit comprises at least one current limiting chip disposed on the substrate body The bridge rectifier unit includes at least one bridge rectifier disposed on the substrate body, the at least one current limiting chip is electrically connected between the light emitting unit and the at least one bridge rectifier, and the at least one bridge rectifier is electrically connected Between the at least one current limiting chip and an AC power source, the at least one current limiting chip is covered by an opaque encapsulant, and the at least one current limiting chip and the surrounding opaque frame are surrounded by The opaque frame is surrounded by. 一種混光式多晶封裝結構,其包括:一基板單元,其包括一基板本體;一發光單元,其包括多個設置於該基板本體上且電性連接於該基板本體的第一發光群組及多個設置於該基板本體上且電性連接於該基板本體的第二發光群組,其中上述多個第一發光群組與上述多個第二發光群組串聯在一起,每一個第一發光群組包括多個並聯在一起的第一並聯單元,每一個第一並聯單元包括至少一個藍色發光二極體晶片,每一個第二發光群組包括多個並聯在一起的第二並聯單元,每一個第二並聯單元包括至少一個紅色發光二極體晶片;一封裝單元,其包括一設置於該基板本體上以同時覆蓋上述多個第一發光群組與上述多個第二發光群組的螢光膠體;以及一邊框單元,其包括一透過塗佈方式而圍繞地成形於該基板本體上的圍繞式反光框體,其中該圍繞式反光框體同時圍繞上述多個第一發光群組、上述多個第二發光群組、及該螢光膠體,且該螢光膠體接觸該圍繞式反光框體。A light-mixing polycrystalline package structure comprising: a substrate unit comprising a substrate body; a light-emitting unit comprising a plurality of first light-emitting groups disposed on the substrate body and electrically connected to the substrate body And a plurality of second lighting groups disposed on the substrate body and electrically connected to the substrate body, wherein the plurality of first lighting groups are connected in series with the plurality of second lighting groups, each first The illumination group includes a plurality of first parallel units connected in parallel, each of the first parallel units including at least one blue light emitting diode chip, and each of the second light emitting groups includes a plurality of second parallel units connected in parallel Each of the second parallel units includes at least one red light emitting diode chip; a package unit including a substrate disposed on the substrate body to simultaneously cover the plurality of first light emitting groups and the plurality of second light emitting groups a phosphor colloid; and a bezel unit comprising a surrounding reflective frame that is formed around the substrate body by a coating method, wherein the surrounding reflective frame is the same About said plurality of first light emitting group, the plurality of second light emitting group, and the fluorescent colloid, and the colloid contacting the fluorescent reflector housing surrounding the formula. 如申請專利範圍第15項所述之混光式多晶封裝結構,其中上述多個第一發光群組與上述多個第二發光群組交替地串聯在一起,每一個第一並聯單元所使用的藍色發光二極體晶片的數量皆相同,且每一個第一發光群組的工作電流與每一個第二發光群組的工作電流相近。The light-mixing polycrystalline package structure according to claim 15, wherein the plurality of first light-emitting groups and the plurality of second light-emitting groups are alternately connected in series, and each of the first parallel units is used. The number of blue light-emitting diode chips is the same, and the operating current of each first light-emitting group is similar to the operating current of each second light-emitting group. 如申請專利範圍第15項所述之混光式多晶封裝結構,其中該圍繞式反光框體具有一因上述塗佈方式所形成的接合凸部,該圍繞式反光框體的上表面為一圓弧形,該圍繞式反光框體相對於該基板本體上表面之圓弧切線的角度介於40至50度之間,該圍繞式反光框體的頂面相對於該基板本體上表面的高度介於0.3至0.7 mm之間,該圍繞式反光框體底部的寬度介於1.5至3 mm之間,該圍繞式反光框體的觸變指數介於4至6之間,且該圍繞式反光框體為一內部混有多個無機添加顆粒的白色熱硬化反光框體。The light-mixing polycrystalline package structure according to claim 15, wherein the surrounding reflective frame has an engaging convex portion formed by the coating method, and the upper surface of the surrounding reflective frame is a a circular arc shape, the angle of the surrounding reflective frame relative to the arc of the upper surface of the substrate body is between 40 and 50 degrees, and the height of the top surface of the surrounding reflective frame relative to the upper surface of the substrate body is Between 0.3 and 0.7 mm, the width of the bottom of the surrounding reflective frame is between 1.5 and 3 mm, and the surrounding reflective frame has a thixotropic index between 4 and 6, and the surrounding reflective frame The body is a white thermosetting reflective frame body in which a plurality of inorganic added particles are mixed. 如申請專利範圍第15項所述之混光式多晶封裝結構,其中該基板單元包括多個設置於該基板本體上表面的正極焊墊及多個設置於該基板本體上表面的負極焊墊,其中每一個藍色發光二極體晶片具有一正極及一負極,每一個藍色發光二極體晶片的正極對應於上述多個正極焊墊中的至少兩個,每一個藍色發光二極體晶片的負極對應於上述多個負極焊墊中的至少兩個,其中每一個紅色發光二極體晶片具有一正極及一負極,每一個紅色發光二極體晶片的正極對應於上述多個正極焊墊中的至少兩個,每一個紅色發光二極體晶片的負極對應於上述多個負極焊墊中的至少兩個。The light-mixing polycrystalline package structure of claim 15, wherein the substrate unit comprises a plurality of positive electrode pads disposed on an upper surface of the substrate body and a plurality of negative electrode pads disposed on an upper surface of the substrate body Each of the blue light emitting diode chips has a positive electrode and a negative electrode, and a positive electrode of each of the blue light emitting diode chips corresponds to at least two of the plurality of positive electrode pads, each of the blue light emitting diodes The negative electrode of the bulk wafer corresponds to at least two of the plurality of negative electrode pads, wherein each of the red light emitting diode chips has a positive electrode and a negative electrode, and a positive electrode of each of the red light emitting diode chips corresponds to the plurality of positive electrodes At least two of the pads, the negative electrode of each of the red light emitting diode chips corresponds to at least two of the plurality of negative electrode pads. 如申請專利範圍第18項所述之混光式多晶封裝結構,更進一步包括:一導線單元,其包括多條第一導線及多條第二導線,其中每兩條第一導線分別電性連接於每一個相對應的藍色發光二極體晶片的正極與上述至少兩個所對應的正極焊墊中的其中一個之間及電性連接於每一個相對應的藍色發光二極體晶片的負極與上述至少兩個所對應的負極焊墊中的其中一個之間,其中每兩條第二導線分別電性連接於每一個相對應的紅色發光二極體晶片的正極與上述至少兩個所對應的正極焊墊中的其中一個之間及電性連接於每一個相對應的紅色發光二極體晶片的負極與上述至少兩個所對應的負極焊墊中的其中一個之間。The light-mixing polycrystalline package structure of claim 18, further comprising: a wire unit comprising a plurality of first wires and a plurality of second wires, wherein each of the two first wires is electrically Connecting a positive electrode of each corresponding blue light emitting diode chip to one of the at least two corresponding positive electrode pads and electrically connecting to each corresponding blue light emitting diode chip Between the negative electrode and one of the at least two corresponding negative electrode pads, wherein each of the two second wires is electrically connected to the positive electrode of each corresponding red light emitting diode chip and the at least two One of the corresponding positive electrode pads is electrically connected between one of the negative electrodes of each corresponding red light emitting diode chip and one of the at least two corresponding negative electrode pads. 如申請專利範圍第15項所述之混光式多晶封裝結構,更進一步包括:一限流單元,其包括至少一設置於該基板本體上且電性連接於該發光單元與一定電壓電源之間的限流晶片,其中上述至少一限流晶片被一不透光封裝膠體所覆蓋,且上述至少一限流晶片與該圍繞式不透光框體皆被一圍繞式不透光框體所圍繞。The light-mixing polycrystalline package structure of claim 15, further comprising: a current limiting unit, comprising at least one disposed on the substrate body and electrically connected to the light emitting unit and a certain voltage power source The current limiting chip, wherein the at least one current limiting chip is covered by an opaque encapsulant, and the at least one current limiting chip and the surrounding opaque frame are surrounded by a opaque frame around. 如申請專利範圍第15項所述之混光式多晶封裝結構,更進一步包括:一限流單元及一橋式整流單元,其中該限流單元包括至少一設置於該基板本體上的限流晶片,該橋式整流單元包括至少一設置於該基板本體上的橋式整流器,上述至少一限流晶片電性連接於該發光單元與上述至少一橋式整流器之間,上述至少一橋式整流器電性連接於上述至少一限流晶片與一交流電源之間,上述至少一限流晶片被一不透光封裝膠體所覆蓋,且上述至少一限流晶片與該圍繞式不透光框體皆被一圍繞式不透光框體所圍繞。The light-mixing polycrystalline package structure of claim 15, further comprising: a current limiting unit and a bridge rectifier unit, wherein the current limiting unit comprises at least one current limiting chip disposed on the substrate body The bridge rectifier unit includes at least one bridge rectifier disposed on the substrate body, the at least one current limiting chip is electrically connected between the light emitting unit and the at least one bridge rectifier, and the at least one bridge rectifier is electrically connected Between the at least one current limiting chip and an AC power source, the at least one current limiting chip is covered by an opaque encapsulant, and the at least one current limiting chip and the surrounding opaque frame are surrounded by The opaque frame is surrounded by.
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