TW201310561A - Wafer defect analysis and trouble-shooting method of defect cause - Google Patents

Wafer defect analysis and trouble-shooting method of defect cause Download PDF

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TW201310561A
TW201310561A TW100131048A TW100131048A TW201310561A TW 201310561 A TW201310561 A TW 201310561A TW 100131048 A TW100131048 A TW 100131048A TW 100131048 A TW100131048 A TW 100131048A TW 201310561 A TW201310561 A TW 201310561A
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wafer
abnormal
defect
cause
analysis
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TW100131048A
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TWI419246B (en
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Jian-Cheng Huang
Si-Ting Qiu
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Rexchip Electronics Corp
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Abstract

The present invention is to dispose a plurality of defect detection stations in a wafer production process and define a detection station finding out the abnormal wafer as the abnormality detection station, while setting up all the process points between the abnormality detection station and at least one previous detection station as the cause interval to further utilize the wafer defect information to carry out problem detection in terms of the common factors of each process point. By means of step-by-step selection of the common factors and aiming at the selected common factors to carry out the work area grouping towards the detected wafer, each of the process points can obtain a chi-squared value by computation and the damage rate and the defection statistical information corresponding to each work area. The present invention, by means of the chi-squared value of each process point, sorts the doubt possibility of each process point, while being matched with the damage rate and the defection statistical information corresponding to each work area to judge the problem process point, thereby quickly finding out the factor lowering the process yield to increase the production efficiency.

Description

晶圓缺陷分析及缺陷原因的尋找方法Wafer defect analysis and method for finding defects

   本發明係有關一種半導體製程之問題查找方法,尤指一種晶圓缺陷分析及缺陷原因的尋找方法。The invention relates to a method for finding a problem of a semiconductor process, in particular to a method for searching for wafer defects and finding a cause of defects.

   隨著積體電路在面積以及效率上的要求日漸增高,半導體製程技術也漸趨於複雜,以目前通常之標準來說,一片晶圓從矽晶圓經過清洗、研磨、薄膜、顯影、蝕刻等製程步驟,需經過數百道製程,而在製造過程中,難免會遇到因製程條件或機台條件差異造成晶圓缺陷(defect)的問題。若無法即時檢知缺陷發生之原因,往往會造成製程良率大幅降低的問題。As the requirements for area and efficiency of integrated circuits are increasing, semiconductor process technology is becoming more and more complex. According to the current standard, a wafer is cleaned, ground, filmed, developed, etched, etc. from the wafer. The process steps require hundreds of processes, and in the manufacturing process, it is inevitable that there will be problems with wafer defects caused by process conditions or machine table differences. If the cause of the defect cannot be detected immediately, it will often cause a problem that the process yield is greatly reduced.

   為了解決此一問題,如中華民國專利公告第351827號「晶圓製程良率共同因素分析法」中揭露了一種有效推測發生低良率之問題點所在的方法,其利用選取複數個之晶圓批,當中含有發生問題之低良率晶圓批,並針對該複數個晶圓批於各製程點之各共同因素進行分析,每一製程點經計算可得一破壞率,破壞率(possibility)=不良晶圓數(count of bad lots)/晶圓批總數(count of total lots),該破壞率用以表示該製程點發生問題之可能性,從而以該破壞率(經適當加權)對所有製程點按涉案可能性進行排序,而可快速找出製程路徑中的問題點所在,藉以改善良率。但,習知之方法問題點有三,而使其在找尋問題點上的效率及精度受限,其一,習知之方法係針對所有製程點的所有共同因素進行搜尋,範圍過大;其二,造成低良率的因素非單一,可能來自於各製程點之缺陷逐站累積,亦或因電性不良等因素而形成,而使習知之方法不易找出真因;其三,習知之方法僅考慮各製程點之破壞率,易忽略各製程點內因各機台、零件、光罩等共同因素生產比例不同而造成之誤判。試以生產機台作為待分析之共同因素,因生產諸般考量,於各製程點,各機台之生產比率有所不同,當生產高度集中於單一機台時,易造成其破壞率過高而造成誤判。In order to solve this problem, for example, the Republic of China Patent Bulletin No. 351827 "Fabric Process Yield Common Factor Analysis Method" discloses a method for effectively estimating the problem of low yield, which utilizes a plurality of wafers. The batch contains low-yield wafer lots with problems, and analyzes the common factors of the multiple wafers at each process point. Each process point can be calculated to obtain a damage rate and possibility. = count of bad lots / count of total lots, which is used to indicate the probability of a problem with the process point, so that the damage rate (with appropriate weighting) is The process points are sorted according to the possibility of the case, and the problem points in the process path can be quickly found to improve the yield. However, the conventional method has three problems, and its efficiency and accuracy in finding the problem point are limited. First, the conventional method searches for all common factors of all process points, and the range is too large; second, it causes low The factors of yield are not single, and may be caused by the accumulation of defects at each process point, or by factors such as poor electrical performance, and the conventional method is not easy to find the true cause; third, the conventional method only considers each The destruction rate of the process point is easy to ignore the misjudgment caused by the different production ratios of various machines, parts, masks and other common factors in each process point. Trying to use the production machine as the common factor to be analyzed, due to the production considerations, the production ratio of each machine is different at each process point. When the production is highly concentrated on a single machine, it is easy to cause the damage rate to be too high. Caused a false positive.

   本發明之主要目的,在於解決習知檢測方式精確度不足而有誤判之可能的問題。The main object of the present invention is to solve the problem that the accuracy of the conventional detection method is insufficient and there is a possibility of misjudgment.

   為達上述目的,本發明提供一種晶圓缺陷分析及缺陷原因的尋找方法,其係於晶圓製備流程中設置複數個檢測站,並定義一發現異常晶圓的檢測站為一異常檢測站,該方法包含有以下步驟:To achieve the above object, the present invention provides a wafer defect analysis and a method for finding a defect cause by setting a plurality of detection stations in a wafer preparation process, and defining a detection station for detecting an abnormal wafer as an abnormality detection station. The method includes the following steps:

   S1:選定所欲分析之一缺陷種類,經電腦篩選或手動編碼而取得所有經過該異常檢測站的複數晶圓的該種類缺陷數量,並定義該異常檢測站與至少前一檢測站之間為一肇因區間,該肇因區間內具有至少一製程點,該製程點具有複數工作區,各該工作區用以對複數該晶圓進行對應製程工作;S1: selecting a defect type to be analyzed, and selecting, by computer screening or manual coding, the number of defects of the type of the plurality of wafers passing through the abnormality detecting station, and defining between the abnormal detecting station and at least the previous detecting station a factor interval having at least one process point in the range, the process point having a plurality of work areas, each of the work areas for performing a corresponding process on the plurality of wafers;

   S2:依據使用者之經驗與判斷,給定一缺陷數量標準值(SPEC),針對該複數晶圓之正常與異常進行判定,而標記每一受測晶圓為正常晶圓或異常晶圓;S2: determining, according to the experience and judgment of the user, a defect quantity standard value (SPEC), determining the normality and abnormality of the plurality of wafers, and marking each tested wafer as a normal wafer or an abnormal wafer;

   S3:選擇共同因素,由該肇因區間內之製程點的複數共同因素中選擇其中之一作為一分析因素,該共同因素可為機台、機台種類、機台型號、光罩及爐管位置等。S3: selecting a common factor, one of the plural factors of the process points in the cause interval is selected as an analysis factor, and the common factor may be a machine, a machine type, a machine model, a mask, and a furnace tube. Location and so on.

   S4:以該至少一製程點配合該分析因素,針對所有受測晶圓分組,每一製程點計算出一卡方(Chi-square)值以及複數對應各工作區之破壞率(NG Ratio),其中該卡方值代表該分析因素中,該異常晶圓數量與該分析因素之相關性,而該破壞率為該異常晶圓數量除以該異常晶圓數量與該正常晶圓數量之總和;S4: matching the analysis factor with the at least one process point, calculating a Chi-square value for each process point and a NG Ratio corresponding to each work area for each of the tested wafer groups, Wherein the chi-square value represents a correlation between the abnormal wafer quantity and the analysis factor in the analysis factor, and the damage rate is the sum of the abnormal wafer quantity divided by the sum of the abnormal wafer quantity and the normal wafer quantity;

   S5:若該卡方值顯示該異常晶圓數量與該分析因素之相關性小,則回到步驟S4,選擇另一共同因素,若該卡方值顯示該異常晶圓數量與該分析因素之相關性大,則繼續進行肇因分析。S5: if the chi-square value indicates that the correlation between the abnormal wafer quantity and the analysis factor is small, returning to step S4, selecting another common factor, if the chi-square value indicates the abnormal wafer quantity and the analysis factor If the correlation is large, continue to analyze the cause.

   由上述說明可知,本發明可分為三大主要階段:資訊輸入、資訊分析及資訊輸出。於資訊輸入時,首先選擇欲分析之特定缺陷種類,藉由複數晶圓上之缺陷資訊如缺陷大小、缺陷於晶圓上之分布、手動編碼等資訊,設定過濾條件以取得單一缺陷種類之各晶圓缺陷數量,再將此資訊輸入分析系統,並且訂定缺陷數量標準值(SPEC)之數值大小,以將經過該異常檢測站之複數晶圓分類為正常晶圓以及異常晶圓。接著於資訊分析階段時,選擇分析因素如機型、機台、光罩及爐管位置等製程點共同因素,利用卡方值排序該肇因區間內可能涉嫌之製程點,最後輸出涉嫌之製程點之卡方值及複數對應工作區之破壞率,以利進行後續分析。As can be seen from the above description, the present invention can be divided into three main stages: information input, information analysis, and information output. When inputting information, first select the specific defect type to be analyzed, and set the filtering conditions to obtain a single defect type by using defect information on the plurality of wafers such as defect size, distribution on the wafer, manual coding, and the like. The number of wafer defects is then input into the analysis system, and the value of the standard number of defects (SPEC) is set to classify the plurality of wafers passing through the anomaly detection station into normal wafers and abnormal wafers. Then, in the information analysis stage, select the common factors of the process factors such as model, machine, mask and tube position, use the chi-square value to sort the possible process points in the cause interval, and finally output the suspected process. The card's square value and complex number correspond to the damage rate of the work area for subsequent analysis.

   相較於習知技術,本發明之優點在於:Compared with the prior art, the advantages of the present invention are:

   1.利用卡方值判斷異常晶圓與分析因素之相關性,藉此避免因同一製程點上之各共同因素因生產量不同所造成的誤判。1. Use the chi-square value to determine the correlation between the abnormal wafer and the analysis factor, thereby avoiding the misjudgment caused by the different production factors due to the common factors on the same process point.

   2.因於晶圓製備流程中設立複數個缺陷檢測站點,故可定義異常檢測站與前一道正常檢測站為肇因區間,相較於習知方法以所有製程點作為分析對象,大幅減少其搜尋範圍。2. Since a plurality of defect detection stations are set up in the wafer preparation process, the anomaly detection station and the previous normal detection station can be defined as the cause interval, and the process is greatly reduced compared with the conventional method. Its search range.

   3.根據單一缺陷種類進行分析,其肇因單一,避免因不同種類的缺陷干擾分析的結果及分析誤判的問題。3. According to the type of single defect, the cause is single, avoiding the result of analysis of different types of defects and analyzing the misjudgment.

   有關本發明之詳細說明及技術內容,現就配合圖式說明如下:The detailed description and technical contents of the present invention will now be described as follows:

   請參閱「圖1」及「圖2」所示,本發明係為晶圓缺陷分析及缺陷原因的尋找方法,其係於晶圓製備流程中設置複數個檢測站,並定義一發現異常晶圓的檢測站為一異常檢測站,該方法包含有以下步驟:Referring to FIG. 1 and FIG. 2, the present invention relates to wafer defect analysis and defect cause finding method, which is to set a plurality of detection stations in a wafer preparation process and define an abnormal wafer. The detection station is an anomaly detection station, and the method includes the following steps:

   S1:過濾篩選特定種類之缺陷資訊,選定所欲分析之一缺陷種類,其係經電腦篩選或手動編碼而取得所有經過該異常檢測站的複數晶圓的該種類缺陷數量,因為不同的製程步驟可能會造成不同的缺陷如破裂、曝光不全、刮痕、坑洞、凸出及污痕等,利用電腦篩選或手動編碼的方式過濾出一種要進行分析的缺陷種類。另外定義該異常檢測站與至少前一檢測站之間為一肇因區間1,而取得所有經過該異常檢測站的複數晶圓上的缺陷數量,於本實施例中,其係以一第一檢測站10以及一第二檢測站20進行舉例,該第二檢測站20假設為該異常檢測站,而該第一檢測站10係為一檢查結果正常的正常檢測站,因此,該第一檢測站10與該第二檢測站20之間係為該肇因區間1,請配合參閱「圖3」所示,該肇因區間1具有至少一製程點,該製程點於本實施例中具有三個,分別為第一製程點31、第二製程點32以及第三製程點33,其中,各製程點31、32、33對應該分析因素而可分組為複數工作區,各該工作區用以對複數該晶圓進行對應製程工作,於本實施例中,該第一製程點31具有四個工作區A1、A2、A3、A4;該第二製程點32具有三個工作區B1、B2、B3;而該第三製程點33具有三個工作區C1、C2、C3。S1: filtering and screening specific types of defect information, selecting one type of defect to be analyzed, which is selected by computer or manually coded to obtain the number of defects of the type of the plurality of wafers passing through the abnormality detecting station, because different process steps It may cause different defects such as cracking, incomplete exposure, scratches, potholes, bulging and smudging, etc., using computer screening or manual coding to filter out a type of defect to be analyzed. Further, defining a cause interval 1 between the abnormality detecting station and at least the previous detecting station, and obtaining the number of defects on the plurality of wafers passing through the abnormal detecting station, in the embodiment, the first The detection station 10 and a second detection station 20 are exemplified. The second detection station 20 is assumed to be the abnormality detection station, and the first detection station 10 is a normal detection station whose inspection result is normal. Therefore, the first detection is performed. The cause interval 1 is between the station 10 and the second detection station 20. Please refer to FIG. 3 for the cause interval 1 having at least one process point. The process point has three in this embodiment. The first process point 31, the second process point 32, and the third process point 33, respectively, wherein each process point 31, 32, 33 can be grouped into a plurality of work areas corresponding to the analysis factors, and each of the work areas is used for For the corresponding process of the plurality of wafers, in the embodiment, the first process point 31 has four working areas A1, A2, A3, and A4; the second process point 32 has three working areas B1, B2. B3; and the third process point 33 has three work areas C1, C2, C3.

   S2:正常晶圓及異常晶圓之分類,依據一缺陷數量標準值(SPEC)對複數該晶圓進行一正常晶圓以及一異常晶圓之分類,而得到一正常晶圓數量以及一異常晶圓數量。舉例來說,使用者可根據經驗而定義該單一缺陷數量標準值,如訂為50,則代表若一片晶圓中超過50顆該種缺陷,則將之歸類為異常晶圓,若小於50,則歸類為正常晶圓,因此可藉此將經過該異常檢測站的複數晶圓進行分類而得到該正常晶圓數量以及該異常晶圓數量。S2: classification of normal wafers and abnormal wafers, according to a defect quantity standard value (SPEC), a normal wafer and an abnormal wafer are classified into a plurality of wafers to obtain a normal wafer number and an abnormal crystal. The number of circles. For example, the user can define the standard value of the single defect quantity according to experience. If the order is 50, it means that if there are more than 50 such defects in a wafer, it is classified as an abnormal wafer, if less than 50. It is classified as a normal wafer, so that the number of normal wafers and the number of abnormal wafers can be obtained by classifying a plurality of wafers passing through the abnormality detecting station.

   S3:選擇共同因素,由該肇因區間1內之製程點的複數共同因素中選擇其中之一作為一分析因素,該共同因素可為機台、機台種類、光罩、爐管位置、洗淨機台單批/雙批進站、機台零件使用週期、製程配方及晶圓等待時間等, 而可泛指晶圓於各製程點所共同擁有的生產資訊,以「圖3」為例,其係以機台作為分析因素,由於各製程點個別代表其所對應的工作,如黃光顯影、蝕刻、薄膜等製程,而各製程點中可分別具有複數個機台,亦即為本發明所指之工作區,經過各該製程點之晶圓分別可以並列的方式由各工作區完成對應工作。換句話說,於本實施例中,該工作區A1、A2、A3、A4分別代表一組於該第一製程點31內之工作機台,而該工作區B1、B2、B3分別代表一組於該第二製程點32內之工作機台;該工作區C1、C2、C3分別代表一組於該第三製程點33內之工作機台。S3: selecting a common factor, one of the plurality of common factors of the process point in the cause interval 1 is selected as an analysis factor, and the common factor may be a machine, a machine type, a mask, a tube position, and a wash. The single-batch/two-batch inbound of the net machine, the use cycle of the machine parts, the process recipe and the wafer waiting time, etc., can refer to the production information shared by the wafers at each process point, taking "Figure 3" as an example. The machine is used as an analysis factor. Since each process point represents its corresponding work, such as yellow light development, etching, film, etc., each process point can have multiple machines, that is, In the work area referred to in the invention, the wafers passing through the respective process points can be respectively arranged in parallel by the work areas. In other words, in the embodiment, the work areas A1, A2, A3, and A4 respectively represent a set of work machines in the first process point 31, and the work areas B1, B2, and B3 respectively represent a group. The working machine in the second process point 32; the working areas C1, C2, and C3 respectively represent a group of working machines in the third process point 33.

   S4:計算各製程點31、32、33之一卡方(Chi-square)值以及對應複數該工作區之破壞率(NG Ratio),以該至少一製程點配合該分析因素,計算出該卡方值以及該破壞率,其中該卡方值代表該分析因素中,該異常晶圓數量與該分析因素之相關性,而該破壞率為各工作區內該異常晶圓數量除以該異常晶圓數量與該正常晶圓數量之總和。而各工作區所工作之晶圓數量不一定相等,其主要原因是因為在某些狀況下,必須選擇讓同一製程點中的其中之一工作區負擔較重的製程工作,而使通過該其中之一工作區的晶圓數量大於其餘工作區。亦因為各工作區分別為獨立的機台進行運作,因而各具有其對應的破壞率。另外,各該工作區具有一異常晶圓數量實際值Nx,以及一異常晶圓數量預期值Ex,該卡方值係為取得各工作區之(Nx-Ex)2/Ex的總和後,透過查表取得,且若(Nx-Ex)2/Ex的總合數值越大,則查表所得之卡方值越趨近於0,表示相關性大,相反的,若(Nx-Ex)2/Ex的數值越小,則查表所得之卡方值越趨近於1,表示相關性小,而卡方值不大於1,其中,該異常晶圓預期值Ex是在假設該異常晶圓與該分析因素無關為前題下,根據各該工作區進行製程工作的晶圓數量而設定,也就是說,工作區的晶圓數量如果多,當然其異常晶圓的預設值就會大,藉此,便可以得知,各製程點中之異常晶圓數量與預期的異常晶圓數量是否具有顯著的差異性,以排除只看異常晶圓數量所造成的盲點。S4: Calculate a Chi-square value of each of the process points 31, 32, and 33, and a NG Ratio corresponding to the plurality of work areas, and calculate the card by using the at least one process point with the analysis factor. a square value and the damage rate, wherein the chi-square value represents a correlation between the abnormal wafer quantity and the analysis factor in the analysis factor, and the damage rate is the number of the abnormal wafers in each working area divided by the abnormal crystal The sum of the number of circles and the number of normal wafers. The number of wafers that work in each work area is not necessarily equal. The main reason is that in some cases, it is necessary to select a process that has one of the same process points to bear a heavier process. One of the work areas has a larger number of wafers than the rest of the work area. Also, because each work area is operated by an independent machine, each has its corresponding damage rate. In addition, each of the working areas has an abnormal wafer number actual value Nx and an abnormal wafer quantity expected value Ex, which is obtained by obtaining the sum of (Nx-Ex) 2 /Ex of each working area. If the total value of (Nx-Ex) 2 /Ex is larger, the chi-square value obtained by looking up the table will be closer to 0, indicating that the correlation is large. On the contrary, if (Nx-Ex) 2 The smaller the value of /Ex is, the closer the chi-square value obtained by the look-up table is to 1, indicating that the correlation is small, and the chi-square value is not greater than 1, wherein the abnormal wafer expected value Ex is assumed to be the abnormal wafer. Regardless of the analysis factor, it is set according to the number of wafers in which the work area performs the process work, that is, if the number of wafers in the work area is large, the preset value of the abnormal wafer will be large. By this, it can be known whether there is a significant difference between the number of abnormal wafers in each process point and the expected number of abnormal wafers, so as to eliminate blind spots caused by only looking at the number of abnormal wafers.

   S5:利用卡方值佐以破壞率進行分析判斷,另可配合缺陷統計資訊或缺陷趨勢圖等相關資訊配合以進行分析判斷,若該卡方值顯示該異常晶圓數量與該分析因素之相關性小,則回到步驟S4,選擇另一共同因素,亦即,該卡方值趨近於1,代表所選擇的分析因素並非主要造成缺陷的因素,因而需要重新選擇共同因素以作為分析因素;若該卡方值顯示該異常晶圓數量與該分析因素之相關性大,亦即,該卡方值趨近於0,表示所選擇的分析因素為肇因區間1內的主要肇因,則繼續進行肇因分析,而若該卡方值趨近於0的製程點只有一個,便可以根據該製程點中之工作區的破壞率高低而判斷肇因的來源。S5: using the chi-square value to analyze and judge the damage rate, and matching the defect statistical information or the defect trend map with other relevant information for analysis and judgment, if the chi-square value indicates that the abnormal wafer quantity is related to the analysis factor If the sex is small, return to step S4 and select another common factor, that is, the chi-square value approaches 1 , which means that the selected analysis factor is not a factor mainly causing the defect, and thus the common factor needs to be re-selected as the analysis factor. If the chi-square value indicates that the number of abnormal wafers is highly correlated with the analysis factor, that is, the chi-square value approaches 0, indicating that the selected analysis factor is the main cause in the cause interval 1 Then, the cause analysis is continued, and if there is only one process point whose chi-square value approaches zero, the source of the cause can be judged according to the damage rate of the work area in the process point.

   若具有複數個製程點之卡方值顯示該異常晶圓數量與該分析因素之相關性大,則進行如下步驟:If the chi-square value of a plurality of process points indicates that the number of abnormal wafers is highly correlated with the analysis factor, the following steps are performed:

   S6:進行複數個製程點之交叉比對,蓋因於前後兩製程點中,有可能前一製程點肇因工作區於工作過程中產生特定缺陷,而通過該肇因工作區之晶圓又因巧合或生產配置等因素而多經過後一製程點之某一工作區,因而在卡方值及破壞率的結果上,並無法判別是由那個製程點所造成的,因此,如果卡方值趨近於0之製程點具有複數個,則必須經過交叉比對,以排除潛在因素的影響。而於「圖3」中顯示卡方值趨近於0的製程點有第一製程點31以及第二製程點32,因此,需要進行該第一製程點31以及該第二製程點32的交叉比對,請配合參閱「圖4」及「圖5」所示,「圖4」顯示單一製程點各工作區所對應異常晶圓之平均值、中間值、最大值、破壞率以及工作晶圓數量,而兩製程點進行搭配作交叉分析時,如「圖5」所示,很清楚的可以分析得知,破壞率較高的工作區皆包含B1以及B2,因而可將工作區B1以及B2判斷為異常肇因。S6: performing cross-comparison of a plurality of process points, because of the two process points in the front and the back, it is possible that the previous process point causes a specific defect in the work process due to the work area, and the wafer passing through the work area of the cause Due to factors such as coincidence or production configuration, it passes through a certain working area of the latter process point. Therefore, the result of the chi-square value and the damage rate cannot be determined by the process point. Therefore, if the chi-square value is Process points that approach zero have multiple, and must be cross-checked to eliminate the effects of potential factors. The process point shown in FIG. 3 that the chi-square value approaches 0 has a first process point 31 and a second process point 32. Therefore, the intersection of the first process point 31 and the second process point 32 is required. For comparison, please refer to "Figure 4" and "Figure 5". Figure 4 shows the average, median, maximum, damage rate and working wafer of abnormal wafers corresponding to each working area of a single process point. The quantity and the two process points are matched for cross-analysis. As shown in Figure 5, it is clear that the work areas with high damage rate include B1 and B2, so work areas B1 and B2 can be used. Judging as an abnormal cause.

   利用卡方值進行缺陷分析及判斷可提高準確率,其理由在於:卡方值係由一假設出發,首先假設受測晶圓之異常與待檢驗之共同因素無關,則受測異常晶圓的分配應符合共同因素之生產比例,亦即各分組(按待分析因素分類受測晶圓)中所含有異常晶圓數量應正比各分組中的晶圓數量,若實際異常晶圓數量符合各分組之生產比例,可計算得到一接近於一之卡方值,顯示異常晶圓與待分析因素無關,反之即為有關,故可排除習知分析方式,僅考慮破壞率而忽略生產比例所造成之誤判。Using the chi-square value for defect analysis and judgment can improve the accuracy. The reason is that the chi-square value is based on a hypothesis. First, if the abnormality of the tested wafer is not related to the common factor to be tested, the abnormal wafer is tested. The distribution should be in accordance with the production ratio of the common factor, that is, the number of abnormal wafers contained in each group (classified by the factors to be analyzed) should be proportional to the number of wafers in each group, if the actual number of abnormal wafers conforms to each group The production ratio can be calculated as a chi-square value close to one, indicating that the abnormal wafer has nothing to do with the factor to be analyzed, and vice versa. Therefore, the conventional analysis method can be excluded, and only the destruction rate is ignored and the production ratio is neglected. Misjudgment.

   綜上所述,相較於習知技術,本發明之優點在於:In summary, the advantages of the present invention over conventional techniques are:

   1.利用卡方值判斷異常晶圓與分析因素之相關性,藉此避免因同一製程點上之各共同因素(如機台、機型、光罩等)因生產量不同所造成的誤判。1. Use the chi-square value to determine the correlation between the abnormal wafer and the analysis factor, thereby avoiding the misjudgment caused by the common production factors (such as machine, model, mask, etc.) due to different production quantities at the same process point.

   2.因於晶圓製備流程中設立複數個缺陷檢測站點,故可定義異常檢測站與前一道正常檢測站為肇因區間,相較於習知方法以所有製程點作為分析對象,大幅減少其搜尋範圍。2. Since a plurality of defect detection stations are set up in the wafer preparation process, the anomaly detection station and the previous normal detection station can be defined as the cause interval, and the process is greatly reduced compared with the conventional method. Its search range.

   3.根據單一缺陷種類進行分析,避免因不同種類的缺陷干擾分析的結果及分析誤判的問題。3. Analyze according to the type of single defect, avoid the result of analysis of different types of defect interference and analyze the problem of misjudgment.

   4.利用交叉比對的方式避免當有複數卡方值趨近於0的製程點的狀況時,因潛在因素造成的誤判。4. Cross-comparison is used to avoid misjudgment caused by potential factors when there is a process point where the complex chi-square value approaches zero.

   因此本發明極具進步性及符合申請發明專利之要件,爰依法提出申請,祈 鈞局早日賜准專利,實感德便。Therefore, the present invention is highly progressive and conforms to the requirements of the invention patent application, and the application is filed according to law, and the praying office grants the patent as soon as possible.

   以上已將本發明做一詳細說明,惟以上所述者,僅爲本發明之一較佳實施例而已,當不能限定本發明實施之範圍。即凡依本發明申請範圍所作之均等變化與修飾等,皆應仍屬本發明之專利涵蓋範圍內。The present invention has been described in detail above, but the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made by the scope of the present application should remain within the scope of the patent of the present invention.

S1~S6...步驟S1~S6. . . step

1...肇因區間1. . . Cain interval

10...第一檢測站10. . . First test station

20...第二檢測站20. . . Second test station

31...第一製程點31. . . First process point

32...第二製程點32. . . Second process point

33...第三製程點33. . . Third process point

圖1,為本發明一較佳實施例之製程路徑示意圖。FIG. 1 is a schematic diagram of a process path according to a preferred embodiment of the present invention.

圖2,為本發明一較佳實施例之步驟流程示意圖。2 is a flow chart showing the steps of a preferred embodiment of the present invention.

圖3,為本發明一較佳實施例之卡方值分析示意圖。FIG. 3 is a schematic diagram of chi-square value analysis according to a preferred embodiment of the present invention.

圖4,為本發明一較佳實施例之單一製程點分析示意圖。4 is a schematic diagram of single process point analysis according to a preferred embodiment of the present invention.

圖5,為本發明一較佳實施例之交叉比對分析示意圖。FIG. 5 is a schematic diagram of cross-comparison analysis according to a preferred embodiment of the present invention.

S1~S6...步驟S1~S6. . . step

Claims (7)

一種晶圓缺陷分析及缺陷原因的尋找方法,其係於晶圓製備流程中設置複數個檢測站,並定義一發現異常晶圓的檢測站為一異常檢測站,該方法包含有以下步驟:
S1:選定所欲分析之一缺陷種類,並定義該異常檢測站與至少前一檢測站之間為一肇因區間,而取得經過該異常檢測站複數晶圓上的缺陷數量,該肇因區間具有至少一製程點,該製程點具有複數工作區,各該工作區用以對複數該晶圓進行對應製程工作;
S2:依據一缺陷數量標準值對複數該晶圓進行一正常晶圓以及一異常晶圓之分類,而得到一正常晶圓數量以及一異常晶圓數量;
S3:選擇共同因素,由該肇因區間內之製程點的複數共同因素中選擇其中之一作為一分析因素;
S4:以該至少一製程點配合該分析因素,計算出一卡方值以及複數對應各工作區的破壞率,其中該卡方值代表該分析因素中,該異常晶圓數量與該分析因素之相關性,而該破壞率為該異常晶圓數量除以該異常晶圓數量與該正常晶圓數量之總和;
S5:若該卡方值顯示該異常晶圓數量與該分析因素之相關性小,則回到步驟S4,選擇另一共同因素,若該卡方值顯示該異常晶圓數量與該分析因素之相關性大,則繼續進行肇因分析。
A wafer defect analysis and a method for finding a defect cause a plurality of detection stations in a wafer preparation process, and defining a detection station for detecting an abnormal wafer as an abnormality detection station, the method comprising the following steps:
S1: selecting a defect type to be analyzed, and defining a cause interval between the abnormality detecting station and at least the previous detecting station, and obtaining the number of defects on the plurality of wafers passing through the abnormal detecting station, the cause interval Having at least one process point, the process point has a plurality of work areas, each of the work areas for performing corresponding process work on the plurality of wafers;
S2: classifying a normal wafer and an abnormal wafer according to a defect quantity standard value to obtain a normal wafer quantity and an abnormal wafer quantity;
S3: selecting a common factor, and selecting one of the plural factors of the process points in the cause interval as an analysis factor;
S4: using the at least one process point to cooperate with the analysis factor, calculating a card square value and a plurality of damage rates corresponding to the working areas, wherein the card value represents the number of the abnormal wafers and the analysis factor Correlation, and the damage rate is the sum of the abnormal wafers divided by the sum of the abnormal wafer number and the normal wafer number;
S5: if the chi-square value indicates that the correlation between the abnormal wafer quantity and the analysis factor is small, returning to step S4, selecting another common factor, if the chi-square value indicates the abnormal wafer quantity and the analysis factor If the correlation is large, continue to analyze the cause.
如申請專利範圍第1項所述之晶圓缺陷分析及缺陷原因的尋找方法,其中該肇因區間係為該異常檢測站與前一正常檢測站之區間。For example, the wafer defect analysis and the method for finding the cause of defects described in the first application of the patent scope, wherein the cause interval is the interval between the abnormality detecting station and the previous normal detecting station. 如申請專利範圍第1項所述之晶圓缺陷分析及缺陷原因的尋找方法,其中於步驟S3中,該共同因素係為選自於由機台、機台種類、光罩及爐管位置所組成之群組。The method for searching for wafer defects and the method for finding the cause of defects, as described in claim 1, wherein in step S3, the common factor is selected from the group consisting of a machine, a machine type, a mask, and a furnace tube. The group that makes up. 如申請專利範圍第1項所述之晶圓缺陷分析及缺陷原因的尋找方法,其中若具有複數個製程點之卡方值顯示該異常晶圓數量與該分析因素之相關性大,則進行一步驟S6:進行複數個製程點之交叉比對,將包含較高破壞率的工作區判斷為異常肇因。For example, the wafer defect analysis and the defect cause finding method described in claim 1 wherein if the chi-square value of the plurality of process points indicates that the abnormal wafer quantity has a large correlation with the analysis factor, then one is performed. Step S6: performing cross-comparison of a plurality of process points, and determining a work area including a high damage rate as an abnormal cause. 如申請專利範圍第1項所述之晶圓缺陷分析及缺陷原因的尋找方法,其中於步驟S4中,各該工作區具有一異常晶圓實際值Nx,以及一異常晶圓預期值Ex,該卡方值係為取得各工作區之(Nx-Ex)2/Ex的總和後,透過查表取得,且若(Nx-Ex)2/Ex的數值越大,則查表所得之卡方值越趨近於0,表示相關性大,相反的,若(Nx-Ex)2/Ex的數值越小,則查表所得之卡方值越趨近於1,表示相關性小,而卡方值不大於1。The method for searching for wafer defects and the method for finding the cause of defects, as described in claim 1, wherein in step S4, each of the working areas has an abnormal wafer actual value Nx and an abnormal wafer expected value Ex, The chi-square value is obtained by looking up the table after obtaining the sum of (Nx-Ex) 2 /Ex of each work area, and if the value of (Nx-Ex) 2 /Ex is larger, the chi-square value obtained by looking up the table is obtained. The closer to 0, the greater the correlation. On the contrary, if the value of (Nx-Ex) 2 /Ex is smaller, the chi-square value obtained by looking up the table is closer to 1, indicating that the correlation is small, and the chi-square The value is not greater than 1. 如申請專利範圍第5項所述之晶圓缺陷分析及缺陷原因的尋找方法,其中該異常晶圓預期值是根據各該工作區進行製程工作的晶圓數量而設定。For example, the wafer defect analysis and the defect cause finding method described in claim 5, wherein the abnormal wafer expected value is set according to the number of wafers in which the work area performs the process work. 如申請專利範圍第1項所述之晶圓缺陷分析及缺陷原因的尋找方法,其中於步驟S5中,更配合缺陷統計資訊或缺陷趨勢圖進行判斷。For example, the wafer defect analysis and the method for finding the cause of defects described in claim 1 are further determined in step S5 in conjunction with the defect statistical information or the defect trend graph.
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CN113448787A (en) * 2021-06-29 2021-09-28 海光信息技术股份有限公司 Wafer abnormity analysis method and device, electronic equipment and readable storage medium
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CN111189852A (en) * 2018-11-14 2020-05-22 长鑫存储技术有限公司 Method and system for analyzing scratches and fragments of wafer
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