TW201306314A - LED chip manufacturing method - Google Patents

Abstract

An LED chip manufacturing method, the manufacturing method includes the steps: provide the base; on the base, forming a phosphor layer and the multiple interval electrodes in connection with the phosphor layer; providing a semiconductor wafer, the wafer includes a first semiconductor layer, a second semiconductor layer and a light-emitting layer; bonding the semiconductor wafer and the base, the electrode on the base and the first semiconductor layer being in electrical connection; removing the base; cutting the wafer into the LED chips. LED chips with phosphors can simplify the packaging process. Also, the production method of the present invention is simple and will reduce the production cost.

Description

LED wafer manufacturing method

The present invention contemplates a method of fabricating an LED wafer, and more particularly, a method of fabricating an LED wafer having phosphor.

LED industry is one of the most watched industries in recent years. Since its development, LED products have the advantages of energy saving, power saving, high efficiency, fast response time, long life cycle, no mercury, and environmental benefits. It is considered to be the best light source for the new generation of green energy-saving lighting. However, in general, LED high-power products generally use different colors of phosphors to mix and match with specific illuminating wafers in order to obtain the required brightness and color. In general, the phosphor is incorporated into the encapsulant of the LED during the packaging process, which requires a certain amount of manpower, material resources and time. For manufacturers downstream of the LED industry, it is more desirable to eliminate the above steps to simplify the packaging process.

In view of the above, it is necessary to provide an LED wafer which can simplify the packaging step and a method of manufacturing the same.

A method of manufacturing an LED wafer, the method comprising the steps of: providing a substrate; forming a phosphor layer on the substrate; and a plurality of spaced electrodes connected to the phosphor layer; and providing a semiconductor wafer, the wafer including the first semiconductor layer a second semiconductor layer and a light emitting semiconductor layer, the substrate is bonded to the wafer, the electrodes on the substrate are electrically connected to the first semiconductor layer of the wafer; the substrate is removed; and the wafer is diced into an LED wafer.

LED wafers with phosphors simplify the packaging process for downstream manufacturers in the LED industry. Moreover, the manufacturing method of the present invention is simple, and it is advantageous to reduce the production cost.

Referring to Figures 1-7, there is shown a method of fabricating an LED wafer of the present invention, which mainly includes the following steps:

Step 1: A substrate 10 is provided to support the formation of the electrode 21 and the phosphor layer 30. The substrate 10 can be a tape or other viscous soft material to facilitate subsequent removal processes.

Step 2: A conductive layer 20 is disposed on the substrate 10. The conductive layer 20 may be a metal or a material having high conductivity such as ITO (Indium Tin Oxide). The conductive layer 20 can be directly disposed on the bonding surface of the substrate 10 to achieve fixation with the substrate 10.

Step 3: Using the lithography technique, the conductive layer 20 is patterned to form a plurality of electrodes 21. Each of the electrodes 21 is equal in shape and leaves a gap of the same size between each of the electrodes 21. The electrodes 21 are insulated from each other by a gap therebetween.

Step 4: filling the phosphor between the adjacent electrodes 21 to form a phosphor layer 30. The phosphor layer 30 can be formed by techniques such as printing, coating, or molding. The phosphor layer 30 can be provided with different phosphors as needed, for example, phosphors of different colors can be selected according to the color to be synthesized. The height of the phosphor layer 30 is equal to the height of the electrode 21. That is, after the phosphor layer 30 is filled, the top surface of the phosphor layer 30 is flush with the top surface of the electrode 21. The width of the phosphor layer 30 located in each gap is larger than the width of each of the electrodes 21. The phosphor layer 30 and the electrode 21 are alternately distributed.

Step 5: A semiconductor wafer 40 is provided, and the substrate 10 is disposed on the semiconductor wafer 40 in an inverted manner. The semiconductor wafer 40 includes a first semiconductor layer, a second semiconductor layer, a light emitting layer and an electrode. In this embodiment, the first semiconductor layer is defined as a P-type semiconductor layer 45, and the second semiconductor layer is an N-type semiconductor. Layer 42, the luminescent layer is a PN interface semiconductor layer 44. In this embodiment, the semiconductor wafer 40 includes a sapphire substrate 41, an N-type semiconductor layer 42, a plurality of PN interface semiconductor layers 44, a plurality of P-type semiconductor layers 45, and a plurality of conductive blocks 43 disposed thereon. On the N-type semiconductor layer 42. The N-type semiconductor layer 42 is grown on the surface of the substrate 41, and their surface areas are equal. The plurality of P-N interface semiconductor layers 44 are grown on the surface of the N-type semiconductor layer 42 and are separated by a plurality of gaps into a plurality of discontinuous block regions. The P-type semiconductor layer 42 is grown on the surface of the P-N interface semiconductor layer 44. The surface area of each of the P-type semiconductor layers 44 is equal to the surface area of each of the P-N type interface semiconductor layers 45, and is also partitioned into a plurality of discontinuous block-like regions by the gaps. Each of the conductive blocks 43 is formed in the above gap. The width of each of the conductive bumps 43 is smaller than the width of the gap to avoid contact with the P-N interface semiconductor layer 44 and the P-type semiconductor layer 45. The thickness of the conductive bumps 43 is the same as the total thickness of the P-N interface semiconductor layer 44 and the P-type semiconductor layer 45 to form a flush top surface. The N-type semiconductor layer 42, the P-N interface semiconductor layer 44, and the P-type semiconductor layer 45 may be made of gallium nitride doped with a different substance, and the conductive block 43 may be made of a conductive material such as gold-nickel alloy or ITO. The substrate 10 is disposed on the semiconductor wafer 40 in an inverted downward direction, that is, the electrode 21 and the phosphor layer 30 face the conductive block 43 and the P-type semiconductor layer 45. The electrode 21, the phosphor layer 30, the P-type semiconductor layer 45, and the conductive block 43 have solder or a hot-melt material (not shown), which can be used for the electrode 21, the phosphor layer 30, the P-type semiconductor layer 45, and the conductive block. 43 phase is fixed. The substrate 10 and the wafer 40 are bonded by being connected to the conductive block 43 on the wafer 40 through the patterned conductive layer 20 on the substrate 10. The plurality of electrodes 21 are respectively disposed on the plurality of P-type semiconductor layers 45 and the plurality of conductive blocks 43. The electrode 21 connected to the P-type semiconductor layer 45 is a first electrode (not shown), and the electrode 21 connected to the conductive block 43 is a second electrode (not shown).

Step 6: The substrate 10 is removed, and the phosphor layer 30 and the conductive layer 20 are left on the semiconductor wafer 40. Since the substrate 10 is a viscous soft material, it is only necessary to peel off the substrate 10 from one end, which can simplify the manufacturing process and save time compared to the conventional etching removal method. After the electrode 21 and the phosphor layer 30 are connected to the wafer 40, the substrate 10 is lifted up and removed, thereby forming a light-emitting module (not shown). At this time, the first electrode and the second electrode are both exposed to facilitate the subsequent wire bonding process.

Step 7: Dividing the light-emitting module (not shown) to form a plurality of LED chips 60. Each of the LED chips 60 has a PN interface semiconductor layer 44, a P-type semiconductor layer 45, and an N-type semiconductor layer 42. a first electrode, a second electrode and a plurality of phosphor layers 30.

Referring to Fig. 8, there is shown a completed LED wafer 60 of the present invention, i.e., the LED wafer 60 obtained after the above steps are cut. Each of the LED chips 60 is a separate light emitting module, and each includes a sapphire substrate 41, an N-type semiconductor layer 42, a P-N interface semiconductor layer 44, and a P-type semiconductor layer 45. Each LED wafer 60 also has three phosphor layers 30 and two electrodes 21 that connect the N-type semiconductor layer 42 and the P-type semiconductor layer 45, respectively. After the two electrodes 21 are connected to the power source of the corresponding polarity, the LED wafer 60 can emit light from the P-N interface semiconductor layer 44, and the phosphor in the phosphor layer 30 is excited to emit light.

Referring again to Figure 9, a schematic diagram of a second embodiment of an LED wafer of the present invention is shown. The LED wafer 51 shown in the drawing is different from the first embodiment in that the electrode 21 of the LED wafer 51 is located under the phosphor layer 30, and the two electrodes 21 are respectively located on the P-type semiconductor layer 45 and the conductive block. On both sides of the 43. In the LED chip 51, since the electrodes 21 are all distributed on the side of the light-emitting layer, that is, the P-N interface semiconductor layer 44, the light emitted from the outward direction is less blocked, and the light can be more directly irradiated to the phosphor layer 30.

Figure 10 is a schematic illustration of a third embodiment of an LED wafer of the present invention. The LED chip 52 shown in the figure is different from the first embodiment in that the LED chip 52 does not have the sapphire substrate 41, so that the electrode 21 in contact with an N-type semiconductor layer 42 can be disposed in an N-type. The lower surface of the semiconductor layer 42. The other electrode 21 is thicker than the phosphor layer 30, so that it can be in contact with the side surface of the P-type semiconductor layer 45. Since the electrode 21 does not directly block the upper surface of the P-type semiconductor layer 45, light emitted from the P-N interface semiconductor layer 44 can be irradiated to the phosphor layer 30 through the P-type semiconductor layer 45 to excite its light.

Since the LED chip 60 is provided with the phosphor layer 30, the production process of doping the phosphor can be eliminated in the subsequent packaging process, that is, the manpower and time are saved, and the material input of the downstream manufacturers is saved.

10. . . Base

20. . . Conductive layer

twenty one. . . electrode

30. . . Phosphor layer

40. . . Semiconductor wafer

41. . . Sapphire substrate

42. . . N-type semiconductor layer

43. . . Conductive block

44. . . P-N interface semiconductor layer

45. . . P-type semiconductor layer

50, 51, 52. . . LED chip

1 is a first step of a method of fabricating an LED wafer of the present invention.

2 is a second step of the method of fabricating an LED wafer of the present invention.

Figure 3 is a third step of the method of fabricating an LED wafer of the present invention.

Figure 4 is a fourth step of the method of fabricating an LED wafer of the present invention.

Figure 5 is a fifth step of the method of fabricating an LED wafer of the present invention.

Figure 6 is a sixth step of the method of fabricating an LED wafer of the present invention.

Figure 7 is a seventh step of the method of fabricating an LED wafer of the present invention.

Figure 8 is a schematic illustration of a completed LED wafer of the present invention.

Figure 9 is a schematic illustration of a second embodiment of an LED wafer of the present invention.

Figure 10 is a schematic illustration of a third embodiment of an LED wafer of the present invention.

10. . . Base

twenty one. . . electrode

30. . . Phosphor layer

Claims (12)

A method of manufacturing an LED wafer, the method comprising the steps of:
Providing a substrate;
Forming a phosphor layer on the substrate and a plurality of spaced electrodes connected to the phosphor layer;
Providing a semiconductor wafer, the first semiconductor layer, the second semiconductor layer and the light emitting semiconductor layer, bonding the substrate to the wafer, electrically connecting the electrode on the substrate to the first semiconductor layer of the wafer;
Removing the substrate; and cutting the wafer into LED wafers. The method of manufacturing an LED wafer according to claim 1, wherein the plurality of electrodes are formed by a lithography technique by a conductive layer formed on the substrate. The method of manufacturing an LED wafer according to claim 2, wherein a gap is left between adjacent electrodes. The method of manufacturing an LED wafer according to claim 3, wherein the phosphor layer fills a void remaining between the electrodes. The method of manufacturing an LED wafer according to claim 4, wherein the phosphor layer is formed by a technique such as printing, coating, or molding. The method of manufacturing an LED wafer according to claim 5, wherein the thickness of the phosphor layer is equal to the thickness of the plurality of electrodes. The method for manufacturing an LED wafer according to claim 1, wherein the first semiconductor layer is an N-type semiconductor layer, the light-emitting semiconductor layer is a PN interface semiconductor layer, and the second semiconductor layer is a P-type In the semiconductor layer, the second semiconductor layer forms a plurality of discontinuous regions separated by a gap, and a plurality of conductive blocks are disposed on the N-type semiconductor layer and located between the gaps. The method of manufacturing an LED wafer according to claim 7, wherein the plurality of conductive blocks may be disposed on the other side of the N-type semiconductor layer with respect to the P-N interface semiconductor layer. The method of manufacturing an LED wafer according to claim 1, wherein the wafer may further include a substrate. The method for manufacturing an LED wafer according to claim 7, wherein: when the semiconductor wafer is combined with the substrate, the substrate is inverted downward, and the phosphor layer and the electrode face the P-type semiconductor layer of the semiconductor wafer and the plurality of electrodes Block bonding. The method for manufacturing an LED wafer according to claim 8, wherein: when the semiconductor wafer is combined with the substrate, the substrate is inverted downward, the phosphor layer faces the P-type semiconductor layer of the semiconductor wafer, and the electrode is in the P-type The side of the semiconductor layer is in contact therewith. The method for manufacturing an LED wafer according to claim 10, wherein: after the semiconductor wafer is combined with the substrate, adjacent two electrodes on the substrate and a region of the P-type semiconductor layer on the wafer and The adjacent conductive blocks are connected to form a first electrode and a second electrode.