TW201306184A - Package structure and manufacturing method thereof - Google Patents

Package structure and manufacturing method thereof Download PDF

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Publication number
TW201306184A
TW201306184A TW100126411A TW100126411A TW201306184A TW 201306184 A TW201306184 A TW 201306184A TW 100126411 A TW100126411 A TW 100126411A TW 100126411 A TW100126411 A TW 100126411A TW 201306184 A TW201306184 A TW 201306184A
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Taiwan
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package structure
pad
circuit substrate
pads
light emitting
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TW100126411A
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Chinese (zh)
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Chien-Hsien Lu
Tsung-Yen Yang
chun-sheng Peng
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Aptos Technology Inc
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Priority to TW100126411A priority Critical patent/TW201306184A/en
Publication of TW201306184A publication Critical patent/TW201306184A/en

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Abstract

A package structure including a circuit substrate, at least one pad, at least one electronic element and a molding compound is provided. The circuit substrate has an upper surface. The pad is disposed on the upper surface of the circuit substrate and electrically connected to the circuit substrate. The electronic element is disposed on the upper surface of the circuit substrate and electrically connected to the circuit substrate. The molding compound encapsulates the upper surface of the circuit substrate, the pad and the electronic element and exposes a first side surface of the pad. The first side surface of the pad is aligned with a second side surface of the molding compound.

Description

封裝結構及其製作方法Package structure and manufacturing method thereof

本發明是有關於一種封裝結構及其製作方法,且特別是有關於一種電子元件的封裝結構及其製作方法。The present invention relates to a package structure and a method of fabricating the same, and more particularly to a package structure of an electronic component and a method of fabricating the same.

近年來,積體電路技術與材料進步快速,其晶片之體積日益縮小,但功能卻日益強大,應用之廣泛可說是無遠弗屆,因此利用積體電路技術所生產之產品已漸朝向輕薄短小之型態,舉凡手持電子裝置、電子辭典、數位相機及各種數位產品等等不勝枚舉。In recent years, integrated circuit technology and materials have made rapid progress, and the size of its wafers has been shrinking, but its functions have become increasingly powerful. The wide range of applications can be said to be far-reaching. Therefore, the products produced by integrated circuit technology have gradually become lighter and thinner. The short form, such as handheld electronic devices, electronic dictionaries, digital cameras and various digital products, are numerous.

表面黏著技術(Surface Mounting Technology,SMT)是常見用來接合電子元件與電路板或其他元件的技術,其優點在於可縮小整體封裝結構的尺寸,而有助於電子裝置的微型化發展。Surface Mounting Technology (SMT) is a common technique for bonding electronic components and circuit boards or other components. It has the advantage of reducing the size of the overall package structure and contributing to the miniaturization of electronic devices.

本發明提供一種封裝結構,其封裝膠體暴露出接墊的一側表面,於後續製程中可有效提高將電子元件銲接至封裝結構上的便利性,進而可增加封裝結構的應用性。The invention provides a package structure, wherein the encapsulant of the package exposes one side surface of the pad, which can effectively improve the convenience of soldering the electronic component to the package structure in a subsequent process, thereby increasing the applicability of the package structure.

本發明提供一種封裝結構的製作方法,用以製作上述之封裝結構,可有效減少生產成本並可提高生產效率。The invention provides a manufacturing method of a package structure, which is used for manufacturing the above package structure, which can effectively reduce production cost and improve production efficiency.

本發明提出一種封裝結構,其包括一線路基板、至少一接墊、至少一電子元件以及一封裝膠體。線路基板具有一上表面。接墊配置於線路基板的上表面上,且與線路基板電性連接。電子元件配置於線路基板的上表面上,且與線路基板電性連接。封裝膠體包覆線路基板的上表面、接墊以及電子元件,且暴露出接墊的一第一側表面,其中封裝膠體的一第二側表面與接墊的第一側表面切齊。The invention provides a package structure comprising a circuit substrate, at least one pad, at least one electronic component and an encapsulant. The circuit substrate has an upper surface. The pad is disposed on the upper surface of the circuit substrate and electrically connected to the circuit substrate. The electronic component is disposed on the upper surface of the circuit substrate and electrically connected to the circuit substrate. The encapsulant covers the upper surface of the circuit substrate, the pads and the electronic components, and exposes a first side surface of the pad, wherein a second side surface of the encapsulant is aligned with the first side surface of the pad.

在本發明之一實施例中,上述之封裝結構更包括一發光元件。發光元件配置於封裝膠體所暴露出接墊的第一側表面上,且發光元件透過接墊及線路基板而與電子元件電性連接。In an embodiment of the invention, the package structure further includes a light emitting element. The light-emitting element is disposed on the first side surface of the pad exposed by the encapsulant, and the light-emitting element is electrically connected to the electronic component through the pad and the circuit substrate.

在本發明之一實施例中,上述之至少一接墊包括一第一接墊與一第二接墊。封裝膠體暴露出第一接墊的一第三側表面以及第二接墊的一第四側表面。發光元件具有第一電極部以及一第二電極部,且第一電極部與第二電極部分別銲接至第三側表面與第四側表面。In an embodiment of the invention, the at least one pad comprises a first pad and a second pad. The encapsulant exposes a third side surface of the first pad and a fourth side surface of the second pad. The light emitting element has a first electrode portion and a second electrode portion, and the first electrode portion and the second electrode portion are respectively soldered to the third side surface and the fourth side surface.

在本發明之一實施例中,上述之發光元件包括一發光二極體。In an embodiment of the invention, the light-emitting element comprises a light-emitting diode.

在本發明之一實施例中,上述之發光二極體為表面黏著型(surface mount device,SMD)發光二極體。In an embodiment of the invention, the light emitting diode is a surface mount device (SMD) light emitting diode.

在本發明之一實施例中,上述之發光二極體包括一側面發光型(side-emitting type)發光二極體。側面發光型發光二極體具有一出光面,且出光面朝向封裝膠體外。In an embodiment of the invention, the light emitting diode includes a side-emitting type light emitting diode. The side-emitting type light-emitting diode has a light-emitting surface, and the light-emitting surface faces the outside of the package rubber.

在本發明之一實施例中,上述之封裝膠體的邊緣與線路基板的邊緣切齊。In an embodiment of the invention, the edge of the encapsulant is aligned with the edge of the circuit substrate.

在本發明之一實施例中,上述之至少一電子元件包括一快閃記憶體晶片以及一控制晶片。In an embodiment of the invention, the at least one electronic component comprises a flash memory chip and a control wafer.

在本發明之一實施例中,上述之線路基板更具有一相對於上表面的下表面以及多個配置於下表面上的連接墊。連接墊透過線路基板與電子元件電性連接。In an embodiment of the invention, the circuit substrate has a lower surface opposite to the upper surface and a plurality of connection pads disposed on the lower surface. The connection pad is electrically connected to the electronic component through the circuit substrate.

本發明提出一種封裝結構的製作方法,其包括下述步驟。提供一陣列基板。陣列基板具有一表面以及多個線路基板單元,其中每一線路基板單元是由多條切割線所定義。形成多個接墊於陣列基板的表面上,其中接墊配置於相鄰兩線路基板單元之間且排列於部分切割線上。接墊與陣列基板電性連接。配置至少一電子元件於每一線路基板單元上,其中電子元件電性連接至線路基板單元。形成一封裝膠體於陣列基板上,以包覆陣列基板的表面、接墊以及電子元件。進行一單體化步驟,以沿著切割線切割陣列基板與接墊。每一接墊的一第一側表面暴露於封裝膠體外,且每一接墊的第一側表面與封裝膠體的一第二側表面切齊。The present invention provides a method of fabricating a package structure that includes the following steps. An array substrate is provided. The array substrate has a surface and a plurality of circuit substrate units, wherein each of the circuit substrate units is defined by a plurality of cutting lines. A plurality of pads are formed on the surface of the array substrate, wherein the pads are disposed between the adjacent two circuit substrate units and arranged on the partial cutting lines. The pad is electrically connected to the array substrate. At least one electronic component is disposed on each of the circuit substrate units, wherein the electronic components are electrically connected to the circuit substrate unit. Forming an encapsulant on the array substrate to cover the surface of the array substrate, the pads, and the electronic components. A singulation step is performed to cut the array substrate and the pads along the dicing lines. A first side surface of each of the pads is exposed to the outside of the encapsulant, and a first side surface of each of the pads is aligned with a second side surface of the encapsulant.

在本發明之一實施例中,上述之封裝結構的製作方法,更包括:於進行單體化步驟之後,分別銲接多個發光元件於接墊暴露於封裝膠體外的第一側表面上。In an embodiment of the present invention, the method for fabricating the package structure further includes: after performing the singulation step, soldering the plurality of light emitting elements respectively on the first side surface of the pad exposed to the outside of the package glue.

在本發明之一實施例中,上述之發光元件包括一發光二極體。In an embodiment of the invention, the light-emitting element comprises a light-emitting diode.

在本發明之一實施例中,上述之發光二極體為表面黏著型(surface mount device,SMD)發光二極體。In an embodiment of the invention, the light emitting diode is a surface mount device (SMD) light emitting diode.

在本發明之一實施例中,上述之發光二極體包括一側面發光型(side-emitting type)發光二極體。側面發光型發光二極體具有一出光面,且出光面朝向封裝膠體外。In an embodiment of the invention, the light emitting diode includes a side-emitting type light emitting diode. The side-emitting type light-emitting diode has a light-emitting surface, and the light-emitting surface faces the outside of the package rubber.

在本發明之一實施例中,上述之至少一電子元件包括一快閃記憶體晶片以及一控制晶片。In an embodiment of the invention, the at least one electronic component comprises a flash memory chip and a control wafer.

在本發明之一實施例中,上述之封裝結構的製作方法更包括:於進行單體化步驟之前,形成多個連接墊於陣列基板相對於表面的一底表面上。In an embodiment of the invention, the method for fabricating the package structure further includes: forming a plurality of connection pads on a bottom surface of the array substrate relative to the surface before performing the singulation step.

在本發明之一實施例中,上述之接墊為多個表面黏著型接墊。In an embodiment of the invention, the pad is a plurality of surface-adhesive pads.

在本發明之一實施例中,上述之接墊的材質包括銲料。In an embodiment of the invention, the material of the pad comprises solder.

在本發明之一實施例中,上述之每一接墊是由一銲料層及於其上銲接一金屬塊所構成。In one embodiment of the invention, each of the pads is formed by a solder layer and a metal block soldered thereto.

在本發明之一實施例中,上述之金屬塊的材質包括鋁。In an embodiment of the invention, the material of the metal block comprises aluminum.

基於上述,由於本發明之封裝結構具有接墊的一側表面暴露於封裝膠體外之設計,因此可將電子元件透過表面黏著技術而直接銲接至暴露於封裝膠體外之接墊的側表面上,可有效提高本發明之封裝結構的應用性。再者,本發明之封裝結構的製作是依序形成接墊、配置電子元件、形成封裝膠體而後再進行單體化製程,以同時形成多個封裝結構。因此,本發明之封裝結構的製作方法適於大量生產,且可有效減少生產成本並可提高生產效率。Based on the above, since the package structure of the present invention has a design in which one side surface of the pad is exposed to the outside of the package rubber, the electronic component can be directly soldered to the side surface of the pad exposed to the outside of the package rubber through surface adhesion technology. The applicability of the package structure of the present invention can be effectively improved. Furthermore, the package structure of the present invention is formed by sequentially forming pads, arranging electronic components, forming an encapsulant, and then performing a singulation process to simultaneously form a plurality of package structures. Therefore, the manufacturing method of the package structure of the present invention is suitable for mass production, and can effectively reduce production costs and improve production efficiency.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.

圖1A至圖1C為本發明之一種封裝結構的製作方法的俯視示意圖。依照本實施例之封裝結構的製作方法,首先,請參考圖1A,提供一具有一表面12以及多個線路基板單元110a的陣列基板10,其中每一線路基板單元110a是由多條切割線L所定義。此外,本實施例之陣列基板10相對於表面12的一底表面14上已形成有多個連接墊116,且這些連接墊116與陣列基板10電性連接。於此,這些連接墊116例如是金手指(gold finger)。1A to 1C are schematic top views of a method of fabricating a package structure according to the present invention. According to the manufacturing method of the package structure of the present embodiment, first, referring to FIG. 1A, an array substrate 10 having a surface 12 and a plurality of circuit substrate units 110a is provided, wherein each of the circuit substrate units 110a is formed by a plurality of cutting lines L. Defined. In addition, a plurality of connection pads 116 are formed on the bottom surface 14 of the array substrate 10 of the present embodiment with respect to the bottom surface 14 of the surface 12, and the connection pads 116 are electrically connected to the array substrate 10. Here, these connection pads 116 are, for example, gold fingers.

接著,請再參考圖1A,形成多個接墊120於陣列基板10的表面12上,其中這些接墊120配置於相鄰兩線路基板單元110a之間,且排列於部分切割線L上。於此,這些接墊120與陣列基板10電性連接。在此必須說明的是,本實施例並不限定配置於兩線路基板110a之間的接墊120數量,雖然於圖1A中示意地繪示相鄰兩線路基板單元110a之間僅配置一個接墊120或二個接墊120。但於其他未繪示實施例中,相鄰兩線路基板單元110a之間可配置相同數量的接墊120,亦或可依據使用需求而增加或減少接墊120的數量,於此並不加以限制。此外,於本實施例中,這些接墊120為多個表面黏著型接墊,且這些接墊120的材質例如是銲料。Next, referring to FIG. 1A, a plurality of pads 120 are formed on the surface 12 of the array substrate 10. The pads 120 are disposed between the adjacent two circuit substrate units 110a and arranged on the partial cutting lines L. Here, the pads 120 are electrically connected to the array substrate 10 . It should be noted that the present embodiment does not limit the number of pads 120 disposed between the two circuit substrates 110a, although only one pad is disposed between adjacent two circuit substrate units 110a in FIG. 1A. 120 or two pads 120. However, in other embodiments, the same number of pads 120 may be disposed between the two adjacent circuit board units 110a, or the number of pads 120 may be increased or decreased according to the needs of use. . In addition, in the embodiment, the pads 120 are a plurality of surface-adhesive pads, and the pads 120 are made of solder, for example.

接著,請參考圖1B,配置至少一電子元件(於此僅示意地繪示電子元件130a與電子元件130b)於每一線路基板單元110a上,其中這些電子元件130a、130b電性連接至線路基板單元110a。在本實施例中,這些電子元件130a例如是一控制晶片,而這些電子元件130b例如是一快閃記憶體晶片,於此並不加以限制。每一線路基板單元110a內的電子元件130a與電子元件130b可透線路基板單元110a而彼此電性連接。Next, referring to FIG. 1B, at least one electronic component (only the electronic component 130a and the electronic component 130b are schematically shown) is disposed on each of the circuit substrate units 110a, wherein the electronic components 130a, 130b are electrically connected to the circuit substrate. Unit 110a. In this embodiment, the electronic components 130a are, for example, a control chip, and the electronic components 130b are, for example, a flash memory chip, which is not limited herein. The electronic component 130a and the electronic component 130b in each of the circuit substrate units 110a are electrically connected to each other through the circuit substrate unit 110a.

之後,請再參考圖1B,形成一封裝膠體於140陣列基板10上,以包覆陣列基板110的表面112、這些接墊120以及這些電子元件130a、130b。於此,封裝膠體140並未包覆位於陣列基板10之底表面14的這些連接墊116。Thereafter, referring again to FIG. 1B, an encapsulant is formed on the 140 array substrate 10 to cover the surface 112 of the array substrate 110, the pads 120, and the electronic components 130a, 130b. Here, the encapsulant 140 does not cover the connection pads 116 on the bottom surface 14 of the array substrate 10.

最後,請同時參考圖1B與圖1C,進行一單體化步驟,以沿著這些切割線L切割陣列基板10與這些接墊120,而形成多個各自獨立的封裝結構(於圖1C中僅示意地繪示一個封裝結構100a)。其中,每一接墊120的一第一側表面122暴露於封裝膠體140外,且每一接墊120的第一側表面122與封裝膠體140的一第二側表面142實質上切齊,而暴露於封裝膠體140之外的第一側表面122可是視為一接點。至此,已完成封裝結構100a的製作。Finally, referring to FIG. 1B and FIG. 1C, a singulation step is performed to cut the array substrate 10 and the pads 120 along the cutting lines L to form a plurality of independent package structures (only in FIG. 1C). A package structure 100a) is schematically illustrated. A first side surface 122 of each of the pads 120 is exposed to the outside of the encapsulant 140, and the first side surface 122 of each of the pads 120 is substantially aligned with a second side surface 142 of the encapsulant 140. The first side surface 122 exposed to the outside of the encapsulant 140 can be considered a contact. So far, the fabrication of the package structure 100a has been completed.

圖2A為圖1C之封裝結構的立體示意圖。圖2B為沿圖1C之線I-I的剖面示意圖。圖2C為圖1C之封裝結構的側視示意圖。在結構上,請同時參考圖2A、2B與圖2C,本實施例之封裝結構100a包括線路基板110(即線路基板單元110a)、接墊120、這些電子元件130a、130b以及封裝膠體140。線路基板110具有一上表面112(即陣列基板10的部分表面12)、一相對於上表面112的下表面114(即陣列基板10的部分底表面14)以及這些配置於下表面114上的連接墊116。接墊120配置於線路基板110的上表面112上,且與線路基板110電性連接。這些電子元件130a、130b配置於線路基板110的上表面112上,且與線路基板110電性連接。其中,電子元件130a例如是一控制晶片,而電子元件130b例如是一快閃記憶體晶片,且這些連接墊116可透過線路基板110而與這些電子元件130a、130b電性連接。封裝膠體140包覆線路基板110的上表面112、接墊120以及這些電子元件130a、130b,且暴露出接墊120的第一側表面122。特別是,封裝膠體140的第二側表面142與接墊120的第一側表面122實質上切齊,且封裝膠體140的邊緣與線路基板110的邊緣實質上切齊。2A is a perspective view of the package structure of FIG. 1C. Fig. 2B is a schematic cross-sectional view taken along line I-I of Fig. 1C. 2C is a side elevational view of the package structure of FIG. 1C. Structurally, referring to FIG. 2A, FIG. 2B and FIG. 2C, the package structure 100a of the present embodiment includes a circuit substrate 110 (ie, the circuit substrate unit 110a), pads 120, the electronic components 130a and 130b, and the encapsulant 140. The circuit substrate 110 has an upper surface 112 (ie, a portion of the surface 12 of the array substrate 10), a lower surface 114 relative to the upper surface 112 (ie, a portion of the bottom surface 14 of the array substrate 10), and the connections disposed on the lower surface 114. Pad 116. The pad 120 is disposed on the upper surface 112 of the circuit substrate 110 and electrically connected to the circuit substrate 110. The electronic components 130a and 130b are disposed on the upper surface 112 of the circuit substrate 110 and electrically connected to the circuit substrate 110. The electronic component 130a is, for example, a control chip, and the electronic component 130b is, for example, a flash memory chip, and the connection pads 116 are electrically connected to the electronic components 130a and 130b through the circuit substrate 110. The encapsulant 140 covers the upper surface 112 of the circuit substrate 110, the pads 120, and the electronic components 130a, 130b, and exposes the first side surface 122 of the pad 120. In particular, the second side surface 142 of the encapsulant 140 is substantially aligned with the first side surface 122 of the pad 120, and the edge of the encapsulant 140 is substantially aligned with the edge of the circuit substrate 110.

由於本實施例之封裝結構具100a之接墊120的第一側表面122暴露於封裝膠體140外,因此於後續產品的應用上,可將電子元件(例如是發光元件)透過表面黏著技術而直接銲接至暴露於封裝膠體140外之接墊120的第一側表面122(即接點)上。意即,加熱材質為銲料的接墊120即可將電子元件直接接合於接墊120上。如此一來,相較於習知必須先塗佈銲料才能將電子元件銲接至接墊上而言,本實施例之封裝結構100a無需先塗佈銲料,可有效提高封裝結構100a後續製程的便利性。再者,由於本發明之接墊120為表面黏著型接墊,因此可有效減少封裝結構100a的生產成本並可提高生產效率。此外,由於本實施例是依序形成這些接墊120、配置這些電子元件130a、130b以及形成封裝膠體140於陣列基板10(請參考圖1A或圖1B),之後再進行單體化步驟而形成多個具有接墊120之第一側表面122暴露於封裝膠體140外的封裝結構100a,因此本實施例之封裝結構100a的製作方法適於大量生產。Since the first side surface 122 of the pad 120 of the package structure 100a of the embodiment is exposed to the encapsulant 140, the electronic component (for example, the illuminating component) can be directly transmitted through the surface adhesion technology in the application of the subsequent product. Solder to the first side surface 122 (ie, the contact) of the pad 120 exposed to the outside of the encapsulant 140. That is, heating the solder pad 120 can directly bond the electronic component to the pad 120. Therefore, the package structure 100a of the present embodiment does not need to be coated with solder first, and the convenience of the subsequent process of the package structure 100a can be effectively improved, as compared with the conventional soldering of the electronic component to the pad. Moreover, since the pad 120 of the present invention is a surface-adhesive type pad, the production cost of the package structure 100a can be effectively reduced and the production efficiency can be improved. In addition, in this embodiment, the pads 120 are sequentially formed, the electronic components 130a and 130b are disposed, and the encapsulant 140 is formed on the array substrate 10 (please refer to FIG. 1A or FIG. 1B), and then the singulation step is performed. The plurality of first side surfaces 122 having the pads 120 are exposed to the package structure 100a outside the encapsulant 140. Therefore, the manufacturing method of the package structure 100a of the present embodiment is suitable for mass production.

此外,本發明並不限定接墊120的材質與型態。於其他實施例中,請同時參考圖2C與圖2D,於封裝結構100c中,接墊120c為表面黏著型接墊,其中接墊120c是由一銲料層124及於其上銲接一金屬塊126所構成,而金屬塊126的材質例如是鋁,但並不以此為限。由於接墊120c是由銲料層124與金屬塊126所組成,因此可具有較大的接合面積,意即銲料層124與金屬塊126暴露於封裝膠體140外的第一側表面127可具有較大的面積。因此,於後續產品的應用上,當將電子元件(例如是發光元件)透過表面黏著技術而直接銲接至暴露於封裝膠體140外之接墊120c的第一側表面127(即接點)上時,可具有較佳的結合力。In addition, the present invention does not limit the material and shape of the pad 120. In other embodiments, please refer to FIG. 2C and FIG. 2D simultaneously. In the package structure 100c, the pad 120c is a surface-adhesive pad, wherein the pad 120c is soldered by a solder layer 124 and a metal block 126 is soldered thereon. The material of the metal block 126 is, for example, aluminum, but is not limited thereto. Since the pad 120c is composed of the solder layer 124 and the metal block 126, it may have a larger bonding area, that is, the first side surface 127 of the solder layer 124 and the metal block 126 exposed to the outside of the encapsulant 140 may have a larger Area. Therefore, in the application of the subsequent product, when the electronic component (for example, the light-emitting component) is directly soldered to the first side surface 127 (ie, the contact) of the pad 120c exposed outside the encapsulant 140 by surface adhesion technology. It can have a better bonding force.

圖3A為本發明之另一實施例之一種封裝結構的立體示意圖。圖3B為圖3A之封裝結構的側視示意圖。本實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參照前述實施例,本實施例不再重複贅述。於此必須說明的是,為了方便說明起見,圖3B中省略繪示部分構件。3A is a perspective view of a package structure according to another embodiment of the present invention. 3B is a side elevational view of the package structure of FIG. 3A. The same reference numerals are used to denote the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the detailed description is not repeated herein. It must be noted here that, for convenience of explanation, some of the members are omitted in FIG. 3B.

請同時參考圖3A與圖3B,本實施例的封裝結構100b與前述實施例之封裝結構100a相似,惟二者主要差異之處在於:本實施例之封裝結構100b更包括一發光元件150,且封裝結構100b具有一第一接墊120a與一第二接墊120b。詳細來說,封裝膠體140暴露出第一接墊120a的一第三側表面122a以及第二接墊120b的一第四側表面122b,而發光元件150具有第一電極部152以及一第二電極部154,且發光元件150的第一電極部152與第二電極部154分別銲接至第一接墊120a的第三側表面122a與第二接墊120b的第四側表面122b。此外,發光元件150透過第一接墊120a、第二接墊120b及線路基板110而與這些電子元件130a、130b電性連接。因此,當電子元件130a(例如是一控制晶片)驅動時,則發光元件150亦被驅動而適於發出光線,用以表示此封裝結構100a正在使用中,以方便使用者判斷封裝結構100b是否正在使用中。Referring to FIG. 3A and FIG. 3B, the package structure 100b of the present embodiment is similar to the package structure 100a of the foregoing embodiment, but the main difference between the two is that the package structure 100b of the embodiment further includes a light-emitting element 150, and The package structure 100b has a first pad 120a and a second pad 120b. In detail, the encapsulant 140 exposes a third side surface 122a of the first pad 120a and a fourth side surface 122b of the second pad 120b, and the light emitting element 150 has a first electrode portion 152 and a second electrode. The portion 154 and the first electrode portion 152 and the second electrode portion 154 of the light emitting element 150 are soldered to the third side surface 122a of the first pad 120a and the fourth side surface 122b of the second pad 120b, respectively. In addition, the light emitting device 150 is electrically connected to the electronic components 130a and 130b through the first pad 120a, the second pad 120b, and the circuit substrate 110. Therefore, when the electronic component 130a (for example, a control chip) is driven, the light-emitting component 150 is also driven to emit light to indicate that the package structure 100a is in use to facilitate the user to determine whether the package structure 100b is in use. Using.

於此,發光元件150例如是一表面黏著型(surface mount device,SMD)發光二極體。所以,發光元件150的第一電極部152與第二電極部154可利用表面黏著技術(Surface Mount Technology,SMT)而直接對應銲接至暴露於封裝膠體150外之第一接墊120a的第三側表面122a與第二接墊120b的第四側表面122b,可有效提高封裝結構100b的製造效率。再者,發光元件150亦可以是側面發光型發光二極體,其具有一出光面156,並且出光側156是朝向封裝膠體140外。因此,發光元件150所發出的光線可平行於封裝膠體140的第二側表面142而直接射出,而無須穿透封裝膠體140,可具有較佳的光線利用率。此外,於其他實施例中,亦可透過一保護元件(未繪示),例如是蓋體(未繪示),來保護發光元件150,於此並不加以限制。Here, the light-emitting element 150 is, for example, a surface mount device (SMD) light-emitting diode. Therefore, the first electrode portion 152 and the second electrode portion 154 of the light-emitting element 150 can be directly soldered to the third side of the first pad 120a exposed to the outside of the encapsulant 150 by surface mount technology (SMT). The surface 122a and the fourth side surface 122b of the second pad 120b can effectively improve the manufacturing efficiency of the package structure 100b. Furthermore, the light-emitting element 150 can also be a side-emitting type light-emitting diode having a light-emitting surface 156 and the light-emitting side 156 facing away from the encapsulant 140. Therefore, the light emitted by the light-emitting element 150 can be directly emitted parallel to the second side surface 142 of the encapsulant 140 without penetrating the encapsulant 140, and can have better light utilization efficiency. In addition, in other embodiments, the light-emitting element 150 can also be protected by a protective component (not shown), such as a cover (not shown), which is not limited herein.

綜上所述,由於本發明之封裝結構具有接墊的一側表面暴露於封裝膠體外之設計,因此可將電子元件透過表面黏著技術而直接銲接至暴露於封裝膠體外之接墊的側表面上,可有效提高本發明之封裝結構的應用性。相較於習知必須先塗佈銲料才能將電子元件銲接至接墊上而言,本發明之封裝結構無需先塗佈銲料,可有效提高後續製程的便利性且可有效減少生產成本並可提高生產效率。由於本發明之接墊為表面黏著型接墊,因此可有效減少封裝結構的生產成本並可提高生產效率。再者,本發明之封裝結構的製作是依序形成接墊、配置電子元件、形成封裝膠體而後再進行單體化製程,以同時形成多個封裝結構。因此,本發明之封裝結構的製作方法適於大量生產。此外,本實施例可透過發光元件來顯示封裝結構是否正在使用中,以方便使用者使用本發明之封裝結構。In summary, since the package structure of the present invention has a design in which one side surface of the pad is exposed to the outside of the package rubber, the electronic component can be directly soldered to the side surface of the pad exposed to the outside of the package rubber through surface adhesion technology. In addition, the applicability of the package structure of the present invention can be effectively improved. Compared with the prior art, it is necessary to apply solder to solder the electronic component to the pad. The package structure of the present invention does not need to be coated with solder first, which can effectively improve the convenience of the subsequent process and can effectively reduce the production cost and improve the production. effectiveness. Since the pad of the present invention is a surface-adhesive type pad, the production cost of the package structure can be effectively reduced and the production efficiency can be improved. Furthermore, the package structure of the present invention is formed by sequentially forming pads, arranging electronic components, forming an encapsulant, and then performing a singulation process to simultaneously form a plurality of package structures. Therefore, the manufacturing method of the package structure of the present invention is suitable for mass production. In addition, the embodiment can display whether the package structure is in use through the light emitting element, so as to facilitate the user to use the package structure of the present invention.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10...陣列基板10. . . Array substrate

12...表面12. . . surface

14...底表面14. . . Bottom surface

100a、100b、100c...封裝結構100a, 100b, 100c. . . Package structure

110...線路基板110. . . Circuit substrate

110a...線路基板單元110a. . . Circuit substrate unit

112...上表面112. . . Upper surface

114...下表面114. . . lower surface

116...連接墊116. . . Connection pad

120、120c...接墊120, 120c. . . Pad

120a...第一接墊120a. . . First pad

120b...第二接墊120b. . . Second pad

122、127...第一側表面122, 127. . . First side surface

122a...第三側表面122a. . . Third side surface

122b...第四側表面122b. . . Fourth side surface

124...銲料層124. . . Solder layer

126...金屬塊126. . . Metal block

130a、130b...電子元件130a, 130b. . . Electronic component

140...封裝膠體140. . . Encapsulant

142...第二側表面142. . . Second side surface

150...發光元件150. . . Light-emitting element

152...第一電極部152. . . First electrode portion

154...第二電極部154. . . Second electrode portion

156...出光面156. . . Glossy surface

L...切割線L. . . Cutting line

圖1A至圖1C為本發明之一種封裝結構的製作方法的俯視示意圖。1A to 1C are schematic top views of a method of fabricating a package structure according to the present invention.

圖2A為圖1C之封裝結構的立體示意圖。2A is a perspective view of the package structure of FIG. 1C.

圖2B為沿圖1C之線I-I的剖面示意圖。Fig. 2B is a schematic cross-sectional view taken along line I-I of Fig. 1C.

圖2C為圖1C之封裝結構的側視示意圖。2C is a side elevational view of the package structure of FIG. 1C.

圖2D為本發明之一實施例之一種封裝結構的剖面示意圖。2D is a cross-sectional view of a package structure in accordance with an embodiment of the present invention.

圖2E為圖2D之封裝結構的側視示意圖。2E is a side elevational view of the package structure of FIG. 2D.

圖3A為本發明之另一實施例之一種封裝結構的立體示意圖。3A is a perspective view of a package structure according to another embodiment of the present invention.

圖3B為圖3A之封裝結構的側視示意圖。3B is a side elevational view of the package structure of FIG. 3A.

100a...封裝結構100a. . . Package structure

110...線路基板110. . . Circuit substrate

112...上表面112. . . Upper surface

116...連接墊116. . . Connection pad

120...接墊120. . . Pad

122...第一側表面122. . . First side surface

130a、130b...電子元件130a, 130b. . . Electronic component

140...封裝膠體140. . . Encapsulant

142...第二側表面142. . . Second side surface

Claims (20)

一種封裝結構,包括:一線路基板,具有一上表面;至少一接墊,配置於該線路基板的該上表面上,且與該線路基板電性連接;至少一電子元件,配置於該線路基板的該上表面上,且與該線路基板電性連接;以及一封裝膠體,包覆該線路基板的該上表面、該接墊以及該電子元件,且暴露出該接墊的一第一側表面,其中該封裝膠體的一第二側表面與該接墊的該第一側表面切齊。A package structure comprising: a circuit substrate having an upper surface; at least one pad disposed on the upper surface of the circuit substrate and electrically connected to the circuit substrate; at least one electronic component disposed on the circuit substrate On the upper surface, and electrically connected to the circuit substrate; and an encapsulant covering the upper surface of the circuit substrate, the pad and the electronic component, and exposing a first side surface of the pad Wherein a second side surface of the encapsulant is aligned with the first side surface of the pad. 如申請專利範圍第1項所述之封裝結構,更包括一發光元件,配置於該封裝膠體所暴露出該接墊的該第一側表面上,且該發光元件透過該接墊及該線路基板而與該電子元件電性連接。The package structure of claim 1, further comprising a light-emitting element disposed on the first side surface of the package exposed by the package, and the light-emitting element is transmitted through the pad and the circuit substrate And electrically connected to the electronic component. 如申請專利範圍第2項所述之封裝結構,其中該至少一接墊包括一第一接墊與一第二接墊,該封裝膠體暴露出該第一接墊的一第三側表面以及該第二接墊的一第四側表面,而該發光元件具有第一電極部以及一第二電極部,且該第一電極部與該第二電極部分別銲接至該第三側表面與該第四側表面。The package structure of claim 2, wherein the at least one pad comprises a first pad and a second pad, the encapsulant exposing a third side surface of the first pad and the a fourth side surface of the second pad, the light emitting element has a first electrode portion and a second electrode portion, and the first electrode portion and the second electrode portion are respectively soldered to the third side surface and the first Four side surfaces. 如申請專利範圍第3項所述之封裝結構,其中該發光元件包括一發光二極體。The package structure of claim 3, wherein the light-emitting element comprises a light-emitting diode. 如申請專利範圍第4項所述之封裝結構,其中該發光二極體為表面黏著型發光二極體。The package structure of claim 4, wherein the light emitting diode is a surface-adhesive light-emitting diode. 如申請專利範圍第4項所述之封裝結構,其中該發光二極體包括一側面發光型發光二極體,該側面發光型發光二極體具有一出光面,且該出光面朝向該封裝膠體外。The package structure of claim 4, wherein the light emitting diode comprises a side light emitting type light emitting diode, the side light emitting type light emitting diode has a light emitting surface, and the light emitting surface faces the encapsulant outer. 如申請專利範圍第1項所述之封裝結構,其中該封裝膠體的邊緣與該線路基板的邊緣切齊。The package structure of claim 1, wherein an edge of the encapsulant is aligned with an edge of the circuit substrate. 如申請專利範圍第1項所述之封裝結構,其中該至少一電子元件包括一快閃記憶體晶片以及一控制晶片。The package structure of claim 1, wherein the at least one electronic component comprises a flash memory chip and a control wafer. 如申請專利範圍第1項所述之封裝結構,其中該線路基板更具有一相對於該上表面的下表面以及多個配置於該下表面上的連接墊,其中該些連接墊透過該線路基板與該電子元件電性連接。The package structure of claim 1, wherein the circuit substrate further has a lower surface opposite to the upper surface and a plurality of connection pads disposed on the lower surface, wherein the connection pads pass through the circuit substrate Electrically connected to the electronic component. 一種封裝結構的製作方法,包括:提供一陣列基板,該陣列基板具有一表面以及多個線路基板單元,其中每一線路基板單元是由多條切割線所定義;形成多個接墊於該陣列基板的該表面上,其中該些接墊配置於相鄰兩該些線路基板單元之間且排列於部分該些切割線上,該些接墊與該陣列基板電性連接;配置至少一電子元件於每一該線路基板單元上,其中該些電子元件電性連接至該線路基板單元;形成一封裝膠體於該陣列基板上,以包覆該陣列基板的該表面、該些接墊以及該些電子元件;以及進行一單體化步驟,以沿著該些切割線切割該陣列基板與該些接墊,其中每一該接墊的一第一側表面暴露於該封裝膠體外,且每一該接墊的該第一側表面與該封裝膠體的一第二側表面切齊。A method for fabricating a package structure includes: providing an array substrate having a surface and a plurality of circuit substrate units, wherein each circuit substrate unit is defined by a plurality of cutting lines; forming a plurality of pads on the array On the surface of the substrate, the pads are disposed between the two adjacent circuit substrate units and are arranged on the plurality of cutting lines, the pads are electrically connected to the array substrate; and at least one electronic component is disposed on the substrate Each of the circuit substrate units, wherein the electronic components are electrically connected to the circuit substrate unit; forming an encapsulant on the array substrate to cover the surface of the array substrate, the pads, and the electronic components And performing a singulation step of cutting the array substrate and the pads along the cutting lines, wherein a first side surface of each of the pads is exposed to the outside of the encapsulant, and each of the The first side surface of the pad is aligned with a second side surface of the encapsulant. 如申請專利範圍第10項所述之封裝結構的製作方法,更包括:於進行該單體化步驟之後,分別銲接多個發光元件於該些接墊暴露於該封裝膠體外的該些第一側表面上。The method for fabricating a package structure according to claim 10, further comprising: after performing the singulation step, soldering the plurality of light-emitting elements respectively to the first portions of the pads exposed to the package glue On the side surface. 如申請專利範圍第11項所述之封裝結構的製作方法,其中該發光元件包括一發光二極體。The method of fabricating a package structure according to claim 11, wherein the light-emitting element comprises a light-emitting diode. 如申請專利範圍第12項所述之封裝結構的製作方法,其中該發光二極體為表面黏著型發光二極體。The method for fabricating a package structure according to claim 12, wherein the light emitting diode is a surface-adhesive light-emitting diode. 如申請專利範圍第12項所述之封裝結構的製作方法,其中該發光二極體包括一側面發光型發光二極體,該側面發光型發光二極體具有一出光面,且該出光面朝向該封裝膠體外。The method for fabricating a package structure according to claim 12, wherein the light emitting diode comprises a side light emitting type light emitting diode, the side light emitting type light emitting diode has a light emitting surface, and the light emitting surface is oriented The encapsulant is external to the body. 如申請專利範圍第10項所述之封裝結構的製作方法,其中該至少一電子元件包括一快閃記憶體晶片以及一控制晶片。The method of fabricating a package structure according to claim 10, wherein the at least one electronic component comprises a flash memory chip and a control wafer. 如申請專利範圍第10項所述之封裝結構的製作方法,更包括:於進行該單體化步驟之前,形成多個連接墊於該陣列基板相對於該表面的一底表面上。The method for fabricating a package structure according to claim 10, further comprising: forming a plurality of connection pads on a bottom surface of the array substrate relative to the surface before performing the singulation step. 如申請專利範圍第10項所述之封裝結構的製作方法,其中該些接墊為多個表面黏著型接墊。The method for fabricating a package structure according to claim 10, wherein the pads are a plurality of surface-adhesive pads. 如申請專利範圍第17項所述之封裝結構的製作方法,其中該些接墊的材質包括銲料。The method for fabricating a package structure according to claim 17, wherein the materials of the pads comprise solder. 如申請專利範圍第17項所述之封裝結構的製作方法,其中各該接墊是由一銲料層及於其上銲接一金屬塊所構成。The method of fabricating a package structure according to claim 17, wherein each of the pads is formed by a solder layer and a metal block soldered thereon. 如申請專利範圍第19項所述之封裝結構的製作方法,其中該金屬塊的材質包括鋁。The method for fabricating a package structure according to claim 19, wherein the material of the metal block comprises aluminum.
TW100126411A 2011-07-26 2011-07-26 Package structure and manufacturing method thereof TW201306184A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114843258A (en) * 2022-02-10 2022-08-02 友达光电股份有限公司 Display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114843258A (en) * 2022-02-10 2022-08-02 友达光电股份有限公司 Display device

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