TW201305694A - Display panel - Google Patents
Display panel Download PDFInfo
- Publication number
- TW201305694A TW201305694A TW100127051A TW100127051A TW201305694A TW 201305694 A TW201305694 A TW 201305694A TW 100127051 A TW100127051 A TW 100127051A TW 100127051 A TW100127051 A TW 100127051A TW 201305694 A TW201305694 A TW 201305694A
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- retaining wall
- display panel
- sealant
- disposed
- Prior art date
Links
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)
Abstract
Description
本申請案是有關於一種顯示面板，且特別是有關於一種具有溝槽與擋牆之配合設計的顯示面板。The present application relates to a display panel, and more particularly to a display panel having a matching design of a groove and a retaining wall.
近年來，由於各種顯示技術不斷地蓬勃發展，在經過持續地研究開發之後，電泳顯示面板、液晶顯示面板、有機發光二極體顯示面板等產品已逐漸地商業化，並且被應用於各種尺寸的顯示裝置中。In recent years, as various display technologies continue to flourish, after continuous research and development, products such as electrophoretic display panels, liquid crystal display panels, and organic light-emitting diode display panels have been gradually commercialized and applied to various sizes. In the display device.
以液晶顯示面板為例，其製造過程包括薄膜電晶體陣列基板的製作、彩色濾光基板的製作、框膠塗佈、液晶注入、薄膜電晶體陣列基板與彩色濾光基板對位壓合、框膠固化等步驟。在框膠塗佈的過程中，若所塗佈之膠量過多，極有可能導致框膠在第一基板與第二基板彼此接合的過程中發生溢流(overflow)，進而遮蔽住薄膜電晶體陣列基板或彩色濾光基板上的對位標記，此時，溢流的框膠會影響薄膜電晶體陣列基板與彩色濾光基板之間的對位。值得注意的是，由於框膠的溢流現象多發生在框膠的角落處，而對位標記亦多半製作於薄膜電晶體陣列基板或彩色濾光基板的角落處，因此若可避免溢流的框膠遮蔽對位標記，將有助於增加液晶顯示面板的良率。Taking a liquid crystal display panel as an example, the manufacturing process includes the fabrication of a thin film transistor array substrate, the fabrication of a color filter substrate, the sealant coating, the liquid crystal injection, the alignment of the thin film transistor array substrate and the color filter substrate, and the frame. The steps of curing the glue. In the process of the sealant coating, if the amount of the applied glue is too much, it is highly likely that the sealant overflows during the process of joining the first substrate and the second substrate, thereby shielding the thin film transistor. The alignment mark on the array substrate or the color filter substrate, at this time, the overflow of the sealant affects the alignment between the thin film transistor array substrate and the color filter substrate. It is worth noting that since the overflow phenomenon of the sealant occurs mostly at the corner of the sealant, and the alignment mark is mostly formed at the corner of the thin film transistor array substrate or the color filter substrate, if overflow can be avoided Masking the alignment marks will help increase the yield of the LCD panel.
本申請案提供一種顯示面板，其具有溝槽與擋牆之配合設計。The application provides a display panel having a matching design of a groove and a retaining wall.
本申請案提供一種顯示面板，其包括一第一基板、一第二基板、一對位標記、一顯示介質、一框膠以及一擋牆。第一基板具有一溝槽，對位標記配置於第一基板或第二基板上，顯示介質配置於第一基板與第二基板之間，而框膠配置於第一基板與第二基板之間並且環繞顯示介質，其中對位標記位於框膠所環繞的範圍之外。此外，擋牆配置於第一基板與第二基板之間，且溝槽與擋牆位於框膠與對位標記之間。The present application provides a display panel including a first substrate, a second substrate, a pair of bit marks, a display medium, a frame glue, and a retaining wall. The first substrate has a trench, the alignment mark is disposed on the first substrate or the second substrate, the display medium is disposed between the first substrate and the second substrate, and the sealant is disposed between the first substrate and the second substrate And surrounding the display medium, wherein the alignment mark is outside the range surrounded by the sealant. In addition, the retaining wall is disposed between the first substrate and the second substrate, and the groove and the retaining wall are located between the sealant and the alignment mark.
在本發明之一實施例中，前述之第一基板為一主動元件陣列基板，而第二基板為一對向基板。In an embodiment of the invention, the first substrate is an active device array substrate, and the second substrate is a pair of substrates.
在本發明之一實施例中，前述之主動元件陣列基板具有一保護層，而溝槽位於保護層中。In an embodiment of the invention, the active device array substrate has a protective layer and the trench is located in the protective layer.
在本發明之一實施例中，前述之顯示介質例如為液晶層、有機電激發光層或電泳液層。In an embodiment of the invention, the display medium is, for example, a liquid crystal layer, an organic electroluminescent layer or an electrophoretic layer.
在本發明之一實施例中，前述之擋牆位於第一基板上，而擋牆朝向第二基板延伸，且擋牆例如係與第二基板之間維持一間隙。In an embodiment of the invention, the foregoing retaining wall is located on the first substrate, and the retaining wall extends toward the second substrate, and the retaining wall maintains a gap between the second substrate, for example.
在本發明之一實施例中，前述之擋牆位於第二基板上，而擋牆朝向第一基板延伸，且擋牆例如係與第一基板之間維持一間隙。In an embodiment of the invention, the foregoing retaining wall is located on the second substrate, and the retaining wall extends toward the first substrate, and the retaining wall maintains a gap between the retaining wall and the first substrate, for example.
在本發明之一實施例中，前述之擋牆例如為L形擋牆或弧形擋牆。In an embodiment of the invention, the aforementioned retaining wall is, for example, an L-shaped retaining wall or an arc retaining wall.
在本發明之一實施例中，前述之顯示面板可進一步包括多個間隙物(spacers)，其中間隙物配置於第一基板與第二基板之間，而間隙物位於框膠所環繞的區域內，且擋牆之材質與間隙物之材質實質上相同。In an embodiment of the invention, the display panel may further include a plurality of spacers, wherein the spacer is disposed between the first substrate and the second substrate, and the spacer is located in a region surrounded by the sealant. And the material of the retaining wall is substantially the same as the material of the spacer.
在本發明之一實施例中，前述之顯示面板可進一步包括多個配置於第一基板與第二基板之間的間隙物，其中至少部分之間隙物被框膠所包覆，且擋牆之材質與間隙物之材質實質上相同。In an embodiment of the invention, the display panel may further include a plurality of spacers disposed between the first substrate and the second substrate, wherein at least part of the spacers are covered by the sealant, and the retaining wall The material is substantially the same as the material of the spacer.
在本發明之一實施例中，前述之溝槽與框膠之間的最短距離小於擋牆與框膠之間的最短距離。換言之，溝槽位於框膠與擋牆之間。In an embodiment of the invention, the shortest distance between the aforementioned groove and the sealant is smaller than the shortest distance between the retaining wall and the sealant. In other words, the groove is located between the sealant and the retaining wall.
在本發明之一實施例中，前述之溝槽的深度例如係介於3500埃至40000埃之間。In an embodiment of the invention, the depth of the aforementioned trench is, for example, between 3,500 angstroms and 40,000 angstroms.
在本發明之一實施例中，前述之擋牆的高度例如係介於2微米至4微米之間。In an embodiment of the invention, the height of the aforementioned retaining wall is, for example, between 2 microns and 4 microns.
在本申請案之顯示面板中，溝槽與擋牆之配合設計可以有效地避免框膠在第一基板與第二基板彼此接合的過程中溢流而遮蔽對位標記。換言之，本申請案之溝槽與擋牆的配合設計可以確保第一基板與第二基板之間的對位。In the display panel of the present application, the matching design of the groove and the retaining wall can effectively prevent the sealant from overflowing during the process of joining the first substrate and the second substrate to shield the alignment mark. In other words, the mating design of the groove and the retaining wall of the present application can ensure the alignment between the first substrate and the second substrate.
為讓本申請案之上述和其他目的、特徵和優點能更明顯易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下。The above and other objects, features, and advantages of the present invention will become more apparent and understood.
圖1為本發明第一實施例之顯示面板的上視示意圖，圖2為圖1中角落C處沿著A-A’剖線之剖面示意圖，而圖3為框膠發生溢流的剖面示意圖。請參照圖1與圖2，本實施例之顯示面板100包括一第一基板110、一第二基板120、一對位標記130、一顯示介質140、一框膠150以及一擋牆160。第一基板110具有一溝槽G，對位標記130配置於第一基板110或第二基板120上，顯示介質140配置於第一基板110與第二基板120之間，而框膠150配置於第一基板110與第二基板120之間並且環繞顯示介質140，其中對位標記130位於框膠150所環繞的範圍之外。此外，擋牆160配置於第一基板110與第二基板120之間，且溝槽G與擋牆160位於框膠150與對位標記130之間。在本實施例中，顯示面板100例如為液晶顯示面板、有機電激發光顯示面板或電泳顯示面板。換言之，本實施例之顯示介質例如為液晶層、有機電激發光層或電泳液層。1 is a top plan view of a display panel according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line A-A' of the corner C in FIG. 1, and FIG. 3 is a schematic cross-sectional view showing overflow of the sealant. . Referring to FIG. 1 and FIG. 2 , the display panel 100 of the present embodiment includes a first substrate 110 , a second substrate 120 , a pair of bit marks 130 , a display medium 140 , a sealant 150 , and a retaining wall 160 . The first substrate 110 has a trench G. The alignment mark 130 is disposed on the first substrate 110 or the second substrate 120. The display medium 140 is disposed between the first substrate 110 and the second substrate 120, and the sealant 150 is disposed on the first substrate 110 or the second substrate 120. Between the first substrate 110 and the second substrate 120 and surrounding the display medium 140, wherein the alignment mark 130 is located outside the range surrounded by the sealant 150. In addition, the retaining wall 160 is disposed between the first substrate 110 and the second substrate 120 , and the trench G and the retaining wall 160 are located between the sealant 150 and the alignment mark 130 . In the embodiment, the display panel 100 is, for example, a liquid crystal display panel, an organic electroluminescent display panel, or an electrophoretic display panel. In other words, the display medium of the present embodiment is, for example, a liquid crystal layer, an organic electroluminescent layer, or an electrophoretic layer.
在本實施例中，第一基板110例如為一具有薄膜電晶體陣列TFT的薄膜電晶體陣列基板(TFT array substrate)，當然第一基板110亦可以是其他型態之主動元件陣列基板，而第二基板120例如為一具有彩色濾光薄膜(未繪示)、黑矩陣(未繪示)以及共通電極COM的對向基板。此外，前述之第一基板110(即主動元件陣列基板)可進一步包括一保護層PV，而前述之溝槽G位於保護層PV中。在本實施例中，溝槽G的深度例如係介於3500埃至40000埃之間，而溝槽G的深度例如係小於保護層PV的厚度。然而，本實施例並不限定溝槽G的深度，意即溝槽G的深度亦可大於或等於保護層PV的厚度。In this embodiment, the first substrate 110 is, for example, a TFT array substrate having a thin film transistor array TFT. Of course, the first substrate 110 may be another type of active device array substrate. The second substrate 120 is, for example, an opposite substrate having a color filter film (not shown), a black matrix (not shown), and a common electrode COM. In addition, the foregoing first substrate 110 (ie, the active device array substrate) may further include a protective layer PV, and the foregoing trench G is located in the protective layer PV. In the present embodiment, the depth of the trench G is, for example, between 3,500 angstroms and 40,000 angstroms, and the depth of the trench G is, for example, less than the thickness of the protective layer PV. However, this embodiment does not limit the depth of the trench G, that is, the depth of the trench G may also be greater than or equal to the thickness of the protective layer PV.
如圖1所示，本實施例之對位標記130例如具有十字形圖案或是具有十字形鏤空區域之圖案。然而，本實施例不限定對位標記130的形狀，其可以是能夠輔助對位的任意形狀之圖案。舉例而言，當對位標記130係位於第一基板110上時，對位標記130可與薄膜電晶體陣列TFT中的金屬層一起製作，此時，對位標記130例如具有十字形圖案。當對位標記130係位於第二基板120上時，對位標記130可與第二基板120上的黑矩陣一併製作，此時，對位標記130例如具有十字形鏤空區域之圖案。As shown in FIG. 1, the alignment mark 130 of the present embodiment has, for example, a cross-shaped pattern or a pattern having a cross-shaped cutout area. However, the present embodiment does not limit the shape of the alignment mark 130, which may be a pattern of any shape capable of assisting alignment. For example, when the alignment mark 130 is on the first substrate 110, the alignment mark 130 may be formed together with the metal layer in the thin film transistor array TFT, and at this time, the alignment mark 130 has, for example, a cross-shaped pattern. When the alignment mark 130 is located on the second substrate 120, the alignment mark 130 may be formed together with the black matrix on the second substrate 120. At this time, the alignment mark 130 has, for example, a pattern of a cross-shaped hollow area.
在本實施例中，擋牆160例如係位於第二基板120上，而擋牆160會朝向第一基板110延伸，且擋牆160例如係與第一基板110之間維持一間隙G1。此外，擋牆160的高度例如係介於2微米至4微米之間。舉例而言，本實施例之擋牆160例如為L形擋牆。當然，擋牆160亦可以是弧形擋牆(未繪示)或是其他形狀之擋牆。In the present embodiment, the retaining wall 160 is located on the second substrate 120, for example, and the retaining wall 160 extends toward the first substrate 110, and the retaining wall 160 maintains a gap G1 between the first substrate 110 and the first substrate 110, for example. Further, the height of the retaining wall 160 is, for example, between 2 microns and 4 microns. For example, the retaining wall 160 of the present embodiment is, for example, an L-shaped retaining wall. Of course, the retaining wall 160 can also be a curved retaining wall (not shown) or a retaining wall of other shapes.
在框膠150未發生溢流的情況下，溝槽G與框膠150之間的最短距離D1小於擋牆160與框膠150之間的最短距離D2，如圖2所示。換言之，溝槽G位於框膠150的外側壁與擋牆160之間。當框膠150之溢流情況發生時，框膠150的寬度會明顯地變寬，且溝槽G會被溢流的框膠150所覆蓋，如圖3所示。溢流的框膠150有可能會與擋牆160接觸。In the case where the sealant 150 does not overflow, the shortest distance D1 between the groove G and the sealant 150 is smaller than the shortest distance D2 between the retaining wall 160 and the sealant 150, as shown in FIG. In other words, the groove G is located between the outer side wall of the sealant 150 and the retaining wall 160. When the overflow of the sealant 150 occurs, the width of the sealant 150 is significantly widened, and the groove G is covered by the overflow sealant 150, as shown in FIG. The overflow of the sealant 150 may come into contact with the retaining wall 160.
值得注意的是，本實施例不限定溝槽G會完全被溢流的框膠150所覆蓋，亦不限定溢流的框膠150必須與擋牆160接觸。舉例而言，溢流的框膠150可能僅覆蓋於部分的溝槽G上，且未與擋牆160接觸。此外，溢流的框膠150亦可能完全覆蓋住溝槽G，但未與擋牆160接觸。It should be noted that this embodiment does not limit that the groove G will be completely covered by the overflow of the sealant 150, and the overflow of the sealant 150 must be in contact with the retaining wall 160. For example, the overflow of the sealant 150 may only cover a portion of the groove G and is not in contact with the retaining wall 160. In addition, the overflow of the sealant 150 may also completely cover the groove G, but is not in contact with the retaining wall 160.
承上述，溝槽G是否被完全溢流的框膠150所覆蓋以及框膠150至否與擋牆160接觸端視框膠150溢流的程度(膠量)而定。In view of the above, whether the groove G is covered by the completely overflowed sealant 150 and whether the sealant 150 is at the contact with the retaining wall 160 depends on the degree of overflow of the sealant 150 (adhesive amount).
在本實施例中，在框膠150溢流至遮蔽對位標記130之前，其必須先填滿溝槽G以及溝槽G上方的空間，且必須穿過擋牆160與第二基板120之間的間隙G1，才有機會遮蔽住對位標記130。因此，前述之溝槽G與擋牆160可以有效地降低框膠150遮蔽住對位標記130的風險，增進第一基板110與第二基板120之間對位的精確度。In this embodiment, before the sealant 150 overflows to the shield alignment mark 130, it must first fill the space above the trench G and the trench G, and must pass between the barrier wall 160 and the second substrate 120. The gap G1 has a chance to obscure the alignment mark 130. Therefore, the foregoing groove G and the retaining wall 160 can effectively reduce the risk of the sealant 150 shielding the alignment mark 130 and improve the alignment accuracy between the first substrate 110 and the second substrate 120.
在本實施例中，顯示面板100可進一步包括多個配置於第一基板110與第二基板120之間的間隙物PS，這些間隙物PS係位於框膠150所環繞的區域內，且擋牆160之材質與間隙物PS之材質實質上相同。換言之，本實施例之擋牆160可與間隙物PS一併製作，故擋牆160的製作與顯示面板之製程相容，不會造成製程成本上的負擔。In this embodiment, the display panel 100 may further include a plurality of spacers PS disposed between the first substrate 110 and the second substrate 120. The spacers PS are located in a region surrounded by the sealant 150, and the retaining wall The material of 160 is substantially the same as the material of the spacer PS. In other words, the retaining wall 160 of the present embodiment can be fabricated together with the spacer PS, so that the fabrication of the retaining wall 160 is compatible with the process of the display panel, and does not impose a burden on the process cost.
圖4為本發明第二實施例之顯示面板的剖面示意圖。請參照圖4，本實施例之顯示面板100a與第一實施例之顯示面板100類似，以下僅針對二實施例之間的主要差異進行描述，其餘技術細節不再重述。在本實施例之顯示面板100a中，擋牆160a位於第一基板110上，而擋牆160a朝向第二基板120延伸，且擋牆160a例如係與第二基板120之間維持一間隙G2。換言之，擋牆160a與溝槽G位於同一的基板上。4 is a cross-sectional view showing a display panel according to a second embodiment of the present invention. Referring to FIG. 4, the display panel 100a of the present embodiment is similar to the display panel 100 of the first embodiment. The following mainly describes the main differences between the two embodiments, and the rest of the technical details are not repeated. In the display panel 100a of the present embodiment, the retaining wall 160a is located on the first substrate 110, and the retaining wall 160a extends toward the second substrate 120, and the retaining wall 160a maintains a gap G2 between the second substrate 120, for example. In other words, the retaining wall 160a is located on the same substrate as the trench G.
圖5為本發明第三實施例之顯示面板的剖面示意圖。請參照圖5，本實施例之顯示面板100b與第一實施例之顯示面板100類似，以下僅針對二實施例之間的主要差異進行描述，其餘技術細節不再重述。在本實施例之顯示面板100a中，部分的間隙物PS位於框膠150所環繞的區域內，而部分的間隙物PS會被框膠150所包覆。Figure 5 is a cross-sectional view showing a display panel in accordance with a third embodiment of the present invention. Referring to FIG. 5, the display panel 100b of the present embodiment is similar to the display panel 100 of the first embodiment. The following mainly describes the main differences between the two embodiments, and the rest of the technical details are not repeated. In the display panel 100a of the present embodiment, part of the spacers PS are located in the area surrounded by the sealant 150, and part of the spacers PS are covered by the sealant 150.
在前述多個實施例之顯示面板中，溝槽G與擋牆160、160a之配合設計可以有效地避免框膠150在第一基板110與第二基板120彼此接合的過程中溢流而遮蔽住對位標記130。換言之，本申請案之溝槽G與擋牆160、160a的配合設計可以確保第一基板110與第二基板120之間的對位。In the display panel of the foregoing various embodiments, the matching design of the groove G and the retaining walls 160, 160a can effectively prevent the sealant 150 from overflowing during the process of joining the first substrate 110 and the second substrate 120 to each other. Alignment mark 130. In other words, the mating design of the trench G of the present application and the retaining walls 160, 160a can ensure alignment between the first substrate 110 and the second substrate 120.
雖然本申請案已以較佳實施例揭露如上，然其並非用以限定本申請案，任何熟習此技藝者，在不脫離本申請案之精神和範圍內，當可作些許之更動與潤飾，因此本申請案之保護範圍當視後附之申請專利範圍所界定者為準。Although the present application has been disclosed in the above preferred embodiments, it is not intended to limit the application, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present application. Therefore, the scope of protection of this application is subject to the definition of the scope of the patent application.
100、100a、100b．．．顯示面板100, 100a, 100b. . . Display panel
110．．．第一基板110. . . First substrate
120．．．第二基板120. . . Second substrate
130．．．對位標記130. . . Alignment mark
140．．．顯示介質140. . . Display medium
150．．．框膠150. . . Frame glue
160、160a．．．擋牆160, 160a. . . Retaining wall
C．．．角落C. . . corner
G．．．溝槽G. . . Trench
PV．．．保護層PV. . . The protective layer
TFT．．．薄膜電晶體陣列TFT. . . Thin film transistor array
PS．．．間隙物PS. . . Interstitial
G1、G2．．．間隙G1, G2. . . gap
D1、D2．．．最短距離D1, D2. . . Shortest distance
COM．．．共通電極COM. . . Common electrode
圖1為本發明第一實施例之顯示面板的上視示意圖。1 is a top plan view of a display panel according to a first embodiment of the present invention.
圖2為圖1中角落C處沿著A-A’剖線之剖面示意圖。Figure 2 is a schematic cross-sectional view taken along line A-A' of the corner C in Figure 1.
圖3為框膠發生溢流的剖面示意圖。Figure 3 is a schematic cross-sectional view showing the overflow of the sealant.
圖4為本發明第二實施例之顯示面板的剖面示意圖。4 is a cross-sectional view showing a display panel according to a second embodiment of the present invention.
圖5為本發明第三實施例之顯示面板的剖面示意圖。Figure 5 is a cross-sectional view showing a display panel in accordance with a third embodiment of the present invention.
100．．．顯示面板100. . . Display panel
110．．．第一基板110. . . First substrate
120．．．第二基板120. . . Second substrate
130．．．對位標記130. . . Alignment mark
140．．．顯示介質140. . . Display medium
150．．．框膠150. . . Frame glue
160．．．擋牆160. . . Retaining wall
C．．．角落C. . . corner
G．．．溝槽G. . . Trench
PS．．．間隙物PS. . . Interstitial
Claims (15)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100127051A TWI447492B (en) | 2011-07-29 | 2011-07-29 | Display panel |
| CN201110280357.6A CN102289111B (en) | 2011-07-29 | 2011-09-07 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100127051A TWI447492B (en) | 2011-07-29 | 2011-07-29 | Display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201305694A true TW201305694A (en) | 2013-02-01 |
| TWI447492B TWI447492B (en) | 2014-08-01 |
Family
ID=45335639
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW100127051A TWI447492B (en) | 2011-07-29 | 2011-07-29 | Display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102289111B (en) |
| TW (1) | TWI447492B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI504978B (en) * | 2013-12-05 | 2015-10-21 | Innolux Corp | Liquid crystal display panel and preparation method thereof |
| TWI657272B (en) * | 2017-12-13 | 2019-04-21 | 大陸商友達光電（昆山）有限公司 | Color filter plate and display panel having the same |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8786817B2 (en) | 2012-04-11 | 2014-07-22 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Liquid crystal panel and manufacturing method thereof |
| CN102636915A (en) * | 2012-04-11 | 2012-08-15 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and manufacturing method thereof |
| CN102686076B (en) * | 2012-05-09 | 2014-03-26 | 漳州科华技术有限责任公司 | Waterproof display panel and assembling process thereof |
| CN102707509B (en) * | 2012-06-13 | 2015-06-17 | 深圳市华星光电技术有限公司 | Liquid crystal panel and manufacturing method thereof |
| CN104122700A (en) * | 2014-05-29 | 2014-10-29 | 京东方科技集团股份有限公司 | Substrate for 3D display, manufacturing method thereof and mask plate |
| CN105607350B (en) * | 2014-11-20 | 2019-04-05 | 群创光电股份有限公司 | Display panel |
| CN104570450A (en) * | 2015-02-05 | 2015-04-29 | 京东方科技集团股份有限公司 | Display baseplate, display panel and display device |
| CN105093705B (en) * | 2015-08-07 | 2018-11-23 | 深圳市华星光电技术有限公司 | Ultra-narrow frame display panel |
| CN105355144B (en) * | 2015-12-15 | 2018-01-02 | 友达光电（苏州）有限公司 | Display module and its manufacture method |
| CN107290901B (en) * | 2017-08-21 | 2020-05-29 | 武汉天马微电子有限公司 | Display panel and display device |
| CN107561748B (en) * | 2017-11-01 | 2020-04-24 | 深圳市宇顺电子股份有限公司 | Method for preventing conductive transparent glass from deviation in fitting |
| US11042054B2 (en) * | 2018-09-30 | 2021-06-22 | HKC Corporation Limited | Display panel and display device |
| CN208705613U (en) * | 2018-09-30 | 2019-04-05 | 惠科股份有限公司 | Display panel and display device |
| US10782569B2 (en) * | 2018-09-30 | 2020-09-22 | HKC Corporation Limited | Display panel and a display device |
| CN208705624U (en) * | 2018-09-30 | 2019-04-05 | 惠科股份有限公司 | Display panel and display device |
| TWI699580B (en) * | 2019-03-07 | 2020-07-21 | 友達光電股份有限公司 | Array substrate |
| CN109870839B (en) | 2019-04-03 | 2021-03-12 | 友达光电（昆山）有限公司 | Display panel |
| CN110908171A (en) * | 2019-11-27 | 2020-03-24 | Tcl华星光电技术有限公司 | Liquid crystal display panel |
| CN111025799B (en) * | 2019-12-02 | 2021-07-27 | 苏州华星光电技术有限公司 | Display panel and display device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6018380A (en) * | 1997-09-02 | 2000-01-25 | Prime View International Co. | LCD having trench formed on the substrate(s) to stop sealing material flowing to display areas |
| KR100573225B1 (en) * | 2003-09-24 | 2006-04-24 | 엘지.필립스 엘시디 주식회사 | Method of crystallizing of an amorphous silicon layer |
| TWI330271B (en) * | 2005-09-20 | 2010-09-11 | Chi Mei Optoelectronics Corp | Liquid crystal display panel and manufacturing method of substrate thereof |
| CN101308292A (en) * | 2008-07-09 | 2008-11-19 | 友达光电股份有限公司 | Liquid crystal display panel and its array substrate |
| TWI411840B (en) * | 2008-07-22 | 2013-10-11 | Au Optronics Corp | Matrix substrate and liquid crystal display panel |
| CN101349826B (en) * | 2008-09-04 | 2010-07-07 | 友达光电股份有限公司 | Display and method for measuring contraposition set vertical bias of the display |
-
2011
- 2011-07-29 TW TW100127051A patent/TWI447492B/en not_active IP Right Cessation
- 2011-09-07 CN CN201110280357.6A patent/CN102289111B/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI504978B (en) * | 2013-12-05 | 2015-10-21 | Innolux Corp | Liquid crystal display panel and preparation method thereof |
| TWI657272B (en) * | 2017-12-13 | 2019-04-21 | 大陸商友達光電（昆山）有限公司 | Color filter plate and display panel having the same |
| CN109782472A (en) * | 2017-12-13 | 2019-05-21 | 友达光电（昆山）有限公司 | A kind of color filter and the display panel including the color filter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102289111A (en) | 2011-12-21 |
| TWI447492B (en) | 2014-08-01 |
| CN102289111B (en) | 2014-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI447492B (en) | Display panel | |
| TWI391733B (en) | Lcd panel and array substrate thereof | |
| US20170222181A1 (en) | Display device | |
| US9638969B2 (en) | Liquid crystal display (LCD) panel, manufacturing method thereof and display device | |
| US8786816B2 (en) | Display panel and manufacturing method for the same | |
| US20150192816A1 (en) | Liquid crystal display panel and manufacturing method thereof | |
| TW200707036A (en) | Liquid crystal panel having dual column spacer and manufacturing method thereof | |
| US9921444B2 (en) | Liquid crystal panel | |
| US9684213B2 (en) | BOA liquid crystal panel and manufacturing method thereof | |
| JP2005202352A (en) | Liquid crystal panel and its manufacturing method | |
| US8830438B2 (en) | LCD panel and manufacturing method for the same | |
| TWI406064B (en) | Display panel | |
| TWI752954B (en) | Display apparatus and method of manufacturing the same | |
| US10217773B2 (en) | Array substrate and fabrication method thereof, display panel and fabrication method thereof | |
| US20110299017A1 (en) | Liquid crystal display manufacturing method, liquid crystal display, and electronic apparatus | |
| US9507207B2 (en) | Display device | |
| US20150303306A1 (en) | Thin film transistor and method for manufacturing the same, array substrate, display device | |
| JP2008158169A (en) | Liquid crystal display panel and method for manufacturing the same | |
| KR20020031251A (en) | Liquid Crystal Display Panel of Liquid Crystal Accumulation Method | |
| US9263483B2 (en) | Array panel and manufacturing method for the same | |
| KR102491118B1 (en) | Display panel assembly and method of manufacturing the display panel | |
| KR20150097889A (en) | Liquid crystal display | |
| CN107505778B (en) | Display and manufacturing process thereof | |
| KR101846549B1 (en) | Display device and manufacturing of the same | |
| US20180350842A1 (en) | Array substrate, display panel and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |