TW201301771A - Frequency locking method, frequency locking circuit, oscillator gain anticipating method and oscillator gain anticipating circuit - Google Patents

Abstract

A frequency locking method, for locking an output signal output from a frequency locking circuit to a target frequency, comprising: (a) detecting an output frequency of the output signal, which is generated from an oscillating signal of an controllable oscillator; (b) computing a frequency difference between the output frequency and the target frequency; and (c) utilizing a controllable factor adjusting device to provide and to adjust a normalization factor, to predict a gain of the controllable oscillator and to provide a control signal related with the normalization factor and the frequency difference, wherein the output frequency is related with a product of the normalization factor and the gain of the controllable oscillator; (d) controlling the controllable oscillator according to the control signal, such that the output frequency is approaching the target frequency.

Description

Frequency locking method, frequency locking circuit, oscillator gain prediction method, and oscillator gain prediction circuit

The present invention relates to a frequency locking method and a frequency locking circuit, and more particularly to a frequency locking method and a frequency locking circuit for continuously adjusting a normalization coefficient such that a product of the normalization coefficient and the oscillator gain is successively approximated by a predetermined product. The invention also relates to an oscillator gain prediction method and an oscillator gain prediction circuit.

FIG. 1 illustrates a frequency locking circuit 100 of the prior art. As shown in FIG. 1, the frequency lock circuit 100 includes a frequency detector 101, a low pass filter 103, a controllable oscillator 105, and a frequency divider 107. The output signal S _out is divided by the frequency divider 107 to generate a frequency-divided output signal S _outf , and the frequency-divided output signal S _outf is transmitted to the frequency detector 101. After comparing the frequency of the output signal S _outf after the frequency division and the difference of the target frequency F _target , the frequency detector 101 transmits a control signal CS, and the control signal CS is filtered by the low-pass filter 103 and transmitted to the controllable oscillation. The device 105 adjusts the output signal S _out to lock the frequency-divided output signal S _outf to the target frequency F _target , that is, the output signal S _{out is} locked to N times the F _target (N is the frequency division ratio of the frequency divider 107) .

To quickly lock the output signal S _out , it is common practice to increase the bandwidth of the low pass filter 103 or to obtain the gain of the oscillator using an additional oscillator gain corrector. The former method will make the low frequency noise can not be effectively suppressed, affecting the output phase noise of the output signal S _out . The latter, such as the US patents US Pat. No. 6,894,570 and US Pat. No. 6,459,253, require a long correction time, a complicated calculation method and a large-area circuit.

Accordingly, it is an object of the present invention to provide a frequency locking method and a frequency locking circuit that do not affect the bandwidth.

Another object of the present invention is to provide a fast locking frequency locking method and frequency locking circuit.

Another object of the present invention is to provide a fast mode gain prediction method and gain prediction circuit for background mode execution.

An embodiment of the present invention discloses a frequency locking method for locking an output signal outputted by a frequency locking circuit to a target frequency, comprising: (a) detecting an output frequency of the output signal, wherein the output signal Based on the oscillation frequency of a controllable oscillator; (b) calculating the frequency difference between the output frequency and the target frequency; (c) according to the frequency difference, using a controllable coefficient adjustment component to provide and adjust a regular a coefficient for predicting the gain of the controllable oscillator and providing a control signal associated with the normalization coefficient and the frequency difference, wherein the output frequency is followed by the normalization coefficient and the gain of the controllable oscillator The product is related; (d) controlling the controllable oscillator according to the control signal to make the output frequency approximate the target frequency.

According to another embodiment of the present invention, a frequency lock circuit includes: a controllable oscillator for generating an oscillation signal; and a frequency detector for detecting one of the output signals generated according to the oscillation signal Outputting a frequency and calculating a frequency difference between the output frequency and a target frequency; a controllable gain adjustment component for providing a normalization coefficient to predict a gain of the controllable oscillator and providing the normalization coefficient And a control signal related to the frequency difference, wherein the output frequency is related to the product of the normalization coefficient and the gain of the controllable oscillator; and a controller that adjusts the normalization coefficient according to the frequency difference; The controllable oscillator adjusts the output frequency according to the control signal and the controller adjusts the normalization coefficient to approximate the output frequency to the target frequency.

Another embodiment of the present invention discloses an oscillator gain prediction method, including: (a) detecting an output frequency of an output signal, wherein the output signal is generated according to an oscillation frequency of a controllable oscillator; (b) calculating a frequency difference between the output frequency and the target frequency; (c) providing a normalization coefficient by using a controllable coefficient adjustment component, wherein the output frequency is associated with the normalization coefficient and the controllable oscillator The product of the gain is related; and (d) adjusting the normalization coefficient, and predicting the gain of the controllable oscillator based on the normalization coefficient and the relationship of the frequency difference.

Another embodiment of the present invention discloses an oscillator gain prediction circuit, including: a controllable oscillator for generating an oscillation signal; and a frequency detector for detecting a signal generated according to the oscillation signal. Outputting a frequency of one of the output signals and calculating a frequency difference between the output frequency and the target frequency; a controllable gain adjustment component for providing a normalization coefficient, wherein the output frequency is followed by the normalization coefficient and the controllable The product of the gain of the oscillator is related; and a controller adjusts the normalization coefficient according to the frequency difference, and predicts the gain of the controllable oscillator according to the normalization coefficient and the relationship of the frequency difference.

According to the foregoing embodiment, the frequency of the output signal can be quickly corrected without increasing the pre-controllable oscillator gain prediction circuit and without changing the bandwidth, while the gain of the oscillator is obtained in the background mode. Moreover, because the background mode is used to detect the gain of the controllable oscillator, in addition to making the output frequency quickly approach the target frequency, it can compensate for the drift of the oscillator gain due to the temperature change, and provide an additional loop for the entire loop. The advantage of fixed loop bandwidth values makes the relationship between loop bandwidth and process variation approach zero.

Certain terms are used throughout the description and following claims to refer to particular elements. Those of ordinary skill in the art should understand that a hardware manufacturer may refer to the same component by a different noun. The scope of this specification and the subsequent patent application do not use the difference of the names as the means for distinguishing the elements, but the difference in function of the elements as the criterion for distinguishing. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term "coupled" is used herein to include any direct and indirect electrical connection. Therefore, if a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device or indirectly electrically connected to the second device through other devices or connection means.

FIG. 2A depicts a frequency lockout circuit 200 in accordance with an embodiment of the present invention. As shown in FIG. 2A, the frequency lock circuit 200 includes a controllable oscillator 201, a frequency detector 203, a controllable coefficient adjustment component 205, and a controller 207. The oscillator 201 is configured to generate an output signal S _out . The frequency detector 203 is configured to detect an output frequency (F _o ) of the output signal S _out and calculate a frequency difference Δ f between the output frequency and the target frequency F _target . It should be noted that, in this embodiment, the oscillation signal generated by the controllable oscillator 201 is directly used as the output signal S _out , but the output signal S _out can also be generated by dividing the oscillation signal (for example, FIG. 1). The frequency divider 107). Such variations are intended to be within the scope of the invention.

The controllable coefficient adjustment component 205 is configured to provide a normalization factor ( Adjust the output frequency with the controllable oscillator 201 (its gain is K _DCO ). The controller 207 adjusts the normalization coefficient according to the frequency difference Δ f . In this embodiment, the frequency detector 203 sequentially detects the frequency difference between the adjusted output frequency and the target frequency, and the controller 207 controls the controllable coefficient adjusting component 205 to sequentially increase or decrease the normalization coefficient. And adjusting the control signal CS of the controllable oscillator 201 such that the output frequency F _o gradually approaches the target frequency F _target (ie, The product with K _DCO is 1). The frequency lock circuit 200 can further include a low pass filter 209 to make the control signal transmitted to the oscillator 201 more stable.

The operation of the frequency lock circuit 200 shown in Fig. 2A will be described in detail below. The output frequency in Figure 2 can be expressed as the following identity (1):

Where f _o,n is the output frequency of the current cycle, f _o,n-1 is the output frequency of the previous cycle, and f _target is the target frequency. The coefficient of the controllable coefficient adjustment component 205 is represented, and K _DCO is the gain of the controllable oscillator 201. According to the identity (1), if it can be adjusted By making it the reciprocal of K _DCO , the output frequency f _{o,n can be} locked to the target frequency f _target after a comparison period.

FIG. 3 is a schematic diagram showing the operation of the frequency locking circuit shown in FIG. 2A. It is known from the identity (1):

According to FIG. 3, when it is detected that the initial output frequency f ₁ has a frequency difference err ₁ from the target frequency f _target , the normalization coefficient is adjusted to To generate a new output frequency f ₂ , the difference between the output frequency f ₂ and the target frequency f _target will be less than the difference between the output frequency f ₁ and the target frequency f _target . If the output frequency f ₂ and the target frequency f _target still have a frequency difference err ₂ , the normalization coefficient is adjusted to To generate a new output frequency f ₃ , the difference between the output frequency f ₃ and the target frequency f _target will be less than the difference between the output frequency f ₂ and the target frequency f _target . By analogy, it will always be adjusted Until the output frequency is the same as or equal to the target frequency f _target less than a predetermined value (the minimum frequency difference that the controllable oscillator can change). In other words, the output frequency is adjusted successively so that it gradually approaches the target frequency value and The lock becomes 1. Sustainable adjustments in the examples To correct the fluctuation of the oscillator gain during operation. It should be noted that in this case, although Locked to 1, but can also be set to lock it into other predetermined products, as is well known to those skilled in the art, so that the function of approaching the target frequency can be achieved.

In an embodiment, it is determined according to whether the polarity changes (that is, the output frequency is greater or less than the target frequency). How to adjust the amount, as shown in Figure 4 below.

Figure 4 illustrates an example of how to adjust the controllable coefficient adjustment components shown in Figures 2A and 2B, which includes the following steps:

Step 401

Detect the difference between the output frequency and the target frequency.

Step 403

It is judged whether the frequency difference is less than or equal to a predetermined value, and if so, it indicates that the output frequency has been locked to the target frequency, so to step 413. If not, proceed to step 405 for subsequent procedures.

Step 405

Is the polarity determined? If so, it means The adjustment is overdone, so it is lowered to step 407. If not, it means It can be further increased to approach the target frequency, so it is stepped up to step 409.

Step 407

will Adjust to the last time minus 1/2 of the adjustment amount.

Step 409

will Adjust to the last time Plus 1/2 of the adjustment amount.

Step 411

Based on new Update the output frequency.

Step 413

End.

It should be noted that in the flowchart shown in FIG. 4, step 403 and step 413 may not be included. That is, 401, 405, 407, 409, and 411 can be repeatedly executed and the frequency is constantly approached to the required output frequency, so that the output frequency is maintained at a relatively accurate value.

The flow chart shown in FIG. 4 simplifies the frequency locking method as follows: (a) detecting an output frequency of the output signal, wherein the output signal is generated according to an oscillation frequency of a controllable oscillator; Calculating a frequency difference between the output frequency and the target frequency; (c) using a controllable coefficient adjustment component to provide and adjust a normalization coefficient to predict the gain of the controllable oscillator and provide And a control signal related to the difference between the normalization coefficient and the frequency difference, wherein the output frequency is related to the product of the normalization coefficient and the gain of the controllable oscillator; (d) controlling the controllable oscillation according to the control signal To bring the output frequency closer to the target frequency. . It should be noted that the increment and decrement value of the normalization coefficient is not limited by the foregoing steps 407 and 409, and the increase and decrease value may be a predetermined value or a value calculated by other mathematical formulas.

According to the previous embodiment, in addition to the foregoing frequency locking method, an oscillator gain prediction method can be obtained, which can include the following steps: (a) detecting an output frequency of an output signal, wherein the output signal is based on (a) calculating a frequency difference between the output frequency and the target frequency; (c) providing a normalization coefficient by using a controllable coefficient adjustment component, wherein the output frequency is And the (d) adjusting the normalization coefficient, and predicting the controllable oscillator according to the normalization coefficient and the relationship of the frequency difference; Gain.

This oscillator gain prediction method can be performed by the circuit shown in FIG. 2A. That is, when the frequency detector 203 detects the frequency difference between the output frequency F _o and the target frequency F _target , the information is transmitted to the controller 207, since the controller 207 is also responsible for the normalization coefficient. Adjustment, so we will know the normalization coefficient Relationship with frequency differences. And by constant adjustment And according to the aforementioned identity (1), the gain of the controllable oscillator 201 can be predicted. The frequency locking circuit 200 shown in FIG. 2A may further include a mechanism for adjusting the bandwidth. As shown in FIG. 2B, the frequency lock circuit 200 further includes a bandwidth adjustment component 208. In this embodiment, the bandwidth adjustment component 208 is located between the controllable coefficient adjustment component 205 and the low pass filter 207. , but can also be located in other locations. The bandwidth adjustment component 208 can be used to provide a dynamic bandwidth during the frequency lockout process (and even if the output frequency gradually approaches the target frequency), making the frequency lockout circuit 200 more resilient in frequency locking and adjusting the normalization coefficients. The bandwidth adjustment component 208 can be implemented by a variety of circuits or components. For example, when the processed signal is a digital signal, it can be a scaler, and if it is an analog signal, it can be a current mirror (current mirror) ). This mechanism of adjusting the bandwidth is independent of the controllable coefficient adjustment component, which makes the adjustment of the circuit more flexible.

Figures 5 and 6 illustrate an embodiment of a frequency detector in the frequency lock circuit shown in Figure 2. The graph (a) in Fig. 5 uses the two counters 501 and 503 to count the signal of the target frequency F _target and the output signal having the output frequency F _o , respectively, and then calculates the difference via the subtractor 505. The Count _target indicates the count value of the counter 501, and the Count _OSC indicates the count value of the counter 503. By comparing the two count values, the difference between the target frequency F _target and the output frequency F _o can be known. Figure (b) in Figure 5 uses a phase detector 507 to detect the signal with the target frequency F _target and the output signal to generate the signals Q _A and Q _B representing its phase relationship, and then the D-type flip-flop 509 digitizes the outputs Q _A and Q _B of the phase detector 507 to form only the signals of Lead and Lag. Figure (a) in Figure 6 shows the use of an integrator and phase detection to find the phase error after multiple time periods. Figure (b) in Figure 6 uses an integrator to generate a phase pulse Err Pulse representing the phase difference and describes the Err Pulse as a digital form using a time to digital converter (TDC). It should be noted that Figures 5 and 6 are for illustrative purposes only and are not limiting of the invention. The oscillator in Figure 2 can be a digitally controlled oscillator that can be implemented with a digital analog converter plus a voltage controlled oscillator. Or use a delta-sigma modulator plus a digitally controlled oscillator to implement a more accurate digitally controlled oscillator.

According to the foregoing embodiment, the frequency of the output signal can be quickly corrected without increasing the pre-controllable oscillator gain prediction circuit and without changing the bandwidth, while the gain of the oscillator is obtained in the background mode. The so-called background mode refers to locking the normalization coefficient while locking the frequency. Moreover, because the background mode is used to detect the gain of the controllable oscillator, in addition to making the output frequency quickly approach the target frequency, it can compensate for the drift of the oscillator gain due to the temperature change, and provide an additional loop for the entire loop. The advantage of fixed loop bandwidth values makes the relationship between loop bandwidth and process variation approach zero.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100, 200. . . Frequency lockout circuit

105, 201. . . Controllable oscillator

101, 203. . . Frequency detector

103, 209. . . Low pass filter

107. . . Frequency divider

205. . . Controllable coefficient adjustment component

207. . . Controller

208. . . Bandwidth adjustment component

509. . . D-type flip-flop

501, 503. . . counter

505. . . Subtractor

507. . . Phase detector

Figure 1 illustrates a frequency locking circuit of the prior art.

Figure 2 illustrates a frequency lockout circuit in accordance with an embodiment of the present invention.

FIG. 3 is a schematic diagram showing the normalization coefficient control operation shown in FIG. 2.

Figure 4 shows an example of how to adjust the normalization coefficient shown in Figure 2.

Figures 5 and 6 illustrate an embodiment of a frequency detector in the frequency lock circuit shown in Figure 2.

200. . . Frequency lockout circuit

201. . . Controllable oscillator

203. . . Frequency detector

205. . . Controllable coefficient adjustment component

207. . . Controller

209. . . Low pass filter

Claims (26)

A frequency locking method for locking an output signal outputted by a frequency locking circuit to a target frequency, comprising: (a) detecting an output frequency of the output signal, wherein the output signal is based on a controllable oscillator (b) calculating the frequency difference between the output frequency and the target frequency; (c) predicting the controllable by using a controllable coefficient adjustment component to provide and adjust a normalization coefficient according to the frequency difference a gain of the oscillator and providing a control signal associated with the normalization coefficient and the frequency difference, wherein the output frequency is related to the product of the normalization coefficient and the gain of the controllable oscillator; (d) The control signal controls the controllable oscillator such that the output frequency approaches the target frequency. The frequency locking method according to claim 1, wherein the step (b) successively determines the frequency difference between the adjusted output frequency and the target frequency, and the step (c) sequentially increases or decreases the normalization coefficient. The product of the normalization coefficient and the oscillator gain is successively approximated by a predetermined product, and is sequentially adjusted according to the steps (c) and (d) such that the output frequency gradually approaches the target frequency. The frequency locking method according to claim 2, wherein the step (c) comprises: increasing or decreasing the normalization coefficient by a predetermined value so that the product of the normalization coefficient gradually increases with the oscillator gain is successively approximated The predetermined product. The controllable oscillator gain detection and frequency locking method according to claim 3, wherein reducing the normalization coefficient reduces a predetermined ratio of a previous normalization coefficient change amount, and increasing the normalization coefficient system A predetermined ratio of the amount of change in the last normalization coefficient is increased. The frequency locking method of claim 4, wherein the certain ratio is 1/2. The frequency locking method according to claim 2, wherein the step (c) is such that the product of the normalization coefficient and the oscillator gain is successively approximated by one. The frequency locking method according to claim 1, further comprising: providing a dynamic bandwidth during the frequency locking process. A frequency locking circuit includes: a controllable oscillator for generating an oscillation signal; and a frequency detector for detecting an output frequency of an output signal generated according to the oscillation signal and calculating the output frequency a frequency difference from a target frequency; a controllable gain adjustment component for providing a normalization coefficient to predict the gain of the controllable oscillator and providing a control associated with the normalization coefficient and the frequency difference a signal, wherein the output frequency is related to the product of the normalization coefficient and the gain of the controllable oscillator; and a controller that adjusts the normalization coefficient according to the frequency difference; wherein the controllable oscillator is configured according to the The control signal adjusts the output frequency and the controller adjusts the normalization coefficient to approximate the output frequency to the target frequency. The frequency locking circuit of claim 8, wherein the frequency detector successively determines the frequency difference between the adjusted output frequency and the target frequency, and the controller controls the controllable coefficient adjusting component to The normalization coefficient is successively increased or decreased such that the product of the normalization coefficient and the oscillator gain is successively approximated by a predetermined product such that the output frequency gradually approaches the target frequency. The frequency locking circuit of claim 9, wherein the controllable gain adjustment component increases or decreases the normalization coefficient by a predetermined value such that the product of the normalization coefficient and the oscillator gain is successively approximated by one. Schedule the product. The frequency locking circuit of claim 10, wherein reducing the normalization coefficient reduces a predetermined ratio of the amount of change of the previous normalization coefficient, and increasing the normalization coefficient increases the amount of change of the previous normalization coefficient. a predetermined ratio. The frequency locking circuit of claim 11, wherein the certain ratio is 1/2. The frequency locking method of claim 9, wherein the controller successively approximates the product of the normalization coefficient and the oscillator gain by one. The frequency locking circuit of claim 8, further comprising: a bandwidth adjusting component for providing a dynamic bandwidth during the frequency locking process. An oscillator gain prediction method includes: (a) detecting an output frequency of an output signal, wherein the output signal is generated according to an oscillation frequency of a controllable oscillator; (b) calculating the output frequency and the a frequency difference of the target frequency; (c) providing a normalization coefficient using a controllable coefficient adjustment component, wherein the output frequency is related to the product of the normalization coefficient and the gain of the controllable oscillator; and (d Adjusting the normalization coefficient, and predicting the gain of the controllable oscillator according to the normalization coefficient and the relationship of the frequency difference. The oscillator gain prediction method according to claim 15, wherein the step (b) sequentially determines the frequency difference between the adjusted output frequency and the target frequency, and the step (d) sequentially increases or decreases the normalization. The coefficient is such that the product of the normalization coefficient and the oscillator gain is successively approximated by a predetermined product to predict the gain of the controllable oscillator. The oscillator gain prediction method according to claim 16, wherein the step (d) comprises: increasing or decreasing the normalization coefficient by a predetermined value so that the normalization coefficient gradually multiplies the oscillator gain A predetermined product is successively approximated. The oscillator gain prediction method according to claim 17, wherein reducing the normalization coefficient reduces a predetermined ratio of the amount of change of the previous normalization coefficient, and increasing the normalization coefficient increases the last normalization coefficient change. a predetermined ratio of the amount. The oscillator gain prediction method according to claim 18, wherein the certain ratio is 1/2. The oscillator gain prediction method according to claim 16, wherein the step (d) is such that the product of the normalization coefficient gradually increasing with the oscillator gain is successively approximated by one. An oscillator gain prediction circuit includes: a controllable oscillator for generating an oscillation signal; and a frequency detector for detecting an output frequency of an output signal generated according to the oscillation signal and calculating the frequency a frequency difference between the output frequency and the target frequency; a controllable gain adjustment component for providing a normalization coefficient, wherein the output frequency is related to the product of the normalization coefficient and the gain of the controllable oscillator; And a controller, adjusting the normalization coefficient according to the frequency difference, and predicting the gain of the controllable oscillator according to the normalization coefficient and the relationship of the frequency difference. The oscillator gain prediction circuit according to claim 21, wherein the frequency detector sequentially determines the frequency difference between the adjusted output frequency and the target frequency, and the controller controls the controllable coefficient adjustment component. The gain of the controllable oscillator is predicted by successively increasing or decreasing the normalization coefficient such that the product of the normalization coefficient and the oscillator gain is successively approximated by a predetermined product. The oscillator gain prediction circuit of claim 22, wherein the controllable gain adjustment component increases or decreases the normalization coefficient by a predetermined value such that the coefficient successively approximates the gain of the controllable oscillator reciprocal. The oscillator gain prediction circuit according to claim 23, wherein reducing the normalization coefficient reduces a predetermined ratio of the amount of change of the previous normalization coefficient, and increasing the normalization coefficient increases the last normalization coefficient change. a predetermined ratio of the amount. The oscillator gain prediction circuit of claim 24, wherein the certain ratio is 1/2. The oscillator gain prediction method according to claim 21, wherein the controller successively approximates the product of the normalization coefficient to the oscillator gain by one.