TW201250846A - Method and device for forming insulation film - Google Patents
Method and device for forming insulation film Download PDFInfo
- Publication number
- TW201250846A TW201250846A TW100134446A TW100134446A TW201250846A TW 201250846 A TW201250846 A TW 201250846A TW 100134446 A TW100134446 A TW 100134446A TW 100134446 A TW100134446 A TW 100134446A TW 201250846 A TW201250846 A TW 201250846A
- Authority
- TW
- Taiwan
- Prior art keywords
- plasma
- film
- insulating film
- gas
- substrate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Metallurgy (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Organic Chemistry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Plasma & Fusion (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
201250846 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種絕緣膜形成裝置及方法。 【先前技術】 半導體元件等半導體裝置中使用有氧化矽膜或氮化矽膜 等絕緣膜，該等絕緣膜係使用電漿CVD(Chemical Vapor Deposition，化學氣相沈積）裝置等而形成。 [先前技術文獻] [專利文獻] [專利文獻1]曰本專利特開2010-067993號公報 【發明内容】 [發明所欲解決之問題] 於藉由作為絕緣膜之一種之氮化矽膜（SiN膜）被覆製造 半導體元件必需之階差時使用先前之電漿CVD裝置之情形 時’呈現如圖9(a)所示之階差被覆性。具體而言，於形成 於基板30上之高縱橫比（例如10:ι)之溝槽31(階差）中，側 壁32上之SiN膜33之膜厚變薄，其變薄之部分之絕緣性能 變差。側壁32上SiN膜33之膜厚變薄之原因在於，由於有 助於成膜之氣體附著於側壁32上，故而於溝槽31之較深部 分的侧壁32上，有助於成膜之氣體之到達量減少。又，如 圖9(b)所示’具有氣體對側壁32之附著概率越高，則侧壁 32之膜厚越薄之性質。 於先前之電漿CVD裝置中，以SiH4、N2、NH3作為原料 之成膜方法之情形時，為形成絕緣性優異iSiN膜，需要201250846 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to an insulating film forming apparatus and method. [Prior Art] An insulating film such as a hafnium oxide film or a tantalum nitride film is used for a semiconductor device such as a semiconductor element, and these insulating films are formed by a plasma CVD (Chemical Vapor Deposition) device or the like. [PRIOR ART DOCUMENT] [Patent Document 1] [Patent Document 1] JP-A-2010-067993 SUMMARY OF INVENTION [Problems to be Solved by the Invention] A tantalum nitride film is used as a kind of insulating film ( When the SiN film is coated with the step necessary for manufacturing a semiconductor element, the case of the prior plasma CVD apparatus is used to 'present the step coverage as shown in FIG. 9(a). Specifically, in the trench 31 (step) of a high aspect ratio (for example, 10:1) formed on the substrate 30, the film thickness of the SiN film 33 on the sidewall 32 is thinned, and the thinned portion is insulated. Performance is degraded. The reason why the film thickness of the SiN film 33 on the side wall 32 is thinned is that since the gas contributing to the film formation adheres to the side wall 32, it contributes to film formation on the side wall 32 of the deep portion of the groove 31. The amount of gas reached is reduced. Further, as shown in Fig. 9(b), the higher the adhesion probability of the gas to the side wall 32, the thinner the film thickness of the side wall 32 is. In the case of the film forming method using SiH4, N2, and NH3 as a raw material in the conventional plasma CVD apparatus, it is necessary to form an iSiN film excellent in insulating properties.
158758.doc S 201250846 利用產生大量附著概率較高之激發種、例如SiH2(NH2)[附 著概率：G.G8]的條件n如上所述具有氣體之附著概 率越高，則側壁上之膜厚越薄之性質，無法獲得充分之階 差被覆性（參照下述表1之先前例2)。 另一方面，使用附著概率較低之激發種、例如siH3 [附 著概率：0.05]之情形時，階差被覆性雖提昇，但膜組成富 含Si，存在絕緣性降低之問題（參照下述表丨之先前例丨）。 如上所述，先前之電漿CVD裝置的成膜方法中，難以兼 具階差被覆性與絕緣性兩者。 本發明係鑒於上述問題而成，其目的在於提供一種使絕 緣性與階差被覆性一併提昇之絕緣膜形成裝置及方法。 [解決問題之技術手段] 解決上述問題之第1發明之絕緣膜形成裝置係形成被覆 基板上所形成之階差之絕緣膜者，其特徵在於包括： 氣體供給機構，其供給包含含有Si之主原料氣體與不含 有Si之副原料氣體在内的複數種氣體； 電聚生成機構，其生成上述氣體之電漿；及 控制機構，其對上述氣體供給機構及上述電漿生成機構 進行控制；且 上述控制機構實施以下步驟： 成膜步驟，藉由上述氣體供給機構供給至少上述主原料 氣體藉由上述電漿生成機構，生成包含與電漿生成時之 主要激發種相比，對上述基板之附著概率較低之激發種的 電漿，使用該電漿於上述階差上形成前驅膜；及158758.doc S 201250846 The condition n which produces a large amount of excitation species with a high probability of adhesion, such as SiH2(NH2) [adhesion probability: G.G8], has a higher adhesion probability of gas as described above, and the film thickness on the side wall is higher. Due to the nature of the thinness, sufficient step coverage is not obtained (refer to the previous example 2 of Table 1 below). On the other hand, when an excitation species having a low adhesion probability, for example, siH3 [adhesion probability: 0.05] is used, the step coverage is improved, but the film composition is rich in Si, and there is a problem that the insulation is lowered (refer to the following table). The previous example of 丨). As described above, in the film forming method of the conventional plasma CVD apparatus, it is difficult to combine both the step coverage and the insulation. The present invention has been made in view of the above problems, and an object thereof is to provide an insulating film forming apparatus and method which improve both insulation and step coverage. [Means for Solving the Problems] The insulating film forming apparatus according to the first aspect of the present invention is an insulating film for forming a step formed on a coated substrate, and includes: a gas supply mechanism including a main body containing Si a plurality of gases including a material gas and an auxiliary material gas not containing Si; an electropolymerization mechanism that generates a plasma of the gas; and a control unit that controls the gas supply mechanism and the plasma generation mechanism; The control unit performs the following steps: a film forming step of supplying at least the main raw material gas by the gas supply means, and generating, by the plasma generating means, an adhesion to the substrate as compared with a main excited species at the time of plasma generation a plasma of a probable species having a lower probability of using the plasma to form a precursor film on the above-described step; and
S 158758.doc 201250846 組成比減少步驟’於上述成膜步驟之後，藉由上述氣體 供給機構供給上述副原料氣體，藉由上述電漿生成機構生 成上述副原料氣體之電漿’使用該電漿使上述前驅膜中之 Si之組成比減少而製成絕緣膜。 解決上述問題之第2發明之絕緣膜形成裝置係如上述第i 發明之絕緣膜形成裝置，其特徵在於： 上述控制機構交替實施上述成膜步驟與上述組成比減少 步驟複數次。 解決上述問題之第3發明之絕緣膜形成裝置係如上述第i 或第2發明之絕緣膜形成裝置，其特徵在於： 進而包括偏壓施加機構’其對上述基板施加偏壓，且 上述控制機構於上述組成比減少步驟中，藉由上述偏壓 施加機構對上述基板施加偏壓。 解決上述問題之第4發明之絕緣膜形成裝置係如上述第3 發明之絕緣膜形成裝置，其特徵在於： 上述控制機構於上述組成比減少步驟之前實施濺鍍蝕刻 步驟，藉由上述氣體供給機構供給稀有氣體，藉由上述偏 壓施加機構對上述基板施加偏壓，藉由上述電漿生成機構 生成上述稀有氣體之電漿，使用該電漿對上述前驅膜進行 濺鍍蝕刻。 解決上述問題之第5發明之絕緣膜形成裝置係如上述第3 發明之絕緣膜形成裝置，其特徵在於： 上述控制機構於上述組成比減少步驟之後實施濺鍍蝕刻 步驟，藉由上述氣體供給機構供給稀有氣體，藉由上述偏S 158758.doc 201250846 Composition ratio reducing step 'after the film forming step, the auxiliary material gas is supplied by the gas supply means, and the plasma of the auxiliary material gas is generated by the plasma generating means' The composition ratio of Si in the precursor film described above is reduced to form an insulating film. The insulating film forming apparatus according to the second aspect of the present invention, characterized in that the control means alternately performs the film forming step and the composition ratio reducing step a plurality of times. The insulating film forming apparatus according to the third aspect of the invention of the present invention, characterized in that, further comprising: a bias applying means for biasing the substrate, and the control mechanism In the composition ratio reducing step, a bias voltage is applied to the substrate by the bias applying means. The insulating film forming apparatus according to the fourth aspect of the present invention, characterized in that the control means performs a sputtering etching step before the composition ratio reducing step by the gas supply mechanism A rare gas is supplied, and a bias voltage is applied to the substrate by the bias applying means, and the plasma generating means generates a plasma of the rare gas, and the precursor film is sputter-etched using the plasma. The insulating film forming apparatus according to the fifth aspect of the present invention, characterized in that the control means performs a sputtering etching step after the composition ratio reducing step by the gas supply mechanism Supplying rare gases by the above bias
S 158758.doc 201250846 壓施加機構對上述基板施加偏壓，藉由上述電漿生成機構 生成上述稀有氣體之電漿，使用該電漿對上述絕緣膜進行 濺鍍蝕刻。 解決上述問題之第6發明之絕緣膜形成裝置係如上述第1 或第2發明之絕緣膜形成裝置，其特徵在於： 於上述絕緣膜為氮化矽膜之情形時， 使用SiH4作為上述主原料氣體，使用nh3或N2中至少一 種作為上述副原料氣體，生成SiH3作為上述附著概率較低 之激發種。 解決上述問題之第7發明之絕緣膜形成方法係形成被覆 基板上所形成之階差之絕緣膜者，其特徵在於包含： 成膜步驟，供給含有Si之主原料氣體與不含有以之副原 料氣體中的至少上述主原料氣體，生成包含與電漿生成時 之主要激發種相比’對上述基板之附著概率較低之激發種 的電漿，使用該電漿於上述階差上形成前驅膜；及 組成比減少步驟，於上述成膜步驟之後，供給上述副原 料氣體，生成上述副原料氣體之電漿，使用該電漿使上述 刖驅膜中之Si之組成比減少而製成絕緣膜。 解決上述問題之第8發明之絕緣膜形成方法係如上述第7 發明之絕緣膜形成方法，其特徵在於： 交替實施上述成膜步驟與上述組成比減少步驟複數次。 解決上述問題之第9發明之絕緣臈形成方法係如上述第7 或第8發明之絕緣膜形成方法，其特徵在於： 於上述組成比減少步驟中，對上述基板施加偏壓。 158758.doc 201250846 解決上述問題之第10發明之絕緣膜形成方法係如上述第 9發明之絕緣膜形成方法，其特徵在於： 進而包含濺鍍蝕刻步驟，供給稀有氣體，對上述基板施 加偏壓，生成上述稀有氣體之電漿，使用該電漿對上述前 驅膜進行濺鍍蝕刻；且 係於上述組成比減少步驟之前實施上述濺鍍蝕刻步驟。 解決上述問題之第1丨發明之絕緣膜形成方法係如上述第 9發明之絕緣膜形成方法，其特徵在於： 進而包含濺鍍蝕刻步驟，供給稀有氣體，對上述基板施 加偏壓，生成上述稀有氣體之電漿，使用該電漿對上述絕 緣膜進行濺鍍蝕刻；且 係於上述組成比減少步驟之後實施上述濺鍍蝕刻步驟。 解決上述問題之第12發明之絕緣膜形成方法係如上述第 7或第8發明之絕緣膜形成方法，其特徵在於： 於上述絕緣膜為氮化碎膜之情形時， 使用SiH4作為上述主原料氣體，使用NH3或n2中至少一 種作為上述副原料氣體，生成Si%作為上述附著概率較低 之激發種。 [發明之效果] 根據第1、第7發明，可形成兼具階差被覆性與良好之絕 緣性兩者的絕緣膜作為被覆階差之絕緣膜。 根據第2、第8發明，可於階差之侧壁形成所期望之膜厚 之絕緣膜。 根據第3'第9發明’於組成比減少步驟中，可促進其反 158758.doc 201250846 應速度，從而縮短時間。 根據第4、第10發明’於成膜之過程中’可防止階差之 入口附近堵塞，進一步提昇階差被覆性，並且，於濺鍍飯 刻步驟後之組成比減少步驟中，可縮短時間》 根據第5、第11發明’於成膜之過程中，可防止階差之 入口附近堵塞，進一步提昇階差被覆性》 根據第6、第12發明，可形成階差被覆性較佳，且絕緣 性亦較高之氮化矽膜作為被覆階差之絕緣膜。 【實施方式】 以下’參照圖1〜圖8，對本發明之絕緣膜形成裝置及形 成方法之實施形態進行說明。 (實施例1) 圖1係表示本發明之絕緣膜形成裝置之實施形態之S 158758.doc 201250846 The pressure applying mechanism applies a bias voltage to the substrate, and the plasma generating means generates a plasma of the rare gas, and the insulating film is sputter-etched using the plasma. The insulating film forming apparatus according to the first aspect of the invention of the present invention is characterized in that, in the case where the insulating film is a tantalum nitride film, SiH4 is used as the main raw material. As the gas, at least one of nh3 or N2 is used as the above-mentioned auxiliary material gas, and SiH3 is produced as an excitation species having a low adhesion probability. The insulating film forming method according to the seventh aspect of the present invention, which is to form an insulating film formed on a coated substrate, includes a film forming step of supplying a main raw material gas containing Si and not containing an auxiliary material. At least the main raw material gas in the gas generates a plasma containing an excitation species having a lower probability of adhesion to the substrate than the main excitation species at the time of plasma generation, and the plasma is used to form a precursor film on the step. And a composition ratio reduction step, after the film forming step, supplying the auxiliary material gas to form a plasma of the auxiliary material gas, and using the plasma to reduce the composition ratio of Si in the ruthenium drive film to form an insulating film . The method for forming an insulating film according to the eighth aspect of the invention of the present invention, characterized in that the film forming step and the composition ratio reducing step are performed alternately. The method of forming an insulating film according to the ninth or eighth aspect of the invention of the present invention, characterized in that in the composition ratio reducing step, a bias voltage is applied to the substrate. The method of forming an insulating film according to the ninth aspect of the present invention, characterized in that the method of forming an insulating film according to the ninth aspect of the present invention, further comprising: a sputtering etching step of supplying a rare gas and applying a bias voltage to the substrate; A plasma of the above rare gas is generated, and the precursor film is sputter-etched using the plasma; and the sputtering etching step is performed before the composition ratio reduction step. The method for forming an insulating film according to the ninth aspect of the present invention, characterized in that the method further comprises: a sputtering etching step of supplying a rare gas, applying a bias voltage to the substrate, and generating the rare a plasma of gas, which is subjected to sputtering etching using the plasma; and the sputtering etching step is performed after the composition ratio reducing step. The method for forming an insulating film according to the above-described seventh aspect of the present invention, characterized in that, in the case where the insulating film is a nitrided film, SiH4 is used as the main raw material. As the gas, at least one of NH3 or n2 is used as the above-mentioned auxiliary material gas, and Si% is generated as an excitation species having a low adhesion probability. [Effects of the Invention] According to the first and seventh inventions, an insulating film having both step coverage and good insulation can be formed as an insulating film covering the step. According to the second and eighth inventions, an insulating film having a desired film thickness can be formed on the side wall of the step. According to the 3' ninth invention, in the composition ratio reduction step, the speed of the reverse 158758.doc 201250846 can be promoted, thereby shortening the time. According to the fourth and tenth inventions, in the process of forming a film, clogging near the entrance of the step can be prevented, the step coverage can be further improved, and the composition ratio reduction step after the sputtering process can shorten the time. According to the fifth and eleventh inventions, in the process of film formation, clogging near the entrance of the step can be prevented, and the step coverage can be further improved. According to the sixth and twelfth inventions, the step coverage can be formed better, and A tantalum nitride film having a high insulating property is used as an insulating film covering the step. [Embodiment] Hereinafter, embodiments of an insulating film forming apparatus and a forming method of the present invention will be described with reference to Figs. 1 to 8 . (First Embodiment) Fig. 1 is a view showing an embodiment of an insulating film forming apparatus of the present invention.
1夕！J 的概略構成圖 本貫施例之絕緣膜形成裝置為所謂之電漿裝置。具 體而言，如圖1所示，係金屬製圓筒狀之真空室丨之内部構 成為處理室2者，於真空室！之上部開口部以封閉上部開 口部之方式配設有包含絕緣材料之圓板狀之蓋板3。又， 於真空室1之下部’具備支持台4及保持支持台4之下部支 持台於支持台4之上表面，载置有包含半導體材料之 基板5(例如Sl晶圓）。真空室】包含例如料金屬其内壁 經氧化紹膜處理，另外’蓋板3包含例如氧化铭等陶竟。 *板之上$例如配置有包含複數個圓環之高頻天 於高頻天線6上，經由四配器7而連接有數百kHz〜數 158758.doc1 eve! Outline Configuration of J The insulating film forming apparatus of the present embodiment is a so-called plasma device. Specifically, as shown in Fig. 1, the inside of the cylindrical chamber of the metal cylindrical chamber is configured as the processing chamber 2, and is in the vacuum chamber! The upper opening portion is provided with a disk-shaped cover plate 3 containing an insulating material so as to close the upper opening portion. Further, the lower portion of the vacuum chamber 1 is provided with a support table 4 and a lower support portion of the holding support table 4 on the upper surface of the support base 4, and a substrate 5 (for example, an S1 wafer) containing a semiconductor material is placed thereon. The vacuum chamber includes, for example, a metal material whose inner wall is treated with an oxide film, and the 'cover 3' contains, for example, Oxide. * Above the board, for example, a high frequency antenna including a plurality of rings is arranged on the high frequency antenna 6, and hundreds of kHz is connected via the four-carrier 7 to 158758.doc
s S 201250846 百MHz之頻率的高頻（RF(radi〇 frequency，射頻））電源8(電 漿生成機構）。又’真空室1中，設置有向處理室2内導入 所期望之複數種氣體的複數個氣體喷嘴9(氣體供給機構）。 又，支持基板5之支持台4上設置有電極部11，電極部u 上經由匹配器12而連接有低頻（LF(low frequency))電源 13。低頻電源13對電極部11施加低於高頻電源8之頻率， 從而可對基板5施加偏壓電力（偏壓施加機構）。再者，省略 圖示，於支持台4上亦設置有靜電吸盤機構，藉由自靜電 吸盤用電源供電，可將基板5吸附保持於支持台4表面。除 此之外，省略圖示，本實施例之絕緣臈形成裝置亦包括對 上述之電漿生成機構、氣體供給機構、及偏壓施加機構進 行控制之控制裝置（控制機構）。 於上述構成之絕緣膜形成裝置中，藉由對高頻天線6供 給RF功率，電磁波經由蓋板3入射至真空室1中，經由氣體 噴嘴9而導入至真空室丨内之製程氣體由入射之電磁波電漿 化。繼而，使用電漿化之製程氣體於基板5上形成薄膜。 例如，於形成SiN膜之情形時，使用矽烷（SiH4)、氨氣 (NH3)、氮氣（N2)等製程氣體。 再者，上述構成之絕緣膜形成裝置僅為一例，只要為可 實施後述之本實施例之絕緣膜形成方法的電漿cvd裝置， 則亦可為其他構成，例如，電漿生成機構及氣體供給機構 等可應用各種態樣之構成。 其次，對本實施例之絕緣膜形成方法進行說明。 本實施例中，為對半導體元件中之高縱橫比之階差（例 J58758.doc 201250846 如溝槽等）形成兼具階差被覆性與良好之絕緣性兩者的絕 緣膜，概略而言進行了如下所述之設計。具體而令，首 先，於上述構成之絕緣膜形成裝置中，利用形成絕緣膜所 使用之主原料氣體（含有Si)與副原料氣體（不含有Si)生成包 含對基板表面之附著概率較低之激發種的電漿，使用該電 漿進行成膜，藉此形成對階差之階差被覆性較佳之前驅 膜。之後，使用副原料氣體之電漿，對所形成之前驅膜進 行電漿處理，自前驅膜中減少si之組成比，藉此製成絕緣 性較高之絕緣膜。 以下，作為一例，關於將階差設為溝槽（縱橫比= ι〇:ι)， 將絕緣膜設為氮化矽膜（SiN膜）之情形，參照圖2之時序 圖及圖3之剖面圖，對本實施例之絕緣膜形成方法進行詳 細說明。再者，圖3(a)中係例示於基板5上以深度1〇 、 寬度1 μηι而形成之溝槽2〇 ,但階差並不限定於溝槽亦可 為其他形狀之階差，另外，絕緣膜亦並不限定於氮化矽 膜，例如亦可為氧化矽膜（Si〇膜）或氮氧化矽膜（以〇1^膜） 等。 本實施例之絕緣膜形成方法中，首先實施成膜步驟。 於該成膜步驟中，使用氣體喷嘴9,供給用於形成siN膜 之S1H4氣體（主原料氣體^與]^%氣體（副原料氣體），使用電 漿生成機構（高頻天線6、匹配器7 '高頻電源8)，以生成與 主要激發種SiH2(NH2)[0.08]相比對基板5之附著概率較低 之激發種Si%[附著概率：〇·〇5]，並且與主要激發種相比 包含更多該激發種的方式生成電漿，使用該電漿於溝槽2〇 158758.doc 201250846 中形成前驅膜22(參照圖2及圖3(a)、（b)) 〇 此時’重要的是生成含有較多附著概率較低之激發種 SiH3之電聚’只要可生成較多激發種g丨η3,則亦可如下述 表1所示般僅供給SiH4氣體。又，可代替νη3氣體而供給ν2 氣體，亦可與ΝΗ3氣體一併供給ν2氣體。 該成膜步驟中’由於使用包含附著概率較低之激發種 SiH3之電漿’故而可抑制溝槽2〇之較深部分之側壁21上有 助於成膜之激發種Si%之到達量減少，其結果，形成於側 壁21之前驅膜22之膜厚減少亦得到抑制，可使階差被覆性 提昇（參照圖3(a)、（b))。然而，該前驅膜22之膜組成富含 Si(尤其疋僅供給SiH^氣體而成膜之情形），於該狀態下絕 緣性不高。 因此’本實施例之絕緣膜形成方法中，於成膜步驟之後 實施氮化步驟（組成比減少步驟）。 於該氮化步驟中’使用氣體喷嘴9，供給作為副原料氣 體之NH3氣體（或&氣體）’使用電漿生成機構（高頻天線 6、匹配器7、高頻電源8)生成ΝΑ氣體（或n2氣體）之電 漿，使用該電漿使前驅膜22中之Si之組成比減少而製成 SiN膜23(參照圖2及圖3(c))。即，藉由對階差被覆性較 佳，但絕緣性不高之前驅膜22利用NH3氣體（或n2氣體）之 電漿進行氮化，使Si之組成比減少，製成階差被覆性較佳 且絕緣性亦較高之SiN膜23。 繼而，交替實施階差被覆性良好之成膜步驟與絕緣性良 好之氮化步驟至少1次以上，形成溝槽20之側壁21上之膜 158758.doc 201250846 厚為所期望之膜厚的SiN膜23(參照圖3(d))。藉由經過上述 步驟，可形成階差被覆性較佳，且絕緣性亦較高的所期望 之膜厚之SiN膜23。 將幾種本實施例之製程條件例示於下述之表丨之實驗例 1〜3而進行說明。！次之成膜步驟為2秒，其間形成膜厚 nm之前驅膜22。又，如表實驗例】〜3所示，將成膜步 驟中之RF功率之條件分別設為〇.5kw、15kw、4kw，將 氣體流量比[NHASiH^NH3)]分別設為〇以上〇 2以下、〇以 上0.35以下、〇以上〇.5以下。再者，實驗例1〜3中變更氣 體流量比時，係將SiH4氣體之流量固定為60 sccm而變更 NH3氣體之流量。 又，1次之氮化步驟為180秒，利用NH3氣體（或n2氣體） 之電漿對前驅膜22進行氮化❶此時2RF功率之條件可與成 膜步驟中之條件相肖，亦可進行適當變更。又，關於NH3 氣體（或N2氣體）之流量之條件，若成膜步驟中使用nh3氣 艟（或A氣體），則保持為成膜步驟中之流量亦可，但於成 膜步驟中僅為Si%氣體之情形時，則需要以適當之流量供 給NH3氣體（或乂氣體）。再者，於同等條件下，Μ%氣體之 電漿可氮化之膜厚為〇_3 nm，N2氣體之電漿可氮化之膜厚 為〇·5 nm，與ΝΑ氣體相比，A氣體可氮化之臈厚較厚。 义關於溝槽内壁之膜厚’比較本實施例之實驗例卜3與先 則例1、2。此時，使用形成有溝槽2〇之圖案基板，本實施 例之實驗例丨〜3及先前例卜2均以基板5之表面上之膜厚為 30 nm之方式成膜。於本實施例之實驗例丨〜3之情形時，重 158758.docs S 201250846 High frequency (RF (radio frequency)) power supply 8 (plasma generation mechanism) at a frequency of 100 MHz. Further, the vacuum chamber 1 is provided with a plurality of gas nozzles 9 (gas supply means) for introducing a desired plurality of gases into the processing chamber 2. Further, the support base 4 of the support substrate 5 is provided with an electrode portion 11, and the electrode portion u is connected to a low frequency (LF (low frequency)) power source 13 via a matching unit 12. The low frequency power source 13 applies a frequency lower than the high frequency power source 8 to the electrode portion 11, so that bias power (bias applying means) can be applied to the substrate 5. Further, although not shown, an electrostatic chuck mechanism is also provided on the support table 4, and the substrate 5 can be adsorbed and held on the surface of the support table 4 by supplying power from the electrostatic chuck. In addition, the insulating crucible forming apparatus of the present embodiment includes a control device (control means) for controlling the above-described plasma generating mechanism, gas supply mechanism, and bias applying mechanism. In the insulating film forming apparatus having the above configuration, by supplying RF power to the high-frequency antenna 6, electromagnetic waves are incident on the vacuum chamber 1 via the cover 3, and the process gas introduced into the vacuum chamber via the gas nozzle 9 is incident. Electromagnetic wave plasma. Then, a film is formed on the substrate 5 using a plasma process gas. For example, in the case of forming a SiN film, a process gas such as silane (SiH4), ammonia (NH3), or nitrogen (N2) is used. In addition, the insulating film forming apparatus having the above-described configuration is merely an example, and may be another configuration as long as it is a plasma cvd device capable of performing the insulating film forming method of the present embodiment to be described later, for example, a plasma generating mechanism and a gas supply. Organizations and the like can apply various aspects of the composition. Next, a method of forming an insulating film of this embodiment will be described. In the present embodiment, an insulating film having both a step coverage property and a good insulating property is formed for a step of a high aspect ratio (for example, a groove, etc.) in a semiconductor element. The design described below. Specifically, in the insulating film forming apparatus having the above configuration, the main material gas (including Si) and the auxiliary material gas (excluding Si) used for forming the insulating film are formed to have a low probability of adhesion to the surface of the substrate. The plasma of the seed is excited, and the plasma is used for film formation, thereby forming a precursor film which is better in coating the step difference of the step. Thereafter, the plasma of the auxiliary material gas is used to plasma-treat the formed precursor film, and the composition ratio of si is reduced from the precursor film, thereby producing an insulating film having high insulation. Hereinafter, as an example, when the step is a groove (aspect ratio = ι〇: ι) and the insulating film is a tantalum nitride film (SiN film), the timing chart of FIG. 2 and the cross section of FIG. 3 are referred to. The method of forming the insulating film of the present embodiment will be described in detail. In addition, in FIG. 3( a ), the trench 2 形成 formed on the substrate 5 at a depth of 1 〇 and a width of 1 μm is illustrated, but the step is not limited to the groove and may be a step of other shapes. The insulating film is not limited to the tantalum nitride film, and may be, for example, a hafnium oxide film (Si film) or a hafnium oxide film (such as a film). In the method of forming an insulating film of this embodiment, a film forming step is first performed. In the film forming step, the gas nozzle 9 is used to supply the S1H4 gas (main material gas and the gas) (the auxiliary material gas) for forming the siN film, and the plasma generating mechanism (the high frequency antenna 6, the matching device) is used. 7 'high-frequency power supply 8) to generate an excitation species Si% [adhesion probability: 〇·〇5] having a lower adhesion probability to the substrate 5 than the main excitation species SiH2(NH2)[0.08], and with the main excitation The plasma is generated in a manner that contains more of the excited species, and the plasma is used to form the precursor film 22 in the trench 2158758.doc 201250846 (refer to FIG. 2 and FIG. 3(a), (b)). When it is important to generate electropolymerization of the excited species SiH3 having a high adhesion probability, as long as a plurality of excitation species g丨η3 can be generated, only SiH4 gas can be supplied as shown in Table 1 below. The ν2 gas may be supplied instead of the νη3 gas, or may be supplied to the ν2 gas together with the ΝΗ3 gas. In the film forming step, the use of the plasma containing the excitation species SiH3 having a low adhesion probability can suppress the deepness of the trench 2 On the side wall 21 of the portion, the amount of Si% which contributes to film formation is reduced, and as a result, it is formed. The film thickness reduction of the film 22 before the side wall 21 is also suppressed, and the step coverage can be improved (refer to Figs. 3(a) and (b)). However, the film composition of the precursor film 22 is rich in Si (especially In the case where the film is formed only for the SiH gas, the insulating property is not high in this state. Therefore, in the method for forming an insulating film of the present embodiment, the nitriding step (composition ratio reducing step) is performed after the film forming step. In the nitriding step, 'the gas nozzle 9 is used, and the NH 3 gas (or & gas) as the auxiliary material gas is supplied to generate the helium gas using the plasma generating mechanism (the high frequency antenna 6, the matching unit 7, and the high frequency power source 8). Or a plasma of n2 gas), using the plasma to reduce the composition ratio of Si in the precursor film 22 to form the SiN film 23 (see FIGS. 2 and 3(c)), that is, by covering the step difference Preferably, the insulating film 22 is nitrided by a plasma of NH3 gas (or n2 gas) to reduce the composition ratio of Si, thereby preparing SiN having better step coverage and higher insulation. Film 23. Then, a film forming step with good step coverage and a nitriding step with good insulating properties are alternately performed. At least one time or more, the film 158758.doc 201250846 on the side wall 21 of the trench 20 is formed to have a desired thickness of the SiN film 23 (refer to FIG. 3(d)). By the above steps, a step can be formed. The SiN film 23 having a desired film thickness and a high insulating property is also provided. The process conditions of the present embodiment are exemplified in Experimental Examples 1 to 3 of the following table. The film formation step was 2 seconds, during which the film thickness 22 was formed to form the film 22. Further, as shown in the experimental examples ～3, the conditions of the RF power in the film formation step were set to 〇.5kw, 15kw, 4kw, respectively. The gas flow rate ratio [NHASiH^NH3)] is set to 〇2 or more, 〇0.35 or less, and 〇5 or less. Further, in the case of changing the gas flow ratio in Experimental Examples 1 to 3, the flow rate of the SiH4 gas was fixed to 60 sccm, and the flow rate of the NH3 gas was changed. Moreover, the nitridation step of one time is 180 seconds, and the precursor film 22 is nitrided by a plasma of NH3 gas (or n2 gas). The condition of the 2RF power can be compared with the conditions in the film formation step. Make the appropriate changes. Further, regarding the flow rate of the NH 3 gas (or N 2 gas), if nh 3 gas (or A gas) is used in the film formation step, the flow rate in the film formation step may be maintained, but only in the film formation step. In the case of Si% gas, it is necessary to supply NH3 gas (or helium gas) at an appropriate flow rate. Furthermore, under the same conditions, the film thickness of the plasma of Μ% gas can be 〇3 nm, and the film thickness of the plasma of N2 gas can be 〇5 nm, compared with helium gas, A The gas can be nitrided to a thicker thickness. The experimental example 3 and the prior art examples 1 and 2 of the present embodiment were compared with respect to the film thickness of the inner wall of the groove. At this time, the pattern substrate on which the grooves 2A were formed was used, and the experimental examples 丨3 and 3 of the present example were each formed so that the film thickness on the surface of the substrate 5 was 30 nm. In the case of the experimental example 丨~3 of the present embodiment, the weight is 158758.doc
•12· S 201250846 複父替進行上述成膜步驟與氮化步驟60〜100次之程度而成 膜。繼而，研究藉由成膜而獲得之膜之剖面結構，可確 認：先前例中，於距離基板5之表面深度4 pm之側壁21 上，臈厚為5 nm(參照圖3(d)之虛線24、表丨之先前例2)， 相對於此，本實施例中，距離基板5之表面深度4 之侧 壁21上，膜厚為7 nm，階差被覆性較佳（參照圖3(d)、表1 之實驗例1〜3)。 又，亦對絕緣性進行比較（於平面基板上形成SiN膜並評 價膜電阻），結果可確認：於本實施例之情形時，任一實 施例均為1 X 1 〇14 Ω · m，與表i所示之先前例]、2相比較絕 緣性亦較咼（參照表1之實驗例丨、先前例1、2)。 再者’亦進行僅利用本實施例之成膜步驟之成膜、即無 本實施例之氮化步驟之成膜，對藉由該成膜而獲得之膜亦 5平“階差被覆性、絕緣性作為比較例1、2，與本實施例之 實驗例1〜3及先前例1、2一併示於表1中。於比較例1、2中 亦與先前例1、2同樣，無法兼具階差被覆性與良好之絕緣 性兩者。相對於此’本實施例中，如實驗例1〜3所示，可 兼具階差被覆性與良好之絕緣性兩者。 [表1] -----— RF(kW) 氣體流量比 NH3/(SiH4+NH·,) 膜厚(nm) 深度4 μπι處 膜電阻 (Ω · m) 實驗例1 實驗例2 — 實驗例3 4 0-0.2 6〜7 1χ1014 1.5 0-0.35 6-7 1χ1014 0.5 0-0.5 6~7 1χ1014 比較例1 Γ 4 「0.1 7 3χ102 比較例2 4 0.6 5 1χ10Η 先别例1 0.66 0.3 7 3χ10 先前例2 0.66 0.9 5 1χ10υ 158758.doc 201250846 (實施例2) 本實施例係以上述實施例1作為前提者。因此，省略與 實施例1重複之說明，例如絕緣膜形成裝置之構成及絕緣 膜形成方法（成膜步驟、氮化步驟）之基本部分等而進行本 實施例之說明。 本實施例中，於實施例丨中所說明之氮化步驟中，使用 偏壓施加機構（電極部丨丨、匹配器12、低頻電源13)對基板5 施加偏壓。藉由對基板5施加偏壓，使電漿中之離子或電 子照射至基板5，對成膜步驟中所獲得之前驅膜賦予能 量，藉此促進氮化反應。 圖4係將LF = 0 W，即不對基板5施加偏壓之情形時之氮 化速度設為1，將各LF功率下之氮化速度標準化的圖。如 圖4所示’可知：LF=30 W、60 W、180 W之情形與LF=0 w之情形相比，氮化速度較快。另一方面，LF=25〇 w之情 形之氮化速度與LF=0 w之情形相同，LF=3〇〇 w之情形與 LF=0 W之情形相比，氮化速度變慢。其原因在於，當LF 功率增大時’濺鍍姓刻量增加，逐漸變得無助於氮化速 度。因此，作為LF功率，較理想為濺鍍蝕刻量之影響較小 之250 W以下。如上所述，於氮化步驟中，藉由對基板5施 加偏壓可使氮化速度變快，可縮短氮化時間，換言之可縮 短氮化步驟之時間。例如，於LF=3 0 W之情形時，氮化速 度為LF=0 W之情形時之約1 · 1倍，時間可縮短丨〇%左右。 再者’圖4中所評價之基板之直徑為3〇〇 mm(30 cm)。因 此’於基板之直徑不同之情形時，將上述之250 W換算為• 12· S 201250846 The compounding film is formed by performing the film forming step and the nitriding step 60 to 100 times. Then, the cross-sectional structure of the film obtained by film formation was examined, and it was confirmed that in the previous example, the thickness of the side wall 21 of the surface of the substrate 5 was 4 nm (see the dotted line of FIG. 3(d)). 24. In the previous example 2) of the surface, in the present embodiment, the film thickness is 7 nm on the side wall 21 of the surface depth 4 of the substrate 5, and the step coverage is better (refer to FIG. 3 (d). ), Experimental Examples 1 to 3 of Table 1. Further, in comparison with the insulating properties (the SiN film was formed on the planar substrate and the film resistance was evaluated), it was confirmed that in the case of the present embodiment, any of the examples was 1 X 1 〇 14 Ω · m, and The previous examples shown in Table i and the two phases are comparatively insulative (see the experimental example of Table 1, the previous examples 1, 2). Further, the film formation by the film formation step of the present embodiment, that is, the film formation without the nitridation step of the present embodiment, is performed, and the film obtained by the film formation is also "flat" coated. Insulation properties are shown in Table 1 together with Experimental Examples 1 to 3 and Previous Examples 1 and 2 of the present embodiment as Comparative Examples 1 and 2. In Comparative Examples 1 and 2, similarly to the previous Examples 1 and 2, Both of the step coverage and the good insulation are both in this case. In the present embodiment, as shown in Experimental Examples 1 to 3, both the step coverage and the good insulation can be obtained. ]--- RF(kW) gas flow ratio NH3/(SiH4+NH·,) film thickness (nm) film resistance (Ω · m) at a depth of 4 μπι Experimental Example 1 Experimental Example 2 - Experimental Example 3 4 0-0.2 6~7 1χ1014 1.5 0-0.35 6-7 1χ1014 0.5 0-0.5 6~7 1χ1014 Comparative Example 1 Γ 4 "0.1 7 3χ102 Comparative Example 2 4 0.6 5 1χ10Η First Example 1 0.66 0.3 7 3χ10 Previous Example 2 0.66 0.9 5 1χ10υ 158758.doc 201250846 (Embodiment 2) This embodiment is based on the above-described Embodiment 1. Therefore, the description overlapping with Embodiment 1 is omitted, for example, the structure of the insulating film forming apparatus. The description of the present embodiment is carried out by forming a basic portion of the insulating film forming method (film forming step, nitriding step), etc. In the present embodiment, in the nitriding step described in the embodiment, a bias applying mechanism is used. (electrode portion 丨丨, matching unit 12, low-frequency power source 13) biases the substrate 5. By applying a bias voltage to the substrate 5, ions or electrons in the plasma are irradiated onto the substrate 5, which is obtained in the film forming step. The former film is energized to promote the nitridation reaction. Fig. 4 is a nitriding speed of LF = 0 W, that is, when the substrate 5 is not biased, the nitriding speed is set to 1, and the nitriding speed at each LF power is normalized. Figure 4. As shown in Figure 4, it can be seen that the case of LF = 30 W, 60 W, 180 W is faster than the case of LF = 0 w. On the other hand, the case of LF = 25 〇 w The nitriding speed is the same as in the case of LF = 0 w, and the nitriding speed is slower than in the case of LF = 0 W. The reason is that the sputtering is performed when the LF power is increased. The surname increases and gradually becomes unhelpful to the nitriding rate. Therefore, as the LF power, it is more desirable to influence the amount of sputter etching. Less than 250 W. As described above, in the nitriding step, the nitriding speed can be made faster by applying a bias voltage to the substrate 5, and the nitriding time can be shortened, in other words, the nitriding step can be shortened. For example, In the case of LF=3 0 W, when the nitriding speed is LF=0 W, it is about 1·1 times, and the time can be shortened by about 丨〇%. Further, the diameter of the substrate evaluated in Fig. 4 was 3 mm (30 cm). Therefore, when the diameter of the substrate is different, the above 250 W is converted into
158758.doc -14- S 201250846 每單位基板面積之LF功率密度（W/cm2)(約為〇 35 w/cm2)， 根據基板直徑（基板面積）而施加該LF功率密度以下之偏塵 功率即可。 (實施例3) 本實施例亦係以上述實施例丨作為前提者。因此，與實 施例2同樣地，省略與實施例丨重複之說明而進行本實施例 之說明。再者，本實施例亦可以實施例2作為前提。 本實施例中，於實施例丨中所說明之成膜步驟與氮化步 驟之間追加濺鍍蝕刻步驟。具體而言，如圖5之時序圖所 不，於成膜步驟結束後、實施氮化步驟之前，實施濺鍍蝕 刻步驟m覆進行成膜步驟與氮化步料數次之情形 亦同樣。 於該濺鍍蝕刻步驟中，使用氣體喷嘴9供給稀有氣體、 例如Ar等，使用偏壓施加機構（電極部丨丨、匹配器^、低 頻電源13)對基板5施加偏壓，使用電製生成機構（高頻天線 6、匹配器7、高頻電源8)生成稀有氣體之電漿，使用該電 漿對成膜步驟中所獲得之前驅膜22進行濺鍍蝕刻。 參照圖6,對圖5所示之各步驟進行說明。利用實施例】 中所說明之成膜步驟’於溝槽2〇上形成前驅膜22(參昭圖 •該成膜步驟中係使用包含附著概率較低之激發種 siH3之電漿、然即便如此亦於溝槽2G之人口附近之前驅膜 22上形成突出部分22a。為進一步提昇階差被覆性，較佳 為該突出部分22a較小（膜厚較薄）。 因此本實施例中，藉由於成膜步驟結束後實施㈣姓刻 158758.doc 201250846 步驟，使用稀有氣體、例如域體之電襞對突出部分22a 進行濺鑛㈣，藉此除去突出部分仏，防止溝槽之入 口附近堵塞（參照圖6⑻）。於該減鑛姓刻步驟巾，為使濺 鍍蝕刻量較大，與上述實施例2不同地將11?功率亦設為較 大’例如設為LF=1500 W。藉由使用如上所述之LF功率， 使，衆中之離子或電子更多地照射至基板5，增大賤鐘钱 刻量。其中，由於藉由濺鍍蝕刻而削除之突出部分Ua較 薄，故而該濺鍍蝕刻之時間可並不長，例如為〇1秒左右 即可。 之後，利用實施例1中所說明之氮化步驟，對形成於溝 槽20中之前驅膜22進行氮化，製成SiN膜23(參照圖6(c))。 並且，將成膜步驟、濺鍍蝕刻步驟及氮化步驟以該順序實 施至少1次以上，形成溝槽20之側壁21上之膜厚為所期望 之膜厚的SiN膜23(參照圖6(d))。 藉由經過上述之步驟，溝槽20之側壁21上之膜厚變得更 居· ’故而可製成階差被覆性變得更好，且絕緣性亦較高的 所期望之膜厚的SiN膜23。尤其是於本實施例之情形時， 由於在氮化步驟之前實施藏鐘餘刻步驟，故而氮化步驟中 需氮化之膜厚變薄，因此氮化步驟之時間可縮短。 (實施例4) 本實施例亦係以上述實施例1作為前提者。因此，與實 施例2同樣地，省略與實施例1重複之說明而進行本實施例 之說明。再者，本實施例亦可以實施例2作為前提。又， 本實施例相當於實施例3之變形例。158758.doc -14- S 201250846 LF power density per unit substrate area (W/cm2) (approximately w35 w/cm2), the dust power below the LF power density is applied according to the substrate diameter (substrate area) can. (Embodiment 3) This embodiment is also premised on the above embodiment. Therefore, in the same manner as in the second embodiment, the description of the embodiment will be omitted except for the description of the embodiment. Furthermore, the embodiment 2 can also be used as a premise. In this embodiment, a sputtering etching step is added between the film forming step and the nitriding step described in the embodiment. Specifically, as shown in the timing chart of Fig. 5, after the film formation step is completed and before the nitridation step, the sputtering etching step m is performed to cover the film formation step and the nitridation step several times. In the sputtering etching step, a rare gas such as Ar or the like is supplied using the gas nozzle 9, and a bias voltage is applied to the substrate 5 by a bias applying mechanism (electrode portion 丨丨, matching device, low-frequency power source 13), and electricity is generated. The mechanism (the high frequency antenna 6, the matching unit 7, and the high frequency power source 8) generates a plasma of a rare gas, and the plasma film 22 obtained by the film forming step is sputter-etched using the plasma. The steps shown in Fig. 5 will be described with reference to Fig. 6 . The precursor film 22 is formed on the trench 2 by using the film forming step described in the embodiment. (In the film forming step, the plasma containing the excitation species siH3 having a low adhesion probability is used, but even so The protruding portion 22a is also formed on the front film 22 in the vicinity of the population of the trench 2G. To further improve the step coverage, it is preferable that the protruding portion 22a is small (thin film thickness is thin). Therefore, in this embodiment, After the film forming step is completed, the method of (4) surname 158758.doc 201250846 is carried out, and the protruding portion 22a is sputtered (4) using a rare gas such as a domain body, thereby removing the protruding portion 仏 and preventing clogging near the entrance of the groove (refer to Fig. 6 (8)). In order to make the amount of sputter etching larger, the 11? power is also made larger than the above-described second embodiment, for example, LF = 1500 W. The LF power as described above causes the ions or electrons in the group to be irradiated more to the substrate 5, thereby increasing the amount of the clock, wherein the protruding portion Ua which is removed by the sputtering etching is thin, so Sputter etching time is not long, For example, it may be about 1 second. Thereafter, the precursor film 22 formed in the trench 20 is nitrided by the nitridation step described in the first embodiment to form the SiN film 23 (refer to FIG. 6(c). Further, the film forming step, the sputtering etching step, and the nitriding step are performed at least once in this order, and the SiN film 23 having a film thickness on the side wall 21 of the trench 20 having a desired film thickness is formed (refer to the figure). 6(d)). By the above-described steps, the film thickness on the side wall 21 of the trench 20 becomes more ", so that the step coverage is improved and the insulation is also high. The film thickness of the SiN film 23 is desired. Especially in the case of the present embodiment, since the residual step is performed before the nitriding step, the film thickness to be nitrided in the nitriding step is thinned, so the nitriding step (Embodiment 4) This embodiment is also based on the above-described first embodiment. Therefore, in the same manner as in the second embodiment, the description of the present embodiment will be omitted except for the description overlapping with the first embodiment. In this embodiment, the embodiment 2 can also be used as a premise. Further, the embodiment is equivalent to the modification of the embodiment 3. .
158758.doc • 16- S 201250846 本實施例中，如圖7之時序圖所示，於實施例丨中所說明 之氮化步驟結束之後’實施濺鍍蝕刻步驟。即，追加賤鑛 蝕刻步驟之順序與實施例3不同。其於反覆進行成膜步驟 與氮化步驟複數次之情形亦同樣。 又’本實施例之濺鍍蝕刻步驟中’亦係供給稀有氣體 (例如Ar等）’對基板5施加偏壓，生成稀有氣體之電漿， 但與實施例3不同地，係使用該電漿對氮化步驟後所獲得 之SiN膜23進行濺鍍触刻。 參照圖8，對圖7所示之各步驟進行說明。利用實施例i 中所說明之成膜步驟，於溝槽2〇中形成前驅膜22(參照圖 8〇)) ’之後，利用實施例！中所說明之氮化步驟，對溝槽 2〇中所形成之前驅膜22進行氮化，製成SiN膜23(參照圖 8(b))。 该成膜步驟中係使用包含附著概率較低 之激發種SiH3之158758.doc • 16-S 201250846 In this embodiment, as shown in the timing chart of Fig. 7, the sputtering etching step is performed after the end of the nitriding step described in the embodiment. That is, the order of the additional antimony etching step is different from that of the third embodiment. The same applies to the case where the film formation step and the nitridation step are repeated several times. Further, in the sputtering etching step of the present embodiment, a rare gas (for example, Ar or the like) is supplied to apply a bias voltage to the substrate 5 to generate a plasma of a rare gas. However, unlike the third embodiment, the plasma is used. The SiN film 23 obtained after the nitriding step is sputter-etched. The steps shown in Fig. 7 will be described with reference to Fig. 8 . Using the film forming step described in the embodiment i, the precursor film 22 (see Fig. 8A)) is formed in the trench 2A, and the embodiment is utilized! In the nitriding step described above, the precursor film 22 formed in the trench 2 is nitrided to form an SiN film 23 (see Fig. 8(b)). In the film forming step, an excitation species SiH3 containing a lower adhesion probability is used.
削除之突出部分23a較薄， 卜此’亦由於藉由濺鍍蝕刻而 故而其濺鍍姓刻時間亦可不 158758.doc 201250846 長，例如為0.1秒左右即可β 並且，將成膜步驟、氮化步驟及濺鍍蝕刻步驟以該順序 實施至少1次以上，形成溝槽20之側壁21上之膜厚為所期 望之膜厚的SiN膜23(參照圖8(d))e藉由經過上述之步驟， 溝槽20之側壁21上之膜厚變得更厚，故而可形成階差被覆 性變得更好，且絕緣性亦較高的所期望之膜厚的SiN臈 23。 ' [產業上之可利用性] 本發明適用於半導體裝置，尤其適合作為被覆縱橫比較 高之階差之絕緣膜。 【圖式簡單說明】 圖1係表示本發明之絕緣膜形成裝置之實施形態之一例 的概略構成圖0 圖2係表示圖1所示之絕緣膜形成裝置的絕緣膜形成方法 之一例（實施例1)的時序圖。 圖3係說明利用圖2所示之絕緣膜形成方法形成氮化石夕膜 ::程的圖，⑷為形成前之階差之剖面圖，⑻為成膜步 驟中之階差之剖面圖，⑷為氮化步驟中之階差之剖面圖， ⑷為將全部步驟反覆進行複數次後之階差之剖面圖。 圖4係說明本發明之絕緣膜形成方法之另一例（實施 的圖。 圖5係說明本發 的時序圖。 圖6係說明利用圖5所示 明之絕緣膜形成方法之另-例(實施例” 之絕緣膜形成方法形成氮化石夕膜 158758.docThe protruding portion 23a is thinner, and it is also caused by sputtering etching, and the sputtering time may not be 158758.doc 201250846 long, for example, about 0.1 second, β, and the film forming step, nitrogen The etching step and the sputtering etching step are performed at least once in this order, and the SiN film 23 (see FIG. 8(d)) e having a film thickness on the sidewall 21 of the trench 20 is formed to have a desired film thickness. In the step, the film thickness on the side wall 21 of the trench 20 becomes thicker, so that a desired film thickness SiN臈23 having a higher step coverage and a higher insulating property can be formed. [Industrial Applicability] The present invention is suitable for use in a semiconductor device, and is particularly suitable as an insulating film which is coated with a relatively high aspect ratio. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing an example of an embodiment of an insulating film forming apparatus of the present invention. FIG. 2 is a view showing an example of a method for forming an insulating film of the insulating film forming apparatus shown in FIG. 1 (Example) 1) Timing diagram. 3 is a view showing a process of forming a nitride nitride film by using the insulating film forming method shown in FIG. 2, (4) is a cross-sectional view showing a step before forming, and (8) is a cross-sectional view of a step in a film forming step, (4) For the cross-sectional view of the step in the nitriding step, (4) is a cross-sectional view of the step after all the steps are repeated. 4 is a view showing another example of the method for forming an insulating film of the present invention (FIG. 5 is a timing chart for explaining the present invention. FIG. 6 is a view showing another example of the method for forming an insulating film shown in FIG. The formation method of the insulating film forms a nitride film 158758.doc
S -18· 201250846 之、程的®，⑷為成膜步戰中之階差之剖面圖，⑻為減 鑛#刻步驟中之階差之剖面圖，⑷為氮化步驟中之階差之 圖（d)為將全部步驟反覆進行複數次後之階差之剖面 圖。 圖7係說明本發明之絕緣膜形成方法之另一例（實施例4) 的時序圖。 圖8係說明利用圖7所示之絕緣膜形成方法形成氮化矽膜 之過程的圖’（a)為成膜步驟中之階差之剖面圖，（b)為氮 化步驟中之階差之剖面圖，（c)為濺鍍蝕刻步驟中之階差之 剖面圖，（d)為將全部步驟反覆進行複數次後之階差之剖面 圖。 圖9係說明使用先前之電漿C v D裝置時之階差被覆性的 圖，（a)為附著概率為〇.1之情形，（b)為附著概率為〇 8之情 形。 【主要元件符號說明】 5 基板 6 尚頻天線 7 匹配器 8 尚頻電源 9 氣體喷嘴 11 電極部 12 匹配器 13 低頻電源 20 溝槽 158758.doc 201250846 21 側壁 22 前驅膜 22a 突出部 23 SiN膜 23a 突出部 158758.doc -20-S -18· 201250846, the course of the process, (4) is the profile of the step in the film formation step, (8) is the profile of the step in the step of reducing the ore, and (4) is the step of the step of nitriding. Figure (d) is a cross-sectional view showing the step difference after all the steps are repeated. Fig. 7 is a timing chart showing another example (Example 4) of the method for forming an insulating film of the present invention. Figure 8 is a view showing a process of forming a tantalum nitride film by the insulating film forming method shown in Figure 7 (a) is a sectional view in the film forming step, and (b) is a step in the nitriding step. The cross-sectional view, (c) is a cross-sectional view of the step difference in the sputter etching step, and (d) is a cross-sectional view showing the step difference after all the steps are repeated. Fig. 9 is a view showing the step coverage of the conventional plasma C v D device, wherein (a) is the case where the adhesion probability is 〇.1, and (b) is the case where the adhesion probability is 〇 8. [Main component symbol description] 5 Substrate 6 Still frequency antenna 7 Matcher 8 Frequency power supply 9 Gas nozzle 11 Electrode part 12 Matcher 13 Low frequency power supply 20 Groove 158758.doc 201250846 21 Side wall 22 Precursor film 22a Projection 23 SiN film 23a Protruding section 158758.doc -20-
Claims (1)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010220964A JP2012079762A (en) | 2010-09-30 | 2010-09-30 | Insulation film forming apparatus and formation method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201250846A true TW201250846A (en) | 2012-12-16 |
Family
ID=45892717
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW100134446A TW201250846A (en) | 2010-09-30 | 2011-09-23 | Method and device for forming insulation film |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2012079762A (en) |
| TW (1) | TW201250846A (en) |
| WO (1) | WO2012043250A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI575603B (en) * | 2014-07-15 | 2017-03-21 | 尤金科技有限公司 | Method of deposting insulation layer on deep trench having high aspect ratio |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9397289B2 (en) | 2014-03-05 | 2016-07-19 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and method of manufacturing the same |
| JP6733516B2 (en) * | 2016-11-21 | 2020-08-05 | 東京エレクトロン株式会社 | Method of manufacturing semiconductor device |
| WO2019003662A1 (en) * | 2017-06-27 | 2019-01-03 | 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ | Semiconductor device production method, substrate processing device, and program |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06314660A (en) * | 1993-03-04 | 1994-11-08 | Mitsubishi Electric Corp | Method and apparatus for forming thin film |
| JP2001068472A (en) * | 1999-08-30 | 2001-03-16 | Kyocera Corp | Silicon nitride film and piezoelectric resonator |
| JP3833189B2 (en) * | 2003-05-27 | 2006-10-11 | 株式会社リコー | Semiconductor device and manufacturing method thereof |
| JP2009088421A (en) * | 2007-10-03 | 2009-04-23 | Renesas Technology Corp | Semiconductor device manufacturing method |
-
2010
- 2010-09-30 JP JP2010220964A patent/JP2012079762A/en not_active Withdrawn
-
2011
- 2011-09-15 WO PCT/JP2011/071080 patent/WO2012043250A1/en active Application Filing
- 2011-09-23 TW TW100134446A patent/TW201250846A/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI575603B (en) * | 2014-07-15 | 2017-03-21 | 尤金科技有限公司 | Method of deposting insulation layer on deep trench having high aspect ratio |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2012079762A (en) | 2012-04-19 |
| WO2012043250A1 (en) | 2012-04-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20210035854A1 (en) | Method of forming a structure using fluorine removal | |
| US20210066075A1 (en) | Structures including dielectric layers and methods of forming same | |
| US8637410B2 (en) | Method for metal deposition using hydrogen plasma | |
| US8173554B2 (en) | Method of depositing dielectric film having Si-N bonds by modified peald method | |
| TWI479044B (en) | Boron film interface engineering | |
| US7211506B2 (en) | Methods of forming cobalt layers for semiconductor devices | |
| JP2019096877A (en) | Method of selective deposition to form fully self-aligned via | |
| CN107408493B (en) | Pulsed nitride package | |
| JP2020516060A (en) | Two-step process for gap filling high aspect ratio trenches with amorphous silicon film | |
| JP2016510507A (en) | Low shrinkage dielectric film | |
| CN112219261A (en) | Flowable film curing using H2 plasma | |
| TW201250846A (en) | Method and device for forming insulation film | |
| US20090087586A1 (en) | Method of forming silicon nitride films | |
| TW201220400A (en) | Silicon nitride film-forming device and method | |
| US10529565B2 (en) | Method of forming amorphous silicon layer | |
| KR20160062370A (en) | Method of fabricating semiconductor device | |
| US9472392B2 (en) | Step coverage dielectric | |
| US20090087587A1 (en) | Method of forming silicon nitride films | |
| KR101942819B1 (en) | Method for forming thin film | |
| KR20180020775A (en) | Method of fabricating amorphous silicon layer | |
| KR102146543B1 (en) | Method of fabricating amorphous silicon layer | |
| US9269584B2 (en) | N-metal film deposition with initiation layer | |
| JP7474700B2 (en) | Systems and methods for forming metal hardmasks in device manufacturing - Patents.com | |
| US11404263B2 (en) | Deposition of low-stress carbon-containing layers | |
| KR100719805B1 (en) | Method of depositing capacitor electrode adding transition metal |